CN115912302A - Protection circuit, signal switch and communication system of BLVDS interface - Google Patents

Abstract

The invention relates to a protection circuit of a BLVDS interface, a signal exchanger and a communication system, wherein the protection circuit comprises a network transformer, a TVS (transient voltage suppressor) tube which can be connected with the BLVDS interface, a first side AC coupling capacitor circuit and a second side AC coupling capacitor circuit; the first side AC coupling capacitor circuit is respectively connected with the TVS tube and the network transformer, and the network transformer is also connected with the second side AC coupling capacitor circuit. The isolation characteristic of the network transformer is utilized, clutter formed by BLVDS signals and inductance coupling of the network transformer is eliminated by combining the two-side AC coupling capacitor circuits, the effect that the BLVDS interface clamping piece/frame of the whole control platform supports hot plug expansion is achieved, the chip interface is protected while the communication quality is guaranteed, and damage to the chip interface caused by impact generated by hot plug is avoided.

Description

Protection circuit, signal switch and communication system of BLVDS interface

Technical Field

The invention relates to the technical field of industrial control systems, in particular to a protection circuit of a BLVDS interface, a signal switch and a communication system.

Background

At present, with the continuous development of various industries, automatic control scenes with different requirements and different quantities appear, and higher requirements are put forward on the expandability and the customizability of a control system. With the continuous development of the automatic control system, the data traffic of the control system is higher and higher, and the number of expansion nodes is higher and higher, so that a bus interface circuit (BLVDS) based on low voltage differential signaling is more and more popular as a reliable bus technology by virtue of the advantages of the BLVDS in the aspect of multi-point cable/backplane application. Combining different customized control systems, more and more requirements are put on the reliability of the free hot plug of the BLVDS interface equipment.

Currently, the conventional BLVDS interface protection method generally adopts the reverse breakdown characteristic of a transient voltage suppression diode (TVS) to suppress the impact energy on the BLVDS signal line.

In the process of implementing the invention, the inventor finds that at least the following problems exist in the prior art: the clamping voltage of the TVS in the current market is generally not less than 6V, and even if the TVS is operated, the terminal of the chip may be damaged. Therefore, the existing protection means mainly comprising the TVS tube cannot perform effective surge protection on the BLVDS port, and the stability and reliability of the whole system are reduced.

Disclosure of Invention

Technical problem to be solved

In view of the above disadvantages and shortcomings of the prior art, the present invention provides a protection circuit for a BLVDS interface, a signal switch, and a communication system, which solve the problem in the prior art that a chip port may be damaged to affect the expansion of a BLVDS link.

(II) technical scheme

In order to achieve the purpose, the invention adopts the main technical scheme that:

in a first aspect, an embodiment of the present invention provides a protection circuit for a BLVDS interface, where the protection circuit includes a network transformer, a TVS tube capable of being connected to the BLVDS interface, a first-side AC coupling capacitor circuit, and a second-side AC coupling capacitor circuit; the first side AC coupling capacitor circuit is respectively connected with the TVS tube and the network transformer, and the network transformer is also connected with the second side AC coupling capacitor circuit.

In one possible embodiment, the first side AC coupling capacitance circuit includes a plurality of first circuits connected in parallel, and each of the plurality of first circuits includes a plurality of first capacitances connected in parallel.

In one possible embodiment, the second-side AC-coupled capacitance circuit includes a plurality of second circuits connected in parallel, and each of the plurality of second circuits includes a plurality of second capacitances connected in parallel.

In one possible embodiment, the total number of circuits of the plurality of first circuits is the same as the total number of circuits of the plurality of second circuits.

In one possible embodiment, the protection circuit further comprises a center-tapped RC circuit disposed between the first side AC-coupled capacitive circuit and the network transformer, and the center-tapped RC circuit includes a third capacitor and a plurality of resistors, each of the plurality of resistors being connected to the network transformer and the third capacitor, and the third capacitor being further connected to the first side AC-coupled capacitive circuit.

In one possible embodiment, the protection circuit further comprises a center-tap AC circuit disposed between the network transformer and the second-side AC coupling capacitance circuit, and the center-tap AC circuit comprises a plurality of fourth capacitances connected in parallel.

In one possible embodiment, the total number of the plurality of resistors and the total number of the plurality of fourth capacitors are the same.

In one possible embodiment, the BLVDS interface includes a positive power interface, a negative power interface, a plurality of BLVDS differential line positive interfaces, and a plurality of BLVDS differential line negative interfaces.

In a second aspect, an embodiment of the present invention provides a signal switch, which includes a BLVDS interface, an FPGA chip, and a protection circuit of the BLVDS interface, where the protection circuit is connected to the BLVDS interface and the FPGA chip, respectively, and the protection circuit is the protection circuit of the BLVDS interface according to any one of the first aspects.

In a third aspect, an embodiment of the present invention provides a communication system, which includes a signal switch, and the signal switch is the signal switch according to the second aspect.

(III) advantageous effects

The invention has the beneficial effects that:

the utility model provides a protection circuit, signal switch and communication system of BLVDS interface utilizes the isolation characteristic of transformer to combine two side AC coupling capacitor circuit to eliminate the clutter that BLVDS signal and network transformer inductance value coupling formed, the BLVDS interface fastener/frame that reach whole set of control platform support the effect of hot plug extension, protect the chip interface when guaranteeing communication quality, the impact of avoiding the hot plug to produce causes the chip interface to damage.

In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic diagram of a communication system provided in an embodiment of the present application;

fig. 2 is a schematic diagram illustrating a customized cable interface for BLVDS link extension according to an embodiment of the present application;

fig. 3 illustrates a schematic cross-sectional view of a customized cable provided by an embodiment of the present application;

fig. 4 is a schematic diagram illustrating a protection circuit of a BLVDS interface according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram illustrating equivalent inductance of a non-ideal network transformer in the prior art;

fig. 6 is a schematic diagram illustrating a part of a protection circuit of a BLVDS interface according to an embodiment of the present application.

Detailed Description

For the purpose of better explaining the present invention and to facilitate understanding, the present invention will be described in detail by way of specific embodiments with reference to the accompanying drawings.

In addition to the TVS transistor to implement the protection of the BLVDS interface, the existing protection method of the BLVDS interface further includes using an AC coupling capacitor circuit with a single capacitor to eliminate the dc component interference on the link. However, a single AC coupling capacitor circuit can only filter low-frequency direct-current components on a signal line, and cannot effectively filter high-order harmonic components in impact energy generated in hot plugging and surge testing, and still release a large amount of interference signals into a system, thereby affecting the normal operation of the system.

In addition, if only the network transformer is used for protection, the problems of inter-channel interference, noise waves formed by coupling of the BLVDS signal and the network transformer and the like, which influence communication, can be caused.

Based on this, the embodiment of the application provides a protection circuit for a BLVDS interface, which utilizes the isolation characteristic of a network transformer and combines with an AC coupling capacitor circuit on both sides to eliminate clutter formed by the inductive value coupling of a BLVDS signal and the network transformer, so as to achieve the effect that the BLVDS interface card/rack of the whole set of control platform supports hot plug expansion, protect a chip interface while ensuring communication quality, and avoid the chip interface from being damaged due to impact generated by hot plug.

In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Meanwhile, the BLVDS link expansion can be conveniently and quickly completed by utilizing a specially designed customized cable.

Referring to fig. 1, fig. 1 is a schematic diagram illustrating a communication system according to an embodiment of the present disclosure. The communication system shown in fig. 1 includes a signal switch (alternatively referred to as a BLVDS signal switch), a main chassis, and a plurality of extension chassis. The signal switch may be provided with a rack interface, the rack interface may include a main rack interface and a plurality of extension rack interfaces, and the main rack interface of the signal switch may be connected to the main rack via a customized cable, and each of the plurality of extension rack interfaces of the signal switch may be connected to a corresponding extension rack via a customized cable.

The signal switch can further comprise an FPGA chip and a protection circuit of the BLVDS interface, and the rack interface can be respectively connected with each rack interface in the plurality of rack interfaces and the FPGA chip. And a main frame interface of the frame interfaces comprises a power interface and a BLVDS interface, the power interface comprises a positive power interface and a positive power interface, and the BLVDS interface may comprise a positive BLVDS interface (or a positive BLVDS differential line interface) and a negative BLVDS interface (or a negative BLVDS differential line interface). Correspondingly, the interface setting form of each of the plurality of expansion rack interfaces and the interface setting form of the main rack interface are similar, and repeated description is omitted here, and reference may be specifically made to the related description of the main rack interface.

It should be understood that the specific number of the positive interfaces of the BLVDS differential line, the specific number of the negative interfaces of the BLVDS differential line, the specific cable of the customized cable, and the like may be set according to actual requirements, and the embodiment of the present application is not limited thereto.

Optionally, referring to fig. 2, fig. 2 shows a schematic diagram of an interface of a customized cable for BLVDS link extension according to an embodiment of the present application. As shown in fig. 2, the number of pins of the interface of the customized cable is 6, and the interface may include a positive power interface, a negative power interface (or a ground interface), a first pair of differential BLVDS signal pairs (including a positive BLVDS interface and a negative BLVDS interface), and a second pair of differential BLVDS signal pairs.

Optionally, referring to fig. 3, fig. 3 shows a schematic cross-sectional view of a customized cable provided in an embodiment of the present application. As shown in fig. 3, the custom cable includes a core portion (not shown) and a sheath (not shown) disposed outside the core portion.

The sheath can comprise an aluminum foil shielding layer, a metal braided shielding layer arranged outside the aluminum foil shielding layer and a polyvinyl chloride layer arranged outside the metal braided shielding layer;

and, this line core portion can include two first sinle silks and two second sinle silks, and the first connecting line of the central point of the cross-section of two first sinle silks and the second connecting line of the central point of the cross-section of two second sinle silks are mutually perpendicular, and first sinle silk can be by signal conductor and set up the wire insulating layer (or wire insulating material) outside the signal conductor, and the second sinle silk can include aluminium foil shielding layer and set up two sub-line cores inside the aluminium foil shielding layer, and every sub-sinle silk can be by signal conductor and set up the wire insulating layer outside the signal conductor in two sub-sinle silks, and be provided with the filler between sheath and the first sinle silk, and also be provided with the filler between sheath and the second sinle silk.

In addition, in order to improve the anti-interference capability of the BLVDS signal in the transmission process, reduce the parasitic inductance of the transmission line and reduce the clutter in the link, a metal braided shielding layer can be designed in the customized cable, and the single end is connected with the ground wire, so that the transmission performance of the BLVDS signal can be effectively improved.

And, in the customized cable, the BLVDS differential pair may employ a twisted pair design to control the transmission impedance of the customized cable, thereby improving signal transmission quality.

And, regarding the impedance calculation of the twisted pair, it needs to be determined comprehensively according to factors such as the material of the wire used actually, the length of the wire, etc., and the following formula can be referred to:

wherein Z may be an impedance representing the custom cable; epsilon _r Can be expressed as the effective relative permittivity of the medium; s may be expressed as the distance between the wire centers; d may be expressed as the diameter of the conductor of the custom cable.

It should be understood that the specific number of pairs of the BLVDS signal differential pair of the customized cable and the specific parameters of the customized cable, etc. may be set according to actual requirements, and the embodiment of the present application is not limited thereto.

For example, the length of the custom cable may be 2-20 meters, taking into account the port driving capability of the FPGA chip.

And, with continued reference to fig. 1, the mainframe may include a power interface, a BLVDS interface, a protection circuit for the BLVDS interface, a host controller, and a plurality of IO cards.

It should be noted that the BLVDS interface in the main frame and the BLVDS interface in the main frame are similar, and reference may be made to the above description of the main frame interface, and detailed description is not repeated here.

Correspondingly, other extension racks and the main rack are similar, except that there is no main controller, and reference may be made to the description of the main rack interface, which is not repeated herein.

It should be noted that although fig. 1 is described as a main rack interface or each extension rack interface being equipped with a protection circuit, it should be understood by those skilled in the art that a plurality of rack interfaces may also be equipped with a protection circuit, and the embodiment of the present application is not limited thereto.

For example, the BLVDS switch includes a main chassis interface, two extension chassis interfaces, and a protection circuit, and the main chassis interface may be connected with the protection circuit, and the two extension chassis interfaces may also be connected with the protection circuit.

In order to facilitate understanding of the protection circuit of the BLVDS interface in the communication system (for example, the protection circuit of the BLVDS interface in the communication system, the protection circuit of the BLVDS interface in the main chassis, and the like), the following description is made by using a specific embodiment.

Specifically, referring to fig. 4, fig. 4 shows a schematic diagram of a protection circuit of a BLVDS interface according to an embodiment of the present disclosure. As shown in fig. 4, the protection circuit may include a network transformer, a voltage limiting protection device TVS tube (which may also be referred to as a TVS protection network), a first side AC coupling capacitance circuit, a second side AC coupling capacitance circuit, a center-tapped RC circuit (which may also be referred to as a first side peripheral circuit or a field side peripheral circuit), and a center-tapped AC circuit (which may also be referred to as a second side peripheral circuit or a system side peripheral circuit).

The TVS tube can be connected with a corresponding BLVDS interface, the TVS tube can also be connected with a first side AC coupling capacitor circuit, the first side AC coupling capacitor circuit is also connected with a middle tap RC circuit, the middle tap RC circuit can also be connected with a network transformer, the network transformer is also connected with a middle tap AC circuit, the middle tap AC circuit can also be connected with a second side AC coupling capacitor circuit, and the second side AC coupling capacitor circuit is also connected with an FPGA chip in a signal switch.

On the basis of the circuit, when a certain rack is subjected to hot plug through a corresponding rack interface, electric sparks can be generated by contacts of a power line (namely, the power line corresponding to a positive power interface and a negative power interface), energy impact can be coupled to a BLVDS signal line (namely, the signal line corresponding to the positive pole of the BLVDS differential line and the negative poles of a plurality of BLVDS differential lines), and the first-stage protection can be performed through the first-side AC coupling capacitor circuit and the TVS tube. And the first side AC coupling capacitor circuit needs to be arranged close to the network transformer, so that the stray wave generated by LC oscillation under the action of BLVDS current type signals by the transmission line parasitic capacitance and the equivalent inductance (leakage inductance) of the network transformer is prevented, and further the communication is influenced.

And after the connection is finished, the transmission path is subjected to impedance matching (the resistance value of the resistor can be adjusted according to the actual transmission medium) due to the action of the middle-tap RC circuit, so that the signal reflection is reduced, and the bus signal quality of the field side is ensured. And the signal is transmitted from the field side to the system side through the coupling and isolation of the network transformer, noise generated by mutual coupling of the BLVDS signal and the network transformer is eliminated under the action of the AC coupling capacitor circuit on the second side, and therefore errors of bus communication data can be prevented. And the second side AC coupling capacitor circuit also needs to be arranged close to the network transformer, so that the stray wave generated by LC oscillation under the action of BLVDS current type signals of the transmission line parasitic capacitance and the network transformer equivalent inductance (leakage inductance) is prevented, and further communication is influenced.

Finally, BLVDS signals transmitted from the rack side can sequentially pass through the TVS tube, the first side AC coupling capacitor circuit, the middle tap RC circuit, the network transformer, the middle tap AC circuit and the second side AC coupling capacitor circuit, so that the impact energy discharge, the common mode current discharge, the impedance matching, the inter-channel interference isolation and the filtering of noise waves generated by the energy coupling of the network transformer and the BLVDS signals can be completed, and the BLVDS signals can be safely and reliably transmitted to the FPGA chip.

Correspondingly, in addition to the BLVDS signal being sent by the chassis side (e.g., mainframe, etc.) to the FPGA chip, the BLVDS signal may also be sent by the FPGA chip to the chassis side.

Specifically, the FPGA chip may also emit BLVDS signals through the second side AC coupling and the center tap AC circuit to the network transformer. The BLVDS signal then continues to be coupled from the system side to the field side through the network transformer and then may be transmitted through the center-tapped RC circuit, the first side AC coupling, and the TVS tube to external equipment (e.g., a mainframe or an extension rack, etc.).

It should be noted that, referring to fig. 5, fig. 5 shows a schematic diagram of equivalent inductance of a non-ideal network transformer in the prior art. As shown in fig. 5, under the action of BLVDS signal, the parasitic capacitance of the transmission line and the equivalent inductance (leakage inductance) of the non-ideal network transformer may form an LC tank circuit, which may generate noise. If the protection circuit of the embodiment of the application is not provided with the first side AC coupling capacitor circuit, the noise wave can be captured by the communication chip, and a link communication fault is caused. And, the frequency of the generated LC oscillation is as follows:

wherein F represents the frequency of the generated LC oscillation; l is the link equivalent inductance in henries; and C is the equivalent capacitance of the link transmission line, and the unit is farad.

In addition, because the BLVDS signal drives a current higher than that of the general LVDS signal, there is a high probability that the LC oscillating circuit is oscillated by supplying energy during transmission, and thus an AC coupling capacitor circuit on the first side, which is disposed close to the network transformer, is indispensable.

It should be understood that the specific devices of the network transformer, the TVS tube, the first side AC coupling capacitor circuit, the second side AC coupling capacitor circuit, the center-tapped RC circuit, and the center-tapped AC circuit, etc. may be set according to actual requirements, and the embodiments of the present application are not limited thereto.

For example, the network transformer may be a chip model SG24701 ATG.

Correspondingly, the network transformer may be a chip of another type as long as it is ensured to be an inductive transformer supporting BLVDS transmission.

For another example, the center-tapped RC circuit includes a third capacitor and a plurality of resistors, each of the plurality of resistors is connected to the network transformer and the third capacitor, and the third capacitor is further connected to the first side AC-coupled capacitor circuit.

It should also be understood that the capacitance value of the third capacitor, the resistance value of each resistor, the number of resistors of the resistor, and the like may be set according to actual requirements, and the embodiment of the present application is not limited thereto.

For another example, the first side AC coupling capacitance circuit includes a plurality of first circuits connected in parallel, and each of the plurality of first circuits includes a plurality of first capacitances connected in parallel.

It should also be understood that the specific number of the first circuits, the capacitance value of each first capacitor, the number of the first capacitors, and the like may be set according to actual requirements, and the embodiments of the present application are not limited thereto.

For another example, the second-side AC coupling capacitance circuit includes a plurality of second circuits connected in parallel, and each of the plurality of second circuits includes a plurality of second capacitances connected in parallel.

It should also be understood that the specific number of the second circuits, the capacitance value of each second capacitor, the number of the second capacitors, and the like may be set according to actual requirements, and the embodiments of the present application are not limited thereto.

As another example, the center-tap AC circuit includes a plurality of fourth capacitors connected in parallel.

It should also be understood that the capacitance value of the fourth capacitor, the number of the fourth capacitors, and the like may be set according to actual requirements, and the embodiment of the present application is not limited thereto.

In order to facilitate understanding of the embodiments of the present application, the following description will be given by way of specific examples.

Referring to fig. 6, fig. 6 is a schematic diagram illustrating a part of a protection circuit of a BLVDS interface according to an embodiment of the present application. As shown in fig. 6, the center-tap RC circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a capacitor C21, wherein the resistor R1, the resistor R2, the resistor R3, and the resistor R4 are all connected to the network transformer U1, and the resistor R1, the resistor R2, the resistor R3, and the resistor R4 are also all connected to the capacitor C21.

And the center-tap AC network can also comprise a capacitor C1, a capacitor C4, a capacitor C7 and a capacitor C10, the capacitor C1, the capacitor C4, the capacitor C7 and the capacitor C10 are all connected with the network transformer U1, and the other sides of the capacitor C1, the capacitor C4, the capacitor C7 and the capacitor C10 can be grounded.

And, the protection circuit may comprise four first circuits, wherein one first circuit may comprise a capacitor C13 and a capacitor C14, and another first circuit may comprise a capacitor C15 and a capacitor C16, and another first circuit may comprise a capacitor C17 and a capacitor C18, and a last first circuit may comprise a capacitor C19 and a capacitor C20.

And, the protection circuit may comprise four second circuits, wherein one second circuit may comprise a capacitor C2 and a capacitor C3, and another second circuit may comprise a capacitor C5 and a capacitor C6, and another second circuit may comprise a capacitor C8 and a capacitor C9, and the last second circuit may comprise a capacitor 11 and a capacitor C12.

Therefore, the present application adds a double-sided AC coupling capacitor circuit to the characteristics of the BLVDS signal to eliminate the noise generated by the coupling of the network transformer and the BLVDS signal. And the capacitor resistance parameters of the AC coupling capacitor circuits on two sides of the network transformer can be adjusted to prevent the interference of one channel from influencing other BLVDS channels and further influencing the whole link.

In addition, different from the protection design of singly using the AC coupling capacitor, the protection circuit aims at the characteristic that the driving current of the BLVDS signal is large, and considers the equivalent inductance (leakage inductance) of the network transformer, and the influence of LC oscillation on a communication link is eliminated by adding the double-side AC coupling capacitor.

In addition, the single TVS tube in the existing scheme is replaced by the related circuit of the network transformer and the bilateral AC coupling capacitor, parameters of the network transformer, parameters of the middle tap RC circuit, parameters of the middle tap AC circuit and parameters of the AC coupling capacitor can be flexibly adjusted according to actual media, bus load conditions and interface types, and later maintenance is simpler.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions.

It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the terms first, second, third, etc. are used for convenience only and do not denote any order. These words are to be understood as part of the name of the component.

Furthermore, it should be noted that in the description of the present specification, the description of the term "one embodiment", "some embodiments", "examples", "specific examples" or "some examples", etc., means that a specific feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.

While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, the claims should be construed to include preferred embodiments and all changes and modifications that fall within the scope of the invention.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention should also include such modifications and variations.

Claims (10)

1. A protection circuit of a BLVDS interface is characterized by comprising a network transformer, a TVS tube which can be connected with the BLVDS interface, a first side AC coupling capacitor circuit and a second side AC coupling capacitor circuit;

the first side AC coupling capacitor circuit is respectively connected with the TVS tube and the network transformer, and the network transformer is also connected with the second side AC coupling capacitor circuit.

2. The protection circuit of claim 1, wherein the first side AC coupling capacitance circuit comprises a plurality of first circuits in parallel, and each of the plurality of first circuits comprises a plurality of first capacitances in parallel.

3. The protection circuit of claim 2, wherein the second side AC coupling capacitance circuit comprises a plurality of second circuits in parallel, and each of the plurality of second circuits comprises a plurality of second capacitances in parallel.

4. The protection circuit of claim 3, wherein a total number of circuits of the first plurality of circuits is the same as a total number of circuits of the second plurality of circuits.

5. The protection circuit of claim 1, further comprising a center-tapped RC circuit disposed between the first side AC-coupled capacitor circuit and the network transformer, and wherein the center-tapped RC circuit comprises a third capacitor and a plurality of resistors, and wherein each of the plurality of resistors is connected to the network transformer and the third capacitor, and wherein the third capacitor is further connected to the first side AC-coupled capacitor circuit.

6. The protection circuit of claim 5, further comprising a center-tap AC circuit disposed between the network transformer and the second side AC coupling capacitance circuit, and wherein the center-tap AC circuit comprises a plurality of fourth capacitances in parallel.

7. The protection circuit of claim 6, wherein a total number of resistors of the plurality of resistors is the same as a total number of capacitors of the plurality of fourth capacitors.

8. The protection circuit of claim 1, wherein the BLVDS interface comprises a positive power interface, a negative power interface, a plurality of BLVDS differential line positive interfaces, and a plurality of BLVDS differential line negative interfaces.

9. A signal switch, characterized in that it comprises a BLVDS interface, an FPGA chip and a protection circuit of the BLVDS interface, and the protection circuit is connected with the BLVDS interface and the FPGA chip, respectively, and the protection circuit is the protection circuit of the BLVDS interface according to any one of claims 1 to 8.

10. A communication system comprising a signal switch, and wherein the signal switch is the signal switch of claim 9.

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