CN115883423A - Communication load monitoring method, electronic device, and computer-readable medium - Google Patents

Communication load monitoring method, electronic device, and computer-readable medium Download PDF

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Publication number
CN115883423A
CN115883423A CN202310057941.8A CN202310057941A CN115883423A CN 115883423 A CN115883423 A CN 115883423A CN 202310057941 A CN202310057941 A CN 202310057941A CN 115883423 A CN115883423 A CN 115883423A
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data
time
chip
sending
data packet
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费明华
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HoloMatic Technology Beijing Co Ltd
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HoloMatic Technology Beijing Co Ltd
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Priority to CN202310057941.8A priority Critical patent/CN115883423A/en
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Abstract

Embodiments of the present disclosure disclose a communication load monitoring method, an electronic device, and a computer-readable medium. One embodiment of the method comprises: the data sending chip carries out hash processing on the configuration data packet to generate a data packet hash value; sending the configuration data packet to a related data receiving chip, and recording the sending time of the configuration data packet; responding to the received feedback information sent by the data receiving chip, and recording the feedback time for receiving the feedback information; writing the time difference between the feedback time and the sending time into an output file; determining the time difference between the timestamp and the sending time as a second time difference, and writing the second time difference into an output file; determining the time difference between the feedback time and the timestamp as a third time difference, and writing the third time difference into an output file; and reading the current network card load information, and writing the network card load information into a preset network card load output file. This embodiment reduces the test time.

Description

Communication load monitoring method, electronic device, and computer-readable medium
Technical Field
Embodiments of the present disclosure relate to the field of computer technologies, and in particular, to a communication load monitoring method, an electronic device, and a computer-readable medium.
Background
Currently, each time a different chip is replaced, it is necessary to test the communication duration between two different IC (Integrated Circuit) chips, and to test the maximum communication data of the two different IC chips. At present, the communication duration and the maximum communication data between two different IC chips are tested by the following methods: after the chip is replaced, the communication time length and the maximum communication data are analyzed according to the communication condition between two different ICs, or the chip is tested through a third-party chip testing end.
However, the following technical problems generally exist in the above manner:
firstly, the testing efficiency of the communication duration and the maximum communication data is low, and the testing time is long;
secondly, the communication data interacted between the two chips is not verified, and the data transmitted by a certain chip is incomplete, which easily causes invalid transmission of the data.
The above information disclosed in this background section is only for enhancement of understanding of the background of the inventive concept and, therefore, it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art in this country.
Disclosure of Invention
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
Some embodiments of the present disclosure propose a communication load monitoring method, an electronic device, and a computer-readable medium to solve one or more of the technical problems mentioned in the background section above.
In a first aspect, some embodiments of the present disclosure provide a communication load monitoring method, including: the data sending chip reads each configuration information from the set configuration file and combines the configuration information into a configuration data packet; the data sending chip performs hash processing on the configuration data packet to generate a data packet hash value, and adds the data packet hash value to the packet header of the configuration data packet; the data sending chip sends the configuration data packet to a related data receiving chip according to a set communication mode and records the sending time of the configuration data packet; the data sending chip records the feedback time for receiving the feedback information in response to receiving the feedback information sent by the data receiving chip; the data sending chip reads a time stamp carried in the feedback information and writes the sending time, the feedback time and the time stamp into a set output file; the data sending chip writes the time difference between the feedback time and the sending time into the output file; the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file; the data sending chip determines the time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file; and the data sending chip reads the current network card load information in response to receiving the feedback information sent by the data receiving chip, and writes the network card load information into a preset network card load output file.
In a second aspect, some embodiments of the present disclosure provide an electronic device, comprising: one or more processors; a storage device having one or more programs stored thereon, which when executed by one or more processors, cause the one or more processors to implement the method described in any of the implementations of the first aspect.
In a third aspect, some embodiments of the present disclosure provide a computer-readable medium on which a computer program is stored, wherein the computer program, when executed by a processor, implements the method described in any of the implementations of the first aspect.
The above embodiments of the present disclosure have the following advantages: by the communication load monitoring method of some embodiments of the present disclosure, test time is shortened. In particular, the reason for the longer test time is that: the test efficiency of the communication duration and the maximum communication data is low. Based on this, in the communication load monitoring method according to some embodiments of the present disclosure, first, the data sending chip reads each configuration information from the set configuration file, and merges the above configuration information into the configuration data packet. Therefore, data support is provided for testing the communication duration and the maximum communication data of the chip. Next, the data transmission chip performs hash processing on the configuration data packet to generate a data packet hash value, and adds the data packet hash value to a packet header of the configuration data packet. Thereby facilitating subsequent verification of the transmitted data packet. Then, the data transmitting chip transmits the configuration data packet to the associated data receiving chip according to the set communication mode, and records the transmission time of the configuration data packet. Thus, the communication time of the data packet is convenient to calculate. And then, the data sending chip records the feedback time for receiving the feedback information in response to receiving the feedback information sent by the data receiving chip. Thus, data support is provided for calculating the communication duration. And then, the data sending chip reads the time stamp carried in the feedback information and writes the sending time, the feedback time and the time stamp into a set output file. Then, the data sending chip writes the time difference between the feedback time and the sending time into the output file; the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file; and the data sending chip determines the time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file. Thus, the communication time length of the data packet can be calculated. And finally, the data sending chip reads the current network card load information in response to receiving the feedback information sent by the data receiving chip, and writes the network card load information into a preset network card load output file. Thus, the load condition of the current chip can be determined. Thus, the maximum communication data of the chip can be detected. And the communication duration and the maximum communication data can be directly tested on two replaced chips. Further, the test time is shortened.
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The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numbers refer to the same or similar elements. It should be understood that the drawings are schematic and that elements and elements are not necessarily drawn to scale.
Fig. 1 is a flow diagram of some embodiments of a communications load monitoring method according to the present disclosure;
FIG. 2 is a schematic block diagram of an electronic device suitable for use in implementing some embodiments of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the disclosure are shown in the drawings, it is to be understood that the disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure.
It should be noted that, for convenience of description, only the portions related to the related invention are shown in the drawings. The embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict.
It should be noted that the terms "first", "second", and the like in the present disclosure are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence relationship of the functions performed by the devices, modules or units.
It is noted that references to "a" or "an" in this disclosure are intended to be illustrative rather than limiting, and that those skilled in the art will appreciate that references to "one or more" are intended to be exemplary and not limiting unless the context clearly indicates otherwise.
The names of messages or information exchanged between devices in the embodiments of the present disclosure are for illustrative purposes only, and are not intended to limit the scope of the messages or information.
The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
Fig. 1 is a flow diagram of some embodiments of a communication load monitoring method according to the present disclosure. A flow 100 of some embodiments of a communications load monitoring method according to the present disclosure is shown. The communication load monitoring method comprises the following steps:
step 101, the data sending chip reads each configuration information from the set configuration file, and merges the configuration information into a configuration data packet.
In some embodiments, the data sending chip may read each configuration information from the configured configuration file, and merge the above configuration information into the configuration data packet. Here, the set configuration file may be an attribute configuration file of the set data transmission chip, or may be a set configuration file paired with another chip. The data transmission Chip may be referred to as an IC Chip (Integrated Circuit Chip). The configuration information means attribute information of the data transmission chip. The attribute information may refer to information such as a read rate, a maximum storage capacity, and the like. The attribute information may also include a file name of the configuration file. Here, merging may refer to combining.
Step 102, the data sending chip performs hash processing on the configuration data packet to generate a data packet hash value, and adds the data packet hash value to the header of the configuration data packet.
In some embodiments, the data sending chip may perform hash processing on the configuration data packet to generate a data packet hash value, and add the data packet hash value to the header of the configuration data packet. In practice, first, the data sending chip may perform Hash processing on the configuration data packet through a Hash algorithm (Hash) to generate a data packet Hash value. The packet hash value may then be added to the header of the configuration packet. Here, the header of the configuration packet may refer to a packet header.
And 103, the data sending chip sends the configuration data packet to the associated data receiving chip according to the set communication mode, and records the sending time of the configuration data packet.
In some embodiments, the data sending chip sends the configuration data packet to an associated data receiving chip according to a set communication mode, and records the sending time of the configuration data packet. In practice, first, the data sending chip may send the configuration packet to the associated data receiving chip according to a set TCP (Transmission Control Protocol) communication method. Then, the time for transmitting the configuration data packet is recorded. Here, the associated data receiving chip may refer to an IC chip for receiving data, which is communicatively connected with the data transmitting chip.
In some optional implementation manners of some embodiments, the data sending chip may send the configuration data packet to an associated data receiving chip according to a set communication manner by:
firstly, establishing user datagram protocol connection with the data receiving chip. Here, the data transmitting chip may establish a user datagram protocol connection with the data receiving chip. That is, the data transmitting chip can establish UDP communication (User data program) with the data receiving chip.
And secondly, sending the configuration data packet to the data receiving chip.
And 104, the data sending chip records the feedback time for receiving the feedback information in response to receiving the feedback information sent by the data receiving chip.
In some embodiments, the data sending chip may record a feedback time when the feedback information is received in response to receiving the feedback information sent by the data receiving chip. Here, the feedback information may refer to feedback information for the configuration packet transmitted by the data receiving chip.
And 105, reading a time stamp carried in the feedback information by the data sending chip, and writing the sending time, the feedback time and the time stamp into a set output file.
In some embodiments, the data sending chip may read a timestamp carried in the feedback information, and write the sending time, the feedback time, and the timestamp into a set output file. Here, the output file may refer to a file for storing each time at which the chip performs data communication, which is set in advance. I.e. the time the chip receives the information and sends the data packet.
And 106, writing the time difference between the feedback time and the sending time into the output file by the data sending chip.
In some embodiments, the data sending chip may write a time difference between the feedback time and the sending time into the output file. That is, the time interval between the feedback time and the transmission time is written in the output file.
Step 107, the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file.
In some embodiments, the data transmitting chip may determine a time difference between the timestamp and the transmission time as a second time difference, and write the second time difference into the output file. In practice, first, the data transmission chip determines a time interval between the time stamp and the transmission time as a second time difference. And then writing the second time difference into the output file.
And step 108, the data sending chip determines the time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file.
In some embodiments, the data transmitting chip may determine a time difference between the feedback time and the timestamp as a third time difference, and write the third time difference into the output file. In practice, first, the data transmission chip may determine a time interval between the feedback time and the timestamp as a third time difference. Then, the third time difference may be written into the output file.
Step 109, the data sending chip reads the current network card load information in response to receiving the feedback information sent by the data receiving chip, and writes the network card load information into a preset network card load output file.
In some embodiments, the data sending chip may read current network card load information in response to receiving the feedback information sent by the data receiving chip, and write the network card load information into a preset network card load output file. Here, the network card load information may be a network card load indicating a current data transmission chip. The network card load output file may refer to a preset file for storing network card load information of the chip.
Optionally, the data sending chip constructs a load-time graph according to the time information included in each generated output file and each network card load output file.
In some embodiments, the data sending chip may construct a load-time graph according to the time information included in each generated output file and each network card load output file. Here, the time information included in each output file may refer to time information for data interaction between the data sending chip and the data receiving chip within a certain time period, and may include: sending time, feedback information and time stamp. In practice, the data sending chip may open each output file and each network card load output file through an excle table to store data. And then constructing a load-time curve graph by using the data perspective table function in the excle table. That is, the horizontal axis of the load time graph is time, and the vertical axis is network card load.
Optionally, the data sending chip sends the load-time graph to an associated communication monitoring terminal.
In some embodiments, the data transmitting chip may transmit the load time profile to an associated communication monitoring terminal. Here, the associated communication monitoring terminal may refer to a communication monitoring terminal that is in communication connection with the execution main body described above. Here, the communication monitoring terminal can monitor the communication condition of the chip.
Optionally, the data receiving chip analyzes a data packet hash value and a data packet included in the configuration data packet in response to receiving the configuration data packet sent by the data sending chip.
In some embodiments, the data receiving chip may analyze a data packet hash value and a data packet included in the configuration data packet in response to receiving the configuration data packet sent by the data sending chip. Here, the header of the configuration packet includes a packet hash value. Here, the packet may refer to a configuration packet that does not include a packet hash value.
Optionally, the data receiving chip performs hash processing on the data packet to generate a data hash value.
In some embodiments, the data receiving chip may perform hash processing on the data packet through a hash algorithm to generate a data hash value.
Optionally, the data receiving chip records a current timestamp, and in response to determining that the data packet hash value is the same as the data hash value, adds the timestamp to the data packet to update the data packet.
In some embodiments, the data receiving chip may record a current timestamp and, in response to determining that the data packet hash value is the same as the data hash value, add the timestamp to the data packet to update the data packet.
Optionally, the data receiving chip uses the updated data packet as feedback information, and sends the feedback information to the data sending chip.
In some embodiments, the data receiving chip may use the updated data packet as feedback information, and send the feedback information to the data sending chip.
Optionally, the data receiving chip generates exception prompting information in response to determining that the data packet hash value is different from the data hash value, so as to send the normal prompting information to the data sending chip.
In some embodiments, the data receiving chip may generate exception prompting information in response to determining that the data packet hash value is different from the data hash value, so as to send the constant prompting information to the data sending chip. Here, the abnormality indication information may be information indicating that the packet has been tampered with. That is, the data receiving chip may generate an exception hint to send the constant hint to the data sending chip in response to determining that the packet hash value is not the same as the data hash value.
The above-mentioned related contents serve as an inventive point of the present disclosure, thereby solving the technical problem mentioned in the background art that "the invalid transmission of data is easily caused". ". Factors that tend to cause inefficient transmission of data are as follows: the interactive communication data between the two chips is not verified, and the data transmitted by a certain chip is incomplete. If the above factors are solved, the effect of reducing invalid data transmission can be achieved. In order to achieve this effect, first, the data receiving chip analyzes the data packet hash value and the data packet included in the configuration data packet in response to receiving the configuration data packet sent by the data sending chip. Thus, data support is provided for detecting the integrity of data. Secondly, the data receiving chip carries out hash processing on the data packet to generate a data hash value. Next, the data receiving chip records a current timestamp and, in response to determining that the packet hash value is the same as the data hash value, adds the timestamp to the packet to update the packet. Thus, the verification of the transmitted data is completed. Then, the data receiving chip takes the updated data packet as feedback information and sends the feedback information to the data sending chip. And finally, the data receiving chip generates abnormal prompt information in response to the fact that the data packet hash value is different from the data hash value, so that the normal prompt information is sent to the data sending chip. Therefore, the received data can be determined to be incomplete, tampered or missing, and the data sending party can be prompted to perform encryption transmission when the data sending party promotes the data sending so as to reduce invalid transmission of the data.
The above embodiments of the present disclosure have the following advantages: by the communication load monitoring method of some embodiments of the present disclosure, the test time is shortened. In particular, the reason for the longer test time is that: the test efficiency of the communication duration and the maximum communication data is low. Based on this, in the communication load monitoring method according to some embodiments of the present disclosure, first, the data sending chip reads each configuration information from the set configuration file, and merges the above configuration information into the configuration data packet. Therefore, data support is provided for testing the communication duration and the maximum communication data of the chip. Next, the data transmission chip performs hash processing on the configuration packet to generate a packet hash value, and adds the packet hash value to a header of the configuration packet. Thereby facilitating subsequent verification of the transmitted data packet. Then, the data transmitting chip transmits the configuration data packet to the associated data receiving chip according to the set communication mode, and records the transmission time of the configuration data packet. Thus, the communication time of the data packet is convenient to calculate. And then, the data sending chip records the feedback time for receiving the feedback information in response to receiving the feedback information sent by the data receiving chip. Thus, data support is provided for calculating the communication duration. And then, the data sending chip reads the time stamp carried in the feedback information and writes the sending time, the feedback time and the time stamp into a set output file. Then, the data sending chip writes the time difference between the feedback time and the sending time into the output file; the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file; the data sending chip determines a time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file. Thus, the communication time length of the data packet can be calculated. And finally, the data sending chip reads the current network card load information in response to receiving the feedback information sent by the data receiving chip, and writes the network card load information into a preset network card load output file. Thus, the load condition of the current chip can be determined. Thus, the maximum communication data of the chip can be detected. And the communication duration and the maximum communication data can be directly tested on the two replaced chips. Further, the test time is shortened.
Referring now to fig. 2, a block diagram of an electronic device (e.g., a data transmitting chip or a data receiving chip) 200 suitable for use in implementing some embodiments of the present disclosure is shown. The electronic device in some embodiments of the present disclosure may include, but is not limited to, a mobile terminal such as a mobile phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a vehicle-mounted terminal (e.g., a car navigation terminal), and the like, and a stationary terminal such as a digital TV, a desktop computer, and the like. The electronic device shown in fig. 2 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 2, the electronic device 200 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 201 that may perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM) 202 or a program loaded from a storage means 208 into a Random Access Memory (RAM) 203. In the RAM203, various programs and data necessary for the operation of the electronic apparatus 200 are also stored. The processing device 201, the ROM202, and the RAM203 are connected to each other via a bus 204. An input/output (I/O) interface 205 is also connected to bus 204.
Generally, the following devices may be connected to the I/O interface 205: input devices 206 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 207 including, for example, a Liquid Crystal Display (LCD), speakers, vibrators, or the like; storage 208 including, for example, magnetic tape, hard disk, etc.; and a communication device 209. The communication means 209 may allow the electronic device 200 to communicate wirelessly or by wire with other devices to exchange data. While fig. 2 illustrates an electronic device 200 having various means, it is to be understood that not all illustrated means are required to be implemented or provided. More or fewer devices may alternatively be implemented or provided. Each block shown in fig. 2 may represent one device or may represent multiple devices, as desired.
In particular, according to some embodiments of the present disclosure, the processes described above with reference to the flow diagrams may be implemented as computer software programs. For example, some embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer-readable medium, the computer program comprising program code for performing the method illustrated by the flow chart. In some such embodiments, the computer program may be downloaded and installed from a network via the communication means 209, or installed from the storage means 208, or installed from the ROM 202. The computer program, when executed by the processing apparatus 201, performs the above-described functions defined in the methods of some embodiments of the present disclosure.
It should be noted that the computer readable medium described in some embodiments of the present disclosure may be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In some embodiments of the disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In some embodiments of the present disclosure, however, a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.
In some embodiments, the clients, servers may communicate using any currently known or future developed network Protocol, such as HTTP (HyperText Transfer Protocol), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the Internet (e.g., the Internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed network.
The computer readable medium may be embodied in the electronic device; or may be separate and not incorporated into the electronic device. The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: the data sending chip reads each configuration information from the set configuration file and combines the configuration information into a configuration data packet; the data sending chip performs hash processing on the configuration data packet to generate a data packet hash value, and adds the data packet hash value to the packet header of the configuration data packet; the data sending chip sends the configuration data packet to a related data receiving chip according to a set communication mode and records the sending time of the configuration data packet; the data sending chip records the feedback time for receiving the feedback information in response to receiving the feedback information sent by the data receiving chip; the data sending chip reads a time stamp carried in the feedback information and writes the sending time, the feedback time and the time stamp into a set output file; the data sending chip writes the time difference between the feedback time and the sending time into the output file; the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file; the data sending chip determines the time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file; and the data sending chip reads the current network card load information in response to receiving the feedback information sent by the data receiving chip, and writes the network card load information into a preset network card load output file.
Computer program code for carrying out operations for embodiments of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The functions described herein above may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems on a chip (SOCs), complex Programmable Logic Devices (CPLDs), and the like.
The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the invention in the embodiments of the present disclosure is not limited to the specific combination of the above-mentioned features, but also encompasses other embodiments in which any combination of the above-mentioned features or their equivalents is made without departing from the inventive concept as defined above. For example, the above features and (but not limited to) technical features with similar functions disclosed in the embodiments of the present disclosure are mutually replaced to form the technical solution.

Claims (5)

1. A communication load monitoring method, comprising:
the data sending chip reads each configuration information from the set configuration file and merges the configuration information into a configuration data packet;
the data sending chip carries out hash processing on the configuration data packet to generate a data packet hash value, and the data packet hash value is added to the packet head of the configuration data packet;
the data sending chip sends the configuration data packet to a related data receiving chip according to a set communication mode and records the sending time of the configuration data packet;
the data sending chip responds to the received feedback information sent by the data receiving chip and records the feedback time for receiving the feedback information;
the data sending chip reads a timestamp carried in the feedback information and writes the sending time, the feedback time and the timestamp into a set output file;
the data sending chip writes the time difference between the feedback time and the sending time into the output file;
the data sending chip determines the time difference between the timestamp and the sending time as a second time difference, and writes the second time difference into the output file;
the data sending chip determines the time difference between the feedback time and the timestamp as a third time difference, and writes the third time difference into the output file;
and the data sending chip responds to the received feedback information sent by the data receiving chip, reads the current network card load information, and writes the network card load information into a preset network card load output file.
2. The method of claim 1, wherein the method further comprises:
the data sending chip constructs a load time curve graph according to the time information contained in each generated output file and each network card load output file;
and the data sending chip sends the load time curve graph to an associated communication monitoring terminal.
3. The method of claim 1, wherein the sending the configuration data packet to the associated data receiving chip according to the set communication mode comprises:
establishing a user datagram protocol connection with the data receiving chip;
and sending the configuration data packet to the data receiving chip.
4. An electronic device, comprising:
one or more processors;
a storage device having one or more programs stored thereon;
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-3.
5. A computer-readable medium, on which a computer program is stored, wherein the computer program, when being executed by a processor, carries out the method according to any one of claims 1-3.
CN202310057941.8A 2023-01-18 2023-01-18 Communication load monitoring method, electronic device, and computer-readable medium Pending CN115883423A (en)

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* Cited by examiner, † Cited by third party
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EP2605453A1 (en) * 2011-12-16 2013-06-19 Alcatel Lucent Method and apparatus for monitoring transmission characteristics in a network
CN107819637A (en) * 2016-09-13 2018-03-20 南京中兴新软件有限责任公司 The acquisition methods and device of handling capacity
CN110351164A (en) * 2019-07-17 2019-10-18 深圳华锐金融技术股份有限公司 Time delay measure, device, computer equipment and storage medium
CN111416791A (en) * 2019-01-04 2020-07-14 华为技术有限公司 Data transmission method, equipment and system
US20230006904A1 (en) * 2021-06-30 2023-01-05 Juniper Networks, Inc. Using network interface cards having processing units to determine latency

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2605453A1 (en) * 2011-12-16 2013-06-19 Alcatel Lucent Method and apparatus for monitoring transmission characteristics in a network
CN107819637A (en) * 2016-09-13 2018-03-20 南京中兴新软件有限责任公司 The acquisition methods and device of handling capacity
CN111416791A (en) * 2019-01-04 2020-07-14 华为技术有限公司 Data transmission method, equipment and system
CN110351164A (en) * 2019-07-17 2019-10-18 深圳华锐金融技术股份有限公司 Time delay measure, device, computer equipment and storage medium
US20230006904A1 (en) * 2021-06-30 2023-01-05 Juniper Networks, Inc. Using network interface cards having processing units to determine latency

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