CN115874242A - Ceramic treatment method for inner wall surface of semiconductor reaction chamber - Google Patents
Ceramic treatment method for inner wall surface of semiconductor reaction chamber Download PDFInfo
- Publication number
- CN115874242A CN115874242A CN202211664587.7A CN202211664587A CN115874242A CN 115874242 A CN115874242 A CN 115874242A CN 202211664587 A CN202211664587 A CN 202211664587A CN 115874242 A CN115874242 A CN 115874242A
- Authority
- CN
- China
- Prior art keywords
- wall
- reaction chamber
- micro
- reaction
- arc oxidation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 130
- 238000000034 method Methods 0.000 title claims abstract description 41
- 239000000919 ceramic Substances 0.000 title claims abstract description 37
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000011282 treatment Methods 0.000 title claims abstract description 19
- 238000007745 plasma electrolytic oxidation reaction Methods 0.000 claims abstract description 53
- 238000005498 polishing Methods 0.000 claims abstract description 22
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 16
- 238000000992 sputter etching Methods 0.000 claims abstract description 15
- 238000005406 washing Methods 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 13
- 238000000227 grinding Methods 0.000 claims abstract description 12
- 238000000861 blow drying Methods 0.000 claims abstract description 10
- 239000012295 chemical reaction liquid Substances 0.000 claims abstract description 8
- 230000003647 oxidation Effects 0.000 claims abstract description 8
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 8
- 238000004140 cleaning Methods 0.000 claims description 15
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 14
- 230000003746 surface roughness Effects 0.000 claims description 13
- 239000003795 chemical substances by application Substances 0.000 claims description 12
- 239000008367 deionised water Substances 0.000 claims description 10
- 229910021641 deionized water Inorganic materials 0.000 claims description 10
- 238000004814 ceramic processing Methods 0.000 claims description 9
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 8
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 6
- 238000001035 drying Methods 0.000 claims description 5
- 238000003672 processing method Methods 0.000 claims description 5
- 239000003513 alkali Substances 0.000 claims description 4
- 230000035484 reaction time Effects 0.000 claims description 4
- 229910003902 SiCl 4 Inorganic materials 0.000 claims description 3
- 238000003279 ceramming Methods 0.000 claims 4
- 238000002468 ceramisation Methods 0.000 claims 2
- 239000010410 layer Substances 0.000 description 35
- 238000000151 deposition Methods 0.000 description 8
- 230000008021 deposition Effects 0.000 description 8
- 239000007789 gas Substances 0.000 description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- 239000013618 particulate matter Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000001020 plasma etching Methods 0.000 description 5
- 229910000838 Al alloy Inorganic materials 0.000 description 4
- 238000011065 in-situ storage Methods 0.000 description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 229910001385 heavy metal Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 239000002351 wastewater Substances 0.000 description 2
- 239000003518 caustics Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000009472 formulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 231100000614 poison Toxicity 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000003440 toxic substance Substances 0.000 description 1
Images
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
The invention provides a ceramic treatment method for the upper surface of the inner wall of a semiconductor reaction chamber. The ceramic treatment method for the surface of the inner wall of the semiconductor reaction chamber comprises the following steps: introducing etching gas into the reaction chamber to perform ion etching on the inner wall of the reaction chamber; preparing micro-arc oxidation reaction liquid, and performing micro-arc oxidation reaction on the inner wall of the reaction chamber by using the micro-arc oxidation reaction liquid to generate a ceramic oxidation layer on the surface of the inner wall of the reaction chamber; and sequentially carrying out mechanical grinding and polishing, water washing and wiping and blow-drying on the surface of the inner wall of the reaction chamber after the micro-arc oxidation reaction.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a ceramic treatment method for the inner wall surface of a semiconductor reaction chamber.
Background
Some steps in semiconductor processing are prone to wear on the inner walls of the reaction chamber, for example, during chamber cleaning, the highly reactive fluorine tends to over-etch the exposed inner walls of the PECVD deposition reaction chamber, thereby changing the chamber environment, affecting process performance, and reducing the chamber lifetime. In the prior art, an etching-resistant protective layer is usually deposited in advance before a chamber performs a deposition reaction, however, the protective layer deposited in advance on the inner wall of the chamber is usually poor in film thickness uniformity, and is prone to causing over-etching at a local position of the inner wall of the chamber, and residual polymers attached to the local position of the inner wall of the chamber are prone to falling after the adhesive force is reduced, and are prone to becoming a particle pollution source in the wafer deposition process.
In order to overcome the defects in the prior art, a ceramic treatment method for the inner wall surface of a semiconductor reaction chamber is urgently needed in the field, the inner wall surface of the reaction chamber is pretreated by ion etching, and then a ceramic oxide layer is grown in situ on the inner wall of the chamber in a micro-arc oxidation mode.
Disclosure of Invention
The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
In order to overcome the defects in the prior art, the invention provides a method for ceramic treatment of the inner wall surface of a semiconductor reaction chamber, which comprises the steps of pretreating the inner wall surface of the semiconductor reaction chamber by reactive ion etching, changing the surface roughness of the material of the inner wall, growing a ceramic oxide layer in situ on the inner wall of the chamber by using a micro-arc oxidation mode, and then performing polishing and other treatments, so that the oxide layer is firmly combined with the inner wall surface, is compact and uniform, can resist high-temperature impact and realize electric insulation, further can improve the tolerance of the inner wall of the chamber to plasma, further optimizes the chamber environment, and reduces the particle pollution amount in the wafer deposition and cleaning processes.
Specifically, the method for ceramic processing of the inner wall surface of the semiconductor reaction chamber provided by the first aspect of the invention comprises: introducing etching gas into the reaction chamber to perform ion etching on the inner wall of the reaction chamber; preparing micro-arc oxidation reaction liquid, and performing micro-arc oxidation reaction on the inner wall of the reaction chamber by using the micro-arc oxidation reaction liquid to generate a ceramic oxidation layer on the surface of the inner wall of the reaction chamber; and sequentially carrying out mechanical grinding and polishing, water washing and wiping and blow-drying on the surface of the inner wall of the reaction chamber after the micro-arc oxidation reaction.
Further, in some embodiments of the present invention, the performing the micro-arc oxidation reaction on the inner wall of the reaction chamber includes: and (3) performing the micro-arc oxidation reaction by adopting a constant-current mode, a constant-voltage mode or an alternative working mode of the constant-current mode and the constant-voltage mode, controlling the reaction time within 30min, controlling the reaction temperature within the range of 10-40 ℃, and controlling the thickness of the generated ceramic oxide layer within the range of 1-10 mu m.
Further, in some embodiments of the present invention, the voltage range in the constant voltage mode is 300V-750V, and the current density in the constant current mode is less than 6A/m 2 。
Further, in some embodiments of the present invention, the micro-arc oxidation reaction solution includes a main film forming agent Na 2 SiO 3 NaAlO as secondary film forming agent 2 And a pH controlling agent.
Further, in some embodiments of the present invention, the PH control agent comprises KOH or NAOH, and is used to control the PH of the micro-arc oxidation reaction solution to be in a range of 8 to 13.
Further, in some embodiments of the present invention, the ceramic processing method further includes: and before the mechanical grinding and polishing work, remelting the ceramic oxide layer by adopting high-energy laser.
Further, in some embodiments of the present invention, the etching gas comprises SiCl 4 Or BCl 3 。
Further, in some embodiments of the present invention, the performing the micro-arc oxidation reaction on the inner wall of the reaction chamber further includes: before the micro-arc oxidation reaction, the inner wall of the reaction chamber after ion etching is cleaned and dried.
Further, in some embodiments of the invention, the ion etching is performed on the inner wall of the reaction chamberCleaning and blow-drying work, including: after ion etching is carried out on the inner wall of the reaction chamber, deionized water is adopted to clean the inner wall of the reaction chamber for 5-10 min; KOH or NAOH is adopted to carry out alkali washing work on the inner wall of the reaction chamber; wiping the inner wall of the reaction chamber for multiple times by using acetone or absolute ethyl alcohol, and then cleaning the inner wall of the reaction chamber for the second time by using deionized water; and use of N 2 And drying the inner wall of the reaction chamber by a gun.
Further, in some embodiments of the present invention, the sequentially performing the mechanical polishing, the water washing, the wiping, and the blow-drying on the inner wall surface of the reaction chamber after the micro-arc oxidation reaction includes: mechanically grinding and polishing the surface of the inner wall of the reaction chamber after the micro-arc oxidation reaction to reduce the surface roughness; washing, grinding and polishing the surface of the inner wall of the reaction chamber by using deionized water; wiping the inner wall of the reaction chamber for multiple times by adopting acetone or absolute ethyl alcohol; and use of N 2 And drying the inner wall of the reaction chamber by a gun.
Drawings
The above features and advantages of the present disclosure will be better understood upon reading the detailed description of embodiments thereof in conjunction with the following drawings. In the drawings, components are not necessarily drawn to scale, and components having similar relative characteristics or features may have the same or similar reference numerals.
FIG. 1 is a schematic flow chart illustrating a method for ceramizing a surface of an inner wall of a semiconductor reaction chamber according to an aspect of the present invention; and
fig. 2 is a flow chart illustrating a method for ceramic processing of an inner wall surface of a semiconductor reaction chamber according to an embodiment of the invention.
Detailed Description
The following description is given by way of example of the present invention and other advantages and features of the present invention will become apparent to those skilled in the art from the following detailed description. While the invention will be described in connection with the preferred embodiments, there is no intent to limit its features to those embodiments. On the contrary, the invention is described in connection with the embodiments for the purpose of covering alternatives or modifications that may be extended based on the claims of the present invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The invention may be practiced without these particulars. Moreover, some of the specific details have been omitted from the description in order not to obscure or obscure the focus of the present invention.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Additionally, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," "vertical" and the like as used in the following description are to be understood as referring to the segment and the associated drawings in the illustrated orientation. The relative terms are used for convenience of description only and do not imply that the described apparatus should be constructed or operated in a particular orientation and therefore should not be construed as limiting the invention.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, regions, layers and/or sections, these elements, regions, layers and/or sections should not be limited by these terms, but rather are used to distinguish one element, region, layer and/or section from another element, region, layer and/or section. Thus, a first component, region, layer or section discussed below could be termed a second component, region, layer or section without departing from some embodiments of the present invention.
In order to overcome the defects in the prior art, the invention provides a method for ceramic treatment of the surface of the inner wall of a semiconductor reaction chamber, which comprises the steps of pretreating the surface of the inner wall of the semiconductor reaction chamber by reactive ion etching, changing the surface roughness of the material of the inner wall, growing a ceramic oxide layer on the inner wall of the chamber in situ by using a micro-arc oxidation mode, and then polishing and the like, so that the oxide layer is firmly and uniformly combined with the surface of the inner wall, can resist high-temperature impact and realize electric insulation, further the tolerance of the inner wall of the chamber to plasma can be improved, the environment of the chamber is optimized, and the particle pollution amount in the processes of wafer deposition and cleaning is reduced.
Please refer to fig. 1 first. Fig. 1 illustrates a schematic diagram of a semiconductor processing apparatus provided in accordance with an aspect of the present invention.
As shown in fig. 1, in the method for ceramic-processing an inner wall surface of a semiconductor reaction chamber of a semiconductor device according to the first aspect of the present invention, an etching gas may be first introduced into the reaction chamber to perform ion etching on the inner wall of the reaction chamber.
Further, in some embodiments of the present invention, the etching gas may be SiCl 4 Or BCl 3 . It will be readily understood by those skilled in the art that the etching gas is only used for illustrative purposes and is not intended to limit the scope of the present invention, and other similar etching gases that can be used for etching the inner wall surface of the chamber and increasing the surface roughness can be applied to the processing method provided by the present invention and shall be included in the scope of the present invention.
After ion etching is finished, preparing micro-arc oxidation reaction liquid, and carrying out micro-arc oxidation reaction on the inner wall of the reaction chamber by using the micro-arc oxidation reaction liquid so as to generate a ceramic oxide layer on the surface of the inner wall of the reaction chamber. After the ceramic oxide layer is generated, the inner wall surface of the reaction chamber is sequentially subjected to mechanical polishing, water washing wiping and blow drying. Therefore, the inner wall of the reaction chamber can be etched through reactive ion etching, the surface roughness of the base material on the inner wall of the chamber is changed, and good adhesion between the subsequent ceramic oxidation layer and the base material is ensured. In addition, the invention can also form a ceramic oxide layer through micro-arc oxidation, and the ceramic oxide layer has controllable film thickness, high compactness and low surface roughness, can also obviously improve the tolerance of the inner wall of the chamber to fluorine and plasma, and reduces the generation amount of particle pollution in the wafer deposition and cleaning processes.
Further, in some embodiments of the present invention, the micro-arc oxidation reaction may be performed in a constant current mode or a constant voltage mode or in an alternative operation mode. Here, the reaction time may be controlled within 30min, the reaction temperature may be in the range of 10 to 40 ℃, and the thickness of the ceramic oxide layer formed may be in the range of 1 to 10 μm in this mode.
It is understood by those skilled in the art that the above reaction time range, reaction temperature range and ceramic oxide layer thickness range are only one preferred embodiment provided by the present invention, and are intended to enable the micro-arc oxidation to form the ceramic oxide layer with controllable film thickness, high compactness and low surface roughness, and are not intended to limit the protection scope of the present invention.
Further, in some embodiments of the present invention, the voltage range in the constant voltage mode is 300V, and in the constant current mode, the current density is less than 6A/m 2 。
It is understood by those skilled in the art that the voltage range in the constant voltage mode and the current density range in the constant current mode are only a preferred solution provided by the present invention, and are intended to enable the ceramic oxide layer formed by micro-arc oxidation to have controllable film thickness, high compactness and low surface roughness, but not to limit the protection scope of the present invention.
Further, in some embodiments of the present invention, the micro-arc oxidation reaction solution may mainly include a main film forming agent Na 2 SiO 3 NaAlO as secondary film forming agent 2 And a pH controlling agent.
Further, in some embodiments of the present invention, the PH control agent may include KOH or NAOH, and is used to control the PH of the micro-arc oxidation reaction solution within a range of 8 to 13.
It is understood by those skilled in the art that the formulation of the micro-arc oxidation reaction solution and the selection of the PH control agent are only a preferred scheme provided by the present invention, and are intended to provide a preferred example of the reaction solution and control the PH of the micro-arc oxidation reaction solution within the range of 8 to 13, and not to limit the protection scope of the present invention.
Easily understood, the micro-arc oxidation electrolyte does not contain toxic substances and heavy metal elements, and has strong pollution resistance and high regeneration reuse rate. Further, heavy metal ion wastewater can not be generated in the micro-arc oxidation reaction process of the inner wall of the semiconductor reaction chamber, harmful gas can not be released, and the current national green environmental protection normal requirements are met.
Further, in some embodiments of the present invention, the ceramic processing method may further perform remelting treatment on the ceramic oxide layer by using high-energy laser before the mechanical grinding and polishing, so as to effectively remove some loose layer portions in the ceramic oxide layer, reduce the surface roughness of the ceramic oxide layer, and further facilitate realization of thickness control of the oxide layer.
Further, in some embodiments of the present invention, the method may perform cleaning and drying on the inner wall of the reaction chamber after the ion etching before performing the micro-arc oxidation reaction.
In some embodiments of the present invention, before the micro-arc oxidation reaction, the method may first perform cleaning and blow-drying operations on the inner wall of the reaction chamber after the ion etching. Specifically, the method can be used for cleaning the inner wall of the reaction chamber for 5-10 min by using deionized water after the inner wall of the reaction chamber is subjected to ion etching. After the cleaning is finished, the method can also use KOH or NAOH to carry out alkali cleaning work on the inner wall of the reaction chamber. After the alkali washing work is finished, the inner wall of the reaction chamber is wiped for many times by acetone or absolute ethyl alcohol, and then the secondary washing is carried out by deionized water. Finally, the inner wall of the reaction chamber may be dried using an N2 gun.
In other embodiments of the present invention, after the micro-arc oxidation reaction, the method sequentially performs mechanical polishing, water washing, wiping, and blow-drying on the inner wall surface of the reaction chamber, and specifically, the method may perform mechanical polishing on the inner wall surface of the reaction chamber after the micro-arc oxidation reaction to reduce the surface roughness. After mechanical grinding and polishing, the method can adopt deionized water to wash the surface of the inner wall of the reaction chamber after grinding and polishing. And then, the method can also adopt acetone or absolute ethyl alcohol to wipe the inner wall of the reaction chamber for a plurality of times. Finally, the inner wall of the reaction chamber may be blown dry using an N2 gun.
It will be understood by those skilled in the art that the above acetone or absolute ethyl alcohol is only a preferred solution provided by the present invention, and is intended to remove oil stains from the inner wall of the reaction chamber, and is not intended to limit the scope of the present invention.
Please further refer to fig. 2. Fig. 2 is a flow chart illustrating a method for ceramic processing of an inner wall surface of a semiconductor reaction chamber according to an embodiment of the invention.
In some embodiments of the present invention, as shown in FIG. 2, a micro-arc oxidation reaction solution is first prepared as shown in step 201 of FIG. 2. Thereafter, as shown in step 202 of FIG. 2, the inner wall of the PECVD aluminum alloy chamber can be subjected to reactive ion etching. Thereafter, the processing method may perform a deionized water rinse and a caustic wash on the inner walls of the chamber, as shown in steps 203, 204 of fig. 2. Thereafter, as shown in step 205 of FIG. 2, the treatment process may be performed by wiping and washing the PECVD aluminum alloy chamber with absolute ethanol. Thereafter, as shown in step 206 of fig. 2, the processing method may perform a micro-arc oxidation treatment on the inner wall of the PECVD aluminum alloy chamber. Thereafter, the process may then laser reflow the PECVD al chamber, as shown in step 207 of fig. 2. Thereafter, the processing method may finally perform mechanical polishing and cleaning of the aluminum alloy chamber, as shown in steps 208 and 209 of fig. 2.
In the prior art, during chamber cleaning, the highly reactive fluorine is prone to over-etch the exposed inner wall of the PECVD deposition reaction chamber, thereby changing the chamber environment, affecting process performance, and shortening the chamber lifetime. In addition, before conventional PECVD deposition, the protective layer pre-deposited on the inner wall of the chamber has poor film thickness uniformity, and local over-etching of the inner wall of the chamber is likely to occur. In addition, residual polymer attached to the local position of the inner wall of the chamber is easy to fall off after the adhesive force is reduced, and is easy to become a particle pollution source in the wafer deposition process.
Compared with the prior art in the field, the ceramic treatment method for the inner wall surface of the semiconductor reaction chamber can firstly pretreat the inner wall of the semiconductor reaction chamber through reactive ion etching, change the surface roughness of the material of the inner wall, then grow the ceramic oxide layer in situ of the inner wall of the chamber in a micro-arc oxidation mode, and then carry out treatment such as polishing, so that the oxide layer is firmly combined with the surface of the inner wall and is compact and uniform at the same time, can resist high-temperature impact and realize electric insulation, further can improve the tolerance of the inner wall of the chamber to plasma, further optimize the environment of the chamber, and reduce the particle pollution amount in the wafer deposition and cleaning processes.
In addition, the ceramic treatment method for the inner wall surface of the semiconductor reaction chamber can also perform subsequent treatment on the ceramic layer formed by micro-arc oxidation by utilizing the steps of high-energy laser remelting, mechanical polishing and the like, properly remove the loose layer part in the ceramic oxidation layer, reduce the surface roughness of the ceramic oxidation layer and further facilitate the realization of film thickness control of the oxidation layer. In addition, the ceramic treatment method for the inner wall surface of the semiconductor reaction chamber does not generate heavy metal ion wastewater and release harmful gas in the whole micro-arc oxidation reaction process of the inner wall surface of the chamber, and meets the current national green and environmental protection normal requirements.
While, for purposes of simplicity of explanation, the methodologies are shown and described as a series of acts, it is to be understood and appreciated that the methodologies are not limited by the order of acts, as some acts may, in accordance with one or more embodiments, occur in different orders and/or concurrently with other acts from that shown and described herein or not shown and described herein, as would be understood by one skilled in the art.
The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A ceramic processing method for the surface of the inner wall of a semiconductor reaction chamber comprises the following steps:
introducing etching gas into the reaction chamber to perform ion etching on the inner wall of the reaction chamber;
preparing micro-arc oxidation reaction liquid, and performing micro-arc oxidation reaction on the inner wall of the reaction chamber by using the micro-arc oxidation reaction liquid to generate a ceramic oxidation layer on the surface of the inner wall of the reaction chamber; and
and sequentially carrying out mechanical grinding and polishing, washing and wiping and blow-drying on the surface of the inner wall of the reaction chamber after the micro-arc oxidation reaction.
2. The ceramic processing method according to claim 1, wherein the micro-arc oxidation reaction of the inner wall of the reaction chamber comprises:
and (3) carrying out the micro-arc oxidation reaction by adopting a constant-current mode or a constant-voltage mode or an alternative working mode of the constant-current mode and the constant-voltage mode, controlling the reaction time within 30min, controlling the reaction temperature to be 10-40 ℃, and controlling the thickness of the generated ceramic oxidation layer to be 1-10 mu m.
3. The ceramming process of claim 2, wherein said constant voltage mode has a voltage ranging from 300V to 750V and said constant current mode has a current density of less than 6A/m 2 。
4. The ceramifying treatment process according to claim 1, wherein the microarc oxidation reaction solution comprises a main film forming agent Na 2 SiO 3 NaAlO as secondary film forming agent 2 And a pH controlling agent.
5. The ceramization treatment method according to claim 4, wherein the pH controller comprises KOH or NAOH for controlling the pH of the micro-arc oxidation reaction solution within a range of 8 to 13.
6. The ceramming process of claim 1, further comprising:
and before the mechanical grinding and polishing work, remelting the ceramic oxide layer by adopting high-energy laser.
7. The ceramming process of claim 1, wherein said etching gas comprises SiCl 4 Or BCl 3 。
8. The ceramming process of claim 1, wherein said micro-arc oxidation reaction of said inner wall of said reaction chamber further comprises:
before the micro-arc oxidation reaction is carried out, the inner wall of the reaction chamber after ion etching is cleaned and dried.
9. The ceramic processing method according to claim 8, wherein the cleaning and blow-drying of the inner wall of the reaction chamber after the ion etching comprises:
after ion etching is carried out on the inner wall of the reaction chamber, deionized water is adopted to clean the inner wall of the reaction chamber for 5-10 min;
KOH or NAOH is adopted to carry out alkali washing work on the inner wall of the reaction chamber;
wiping the inner wall of the reaction chamber for multiple times by using acetone or absolute ethyl alcohol, and then cleaning the inner wall of the reaction chamber for the second time by using deionized water; and
using N 2 And drying the inner wall of the reaction chamber by a gun.
10. The ceramization processing method according to claim 1, wherein the steps of sequentially performing mechanical polishing, water washing, wiping and blow drying on the inner wall surface of the reaction chamber after the micro-arc oxidation reaction comprise:
mechanically grinding and polishing the surface of the inner wall of the reaction chamber after the micro-arc oxidation reaction to reduce the surface roughness;
washing, grinding and polishing the surface of the inner wall of the reaction chamber by deionized water;
wiping the inner wall of the reaction chamber for multiple times by adopting acetone or absolute ethyl alcohol; and
using N 2 And drying the inner wall of the reaction chamber by a gun.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211664587.7A CN115874242A (en) | 2022-12-23 | 2022-12-23 | Ceramic treatment method for inner wall surface of semiconductor reaction chamber |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211664587.7A CN115874242A (en) | 2022-12-23 | 2022-12-23 | Ceramic treatment method for inner wall surface of semiconductor reaction chamber |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115874242A true CN115874242A (en) | 2023-03-31 |
Family
ID=85754441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211664587.7A Pending CN115874242A (en) | 2022-12-23 | 2022-12-23 | Ceramic treatment method for inner wall surface of semiconductor reaction chamber |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115874242A (en) |
-
2022
- 2022-12-23 CN CN202211664587.7A patent/CN115874242A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107946163B (en) | Chemical conversion of yttria to yttrium fluoride and yttrium oxyfluoride to develop corrosion resistant coatings for pretreatment of plasma components | |
| TW557473B (en) | Semiconductor processing equipment having improved particle performance | |
| TWI575594B (en) | Method of cleaning aluminum plasma chamber parts | |
| KR101037530B1 (en) | Wet clean process for recovery of anodized chamber parts | |
| KR100891754B1 (en) | Method for cleaning substrate processing chamber, storage medium and substrate processing chamber | |
| EP1839330A2 (en) | Cleaning methods for silicon electrode assembly surface contamination removal | |
| KR100265289B1 (en) | Method for manufacturing the cathode of the plasma etching apparatus and the cathode manufactured accordingly | |
| JP6859496B1 (en) | Cleaning method for semiconductor manufacturing equipment parts with gas holes | |
| JP7432373B2 (en) | Reaction tube cleaning method, semiconductor device manufacturing method, and substrate processing device | |
| JP2005303255A (en) | Low-reflectance processing method of silicon substrate for solar cells | |
| CN115254766B (en) | Cleaning and regenerating method for alumina ceramic injector of semiconductor equipment | |
| US20110223767A1 (en) | Control wafer reclamation process | |
| US20210276056A1 (en) | Condition selectable backside gas | |
| CN110364424B (en) | Method for cleaning parts of semiconductor processing equipment | |
| KR102017138B1 (en) | Method for Recycling of SiC Product and Recycled SiC Product | |
| CN115874242A (en) | Ceramic treatment method for inner wall surface of semiconductor reaction chamber | |
| JP4755421B2 (en) | Two-layer LTO back seal for wafers | |
| CN112192323A (en) | Polishing equipment and method without subsurface damage | |
| CN102024659B (en) | Cleaning method of PVD (Physical Vapor Deposition) equipment | |
| US11702738B2 (en) | Chamber processes for reducing backside particles | |
| CN114496710A (en) | Method for cleaning yttrium oxide coating of ceramic window of semiconductor equipment | |
| JP2007036170A (en) | Low-reflectance processing method of silicon substrate for solar cells and silicon substrate for solar cell | |
| CN1790613A (en) | Plasma processing method | |
| CN112899747B (en) | Remote plasma source RPS cavity anodic oxidation method | |
| CN1332064C (en) | Method of lowering residual fluorind in sedimentation reaction chamber cavity body |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |