CN115867047A - IBC/HBC battery based on high-hole-mobility material and preparation method thereof - Google Patents

IBC/HBC battery based on high-hole-mobility material and preparation method thereof Download PDF

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CN115867047A
CN115867047A CN202211517214.7A CN202211517214A CN115867047A CN 115867047 A CN115867047 A CN 115867047A CN 202211517214 A CN202211517214 A CN 202211517214A CN 115867047 A CN115867047 A CN 115867047A
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sub
hole transport
silicon substrate
crystalline silicon
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刁一凡
吴兆
解俊杰
孙朱行
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Longi Green Energy Technology Co Ltd
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Abstract

The invention discloses an IBC/HBC battery based on a material with high hole mobility and a preparation method thereof, wherein the IBC/HBC battery comprises the following components: the crystal silicon substrate layer is provided with a front surface and a back surface which are opposite; the first passivation layer is arranged on the front side of the crystalline silicon substrate layer; the antireflection layer is arranged on the surface, far away from the crystalline silicon substrate layer, of the first passivation layer; the second passivation layer is arranged on the back surface of the crystalline silicon substrate layer; a hole transport layer including a plurality of sub-hole transport layers; the electron transport layer comprises a plurality of sub-electron transport layers, and the sub-hole transport layer and the sub-electron transport layers are spaced on the surface, far away from the crystalline silicon substrate layer, of the second passivation layer; the material of the hole transport layer is a polymer material. The invention improves the crystallinity of each sub-hole transport layer, thereby greatly improving the carrier mobility and the conductivity of each sub-hole transport layer.

Description

IBC/HBC battery based on high-hole-mobility material and preparation method thereof
Technical Field
The invention belongs to the technical field of solar photovoltaics, and particularly relates to an IBC/HBC cell based on a material with high hole mobility and a preparation method thereof.
Background
P-type polymers (PTAA, PEDOT: PSS and the like) are widely applied to photovoltaic cells as hole transport layers due to the characteristics of adjustable band gap, simple preparation process, good device compatibility and the like. However, lower conductivity (typically 1-500S/cm) limits further improvement in cell efficiency.
According to the Drude model of conductivity, the main ways to increase conductivity include increasing carrier concentration (n) and increasing carrier mobility (μ). However, for organic polymers, the difficulty of increasing both is greater because: dopant ions introduced to increase carrier concentration greatly increase ionized impurity scattering, resulting in a great reduction in carrier mobility and a decrease in conductivity. In both of the above modes, the present invention selects a mode for increasing the carrier mobility to increase the conductivity of the polymer.
To further illustrate the manner of enhancing carrier mobility, we introduce the Drude model here to illustrate:
Figure BDA0003972295020000011
where q, n, m, τ represent the carrier charge constant, carrier density, carrier mass, and mean free time between carrier collisions, respectively.
Wherein the mean free time τ, can be expressed as:
Figure BDA0003972295020000012
wherein L, V R Respectively representing the mean free path and the moving speed of the carriers; μ is the carrier mobility; e is the charge constant and m is the charge mass.
From the formula (3.2), it can be seen that increasing L (the mean free path of carrier movement) can effectively improve the carrier mobility, and L is only related to the crystal structure, and L in the crystal is 2-3 orders of magnitude higher than that in the amorphous or semi-crystalline state, so that preparing the amorphous or semi-crystalline polymer material into a high crystallinity, even a single crystal, can significantly improve the polymer carrier mobility, and further improve the conductivity.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, the invention aims to provide an IBC/HBC battery based on a material with high hole mobility and a preparation method thereof. The invention improves the crystallinity of each sub-hole transport layer, thereby greatly improving the carrier mobility and the conductivity of each sub-hole transport layer.
In one aspect of the invention, the invention proposes an IBC/HBC cell based on a high hole mobility material. According to an embodiment of the invention, the IBC/HBC cell based on a high hole mobility material comprises:
a crystalline silicon substrate layer having opposing front and back faces;
a first passivation layer on a front side of the crystalline silicon substrate layer;
an anti-reflective layer on a surface of the first passivation layer away from the crystalline silicon substrate layer;
a second passivation layer on a back side of the crystalline silicon substrate layer;
a hole transport layer comprising a plurality of sub-hole transport layers;
the electron transport layer comprises a plurality of sub-electron transport layers, and the sub-hole transport layer and the sub-electron transport layers are spaced on the surface, far away from the crystalline silicon substrate layer, of the second passivation layer;
the material of the hole transport layer is a polymer material.
According to the IBC/HBC battery based on the high-hole-mobility material, the sub-hole transport layers and the sub-electron transport layers are arranged at intervals, so that the polymer materials of the sub-hole transport layers are limited in dynamics through gradual polymerization reaction and can only be regularly arranged in the template (namely between the adjacent sub-electron transport layers), a highly ordered polymer chain, namely the high-crystallinity polymer material is obtained, the crystallinity of each sub-hole transport layer is improved, and the carrier mobility and the conductivity of each sub-hole transport layer are greatly improved.
In addition, the IBC/HBC cell based on the high hole mobility material according to the above embodiment of the present invention may also have the following additional technical features:
in some embodiments of the present invention, the width of a single said sub-hole transport layer is no greater than 90 μm; preferably, the width of a single said sub-hole transport layer is no greater than 50 μm, more preferably 100 to 200nm.
In some embodiments of the present invention, the thickness of a single said sub-hole transporting layer is no greater than 50nm; preferably, the thickness of the single sub-hole transport layer is not more than 20nm.
In some embodiments of the present invention, the material of the hole transport layer is a P-type polymer selected from at least one of PTAA, PEDOT, and P3 HT.
In some embodiments of the present invention, the hole transport layer has a crystallinity of 50 to 100%, preferably 80 to 100%.
In some embodiments of the present invention, the hole mobility of the hole transport layer formed of the PEDOT material is 5 to 30cm 2 The electrical conductivity is 1000 to 9000S/cm.
In some embodiments of the present invention, the hole transport layer formed of the P3HT material has a hole mobility of 20 to 100cm 2/ Vs, the conductivity is 1000 to 4000S/cm.
In a further aspect of the invention, the invention proposes a method of preparing an IBC/HBC cell based on a high hole mobility material as described in the above examples. According to an embodiment of the invention, the method comprises:
(1) Providing a crystalline silicon substrate layer having opposing front and back sides;
(2) Sequentially forming a first passivation layer and an antireflection layer on the front side of the crystalline silicon substrate layer;
(3) Forming a second passivation layer on the back of the crystalline silicon substrate layer;
(4) Forming an isolation layer on the surface, far away from the crystalline silicon substrate layer, of the second passivation layer, removing the isolation layer in the corresponding area of the plurality of sub-electron transmission layers, and preparing the plurality of sub-electron transmission layers;
(5) And removing the isolation layers in the areas corresponding to the plurality of sub-hole transport layers, and preparing the plurality of sub-hole transport layers so that the sub-hole transport layers and the sub-electron transport layers are arranged at intervals.
According to the method provided by the embodiment of the invention, the hole transport layers and the electron transport layers are arranged at intervals, so that the polymer materials of the hole transport layers are dynamically limited and can only be regularly arranged in the template (namely between the adjacent electron transport layers), and a highly ordered polymer chain (namely a high-crystallinity polymer material) is obtained, the crystallinity of the hole transport layers is improved, and the carrier mobility and the conductivity of the hole transport layers are greatly improved. And the method is simple and easy to implement.
In addition, the method according to the above embodiment of the present invention may also have the following technical solutions:
in some embodiments of the invention, the method further comprises: and texturing the crystalline silicon substrate layer before the first passivation layer is formed on the front side of the crystalline silicon substrate layer, and forming pyramid-like structures on the front side and the back side respectively.
In some embodiments of the present invention, the method for preparing the sub hole transport layer comprises: under the action of an oxidant, a gas-phase synthesis method is adopted to gradually polymerize monomers of the polymer material, and then a plurality of the sub-hole transport layers are synthesized.
In some embodiments of the invention, the oxidizing agent is a salt-based oxidizing agent having an oxidation potential of 0.6 to 0.9V.
In some embodiments of the invention, the salt-type oxidizing agent is selected from Fe 3+ Salts and Ag + At least one salt.
In some embodiments of the invention, the Fe 3+ The salt is selected from FeCl 3 、FeBr 3 、FeI 3 、FeTos、Fe 2 (SO 4 ) 3 、Fe 2 (NO 3 ) 3 、Fe 2 O 3 And FeOOH.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
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The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic structural diagram of an IBC/HBC cell based on a high hole mobility material according to an embodiment of the present invention.
The attached drawings are marked as follows:
1-an anti-reflection layer, 2-a first passivation layer, 3-a crystalline silicon substrate layer, 3-1-a front side, 3-2-a back side, 4-a second passivation layer, 5-a sub electron transport layer, 6-a sub hole transport layer, 7-a sub grid line and 8-a main grid line.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In one aspect of the invention, the invention proposes an IBC/HBC cell based on a high hole mobility material. According to an embodiment of the invention, referring to fig. 1, an IBC/HBC cell based on a high hole mobility material comprises: a crystalline silicon substrate layer 3, said crystalline silicon substrate layer 3 having opposing front and back faces 3-1 and 3-2; a first passivation layer 2, said first passivation layer 2 being on a front side 3-1 of said crystalline silicon substrate layer 3; an antireflection layer 1, wherein the antireflection layer 1 is arranged on the surface of the first passivation layer 2 far away from the crystalline silicon substrate layer 3; a second passivation layer 4, said second passivation layer 4 being on a back surface 3-2 of said crystalline silicon substrate layer 3; a hole transport layer including a plurality of sub-hole transport layers 6; an electron transport layer including a plurality of sub-electron transport layers 5, wherein the sub-hole transport layer 6 and the sub-electron transport layers 5 are spaced apart from each other on a surface of the second passivation layer 4 away from the crystalline silicon substrate layer 3; the material of the hole transport layer is a polymer material. Therefore, by arranging the sub-hole transport layers 6 and the sub-electron transport layers 5 at intervals, the polymer materials of the sub-hole transport layers 6 are dynamically limited and can only be regularly arranged in a template (namely between the adjacent sub-electron transport layers 5), so that highly ordered polymer chains, namely high-crystallinity polymer materials, are obtained, the crystallinity of each sub-hole transport layer 6 is improved, and the carrier mobility and the conductivity of each sub-hole transport layer 6 are greatly improved.
According to an embodiment of the present invention, the width of a single sub-hole transport layer 6 is not greater than 90 μm, preferably, the width of a single sub-hole transport layer 6 is not greater than 50 μm, and more preferably 100nm to 200nm, and the width of a single sub-hole transport layer 6 is limited in the above range, which further facilitates the regular arrangement of the sub-hole transport layers 6 between adjacent sub-electron transport layers 5, thereby obtaining a highly ordered polymer chain and further improving the crystallinity of each sub-hole transport layer 6.
According to still another embodiment of the present invention, the thickness of the single above-mentioned sub-hole transport layer 6 is not more than 50nm; preferably, the thickness of the single sub-hole transport layer 6 is not greater than 20nm, and thus, the thickness of the single sub-hole transport layer 6 is limited in the above range, which further facilitates the regular arrangement of the sub-hole transport layers 6 in a limited space, thereby obtaining highly ordered polymer chains and further improving the crystallinity of each sub-hole transport layer 6.
In the embodiment of the present invention, the filling space of the polymer is controlled by defining the width between the templates and the thickness of the templates (i.e., the width and thickness of a single above-mentioned sub-hole transport layer 6), so that the gradual polymerization reaction of the polymer material of each sub-hole transport layer 6 is kinetically limited, and the polymer material can only be regularly arranged in the templates (i.e., between adjacent sub-electron transport layers 5), thereby obtaining highly ordered polymer chains, i.e., high-crystallinity polymer materials, improving the crystallinity of each sub-hole transport layer, and thus greatly improving the carrier mobility and conductivity of each sub-hole transport layer.
According to another embodiment of the present invention, the material of the hole transport layer is a P-type polymer, and the P-type polymer is at least one selected from PTAA, PEDOT, and P3 HT. Note that the hole transport layers of different materials have different crystallinity, as shown in table 1.
TABLE 1
Figure BDA0003972295020000051
Wherein the structural formula of PEDOT is
Figure BDA0003972295020000052
When the width of the single sub-hole transport layer is less than or equal to 200nm and the thickness of the single sub-hole transport layer is less than or equal to 12nm, a single crystal state is achieved, and the crystallinity of the single crystal state reaches 100%.
Wherein the structural formula of P3HT is
Figure BDA0003972295020000053
When the width of the single sub-hole transport layer is less than or equal to 150nm and the thickness is less than or equal to 20nm, a single crystal state is achieved, and the crystallinity reaches 100%.
Compared with the hole transport layer prepared by the traditional method, the hole mobility and the conductivity of the hole transport layer (which limits the width and the thickness of the sub hole transport layer) prepared by the template method are greatly improved. Specifically, the hole mobility of the PEDOT material hole transport layer prepared by the traditional method is 0.01-1cm 2 Vs, conductivity of 100-500S/cm; the hole mobility of the PEDOT material hole transport layer prepared by the template method is 5-30 cm 2/ Vs, the conductivity is 1000 to 9000S/cm. Hole migration of P3HT material hole transport layer prepared by traditional methodThe ratio is 0.01cm 2 Vs, conductivity 10S/cm; the hole mobility of the hole transport layer of the P3HT material prepared by the template method is 20-100 cm 2 The electrical conductivity is 1000-4000S/cm. The hole mobility of the hole transport layer made of p-a-Si (H) material prepared by the traditional method is 10 -4 ~10 -3 cm 2 Vs, conductivity 10 -3 ~10 -2 S/cm。
In the embodiment of the present invention, the kind of the material of the first passivation layer is not particularly limited, and for example, includes, but is not limited to, a-Si, polycrystalline silicon, microcrystalline silicon, silicon oxide, and the like. Likewise, the kind of material of the second passivation layer is not particularly limited, and includes, for example, but not limited to, a-Si, polycrystalline silicon, microcrystalline silicon, silicon oxide, and the like.
In a further aspect of the invention, the invention proposes a method of preparing the IBC/HBC cell based on the high hole mobility material described in the above example. According to an embodiment of the invention, the method comprises:
s100: providing a crystalline silicon substrate layer
In this step a crystalline silicon substrate layer 3 is provided, said crystalline silicon substrate layer 3 having opposite front and back sides 3-1, 3-2. Wherein, the front 3-1 refers to a light facing surface, and the back 3-2 refers to a backlight surface, refer to fig. 1.
According to a specific embodiment of the present invention, before the first passivation layer is formed on the front surface of the crystalline silicon substrate layer, texturing is performed on the crystalline silicon substrate layer, and the pyramid-like structures are formed on the front surface and the back surface respectively. The purpose of texturing the front surface is to reduce reflection of incident light, improve short-circuit current of the cell, and further improve photoelectric conversion efficiency of the cell.
S200: sequentially forming a first passivation layer and an antireflection layer on the front surface of the crystalline silicon substrate layer
In this step, a first passivation layer and an anti-reflection layer are sequentially formed on the front surface of the crystalline silicon substrate layer, and the specific processes thereof are conventional in the art and will not be described herein again. The first passivation layer is used for passivating a silicon-oxygen dangling bond on the front surface of the crystalline silicon substrate layer through chemical bond connection, and the antireflection layer is used for blocking light reflected by the upper surface of the crystalline silicon through regulating and controlling the material and the thickness of the antireflection layer. The kind of material of the first passivation layer is not particularly limited, and includes, for example, but not limited to, a-Si, polycrystalline silicon, microcrystalline silicon, silicon oxide, and the like. Materials of the anti-reflective layer include, but are not limited to, silicon nitride materials.
S300: forming a second passivation layer on the back of the crystalline silicon substrate layer
In this step, a second passivation layer is formed on the back surface of the crystalline silicon substrate layer, and the specific process thereof belongs to the conventional technology in the field and is not described herein again. The second passivation layer has the function of passivating the silicon-oxygen dangling bond on the back surface of the crystalline silicon substrate layer through the connection of chemical bonds. The kind of material of the second passivation layer is not particularly limited, and includes, for example, but not limited to, a-Si, polycrystalline silicon, microcrystalline silicon, silicon oxide, and the like.
S400: forming an isolation layer on the surface of the second passivation layer far away from the crystalline silicon substrate layer, removing the isolation layer in the corresponding region of the multiple sub-electron transmission layers, and preparing the multiple sub-electron transmission layers
In the step, an isolation layer (for example, a mask layer) is formed on the surface of the second passivation layer, which is far away from the crystalline silicon substrate layer, the mask layer in the corresponding region of the plurality of sub-electron transport layers is removed through exposure, a part of the second passivation layer is exposed, and the plurality of sub-electron transport layers are prepared on the surface of the exposed second passivation layer. For example, phosphorus diffusion (forming an electron transport layer) may be performed in the phosphorus diffusion region where the mask layer is removed, and since other regions have the protection of the mask layer, a plurality of independent N-type doped regions are formed in the phosphorus diffusion region, and then a mask layer with a certain thickness is continuously grown on the surface of the electron transport layer, so as to avoid the influence on the electron transport layer when a hole transport layer is subsequently formed.
S500: removing the isolation layer in the corresponding region of the multiple sub-hole transport layers to prepare multiple sub-hole transport layers
In this step, the isolation layer (for example, a mask layer) in the region corresponding to the plurality of sub-hole transport layers is removed, the remaining second passivation layer is exposed, and a plurality of sub-hole transport layers are prepared on the surface of the exposed second passivation layer, so that the sub-hole transport layers and the sub-electron transport layers are arranged at intervals.
The preparation method of the sub-hole transport layer comprises the following steps: under the action of a salt oxidant with the oxidation potential of 0.6-0.9V, a gas phase synthesis method is adopted to gradually polymerize monomers of the polymer material, the polymer monomers are oxidized into free radicals, and the free radicals are arranged and filled in the spacing region at one time through the gradual polymerization reaction, so that a plurality of the sub-hole transport layers are synthesized.
According to another embodiment of the present invention, the oxidizing agent is selected from Fe 3+ Salts and Ag + At least one salt, thereby the efficiency of the salt-based oxidizing agent for initiating the polymerization reaction of the monomer is high. Specifically, the specific type of the salt-type oxidizing agent is not particularly limited, and as some specific examples, the above-mentioned Fe 3+ The salt is selected from FeCl 3 、FeBr 3 、FeI 3 、FeTos、Fe 2 (SO 4 ) 3 、Fe 2 (NO 3 ) 3 、Fe 2 O 3 And FeOOH.
After forming the plurality of sub-hole transport layers, the method further includes: removing the mask layer on the whole silicon wafer surface, then forming a main grid line 8 and an auxiliary grid line 7 on the main grid region and the auxiliary grid region of the P-type doped region (hole transport layer) and the N-type doped region (electron transport layer) by using metallization slurry, and forming a single IBC/HBC battery after sintering, referring to the attached figure 1.
According to the method provided by the embodiment of the invention, the sub-hole transport layers and the sub-electron transport layers are arranged at intervals, so that the gradual polymerization reaction of the polymer materials of the sub-hole transport layers is limited in dynamics and can only be regularly arranged in the template (namely between the adjacent sub-electron transport layers), and thus a highly ordered polymer chain, namely a high-crystallinity polymer material, is obtained, the crystallinity of each sub-hole transport layer is improved, and the carrier mobility and the conductivity of each sub-hole transport layer are greatly improved. And the method is simple and easy to implement.
The following embodiments of the present invention are described in detail, and it should be noted that the following embodiments are exemplary only, and are not to be construed as limiting the present invention. In addition, all reagents used in the following examples are commercially available or can be synthesized according to methods herein or known, and are readily available to one skilled in the art for reaction conditions not listed, if not explicitly stated.
Example 1
The embodiment provides an IBC solar cell, which is prepared as follows:
1): providing a crystalline silicon substrate with the thickness of 160 mu m, texturing the crystalline silicon substrate, and sequentially forming a first passivation layer (the material of which is SiO) with the thickness of 10nm on the front surface of the textured crystalline silicon substrate 2 ) And an antireflection layer (of SiN) having a thickness of 200nm x )。
2): a second passivation layer (made of SiO) with the thickness of 10nm is formed on the back of the textured crystalline silicon substrate in sequence 2 ) And forming a mask layer (made of PCB photoresist) with the thickness of 30nm on the surface of the second passivation layer.
3): and removing the mask layer in the corresponding area of the plurality of sub-electron transport layers through exposure, exposing a part of the second passivation layer, and performing phosphorus diffusion on the surface of the exposed second passivation layer to form a plurality of sub-electron transport layers (the material is a-Si (P +)), wherein the width of each sub-electron transport layer is 1 μm, and the thickness of each sub-electron transport layer is 100nm. Because other areas are protected by the mask layer, a plurality of independent N-type doped areas are formed in the phosphorus diffusion area, and then a layer of mask layer is continuously grown.
4): and removing the mask layer in the area corresponding to the plurality of sub-hole transport layers, exposing the residual second passivation layer, and loading a P-type doped material PEDOT on the surface of the exposed second passivation layer to form a plurality of sub-hole transport layers so that the sub-hole transport layers and the sub-electron transport layers are arranged at intervals. Wherein the width d =100nm and the thickness h =20nm of the single sub-hole transport layer.
5): and removing the mask layer on the whole silicon wafer.
6): and forming a main grid line and an auxiliary grid line on the main grid region and the auxiliary grid region of the P-type doped region and the N-type doped region by using the metallization slurry, and sintering to form the single IBC battery.
The hole mobility of the PEDOT transport layer prepared in this example was tested to be 8cm 2 (iv)/Vs, conductivity 3000S/cm.
Example 2
The present embodiment provides an IBC solar cell, and the only difference between the present embodiment and embodiment 1 is:
4) The width d =200nm and the thickness h =12nm of the single sub-hole transport layer.
The other steps were the same as in example 1.
The hole mobility of the PEDOT transport layer prepared in this example was tested to be 30cm 2/ Vs, conductivity 9000S/cm.
Example 3
The present embodiment provides an IBC solar cell, and the present embodiment differs from embodiment 1 only in that:
4) The width d =500nm and the thickness h =15nm of the single sub-hole transport layer.
The other steps were the same as in example 1.
The hole mobility of the PEDOT transport layer prepared in this example was tested to be 10cm 2/ Vs, conductivity of 7500S/cm.
Example 4
The present embodiment provides an IBC solar cell, and the present embodiment differs from embodiment 1 only in that:
4) The material of the hole transport layer is P3HT, and the width d =150nm and the thickness h =10nm of the single sub-hole transport layer.
The other steps were the same as in example 1.
The hole mobility of the P3HT transport layer prepared in this example was tested to be 90cm 2/ Vs, conductivity was 3500S/cm.
Example 5
The present embodiment provides an IBC solar cell, and the present embodiment differs from embodiment 4 only in that:
4) The width d =500nm and the thickness h =20nm of the single sub-hole transport layer.
The other steps were the same as in example 4.
The hole mobility of the P3HT transport layer prepared in this example was tested to be 30cm 2/ Vs, conductivity 1000S/cm.
Example 6
The present embodiment provides an IBC solar cell, and the present embodiment differs from embodiment 4 only in that:
4) The width d =300nm and the thickness h =20nm of the single sub-hole transport layer.
The other steps were the same as in example 4.
The hole mobility of the P3HT transport layer prepared in this example was tested to be 70cm 2/ Vs, conductivity 2000S/cm.
Comparative example 1
This comparative example differs from example 1 only in that:
4) The width d =200 μm and the thickness h =85nm of the single sub-hole transport layer.
The other steps were the same as in example 1.
The hole mobility of the PEDOT transport layer prepared in this comparative example was tested to be 5cm 2 and/Vs, conductivity 1500S/cm.
Comparative example 2
This comparative example differs from example 4 only in that:
4) The width d =200 μm and the thickness h =85nm of the single sub-hole transport layer.
The other steps were the same as in example 1.
The hole mobility of the P3HT transport layer prepared in the comparative example was 20cm 2 (iv)/Vs, conductivity 1000S/cm.
Comparative example 3
This comparative example prepared an electron transport layer and a hole transport layer using a conventional method, including:
1): providing a crystalline silicon substrate with the thickness of 160 mu m, texturing the crystalline silicon substrate, and sequentially forming a first passivation layer (the material of which is SiO) with the thickness of 10nm on the front surface of the textured crystalline silicon substrate 2 ) And an antireflection layer (of SiN) having a thickness of 200nm x )。
2): forming a second passivation layer (made of SiO material) with thickness of 10nm on the back surface of the textured crystalline silicon substrate 2 )。
3): BBr on the exposed surface of the second passivation layer 3 Tubular diffusion to form the overall hole transport layer.
4): a mask layer (made of PCB photoresist) with a thickness of 30nm is formed on the surface of the total hole transport layer. Removing the mask layer and the hole transport layer in the corresponding areas of the multiple sub-electron transport layers to expose the second passivation layer, and performing POCl on the surface of the exposed second passivation layer 3 And (3) performing tubular diffusion to form a plurality of electron transport layers, wherein the electron hole transport layer and the electron transport layer are arranged at intervals. Wherein the width d =200 μm and the thickness h =200nm of the single sub-hole transport layer.
The rest is the same as in example 1.
The hole mobility of the P3HT transport layer prepared in the comparative example was measured to be 0.01cm 2 Vs, conductivity 10S/cm.
It can be seen that the hole transport layers prepared in examples 1-6 of the present invention have high hole mobility and high conductivity. By comparing example 1 with comparative example 1, it can be seen that when the width and thickness of the individual sub PEDOT hole transport layer are excessively large, the hole mobility and conductivity thereof are significantly reduced. By comparing example 4 and comparative example 2, it can be seen that when the width and thickness of the individual P3HT hole transport layers are excessively large, the hole mobility and conductivity thereof are significantly reduced. By comparing example 1 with comparative example 3, it can be seen that the hole mobility and the conductivity of the hole transport layer prepared by the conventional method are significantly reduced.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.

Claims (10)

1. An IBC/HBC cell based on a high hole mobility material, comprising:
a crystalline silicon substrate layer having opposing front and back sides;
a first passivation layer on a front side of the crystalline silicon substrate layer;
an anti-reflection layer on a surface of the first passivation layer away from the crystalline silicon substrate layer;
a second passivation layer on a back side of the crystalline silicon substrate layer;
a hole transport layer comprising a plurality of sub-hole transport layers;
the electron transport layer comprises a plurality of sub-electron transport layers, and the sub-hole transport layer and the sub-electron transport layers are spaced on the surface, far away from the crystalline silicon substrate layer, of the second passivation layer;
the material of the hole transport layer is a polymer material.
2. The high hole mobility material-based IBC/HBC cell of claim 1, wherein the width of a single said sub-hole transport layer is no greater than 90 μ ι η;
preferably, the width of a single said sub-hole transport layer is no greater than 50 μm, more preferably 100 to 200nm.
3. The high hole mobility material-based IBC/HBC cell of claim 2, wherein the thickness of a single said sub-hole transport layer is no greater than 50nm;
preferably, the thickness of the single sub-hole transport layer is not more than 20nm.
4. The IBC/HBC cell according to claim 1, wherein the material of the hole transport layer is a P-type polymer selected from at least one of PTAA, PEDOT and P3 HT.
5. The IBC/HBC cell based on a high hole mobility material according to claim 4, characterized in that the hole transport layer has a crystallinity of 50-100%, preferably 80-100%.
6. The high hole mobility material-based IBC/HBC cell of claim 4, wherein the hole mobility of the hole transport layer formed from the PEDOT material is 5-30 cm 2 The electrical conductivity is 1000 to 9000S/cm.
7. The IBC/HBC cell according to claim 4, wherein the hole mobility of the hole transport layer formed of the P3HT material is 20-100 cm 2/ Vs, the conductivity is 1000 to 4000S/cm.
8. A method of preparing an IBC/HBC cell based on a high hole mobility material according to any one of claims 1 to 7, comprising:
(1) Providing a crystalline silicon substrate layer having opposing front and back sides;
(2) Sequentially forming a first passivation layer and an antireflection layer on the front side of the crystalline silicon substrate layer;
(3) Forming a second passivation layer on the back of the crystalline silicon substrate layer;
(4) Forming an isolation layer on the surface, far away from the crystalline silicon substrate layer, of the second passivation layer, removing the isolation layer in the corresponding area of the plurality of sub-electron transmission layers, and preparing the plurality of sub-electron transmission layers;
(5) And removing the isolation layers in the areas corresponding to the plurality of sub-hole transport layers, and preparing the plurality of sub-hole transport layers so that the sub-hole transport layers and the sub-electron transport layers are arranged at intervals.
9. The method of claim 8, further comprising: and texturing the crystalline silicon substrate layer before the first passivation layer is formed on the front side of the crystalline silicon substrate layer, and forming pyramid-like structures on the front side and the back side respectively.
10. The method according to claim 8, wherein the method for preparing the sub-hole transport layer comprises:
under the action of an oxidant, a gas-phase synthesis method is adopted to gradually polymerize monomers of a polymer material, so that a plurality of sub-hole transport layers are synthesized;
optionally, the oxidizing agent is a salt oxidizing agent with an oxidation potential of 0.6-0.9V;
optionally, the salt-type oxidizing agent is selected from Fe 3+ Salts and Ag + At least one salt;
optionally, the Fe 3+ The salt is selected from FeCl 3 、FeBr 3 、FeI 3 、FeTos、Fe 2 (SO 4 ) 3 、Fe 2 (NO 3 ) 3 、Fe 2 O 3 And FeOOH.
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