CN115866172A - High-definition multimedia connector, interface circuit control method and equipment thereof - Google Patents
High-definition multimedia connector, interface circuit control method and equipment thereof Download PDFInfo
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- CN115866172A CN115866172A CN202211506270.0A CN202211506270A CN115866172A CN 115866172 A CN115866172 A CN 115866172A CN 202211506270 A CN202211506270 A CN 202211506270A CN 115866172 A CN115866172 A CN 115866172A
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Abstract
The application discloses an interface circuit control method, a high-definition multimedia connector, an audio and video transmission system and a computer readable storage medium. The interface circuit control method is applied to an input interface of a high-definition multimedia connector, and comprises the following steps: detecting the input state of the preset power voltage and the audio and video signals of the input interface; and determining an adjusting signal based on the preset power voltage and the input state of the audio/video signal so that the input interface adjusts the working mode based on the adjusting signal. Through the mode, the working mode of the input interface can be adjusted based on the input state of the audio and video signals of the interface circuit input to the high-definition multimedia connector and the preset power supply voltage, so that the power consumption of the output interface is reduced, and the energy is saved.
Description
Technical Field
The application relates to the technical field of interfaces, in particular to an interface circuit control method, a high-definition multimedia connector, an audio and video transmission system and a computer readable storage medium.
Background
A High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission Interface, can transmit uncompressed audio and video signals, and is generally applied to hard disk recorders, set-top boxes, televisions, personal computers, and the like.
Because high definition multimedia connector has transmission distance advantages such as far away, interference killing feature strong, its use scene is many, but when the host computer is in indirect connection with a plurality of display device through high definition multimedia connector and distributor, when closing the host computer, because the distributor does not cut off the power supply, its display device who is connected with the distributor will be in normal operating condition always, and the consumption is great, is unfavorable for the energy can be saved.
Disclosure of Invention
The application provides an interface circuit control method, a high-definition multimedia connector, an audio and video transmission system and a computer readable storage medium, which can adjust the working mode and reduce the power consumption of display equipment.
In order to solve the technical problem, the application adopts a technical scheme that: the interface circuit control method is applied to an input interface of a high-definition multimedia connector. The method comprises the following steps: detecting the input state of the preset power voltage and the audio and video signals of the input interface; and determining an adjusting signal based on the preset power voltage and the input state of the audio/video signal so that the input interface adjusts the working mode based on the adjusting signal.
Wherein, confirm the adjustment signal based on the input state of presetting mains voltage and audio and video signal to make input interface adjust mode based on the adjustment signal, include: detecting whether a preset power supply voltage is input on an input interface; responding to the input interface with continuous input of a preset power supply voltage within a first preset time, and controlling the input interface to adjust the hot plug detection signal to be at a high level; judging whether audio and video signals are continuously input in a second preset time on the input interface; if not, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be a low level; and if so, controlling the input interface to enter a normal working mode, and controlling the input interface to keep the hot plug detection signal at a high level.
Wherein, input interface is connected with the receipt treater, is equipped with the register on the receipt treater, detects whether there is the step of predetermineeing mains voltage input on the input interface, includes: reading a first boolean value of a power input bit of a register; responsive to the first boolean value being true; then the input interface has a preset power voltage input; in response to the first Boolean value being false, no predetermined power voltage is input on the input interface.
The step of judging whether audio and video signals are continuously input in a second preset time on the input interface comprises the following steps: reading a second Boolean value of a video input bit of the register; responding to the second Boolean value as true, and inputting audio and video signals on the input interface; in response to the second Boolean value being false, no audio video signal is input on the input interface.
The interface circuit control method further comprises the following steps: responding to the situation that no preset power supply voltage is continuously input on the input interface within the first preset time, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be at a low level.
In order to solve the technical problem, the application adopts a technical scheme that: the high-definition multimedia connector comprises an input interface and an output interface, wherein the input interface is used for receiving audio and video signals sent by the output interface; the output interface is used for providing preset power supply voltage for the input interface; the input interface is connected with the receiving processor, so that the receiving processor is used for generating an adjusting signal based on the preset power voltage of the input interface and the input state of the audio and video signals, and the input interface adjusts the working mode based on the adjusting signal.
The output interface comprises a preset power supply, a first interface socket and an electrostatic protection assembly, wherein the preset power supply is used for providing preset power supply voltage for the input interface; the first interface socket is respectively connected with the signal driver and a preset power supply; the electrostatic protection component is arranged on a connecting line of the first interface socket and the signal driver.
The output interface further comprises a decoupling resistor, one end of the decoupling resistor is connected with the signal driver, and the other end of the decoupling resistor is connected with the first interface socket and used for absorbing residual voltage clamped by the electrostatic method component.
The output interface further comprises a bidirectional level conversion circuit, and the bidirectional level conversion circuit is respectively arranged on a connecting line of the signal driver and the serial clock pin of the first interface socket, a connecting line of the signal driver and the serial data line pin of the first interface socket and a connecting line of the signal driver and the hot plug detection pin of the first interface socket.
The input interface comprises a second interface socket and an electrostatic protection assembly, and the second interface socket is connected with the receiving processor; the electrostatic protection component is arranged on a connecting line of the second interface socket and the receiving processor.
The input interface further comprises a decoupling resistor, one end of the decoupling resistor is connected with the receiving processor, and the other end of the decoupling resistor is connected with the second interface socket and used for absorbing residual voltage clamped by the electrostatic method component.
The input interface further comprises a bidirectional level conversion circuit, and the bidirectional level conversion circuit is respectively arranged on a connecting line of the receiving processor and a serial clock pin of the second interface socket, a connecting line of the receiving processor and a serial data line pin of the second interface socket and a connecting line of a hot plug detection pin of the receiving processor and the second interface socket.
The input interface is further used for sending the hot plug detection signal to the output interface, so that the output interface judges whether the input interface is connected with the output interface or not based on the hot plug detection signal.
In order to solve the above technical problem, another technical solution adopted by the present application is: an audio/video transmission system is provided, which comprises any one of the high-definition multimedia connectors, a signal driver and a receiving processor, wherein the processor is used for executing any one of the interface circuit control methods.
In order to solve the above technical problem, another technical solution adopted by the present application is: there is provided a computer-readable storage medium having stored therein program instructions that are executed to implement the interface circuit control method of any one of the above.
The beneficial effect of this application is: different from the situation of the prior art, the interface circuit control method of the application firstly detects the input state of the preset power supply voltage and the audio/video signal of the input interface; and determining an adjusting signal based on the preset power voltage and the input state of the audio/video signal, so that the input interface adjusts the working mode based on the adjusting signal. In the process, the working mode of the input interface can be adjusted based on the interface circuit audio and video signals input to the high-definition multimedia connector and the input state of the preset power supply voltage, so that the power consumption of the output interface is reduced, the energy is saved, and the power consumption of the display equipment connected with the input interface is reduced, and the energy is saved.
Drawings
FIG. 1 is a schematic diagram illustrating a connection relationship between an output interface and an input interface of a high definition multimedia connector;
FIG. 2 is a schematic block diagram of a host and display device connected through a high definition multimedia connector;
FIG. 3 is a schematic structural diagram of an embodiment of a recording and playing system for teaching;
FIG. 4 is a schematic flow chart diagram illustrating an embodiment of an interface circuit control method provided herein;
FIG. 5 is a flowchart illustrating an embodiment of step S102 in FIG. 4;
FIG. 6 is a flowchart illustrating an embodiment of step S201 in FIG. 5;
FIG. 7 is a flowchart illustrating an embodiment of step S203 in FIG. 5;
FIG. 8 is a block diagram illustrating the structure of an embodiment of a high definition multimedia connector provided herein;
FIG. 9 is a schematic structural diagram of an embodiment of an output interface provided herein;
FIG. 10 is a schematic diagram of an embodiment of an input interface provided in the present application;
fig. 11 is a block diagram schematically illustrating a structure of an embodiment of an audio/video transmission system provided in the present application;
FIG. 12 is a schematic structural diagram of an embodiment of a computer-readable storage medium of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a connection relationship between an output interface and an input interface of a high-definition multimedia connector. A High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission Interface, can transmit uncompressed audio and video signals, and is generally applied to hard disk recorders, set-top boxes, televisions, personal computers, and the like.
As shown in fig. 1, the high-definition multimedia connector 100 includes an output interface 10 and an input interface 20, the output interface 10 is connected to the input interface 20, the output interface 10 and the input interface 20 transmit CES signals to each other, and the DDC signals can be used to obtain the transmission and reception capabilities between the two, but the high-definition multimedia connector 100 only needs to know the reception capability of the input interface 20 in a single direction, and the CES signals are used to transmit AV Link protocol signals of industrial specifications.
The output interface 10 will also provide a preset power supply voltage for the input interface 20; the hot plug signal is sent from the input interface 20 to the output interface 10 as a basis for determining whether the high definition multimedia connector 100 is connected to the display device.
The high-definition multimedia connector 100 has the advantages of long transmission distance, strong anti-interference capability and the like, so that the application scenes are many. In the prior art, as shown in fig. 2, fig. 2 is a schematic block diagram of a host and a display device connected through a high-definition multimedia connector. If the display device is directly connected to the host through the high definition multimedia connector 100, when the host is powered off, the display device will automatically enter a standby mode when the display device cannot receive power. When the host computer is restarted, the display equipment automatically enters a normal working mode when receiving power supply. However, when the host computer is indirectly connected to a plurality of display devices through the high definition multimedia connector 100 and the distributor, and the host computer is turned off, the display devices connected to the distributor will always be in a normal working state because the distributor is not powered off, and the power consumption is large, which is not beneficial to saving energy.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an embodiment of a teaching recording and broadcasting system, and as shown in fig. 3, when a host for teaching operation needs to connect to multiple display devices, the host needs to be connected to a platform display, a projector, a recording and broadcasting host through a high-definition multimedia distributor.
As the recording and broadcasting host and the host in fig. 3 are indirectly connected through the distributor, since the distributor and the recording and broadcasting host are installed in a relatively closed space, the distributor and the recording and broadcasting host are normally only turned off when the system is turned off, and the distributor and the recording and broadcasting host are not turned off. When the host is shut down, the preset power supply voltage of the output interface 3 of the distributor can exist all the time because the distributor is not powered off, and the input interface 3 of the recording and broadcasting host is in a normal working state all the time after detecting the preset power supply voltage, so that a large amount of electric energy is wasted.
In order to solve the above problem, the present application first proposes an interface circuit control method, which is applied to the input interface of the high definition multimedia connector 100. Referring to fig. 4, fig. 4 is a schematic flowchart illustrating an embodiment of an interface circuit control method according to the present application. As shown in fig. 4, the interface circuit control method of the present embodiment specifically includes steps S101 to S102:
step S101: and detecting the input state of the preset power voltage and the audio/video signal of the input interface.
The receiving processor detects the preset power supply voltage on the input interface and the input state of the audio and video signals, firstly detects whether the preset power supply voltage is continuously input on the input interface, and then detects whether the audio and video signals are input on the input interface on the basis of the existence of the preset power supply voltage.
Step S102: and determining an adjusting signal based on the preset power voltage and the input state of the audio/video signal so that the input interface adjusts the working mode based on the adjusting signal.
The receiving processor is used for obtaining the preset power supply voltage and the input state of the audio and video signals on the input interface, and determining the adjusting signal based on the preset power supply voltage and the input state of the audio and video signals, so that the input interface adjusts the working mode based on the adjusting signal.
For example, when no preset power supply voltage is input on the input interface, determining an adjustment signal to enable the input interface to enter a sleep mode; when the input interface is detected to have the input of the preset power supply voltage but no audio and video signals, determining an adjusting signal to enable the input interface to enter a sleep mode; and the input interface enters a normal working mode based on the adjusting signal only when the preset power supply voltage input and no audio and video signal input exist on the input interface.
Different from the situation of the prior art, the interface circuit control method of the application firstly detects the input state of the preset power supply voltage and the audio/video signal of the input interface; and determining an adjusting signal based on the preset power voltage and the input state of the audio/video signal, so that the input interface adjusts the working mode based on the adjusting signal. In the process, the working mode of the input interface can be adjusted based on the interface circuit audio and video signals input to the high-definition multimedia connector and the input state of the preset power supply voltage, so that the power consumption of the output interface is reduced, the energy is saved, and the power consumption of the display equipment connected with the input interface is reduced, and the energy is saved.
Optionally, a method for determining the adjustment signal based on the preset power voltage and the input state of the audio/video signal so that the input interface adjusts the working mode based on the adjustment signal is shown in fig. 5, please refer to fig. 5, and fig. 5 is a schematic flowchart of an embodiment of step S102 in fig. 4. In this embodiment, step S102 may be implemented by the method shown in fig. 5, and the specific implementation steps include step S201 to step S205:
step S201: and detecting whether a preset power supply voltage is input on the input interface.
The receiving processor detects whether a preset power voltage is input on the input interface, in this embodiment, the detection function is integrated inside the receiving processor, and a corresponding register can be set for reading and judging.
Step S202: and responding to the continuous input of the preset power supply voltage on the input interface within the first preset time, and controlling the input interface to adjust the hot plug detection signal to be at a high level.
When the receiving processor detects that the input interface has the continuous input of the preset power supply voltage within the first preset time, the input interface is controlled to adjust the hot plug detection signal to be in a high level. In this embodiment, the first preset time may be 3 seconds, the preset power voltage is set to 5V, and if it is detected that the input interface has +5V power voltage input and lasts for more than 3 seconds, the input interface is controlled to adjust the hot plug detection signal to a high level.
Step S203: and judging whether the audio and video signals are continuously input in the second preset time on the input interface.
After step S202, when it is detected that the preset power voltage is continuously input, it is further required to continuously read the register inside the receiving processor to determine whether the audio/video signal is continuously input on the input interface within the second preset time. The second preset time may be set based on actual needs, and in this embodiment, the second preset time may be set to 5 seconds.
If no input of the preset power voltage is detected, the process goes to step S204, and if the input of the preset power voltage is detected, the process goes to step S205.
Step S204: and controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be at a low level.
When the receiving processor detects that no preset power voltage is continuously input, the input interface is controlled to enter a sleep mode, and the input interface is controlled to adjust the hot plug detection signal to a low level.
Step S205: and controlling the input interface to enter a normal working mode, and controlling the input interface to keep the hot plug detection signal at a high level.
And when the receiving processor detects that the preset power supply voltage is continuously input, the input interface is controlled to enter a normal working mode, and the input interface is controlled to keep the hot plug detection signal at a high level.
As shown in fig. 5, the interface circuit control method of the present embodiment further includes step S206: responding to the situation that no preset power supply voltage is continuously input on the input interface within the first preset time, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be at a low level.
That is, after step S101, if the receiving processor detects that the input interface has no preset power voltage for continuous input within the first preset time, the receiving processor also controls the input interface to enter the sleep mode, and controls the input interface to adjust the hot plug detection signal to the low level.
In this embodiment, the receiving processor is provided with a register, and please refer to the following table, which is a corresponding indication table of the flag bit status value according to an embodiment of the register provided in the present application.
Bits B7B 6B 5B 4B 3B 2B 1B 0 name S _ SS _ AVS _ HS _ HS _ PHY _ S _ PHYS _ TS _ DD YNC MUTE DCPDISCDT _ PLL MDS CC5V class RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO 00 00 0 authentication
Value of
That is, in the present embodiment, the register of the present embodiment is provided with 8 bits, and the type RO in the above table indicates that the register is a read-only register. In this embodiment, the 0 th bit of the register is a power input bit, the 7 th bit of the register is a video input bit, and the interface circuit control method in this embodiment is only applied to the two bits of the register.
Optionally, a method for detecting whether there is a preset power voltage on the input interface is shown in fig. 6, please refer to fig. 6, and fig. 6 is a flowchart illustrating an embodiment of step S201 in fig. 5. In this embodiment, step S201 may be implemented by the method shown in fig. 6, and the specific implementation steps include step S301 to step S303:
step S301: a first boolean value of a power input bit of a register is read.
The receiving processor reads the 0 th bit of the register of the upper table, i.e., reads the first Boolean value of the power input bit.
Step S302: responsive to the first boolean value being true; then there is a predetermined power voltage input on the input interface.
If the first boolean value read from the power input bit of the register is true, i.e., the first boolean value is 1, it is indicated that a predetermined power voltage input is present on the input interface. And if the read first Boolean value is continuously 1, indicating that the preset power supply voltage is continuously input on the input interface.
Step S303: in response to the first Boolean value being false, no predetermined power voltage is input on the input interface.
If the first boolean value read from the power input bit of the register is false, i.e., the first boolean value is 0, it is characterized that no preset power voltage is input on the input interface.
Optionally, a method for determining whether an audio/video signal is continuously input on the input interface within a second preset time is shown in fig. 7, please refer to fig. 7, and fig. 7 is a flowchart of an embodiment of step S203 in fig. 5. In this embodiment, step S203 may be implemented by the method shown in fig. 7, and the specific implementation steps include step S401 to step S403:
step S401: a second boolean value of the video input bit of the register is read.
The receiving processor reads the 7 th bit on the table above register, i.e., reads the second boolean value of the video input bit.
Step S402: and responding to the fact that the second Boolean value is true, and audio and video signals are input on the input interface.
And if the second Boolean value read by the video input bit on the register is true, namely the second Boolean value is 1, indicating that the audio and video signals are input on the input interface. And if the read first Boolean value is continuously 1, representing that the audio and video signals are continuously input on the input interface.
Step S403: in response to the second Boolean value being false, no audio video signal is input on the input interface.
If the second boolean value read from the video input bit of the register is false, i.e., the second boolean value is 0, no audio video signal input on the input interface is characterized.
Optionally, the present application further provides a high definition multimedia connector 100, please refer to fig. 8, and fig. 8 is a schematic block diagram of a structure of an embodiment of the high definition multimedia connector provided in the present application. As shown in fig. 8, the high-definition multimedia connector 100 of the present embodiment includes an output interface 10 and an input interface 20, where the input interface 20 is configured to output an audio/video signal sent by the interface; the input interface 20 is connected to the receiving processor 300, so that the receiving processor 300 is configured to generate an adjustment signal based on a preset power voltage of the input interface 20 and an input state of the audio/video signal, and the input interface 20 adjusts the working mode based on the adjustment signal.
The operating principle of the input interface 20 for adjusting the operating mode based on the audio/video signals and the preset power voltage is as follows.
The input interface 20 detects whether a preset power voltage is input, and enters a sleep mode if no preset power voltage is input continuously; when the input of the preset power supply voltage is continuously received, the hot plug detection signal is adjusted to be at a high level, whether audio and video signals are input or not is detected, if the audio and video signals are continuously input, the hot plug detection signal is maintained to be at the high level, and if no audio and video signals are input, the hot plug detection signal is adjusted to be at a low level and enters a sleep mode. In this embodiment, the sleep time of the sleep mode may be set based on actual needs.
In this embodiment, the receiving processor 300 may be a video format converter, and the audio/video signal is converted by the video format converter and then sent to the display device 400 for playing.
Optionally, please refer to fig. 9, where fig. 9 is a schematic structural diagram of an embodiment of an output interface provided in the present application. As shown in fig. 9, the output interface 10 of the present embodiment includes a preset power supply U1, a first interface socket J1 and an electrostatic protection component D, where the preset power supply U1 is used for providing a preset power supply voltage for the input interface 10; the first interface socket J1 is connected to the signal driver 200 and the preset power supply U1 respectively; the esd protection device D is disposed on the connection line between the first interface socket J1 and the signal driver 200.
As shown in fig. 9, the first interface socket J1 is provided with 19 pins in this embodiment, wherein the pins 1, 3, 4, 6, 7, 9, 10, 12, 15, 16, and 19 of the first interface socket J1 are respectively connected to the signal driver 200, wherein the electrostatic protection component D includes 12 electrostatic anti-slip TVS transistors D1 to D12, each of the pins 1, 3, 4, 6, 7, 9, 10, 12, 15, 16, 18, and 19 of the first interface socket J1 is respectively connected to one electrostatic protection TVS transistor and grounded, the pins 2, 5, 8, 11, and 17 of the first interface socket J1 are grounded, and the pin 19 of the first interface socket J1 is connected to one pull-down resistor R18 and grounded.
The preset power supply U1 may be a +5v power output current limiter in this embodiment, an output end of the preset power supply U1 is connected to the power pin 18 of the first interface socket J1 to provide a power voltage for the preset power supply U1, and a circuit structure of the preset power supply U1 is shown in fig. 5 and will not be described, where a current limiting point of the +5v power output current limiter in this embodiment is about 200mA, which not only meets a standard 55mA requirement of a high-definition multimedia connector 100, but also avoids an influence of an excessive current on a motherboard stability during a short circuit, and the current limiter also has a voltage-back-up prevention function.
The output interface 10 of the present embodiment further includes a decoupling resistor, one end of which is connected to the signal driver 200, and the other end of which is connected to the first interface socket J1, for absorbing residual voltage after clamping of the esd protection device D.
As shown in fig. 9, the decoupling resistor includes resistors R1 to R11, wherein the resistors R1 to R8 are disposed on the connection lines between the pins 1, 3, 4, 6, 7, 9, 10, 12 of the first interface socket J1 and the signal driver 200, and the resistances of the resistors R1 to R8 can be selected according to the highest HDMI output resolution, for example, 10 ohms is selected when the output resolution is lower than 4K, and 2.2 ohms is selected when the output resolution is equal to or higher than 4K; the resistors R9 to R11 are disposed on the connection lines between the pins 15, 16, 19 of the first interface socket J1 and the signal driver 200, the resistances of the resistors R9 to R11 are independent of the output resolution, and the resistances of the resistors R9 to R11 can be selected from 22 ohms to 51 ohms in this embodiment.
As shown in fig. 9, the output interface 10 of the present embodiment further includes a bidirectional level shift circuit, which includes 3 bidirectional level shift circuits M1 to M3 respectively disposed on the connection line between the signal driver 200 and the serial clock pin 15 of the first interface socket J1, the connection line between the signal driver 200 and the serial data line pin 16 of the first interface socket J1, and the connection line between the signal driver 200 and the hot plug detection pin 19 of the first interface socket J1.
The circuit structure of the bidirectional level shifter is shown in fig. 5, and the circuit of the bidirectional level shifter can convert voltage from 3.3V to 5V to meet the requirement of the signal driver 200 on the input and output levels, thereby further improving the protection capability of the high-definition multimedia connector 100.
Optionally, referring to fig. 10, fig. 10 is a schematic structural diagram of an embodiment of an input interface provided in the present application. As shown in fig. 10, the input interface 20 of the present embodiment includes a second interface socket J2 and an electrostatic discharge protection device D, wherein the second interface socket J2 is connected to the receiving processor 300; the esd protection device D is disposed on the connection line between the second interface socket J2 and the receiving processor 300.
As shown in fig. 10, the input interface 20 further includes a decoupling resistor, one end of which is connected to the receiving processor 300, and the other end of which is connected to the second interface socket J2, for absorbing residual voltage clamped by the electrostatic approach module D. The input interface 20 further includes bidirectional level shift circuits M1 to M3 respectively disposed on a connection line of the serial clock pins of the receiving processor 300 and the second interface socket J2, a connection line of the serial data lines of the receiving processor 300 and the second interface socket J2, and a connection line of the hot plug detection pins of the receiving processor 300 and the second interface socket J2.
The input interface 20 is only reduced by the predetermined power source U1 and the pull-down resistor R18 compared to the circuit diagram of the output interface 10. Other circuit structures of the input interface 20 and the principles thereof are consistent with the output interface 10 of fig. 5, and will not be described herein again.
Optionally, the present application further provides an audio/video transmission system 500, please refer to fig. 11, where fig. 11 is a block diagram illustrating a structure of an embodiment of the audio/video transmission system provided in the present application. The system comprises any one of the high-definition multimedia connector 100, the signal driver 200 and the receiving processor 300, wherein the processor is used for executing any one of the interface circuit control methods.
In this example, the signal driver 200 may be a host as described above, and the input interface 20 of the high-definition multimedia connector 100 sends the audio/video signal to the display device 400 through the receiving processor 300 for playing.
In an application scenario, the audio/video transmission system 500 of the present application can be applied to the above teaching recording and broadcasting system, and compared with the prior art, the high definition multimedia connector 100 of the present application improves the protection capability of the input interface and the output interface, and reduces the failure rate of the signal driver and the receiving processor. The interface electric control method can also reduce power consumption, so that in the application scene of the teaching recording and broadcasting system, when the host is turned off, the display equipment such as the recording and broadcasting host can automatically enter a dormant mode when not receiving the preset power supply voltage and audio and video signals, and when the host is turned on, the corresponding working module can automatically recover the normal working mode, thereby reducing the power consumption and saving energy. However, the technical solution of the present application is not limited to be applied to only the teaching recording and broadcasting system, but also can be applied to other scenes and devices, and is not limited herein.
Optionally, the present application further proposes a computer-readable storage medium. Referring to fig. 12, fig. 12 is a schematic structural diagram of an embodiment of a computer-readable storage medium according to the present application.
The computer-readable storage medium 600 of the embodiment of the present application stores therein the program instructions 610, and the program instructions 610 are executed to implement the interface circuit control method described above.
The program instructions 610 may form a program file stored in the storage medium in the form of a software product, so as to enable an electronic device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute all or part of the steps of the methods according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a mobile hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, or terminal devices, such as a computer, a server, a mobile phone, and a tablet.
The computer-readable storage medium 600 may be, but is not limited to, a usb disk, an SD card, a PD optical drive, a removable hard disk, a high-capacity floppy drive, a flash memory, a multimedia memory card, a server, etc.
In one embodiment, a computer program product or computer program is provided that includes computer instructions stored in a computer-readable storage medium. The computer instructions are read by a processor of the electronic device from the computer-readable storage medium, and the processor executes the computer instructions to cause the electronic device to perform the steps in the above-mentioned method embodiments.
In addition, if the above functions are implemented in the form of software functions and sold or used as a standalone product, the functions may be stored in a storage medium readable by a mobile terminal, that is, the present application also provides a storage device storing program data, which can be executed to implement the method of the above embodiments, the storage device may be, for example, a usb disk, an optical disk, a server, etc. That is, the present application may be embodied as a software product, which includes several instructions for causing an intelligent terminal to perform all or part of the steps of the methods described in the embodiments.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing mechanisms, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present application includes additional implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be viewed as implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device (e.g., a personal computer, server, network device, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions). For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
The above description is only an example of the present application, and is not intended to limit the scope of the present application, and all equivalent structures or equivalent processes performed by the present application and the contents of the attached drawings, which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (15)
1. An interface circuit control method is applied to an input interface of a high-definition multimedia connector, and comprises the following steps:
detecting the input state of the preset power voltage and the audio and video signals of the input interface;
and determining an adjusting signal based on the preset power supply voltage and the input state of the audio/video signal, so that the input interface adjusts the working mode based on the adjusting signal.
2. The interface circuit control method according to claim 1, wherein the determining an adjustment signal based on the preset power voltage and the input state of the audio/video signal to enable the input interface to adjust the operating mode based on the adjustment signal comprises:
responding to the input interface that the preset power supply voltage is continuously input within a first preset time, and controlling the input interface to adjust a hot plug detection signal to be at a high level;
judging whether audio and video signals are continuously input in a second preset time on the input interface;
if not, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be a low level;
and if so, controlling the input interface to enter a normal working mode, and controlling the input interface to keep the hot plug detection signal at a high level.
3. The interface circuit control method according to claim 2, wherein the input interface is connected to a receiving processor, a register is provided on the receiving processor, and the step of detecting whether a predetermined power voltage is input to the input interface includes:
reading a first Boolean value of a power input bit of the register;
in response to the first Boolean value being true; the input interface is provided with the preset power supply voltage input;
responding to the first Boolean value being false, and then the input interface is not input with the preset power voltage.
4. The interface circuit control method according to claim 3, wherein the step of determining whether the audio/video signal is continuously input on the input interface within a second preset time includes:
reading a second Boolean value of a video input bit of the register;
responding to that the second Boolean value is true, and inputting the audio and video signals on the input interface;
responding to that the second Boolean value is false, and then no audio and video signal is input on the input interface.
5. The interface circuit control method according to claim 2, further comprising:
responding to the situation that the input interface does not have the continuous input of the preset power supply voltage within the first preset time, controlling the input interface to enter a sleep mode, and controlling the input interface to adjust the hot plug detection signal to be at a low level.
6. The high-definition multimedia connector is characterized by comprising an input interface and an output interface, wherein the input interface is used for receiving audio and video signals sent by the output interface; the output interface is used for providing a preset power supply voltage for the input interface;
the input interface is connected with the receiving processor, so that the receiving processor is used for generating an adjusting signal based on the preset power supply voltage of the input interface and the input state of the audio and video signal, and the input interface adjusts the working mode based on the adjusting signal.
7. The high definition multimedia connector of claim 6, wherein the output interface comprises:
the preset power supply is used for providing the preset power supply voltage for the input interface;
the first interface socket is respectively connected with the signal driver and the preset power supply;
and the electrostatic protection assembly is arranged on a connecting line of the first interface socket and the signal driver.
8. The high definition multimedia connector of claim 7, wherein the output interface further comprises:
and one end of the decoupling resistor is connected with the signal driver, and the other end of the decoupling resistor is connected with the first interface socket and is used for absorbing residual voltage clamped by the electrostatic method component.
9. The high definition multimedia connector of claim 8, wherein the output interface further comprises:
and the bidirectional level conversion circuit is respectively arranged on a connecting line of the signal driver and a serial clock pin of the first interface socket, a connecting line of the signal driver and a serial data line pin of the first interface socket and a connecting line of the signal driver and a hot plug detection pin of the first interface socket.
10. The high definition multimedia connector of claim 6, wherein the input interface comprises:
a second interface socket connected with the receiving processor;
and the electrostatic protection assembly is arranged on a connecting line of the second interface socket and the receiving processor.
11. The high definition multimedia connector of claim 10, wherein the input interface further comprises:
and one end of the decoupling resistor is connected with the receiving processor, and the other end of the decoupling resistor is connected with the second interface socket and is used for absorbing residual voltage clamped by the electrostatic method component.
12. The high definition multimedia connector of claim 11, wherein the input interface further comprises:
and the bidirectional level conversion circuit is respectively arranged on a connecting line of the receiving processor and a serial clock pin of the second interface socket, a connecting line of the receiving processor and a serial data line pin of the second interface socket and a connecting line of the receiving processor and a hot plug detection pin of the second interface socket.
13. The high-definition multimedia connector according to claim 6, wherein the input interface is further configured to send a hot plug detection signal to the output interface, so that the output interface determines whether the input interface is connected with the output interface based on the hot plug detection signal.
14. An audio/video transmission system, comprising the high-definition multimedia connector of any one of claims 6 to 13, a signal driver and a receiving processor, wherein the signal driver is connected to an output interface of the high-definition multimedia connector, and the receiving processor is configured to execute the interface circuit control method of any one of claims 1 to 5.
15. A computer-readable storage medium having stored therein program instructions, wherein the program instructions are executed to implement the interface circuit control method according to any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211506270.0A CN115866172A (en) | 2022-11-28 | 2022-11-28 | High-definition multimedia connector, interface circuit control method and equipment thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211506270.0A CN115866172A (en) | 2022-11-28 | 2022-11-28 | High-definition multimedia connector, interface circuit control method and equipment thereof |
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|---|---|
| CN115866172A true CN115866172A (en) | 2023-03-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202211506270.0A Pending CN115866172A (en) | 2022-11-28 | 2022-11-28 | High-definition multimedia connector, interface circuit control method and equipment thereof |
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| Country | Link |
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| CN (1) | CN115866172A (en) |
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2022
- 2022-11-28 CN CN202211506270.0A patent/CN115866172A/en active Pending
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