CN1158612C

CN1158612C - Intercommunication method and device for frame relay network and asynchronous transmission mode network

Info

Publication number: CN1158612C
Application number: CNB991242653A
Authority: CN
Inventors: 薛咏波
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Digital Technologies Chengdu Co Ltd
Priority date: 1999-12-16
Filing date: 1999-12-16
Publication date: 2004-07-21
Anticipated expiration: 2019-12-16
Also published as: CN1300010A

Abstract

The present invention discloses an intercommunication method and a device for a frame relay network and an asynchronous transmission mode network. A main central processing unit and a sub central processing unit are used as hardware structures, two kinds of different data packets are revealed, transferred and sent through software. The number of the sub central processing unit can be larger than 1, and a logic structure of the main central processing unit comprises a configuration management module, a mail box processing module, a signalling module, a timer module, an alarm module and a communication module. A logic structure of a sub central processing unit comprises a high-level data link control processing module, an asynchronous transmission mode processing module, a protocol processing module, a data storage module and a communication module.

Description

The method and the device that are used for frame-relay network and ATM network intercommunication

Technical field

The present invention relates to the communication technology, say more in detail, the present invention relates to that (Frame Relay, FR) (Asynchronous Transfer Mode ATM) carries out the method and the device thereof of intercommunication between the network for network and asynchronous transfer mode at frame relay.

Background technology

In FR network and atm network intercommunication or when fr interface inserts atm network, between FR network and atm network, need one to support the interworking unit of FR and ATM to finish the reception of FR Frame and ATM cell, conversion and transmission simultaneously.Wherein, in FR to ATM direction is High-Level Data Link Control (HighLevel Data Link Control, HDLC) frame is converted to ATM Adaptation Layer 5 (ATM Adaption Layer 5, frame AAL5), and be the frame that the frame of AAL5 is converted to HDLC in ATM to FR direction.Known to the inventor, in the prior art, the intercommunication between FR and the ATM mainly realizes by hardware logic.But, with hardware realize the shortcoming of this intercommunication be not easy the upgrading and dirigibility relatively poor.Also do not use at present the intercommunication between software realization FR and the ATM.

Summary of the invention

The objective of the invention is to design a kind of method and apparatus that utilizes CPU (central processing unit) (CPU) to receive, change and send two kinds of different packets by software, finish the forwarding between FR and the ATM packet, realize the intercommunication between FR network and the atm network.

According to one aspect of the present invention, provide a kind of method of carrying out frame-relay network and ATM network intercommunication.Said method comprising the steps of:

Adopt main central processing unit to control whole interworking unit, and

Employing is carried out forwarding between FR and the ATM packet from CPU (central processing unit).

According to another aspect of the present invention, provide a kind of device that carries out frame-relay network and ATM network intercommunication.Described device comprises:

Main central processing unit is used to control whole interworking unit;

One or several are from CPU (central processing unit), are used to carry out the forwarding between FR and the ATM packet; And

Tap and multiple connection module are used for the tap and the multiple connection of ATM cell,

Wherein, described main central processing unit and described from CPU (central processing unit) by means of an inner ATM cell tunneling traffic, described master and slave CPU (central processing unit) links to each other through the ATM cell passage with the multiple connection module with described tap, if and described device has several described during from CPU (central processing unit), these are described does not communicate by letter mutually between the CPU (central processing unit).

The present invention adopts a host CPU and several to finish forwarding between FR and the ATM packet from CPU.Require the CPU that is adopted to have communication controler, can support HDLC and SAR (Segmentation andReassembly, tap and multiple connection).Wherein, host CPU is used for control, transmits and be used for packet from CPU.As the control module of total system, host CPU is finished link establishment, configuration management and function such as communicate by letter with the upper strata control management system.In host CPU, include Configuration Manager, mailbox processing module, signalling module, timer module, alarm module and communication module.As the packet forwarding module of system, be used to handle the data forwarding of FR and ATM from CPU.From CPU, including HDLC processing module, ATM processing module, protocol process module, data memory module and communication module.Each constitutes an independently module from CPU, is responsible for the forwarding between several HDLC data and the ATM cell.Host CPU and from communicating by an inner ATM cell passage between the CPU.Host CPU sends order by this passage and controls from CPU, and from the order of CPU by this channel response host CPU.Do not communicate each other from CPU.

Adopt the advantage of master-slave cpu package transmitting method of the present invention to be:

(1) hardware configuration is simple, adopts modular construction, by host CPU module identical with several form system architecture from the CPU module, each is a standalone module from CPU.

(2) adopt the CPU structure, bag is transmitted and is finished by software, avoids designing complicated forwarding logic, realizes easily and upgrades.Software adopts modular construction, can reach the purpose of upgrade-system by upgrade software.

(3) adopt the master-slave cpu structure, host CPU is used for control, is used for bag from CPU and transmits.Owing to separated control physically and transmitted this two functions, therefore help the management of system, the resource that also can save CPU improves forwarding speed.

Description of drawings

Describe embodiments of the invention in detail below in conjunction with accompanying drawing.In these accompanying drawings:

Fig. 1 is the synoptic diagram of network structure of the present invention;

Fig. 2 is the synoptic diagram of the system architecture of interworking unit of the present invention;

Fig. 3 (a) is the logical diagram of the host CPU module of interworking unit of the present invention;

Fig. 3 (b) is the logical diagram from the CPU module of interworking unit of the present invention;

Fig. 4 sets up permanent virtual to connect (Permanent Virtual Connection, PVC) process flow diagram of link;

Fig. 5 is the processing flow chart from FR to ATM direction; And

Fig. 6 is the processing flow chart from ATM to FR direction.

Embodiment

Referring to Fig. 1, this illustrates the network structure that realizes FR of the present invention and ATM intercommunication.Among the figure, label 11 expression FR networks, the 12nd, ATM switch, the 13rd, upper strata control management system, the 14th, FR and ATM interworking unit, the 15th, ATM terminal, the 16th, FR terminal.Among Fig. 1, A is the business intercommunication passage, and B is the network interworking passage.

Referring now to Fig. 2,, this figure is the system architecture synoptic diagram of interworking unit of the present invention.In the present embodiment, used five CPU to constitute interworking unit 14 altogether, wherein label is that a slice CPU of 141 is the host CPU as control, and label to be other four CPU of 142,143,144 and 145 be as the packet of system transmit from CPU.These five CPU select MPC860SAR for use, because it has communication controler, and support HDLC and SAR, meet request for utilization.Each connects two-way HDLC physical port from CPU.Label 146 is represented the SAR module of ATM cell, and it is used for delivering to the ATM exchange network, and the ATM cell of sending here from the ATM exchange network being tapped into from CPU142-145 coming the ATM cell since CPU142-145 to be multiplexed to one tunnel ATM cell.Among Fig. 2, symbol C is corresponding to whole HDLC passages (if each has two HDLC passages from CPU, then always having eight HDLC passages), and symbol D represents the ATM cell passage, and symbol E represents the ATM cell passage of master-slave communication.

The host CPU 141 of FR and ATM interworking unit is described and from the CPU142 of one of CPU respectively below in conjunction with Fig. 3 (a) and 3 (b).Be noted that in fact, without limits from the number of CPU.Though in present embodiment shown in Figure 2, adopted four identical CPU as from CPU142-145, for convenience of description for the purpose of, the logical schematic from CPU142 only is shown in Fig. 3 (b).

Referring now to Fig. 3 (a),, this figure is the logical schematic of the host CPU 141 of FR and ATM interworking unit.Among the figure, label 1411 is mailbox processing modules, be used for and the communicating by letter of upper strata control management system, reception is set up link, deletes link, port attribute is set, the signaling state of activation is set and is obtained various commands such as link statistics information from what the upper strata control management system was sent here, and delivers to following configuration process module 1412 and handle.Mailbox processing module 1411 is also given the upper strata control management system with the various alarm reports that following alarm module 1414 produces.

Label 1412 is Configuration Manager, and it is in core status, is used for distributing and the link management resource, determines the interpolation and the deletion of link, finishes the functions such as management of PVC connected mode, port attribute and signaling state of activation.Various command from the upper strata control management system is delivered to Configuration Manager 1412 through mailbox processing module 1411, makes corresponding processing by it, and to send corresponding order from CPU.For convenience of explanation, suppose that the communication module 1416 of these orders by host CPU 141 sends to the communication module 1425 (Fig. 3 (b)) from CPU142, by operations such as the interpolation of carrying out link from CPU142 or deletions, and the content of its data memory module 1424 (Fig. 3 (b)) is upgraded in modification, return by the communication module 1416 of its communication module 1425 and host CPU then and run succeeded or failure information, Configuration Manager 1412 sends different information by mailbox processing module 1411 to the upper strata control management system according to the information of returning.

Label 1413 is signalling modules, is used to finish signaling (such as the Q933A signaling) function, and with signaling frame by host CPU communication module 1416 and send to from CPU142 from the communication module 1425 of CPU142, again by signaling being sent to the opposite end from CPU142; And the signaling frame that receives from CPU142 is also handled by the signalling module 1413 that the communication module between the master-slave cpu 1416 and 1425 is given host CPU.

Label 1414 is alarm modules, is used for the various warning information that disposal system produces, and reports the upper strata control management system by mailbox processing module 1411.

Label 1415 is timer module, is used to manage various timer resources.

Label 1416 is communication modules, is used for communicating by letter with the communication module 1425 from CPU142.

Then referring to Fig. 3 (b), it is the logical schematic from the CPU142 of one of CPU of FR and ATM interworking unit.

Among the figure, label 1421 is HDLC processing modules, is used for receiving and sends the HDLC Frame, checks the correctness of the data that receive, and gives following protocol process module 1423 a HDLC Frame that receives and further process.

Label 1422 is ATM cell processing modules, is used for receiving and sends ATM AAL5 frame, checks the correctness of the data that receive, and gives protocol process module 1423 an AAL5 Frame that receives and further process.

Label 1423 is protocol process module, is used to carry out processing and the processing from ATM to the FR direction from FR to the ATM direction.Processing from FR to the ATM direction comprises: receive the data of being sent here by HDLC module 1421, Data Link Control Identifier symbol (Data Link ControlIdentifier according to HDLC port numbers and Frame, DLCI) value come in the following data memory module of index 1424 corresponding ATM Virtual Channel connect (Virtual Channel Connection, VCC).If signaling frame, just directly give host CPU 141 and handle, otherwise make corresponding protocol processing by communication module 1425, connect by this VCC again, by ATM cell processing module 1422 Frame is sent.Processing from ATM to the FR direction comprises: receive the data of sending here from ATM cell processing module 1422, connect to come HDLC port and DCLI value corresponding in the index datastore module 1424 according to VCC, if signaling frame, just directly giving host CPU 141 by communication module 1425 handles, otherwise make corresponding protocol processing, Frame is sent by HDLC processing module 1421 by this HDLC port again.

Say that roughly the process of setting up of PVC link is divided into three steps: at first, set up STREAM, determine STREAM time slot and signaling management pattern in the FR side; Secondly, set up ATM VCC, determine bandwidth, VPI (Virtual Path Identifier, virtual path identifier)/VCI (Vitual ChannelIdentifier, Virtual Path Identifier) and the signaling management pattern of ATMVCC in the ATM side; At last, set up PVC, STREAM and ATMVCC are mapped, determine PVC connected mode, both sides' the DLCI and the mapping mode of agreement.The connected mode of PVC has the interpretative system of transparent mode, FR and ATM business intercommunication of FR and atm network intercommunication mode, FR and ATM business intercommunication and the transparent transmission mode of HDLC frame.Specifically describe the process of setting up of PVC link referring to Fig. 4.

In step 401, mailbox processing module 1411 receives the link setup command that the upper strata control processing system is sent here.In step 402, mailbox processing module 1411 is checked the legitimacy of this order, if legal, just proceeds to step 403, otherwise proceeds to step 412.In step 403, Configuration Manager 1412 is handled legal link setup command, distributes the PVC resource.In step 404, Configuration Manager 1412 sends to link setup command accordingly from CPU (for example, from CPU142) by communication module 1416.In step 405, set up physical link from CPU142.In step 406, judge whether the foundation of physical link is successful, if success just goes to step 407, otherwise goes to step 408.In step 407, upgrade data memory module 1424, preserve link information.In step 408, generate physical link and add failure response message.In step 409, generate physical link and add success response message.In step 410, send the response message of link setup success or not to host CPU 141 from the communication module 1425 of CPU142.In step 411, Configuration Manager 1412 receives the link setup response message that is transmitted by communication module 1416, judges the link setup success or not, produces different response messages.In step 412, mailbox processing module 1411 sends the response message of link setup to the upper strata control processing system.

Referring to Fig. 5, describe by the treatment scheme of FR to the Frame of ATM direction.

In step 501, HDLC processing module 1421 receives the Frame that certain STREAM port transmits from the

circuit.In step

502,1421 pairs of these Frames of HDLC module carry out bug check, if wrong, then go to step 512, abandon this frame, otherwise proceed to step 503.In step 503, protocol process module 1423 is handled the Frame of this FR to ATM.In step 504, protocol process module 1423 checks whether the STREAM port activates, if do not activate, then goes to step 512, abandons this frame, otherwise proceeds to step 505.In step 505, protocol process module 1423 judges whether the PVC connected mode of this STREAM port is HDLC transparent transmission mode, if HDLC transparent transmission mode just goes to step 508, otherwise execution in step 506.In step 506, judge that whether this Frame is signaling frame (whether dlci value is 0), if signaling frame just goes to step 511, otherwise goes to step 507.In step 507, for the Frame of non-signaling, protocol process module 1423 comes index datastore module 1424 according to the dlci value of STREAM port and this frame, searches corresponding ATM VCC and connects.In step 508, for HDLC transparent transmission mode, directly come index datastore module 1424 by the STREAM port, search corresponding ATM VCC.In step 509, protocol process module 1423 is made corresponding protocol processing according to the connected mode of PVC to this Frame.In step 510, protocol process module 1423 is given ATM cell processing module 1422 this Frame after the processing of finishing this Frame, sends data by ATM cell module 1422.In step 511, signaling frame to be handled, all signaling frames all are sent to host CPU 141 by communication module 1425, are handled by signalling module 1413.

Referring now to Fig. 6,, describes by the treatment scheme of ATM to the Frame of FR direction.

In step 601, ATM cell processing module 1422 receives the AAL5 Frame that certain ATM VCC port transmits.In step 602, ATM cell processing module 1422 is carried out bug check to this Frame.If wrong, then go to step 613, abandon this frame, otherwise proceed to step 603.In step 603, protocol process module 1423 is handled the Frame of this ATM to the FR direction.In step 604, protocol process module 1423 checks whether this ATM VCC port activates, if do not activate, then goes to step 613, abandons this frame, otherwise proceeds to step 605.In step 605, protocol process module 1423 comes index datastore module 1424 according to ATM VCC, search PVC connected mode and corresponding STREAM port numbers, proceed to step 606,607 or 608 respectively according to different PVC connected modes then, so that do different processing.In step 606,,, directly go to step 611 so do not do any processing owing to be HDLC transparent transmission mode.In step 607, owing to be the business intercommunication mode, ATM does not have signaling to the FR direction, so go to step 610.In step 608, owing to be the network interworking mode, so need deal with to signaling.In step 609, judge whether this Frame is signaling frame (whether dlci value is 0), if signaling frame then goes to step 612, otherwise execution in step 610.In step 610, protocol process module 1423 is made corresponding protocol processing according to different PVC connected modes to Frame.In step 611, protocol process module 1423 is given HDLC processing module 1421 this Frame after finishing processing to Frame, sends data by HDLC processing module 1421.Step 612 pair signaling frame is handled, and all signaling frames all send to host CPU 141 by communication module 1425, is handled by signalling module 1413.

Describe a specific embodiment of the present invention above in conjunction with the accompanying drawings in detail.Be noted that to provide the needs that embodiment just illustrates for example, and be not in order to limit the present invention.For the personage of skilled,, need not to carry out creationary thinking and can make various modifications and change without departing from the spirit and scope of the present invention according to principle of the present invention.All such modifications and change all drop in the appending claims institute restricted portion.

Claims

1. a method of carrying out frame-relay network and ATM network intercommunication is characterized in that, said method comprising the steps of:

Adopt main central processing unit to control whole interworking unit, and

2. the method for claim 1 is characterized in that, adopts that one or several are described to carry out forwarding between described FR and the ATM packet from CPU (central processing unit).

3. the method for claim 1 is characterized in that, the ATM cell passage of an inside is adopted in the communication between the described master and slave CPU (central processing unit).

4. the method for claim 1 is characterized in that, carries out mainly being comprised the steps: by the Frame processing of described frame relay direction to described asynchronous transfer mode direction

(1) receiving step receives FR Frame from described frame-relay network by described FR permanent virtual connectivity port from CPU (central processing unit);

(2) switch process comprises:

Judging under the correct situation of described FR Frame, convert the FR Frame to the ATM Frame;

Judging under the situation that described FR permanent virtual connectivity port is activated, determining the permanent virtual connected mode of described port;

According to determined permanent virtual connected mode and described FR permanent virtual link slogan, determine that the ATM Virtual Channel connects; And

(3) forwarding step connects the ATM Frame that sends through being converted to by described from CPU (central processing unit) by described ATM Virtual Channel.

5. the method for claim 1 is characterized in that, carries out mainly being comprised the steps: by the Frame processing of described asynchronous transfer mode direction to described frame relay direction

(1) receiving step receives ATM Frame from described asynchronous transmission network by described ATM Virtual Channel connectivity port from CPU (central processing unit);

(2) switch process comprises:

Judging under the correct situation of described ATM Frame, convert the ATM Frame to the FR Frame;

Judging under the situation that described ATM Virtual Channel connectivity port is activated,, determining permanent virtual connected mode and FR permanent virtual link slogan according to the connection of ATM Virtual Channel; And

(3) forwarding step sends FR Frame through be converted to from CPU (central processing unit) by described FR permanent virtual link slogan by described.

6. device that carries out frame-relay network and ATM network intercommunication is characterized in that described device comprises:

Main central processing unit is used to control whole interworking unit;

7. device as claimed in claim 6 is characterized in that, the logical organization of described main central processing unit comprises Configuration Manager, mailbox processing module, signalling module, timer module, alarm module and communication module.

8. device as claimed in claim 6 is characterized in that, described logical organization from CPU (central processing unit) comprises High-Level Data Link Control processing module, asynchronous transfer mode processing module, protocol process module, data memory module and communication module.

9. device as claimed in claim 7, it is characterized in that, described Configuration Manager is in core status in described main central processing unit, be used for the configuration informations such as foundation, deletion and management of handle link, and control described link information from CPU (central processing unit).

10. device as claimed in claim 7 is characterized in that, all signaling informations are handled by the described signalling module of described main central processing unit, and send to the opposite end by described from CPU (central processing unit).

11. device as claimed in claim 8 is characterized in that, described protocol process module can carry out frame relay arrives frame relay direction to asynchronous transfer mode direction and asynchronous transfer mode protocol processes.