CN115841804A - Resolution real-time switching control method and device - Google Patents

Resolution real-time switching control method and device Download PDF

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Publication number
CN115841804A
CN115841804A CN202310139122.8A CN202310139122A CN115841804A CN 115841804 A CN115841804 A CN 115841804A CN 202310139122 A CN202310139122 A CN 202310139122A CN 115841804 A CN115841804 A CN 115841804A
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line
lcdc
sts
gen
rxbr
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CN115841804B (en
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周成梅
陈曦
师广涛
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Shenzhen Xihua Technology Co Ltd
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Shenzhen Xihua Technology Co Ltd
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Abstract

The embodiment of the application provides a resolution real-time switching control method and a resolution real-time switching control device, wherein the method comprises the following steps: receiving a resolution switching instruction, stopping hardware TE, and reconfiguring RXBR, DSC and VIDC modules; starting an RX module to start to wait for the AP to send display data and receiving the display data sent by the AP; judging whether the LCDC _ LINE _ STS is larger than gen _ te _ LINE or not, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, performing TXPower Down, and waiting for an RXBR Frame End signal when not outputting next Frame data; after receiving the RXBR Frame End signal, after the configuration of the TX, LCDC and MEMC reset for the initial resolution is restarted, the display is restarted, and the software TE is switched into a hardware TE mode. This application has the technological effect of avoiding dodging the flower screen.

Description

Resolution real-time switching control method and device
Technical Field
The present application relates to the field of display and chip, and in particular, to a resolution real-time switching control method and apparatus.
Background
The display resolution is the resolution of the display screen when displaying images, the resolution is measured by points, and the "point" on the display screen is a pixel (pixel); the other aspect of high resolution refers to the maximum pixel points that can be achieved by the display screen in the aspects of horizontal and vertical display, and generally there are several types of the high resolution, such as 320 × 240, 640 × 480, 1024 × 568, 1280 × 1024, etc., and good large-screen color displays can generally achieve 1600 × 1280 resolution.
The resolution ratio of the existing display screen can generate a flashing screen when being switched in real time, and the experience of a user when the resolution ratio is switched is influenced.
Disclosure of Invention
The embodiment of the application discloses a resolution real-time switching control method and device, which can reduce a splash screen for switching the resolution of a display screen and improve the experience of a user in switching the resolution.
In a first aspect, a real-resolution real-time switching control method is provided, where the method includes the following steps:
receiving a resolution switching instruction, stopping hardware TE, and reconfiguring RXBR, DSC and VIDC modules; starting an RX module to Start to wait for an AP to send display data, and receiving the display data sent by the AP, wherein the display data sent by the AP is a received RXBR Frame Start signal;
judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if so, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if not, making TXPower Down when the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, not outputting the next Frame data, and waiting for an RXBR Frame End signal;
after receiving the RXBR Frame End signal, after the configuration of the TX, LCDC and MEMC reset for the initial resolution is restarted, the display is restarted, and the software TE is switched into a hardware TE mode.
In a second aspect, there is provided a resolution real-time switching control apparatus, the apparatus comprising:
a receiving unit, configured to receive a resolution switching instruction and stop the hardware TE;
a configuration starting unit for reconfiguring the RXBR, DSC and VIDC modules; starting an RX module to start to wait for the AP to send display data;
the receiving unit is further configured to receive display data sent by the AP, where the display data sent by the AP is a received RXBR Frame Start signal;
the judging and processing unit is used for judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TXPower Down, not outputting next Frame data, and waiting for an RXBR Frame End signal; after the receiving unit receives the RXBR Frame End signal, and the TX, the LCDC and the MEMC reset are configured for the initial resolution again, the display is restarted, and the software TE is switched into the hardware TE mode.
In a third aspect, a chip is provided, where the chip includes the apparatus for real-time input resolution switching provided in the second aspect.
In a fourth aspect, there is provided an electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the method of the first aspect.
In a fifth aspect, a computer-readable storage medium is provided, storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform the method of the first aspect.
In a sixth aspect, there is provided a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps as described in the first aspect of embodiments of the present application. The computer program product may be a software installation package.
The technical scheme provided by the application receives a resolution switching instruction, stops the hardware TE, and reconfigures the RXBR, DSC and VIDC modules; starting an RX module to Start to wait for the AP to send display data, and receiving the display data sent by the AP (namely receiving an RXBR Frame Start signal); judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if so, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, and if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TXPower Down, not outputting the next Frame data, and waiting for an RXBR Frame End signal; after receiving the RXBR Frame End signal, after the configuration of the TX, LCDC and MEMC reset for the initial resolution is restarted, the display is restarted, and the software TE is switched into a hardware TE mode. Through the technical scheme, when the software TE is generated, the LCDC _ LINE _ STS is required to be larger than the gen _ TE _ LINE, so that a splash screen can be avoided, and the experience of switching resolution of a user display screen is improved.
Drawings
The drawings used in the embodiments of the present application are described below.
Fig. 1 is a schematic diagram illustrating an application of a code chip provided in the present application;
FIG. 2 is a schematic diagram of a chip display data path provided herein;
FIG. 3 is a schematic flow chart illustrating a resolution real-time switching control method provided in the present application;
FIG. 4 is a schematic structural diagram of a resolution real-time switching control apparatus provided in the present application;
fig. 5 is a schematic structural diagram of an electronic device provided in the present application.
Detailed Description
The embodiments of the present application will be described below with reference to the drawings.
The term "and/or" in this application is only one kind of association relationship describing the associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" in this document indicates that the former and latter related objects are in an "or" relationship.
The "plurality" appearing in the embodiments of the present application means two or more. The descriptions of the first, second, etc. appearing in the embodiments of the present application are only for illustrating and differentiating the objects, and do not represent the order or the particular limitation of the number of the devices in the embodiments of the present application, and do not constitute any limitation to the embodiments of the present application. The term "connect" in the embodiments of the present application refers to various connection manners, such as direct connection or indirect connection, to implement communication between devices, which is not limited in this embodiment of the present application.
MIPI (mobile industry Processor Interface) is an open standard developed for mobile application processors, initiated by the MIPI alliance, including the companies ARM, samsung, intel, etc. The bridge chip converts the input signal into an MIPI timing sequence interface signal through an internal conversion mechanism in an image VIDEO mode or a COMMAND COMMAND mode.
The TE signal is a signal generated by a chip to prevent a tearing problem in a picture refresh in an image display process. When the next frame of image is ready to be refreshed, the chip generates the TE signal, and optionally, the AP sends the next frame of image data to the chip after monitoring the rising edge of the TE signal or detecting that the TE signal is in a high level state.
VSYNC is a vertical synchronizing signal which is a frame synchronizing signal of an image mode and is triggered between one frame picture and another frame picture; the reason for the tearing of the frame is that if there is no vertical synchronization signal, when the frame data rendered by the engine is faster, the display screen cannot keep up (if a frame is rendered for 10ms, and the display refresh period of the display screen is 16ms, the display screen is within the display duration range of 16ms, and the GPU has rendered 1.6 frames of image data, which results in the tearing phenomenon caused by the previous frame of image being covered by the next frame of image data), it may happen that a certain frame is currently displayed, and another frame is triggered to be displayed on the display screen.
Referring to fig. 1, fig. 1 provides a block diagram of an application of a chip, as shown in fig. 1, which includes an AP connected to a chip (e.g., LCDC) and a chip connected to an LCD.
As shown in fig. 1, the chipping code 100 includes a mobile industry processor interface receiving MIPI RX (receiving) module 101, a Video pre-processing VPRE module 102, an image processing VIDC module 103, an image display processing module LCDC module 104 and a MIPI TX (sending) module 105, the MIPI RX module 101 is connected to the VPRE module 102, the VPRE module 102 is connected to the VIDC module 103, the VIDC module 103 is connected to the LCDC module 104, the LCDC module 104 is connected to the MIPI TX module 105, and the Video mode is that the output mode of the chipping code is a Video mode. In the Video mode, the VIDC module notifies the LCDC module to perform data synchronous transmission through a frame start signal, and the LCDC module completes data processing and notifies the MIPI TX module to perform data synchronous transmission through an output-end frame synchronization Vsync _ out signal.
Tearing effect: tearing Effect, TE;
RXBR: the (MIPIRX Bridge) module is used for realizing the bridging of the MIPI DSI Device Controller IP with a video processing module (DSC/VIDC) and a Microprocessor (MCU); DSC: display Stream Compression Standard, herein referred to as a module that processes DSC data;
VIDC: videoController, image processing module;
LCDC is LCD Controller, image display processing module;
HFP, horizon front porch, horizontal foreshoulder;
HBP, horizon back porch, horizontal back shoulder;
VFP Vertical front porch;
VBP is Vertical back porch, vertical back shoulder;
VACT, vertical Active, vertical activity;
HACT, horizon Active;
LCDC _ LINE _ STS, LCDC LINE STATUS, the LINE number currently displayed by the LCDC;
gen _ te _ line: generating a line number position of the TE;
MEMC memory control, and module for controlling frame buffer input and output.
RXBR Frame Start, RXBR Frame Start;
RXBR Frame End, RXBR Frame End;
MEMC reset: the MEMC is reset;
TX Power Down: and sending power failure.
Referring to fig. 3, fig. 3 provides a resolution real-time switching control method, which is executed under the structure of the chip display data path shown in fig. 2, and the method shown in fig. 3 includes the following steps:
step S301, receiving a resolution switching instruction, stopping hardware TE, and reconfiguring RXBR, DSC and VIDC modules; starting an RX module to Start to wait for the AP to send display data, and receiving the display data sent by the AP (namely receiving an RXBR Frame Start signal);
step S302, judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TX Power Down, not outputting next Frame data, and waiting for an RXBR Frame End signal;
step S303, after receiving the RXBR Frame End signal, after the configuration of TX, LCDC and MEMC reset for the initial resolution is restarted, the display is restarted, and the software TE is switched into a hardware TE mode.
The technical scheme provided by the application receives a resolution switching instruction, stops the hardware TE, and reconfigures the RXBR, DSC and VIDC modules; starting an RX module to Start to wait for the AP to send display data, and receiving the display data sent by the AP (namely receiving an RXBR Frame Start signal); judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, and if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TXPower Down, not outputting the next Frame data, and waiting for an RXBR Frame End signal; after receiving the RXBR Frame End signal, after the configuration of the original resolution ratio is restarted by the TX, the LCDC and the MEMC reset, the display is restarted, and the software TE is switched to the hardware TE mode. Through the technical scheme, when the software TE is generated, the LCDC _ LINE _ STS is required to be larger than the gen _ TE _ LINE, so that a splash screen can be avoided, and the experience of switching resolution of a user display screen is improved.
For example, the method may further include:
if the LCDC _ LINE _ STS is smaller than gen _ TE _ LINE, it is determined whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE after a set time (e.g., 15 ms or 10ms, etc.) is delayed, and if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, the software TE is generated according to the LCDC _ LINE _ STS.
For example, the method may further include, before steps S302 and S303:
if the TXPower Down action is not performed after the RXBR Frame End signal is received, adjusting the gen _ TE _ line position and performing the TX Power Down action, restarting display after the configuration of the initial resolution ratio of the TX, the LCDC and the MEMC reset is restarted, and switching the software TE into a hardware TE mode.
For the AP, if the TX Power Down action is not performed after the RXBR FrameEnd signal is received, it indicates that the AP write time catches up with the reading of the LCDC, which may cause the splash screen phenomenon, and therefore, the gen _ te _ line position needs to be adjusted, so that the AP write time is after the reading time of the LCDC, and the splash screen is avoided.
For example, the adjusting the gen _ te _ line position may specifically include:
advancing the gen _ te _ line position forward by a set time;
or the gen _ te _ LINE position is adjusted forward step by step until the LCDC _ LINE _ STS is larger than the gen _ te _ LINE.
Referring to fig. 4, fig. 4 is a resolution real-time switching control apparatus, the apparatus comprising:
a receiving unit, configured to receive a resolution switching instruction and stop the hardware TE;
a configuration starting unit for reconfiguring the RXBR, DSC and VIDC modules; starting an RX module to start to wait for the AP to send display data;
the receiving unit is further configured to receive display data sent by the AP, where the display data sent by the AP is a received RXBR Frame Start signal;
the judging and processing unit is used for judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TXPower Down, not outputting next Frame data, and waiting for an RXBR Frame End signal; after the receiving unit receives the RXBR Frame End signal, and the TX, the LCDC and the MEMC reset are configured for the initial resolution again, the display is restarted, and the software TE is switched into the hardware TE mode.
As an example of this, it is possible to provide,
the judging and processing unit is further configured to, if the LCDC _ LINE _ STS is smaller than gen _ TE _ LINE, delay for a set time and then judge whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, and if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generate the software TE according to the LCDC _ LINE _ STS.
As an example of this, it is possible to provide,
the judging and processing unit is further configured to restart the display after the TX, the LCDC and the MEMC reset are configured for the initial resolution again after the TX, LCDC and MEMC reset are configured, and the software TE is switched to the hardware TE mode if the receiving unit does not perform the TX Power Down action after receiving the RXBR Frame End signal, adjusts the gen _ TE _ line position and performs the TX Power Down action.
It is understood that the above-described means for realizing the above-described functions comprise corresponding hardware and/or software modules for performing the respective functions. The present application is capable of being implemented in hardware or a combination of hardware and computer software in conjunction with the exemplary algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, with the embodiment described in connection with the particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In this embodiment, the electronic device may be divided into functional modules according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module may be implemented in the form of hardware. It should be noted that, the division of the modules in this embodiment is schematic, and is only one logic function division, and another division manner may be available in actual implementation.
It should be noted that all relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.
In case an integrated unit is employed, the user equipment may comprise a processing module and a storage module. The processing module may be configured to control and manage an action of the user equipment, and for example, may be configured to support the electronic equipment to perform the steps performed by the obtaining unit, the communication unit, and the processing unit. The memory module may be used to support the electronic device in executing stored program codes and data, etc.
The processing module may be a processor or a controller. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. A processor may also be a combination of computing functions, e.g., a combination of one or more microprocessors, a Digital Signal Processing (DSP) and a microprocessor, or the like. The storage module may be a memory. The communication module may specifically be a radio frequency circuit, a bluetooth chip, a Wi-Fi chip, or other devices that interact with other electronic devices.
It should be understood that the interface connection relationship between the modules illustrated in the embodiment of the present application is only an exemplary illustration, and does not form a limitation on the structure of the user equipment. In other embodiments of the present application, the user equipment may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.
Referring to fig. 5, fig. 5 is an electronic device 50 (specifically, an intelligent vehicle-mounted system of an automobile) provided in an embodiment of the present application, where the electronic device 50 includes a processor 501, a memory 502, and a communication interface 503, where the processor 501, the memory 502, and the communication interface 503 are connected to each other through a bus, and the electronic device may further include: a display screen that may be coupled to the processor 501 via a bus.
The memory 502 includes, but is not limited to, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or a portable read-only memory (CD-ROM), and the memory 502 is used for related computer programs and data. The communication interface 503 is used to receive and transmit data.
The processor 501 may be one or more Central Processing Units (CPUs), and in the case that the processor 501 is one CPU, the CPU may be a single-core CPU or a multi-core CPU.
Processor 501 may include one or more processing units, such as: the processing unit may include an Application Processor (AP), a modem processor, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), etc. Wherein the different processing units may be separate components or may be integrated in one or more processors. In some embodiments, the user equipment may also include one or more processing units. The controller can generate an operation control signal according to the instruction operation code and the time sequence signal to finish the control of instruction fetching and instruction execution. In other embodiments, a memory may also be provided in the processing unit for storing instructions and data. Illustratively, the memory in the processing unit may be a cache memory. The memory may hold instructions or data that have just been used or recycled by the processing unit. If the processing unit needs to reuse the instruction or data, it can be called directly from the memory. This avoids repeated accesses and reduces the latency of the processing unit, thereby improving the efficiency with which the user equipment processes data or executes instructions.
In some embodiments, processor 501 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose-output (GPIO) interface, a SIM card interface, a USB interface, and/or the like. The USB interface is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a micro USB interface, a USB Type C interface, or the like. The USB interface can be used for connecting a charger to charge the user equipment, and can also be used for transmitting data between the user equipment and peripheral equipment. The USB interface can also be used for connecting an earphone and playing audio through the earphone.
If the electronic device 50 is an intelligent terminal device, such as a mobile phone, an intelligent vehicle-mounted device, a tablet computer, etc., the processor 501 in the electronic device 50 is configured to read the computer program code stored in the memory 502, and control the intelligent terminal device to perform the following operations:
receiving a resolution switching instruction, stopping hardware TE, and reconfiguring RXBR, DSC and VIDC modules; starting an RX module to Start to wait for an AP to send display data, and receiving the display data sent by the AP, wherein the display data sent by the AP is a received RXBR Frame Start signal;
judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, performing TXPower Down, not outputting the next Frame data, and waiting for an RXBR Frame End signal;
after receiving the RXBR Frame End signal, after the configuration of the TX, LCDC and MEMC reset for the initial resolution is restarted, the display is restarted, and the software TE is switched into a hardware TE mode.
As an example of this, it is possible to provide,
and if the LCDC _ LINE _ STS is smaller than gen _ TE _ LINE, delaying for a set time, judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, and if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS.
As an example of this, it is possible to provide,
if the RXBR Frame End signal is received and the TXPower Down action is not performed, after the gen _ TE _ line position is adjusted and the TX Power Down action is performed, the TX, the LCDC and the MEMC reset start the configuration of the initial resolution ratio again, the display is restarted, and the software TE is switched into the hardware TE mode.
For example, adjusting the gen _ te _ line position specifically includes:
advancing the gen _ te _ line position forward by a set time;
or the gen _ te _ LINE position is adjusted forward step by step until the LCDC _ LINE _ STS is larger than the gen _ te _ LINE.
All relevant contents of each scene related to the method embodiment may be referred to the functional description of the corresponding functional module, and are not described herein again.
An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, and when the computer program runs on a network device, the method flow shown in fig. 3 is implemented.
An embodiment of the present application further provides a computer program product, and when the computer program product runs on a terminal, the method flow shown in fig. 3 is implemented.
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It will be appreciated that the electronic device, in order to carry out the functions described above, may comprise corresponding hardware structures and/or software templates for performing the respective functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed in hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are presently preferred and that no acts or templates referred to are necessarily required by the application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the above-described units is only one type of logical functional division, and other divisions may be realized in practice, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps of the methods of the above embodiments may be implemented by a program, which is stored in a computer-readable memory, the memory including: flash Memory disks, read-Only memories (ROMs), random Access Memories (RAMs), magnetic or optical disks, and the like.

Claims (10)

1. A resolution real-time switching control method, comprising the steps of:
receiving a resolution switching instruction, stopping hardware TE, and reconfiguring a bridge module RXBR, a data module DSC and an image processing module VIDC; starting an RX module to Start to wait for an AP to send display data, and receiving the display data sent by the AP, wherein the display data sent by the AP is a received Frame starting RXBR Frame Start signal;
judging whether the current display LINE number LCDC _ LINE _ STS is larger than the TE LINE number gen _ TE _ LINE, if the LCDC _ LINE _ STS is larger than the gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to the vertical back shoulder VBP + vertical activity VACT, sending a Power Down TX Power Down, and waiting for an RXBR Frame End signal without outputting next Frame data;
after receiving the RXBR Frame End signal, after the configuration of the resolution ratio is reset again by TX, LCDC and memory control, the display is restarted, and the software TE is switched into a hardware TE mode.
2. The real-time resolution switching control method according to claim 1, further comprising:
if the LCDC _ LINE _ STS is smaller than the gen _ TE _ LINE, whether the LCDC _ LINE _ STS is larger than the gen _ TE _ LINE or not is judged after a set time delay, and if the LCDC _ LINE _ STS is larger than the gen _ TE _ LINE, software TE is generated according to the LCDC _ LINE _ STS.
3. The method according to claim 1, further comprising, after receiving an RXBR Frame End signal:
if the RXBR Frame End signal is received and the TXPower Down action is not performed, after the gen _ TE _ line position is adjusted and the TX Power Down action is performed, the TX, the LCDC and the MEMC reset start the configuration of the initial resolution ratio again, the display is restarted, and the software TE is switched into the hardware TE mode.
4. The real-time resolution switching control method according to claim 3, wherein the adjusting the gen _ te _ line position specifically comprises:
advancing the gen _ te _ line position forward by a set time;
or the gen _ te _ LINE position is adjusted forward step by step until the LCDC _ LINE _ STS is larger than the gen _ te _ LINE.
5. A resolution real-time switching control apparatus, comprising:
a receiving unit, configured to receive a resolution switching instruction and stop the hardware TE;
a configuration starting unit for reconfiguring the RXBR, DSC and VIDC modules; starting an RX module to start to wait for the AP to send display data;
the receiving unit is further configured to receive display data sent by the AP, where the display data sent by the AP is a received RXBR Frame Start signal;
the judging and processing unit is used for judging whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE or not, if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generating software TE according to the LCDC _ LINE _ STS, continuously judging the value of the LCDC _ LINE _ STS, if the value of the LCDC _ LINE _ STS is larger than or equal to VBP + VACT, making TXPower Down, not outputting next Frame data, and waiting for an RXBR Frame End signal; after the receiving unit receives the RXBR Frame End signal, and the TX, the LCDC and the MEMC reset are configured for the initial resolution again, the display is restarted, and the software TE is switched into the hardware TE mode.
6. The resolution real-time switching control device according to claim 5,
the judging and processing unit is further configured to, if the LCDC _ LINE _ STS is smaller than gen _ TE _ LINE, delay for a set time and then judge whether the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, and if the LCDC _ LINE _ STS is larger than gen _ TE _ LINE, generate the software TE according to the LCDC _ LINE _ STS.
7. The resolution real-time switching control device according to claim 5,
the judging and processing unit is further configured to restart the display after the TX, the LCDC and the MEMC reset are configured for the initial resolution again after the TX, LCDC and MEMC reset are configured, and the software TE is switched to the hardware TE mode if the receiving unit does not perform the TX Power Down action after receiving the RXBR Frame End signal, adjusts the gen _ TE _ line position and performs the TX Power Down action.
8. A chip, characterized in that it comprises a resolution real-time switching control device according to any one of claims 5 to 7.
9. An electronic device comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the method of any of claims 1-4.
10. A computer-readable storage medium, in which a computer program is stored which, when run on a computer device, performs the method of any one of claims 1-4.
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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1914665A (en) * 2004-01-28 2007-02-14 皇家飞利浦电子股份有限公司 Displaying on a matrix display
US20150172590A1 (en) * 2012-01-10 2015-06-18 Analogix (China) Semiconductor, Inc. Receiving device, and control method, device and system for video refresh frequency
CN106128357A (en) * 2015-05-04 2016-11-16 三星电子株式会社 Display driver and the method driving display floater
WO2017038249A1 (en) * 2015-08-31 2017-03-09 シャープ株式会社 Display control device, display device, method for controlling display control device, and control program
CN109792540A (en) * 2016-10-01 2019-05-21 英特尔公司 The hardware-accelerated method for video coding and system controlled using every frame parameter
US20200066226A1 (en) * 2018-08-27 2020-02-27 Samsung Display Co., Ltd. Electronic device and method of driving the same
CN111752514A (en) * 2020-06-09 2020-10-09 Oppo广东移动通信有限公司 Display control method, display control device, electronic equipment and computer-readable storage medium
CN113160748A (en) * 2020-01-22 2021-07-23 Oppo广东移动通信有限公司 Display screen frequency conversion method, display driving integrated circuit chip and application processor
CN113625986A (en) * 2021-10-12 2021-11-09 广州匠芯创科技有限公司 Screen refreshing method and computer readable storage medium
CN114648951A (en) * 2022-02-28 2022-06-21 荣耀终端有限公司 Method for controlling dynamic change of screen refresh rate and electronic equipment
CN114694558A (en) * 2020-12-30 2022-07-01 新唐科技股份有限公司 Control device and display device
WO2022160300A1 (en) * 2021-01-29 2022-08-04 华为技术有限公司 Video switching method and related device
WO2022169092A1 (en) * 2021-02-05 2022-08-11 삼성전자 주식회사 Electronic device and method for controlling same

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1914665A (en) * 2004-01-28 2007-02-14 皇家飞利浦电子股份有限公司 Displaying on a matrix display
US20150172590A1 (en) * 2012-01-10 2015-06-18 Analogix (China) Semiconductor, Inc. Receiving device, and control method, device and system for video refresh frequency
CN106128357A (en) * 2015-05-04 2016-11-16 三星电子株式会社 Display driver and the method driving display floater
WO2017038249A1 (en) * 2015-08-31 2017-03-09 シャープ株式会社 Display control device, display device, method for controlling display control device, and control program
CN109792540A (en) * 2016-10-01 2019-05-21 英特尔公司 The hardware-accelerated method for video coding and system controlled using every frame parameter
US20200066226A1 (en) * 2018-08-27 2020-02-27 Samsung Display Co., Ltd. Electronic device and method of driving the same
CN113160748A (en) * 2020-01-22 2021-07-23 Oppo广东移动通信有限公司 Display screen frequency conversion method, display driving integrated circuit chip and application processor
CN111752514A (en) * 2020-06-09 2020-10-09 Oppo广东移动通信有限公司 Display control method, display control device, electronic equipment and computer-readable storage medium
CN114694558A (en) * 2020-12-30 2022-07-01 新唐科技股份有限公司 Control device and display device
WO2022160300A1 (en) * 2021-01-29 2022-08-04 华为技术有限公司 Video switching method and related device
WO2022169092A1 (en) * 2021-02-05 2022-08-11 삼성전자 주식회사 Electronic device and method for controlling same
CN113625986A (en) * 2021-10-12 2021-11-09 广州匠芯创科技有限公司 Screen refreshing method and computer readable storage medium
CN114648951A (en) * 2022-02-28 2022-06-21 荣耀终端有限公司 Method for controlling dynamic change of screen refresh rate and electronic equipment

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