CN115834898B - Transmission method for carrying alpha channel value during HDMI transmission - Google Patents

Abstract

The invention relates to the technical field of signal transmission, and discloses a transmission method for carrying an alpha channel value in HDMI transmission, wherein data of the alpha channel value is replaced with partial component data in a video stream transmitted by HDMI in a pixel coding mode of Y\Cb\Cr4:2:2, and the total bit number after replacement and the pre-replacement bit number are kept consistent. The invention solves the problems that the alpha channel value cannot be transmitted in the Y/Cb/Cr4:2:2 transmission mode in the prior art.

Description

A transmission method for carrying alpha channel value during HDMI transmission

Technical Field

The present invention relates to the technical field of signal transmission, in particular to a transmission method for carrying an alpha channel value during HDMI transmission.

Background Art

HDMI mainly transmits video, audio, and control data through three TMD channels 0, 1, and 2.

When transmitting video, HDMI has three pixel encodings: R\G\B4:4:4, Y\Cb\Cr4:2:2, and Y\Cb\Cr4:4:4. The existing Y\Cb\Cr4:2:2 data transmission method in HDMI is shown in Figure 1.

Each TMDS channel has 8 bits, which are transmitted in the order of Y, Cb, Y, Cr, Y... In Y\Cb\Cr4:2:2, Y occupies 12 bits and C occupies 12 bits. According to Figure 1, bits 0-3 of TMDS0 channel transmit bits 0-3 of Y, bits 4-7 of TMDS0 channel transmit bits 0-3 of C, bits 0-7 of TMDS1 channel transmit bits 4-11 of Y, and bits 0-7 of TMDS2 channel transmit bits 4-11 of C.

The prior art has the problem that the α channel value (ie, the Alpha channel value) cannot be transmitted in the HDMI Y\Cb\Cr 4:2:2 transmission mode.

Summary of the invention

In order to overcome the shortcomings of the prior art, the present invention provides a transmission method for carrying α channel values during HDMI transmission, which solves the problem that the α channel value cannot be transmitted in the Y\Cb\Cr4:2:2 transmission mode in the prior art.

The technical solution adopted by the present invention to solve the above problems is:

A transmission method for carrying alpha channel values during HDMI transmission, in which, under a Y\Cb\Cr4:2:2 pixel encoding mode, the data of the alpha channel value replaces part of the component data in a video stream transmitted by HDMI, and the total number of bits after the replacement is consistent with the number of bits before the replacement.

As a preferred technical solution, the video stream of each TMDS channel occupies 8 bits, the video stream of three TMDS channels occupies 24 bits, and the data of the α channel value replaces part of the data of the Y component and the C component in the video stream; wherein the three TMDS channels are respectively recorded as TMDS0 channel, TMDS1 channel, and TMDS2 channel, and C represents Cb or Cr.

As a preferred technical solution, the 8-bit data of the α channel value replaces the 0-3 bits of Y and the 0-3 bits of C in the video stream to form a Y\Cb\Cr\α 4:2:2:4 video stream.

As a preferred technical solution, in the first 24-bit video stream:

Bits 0-3 of TMDS0 channel transmit bits 0-3 of _Yi ,

Bits 4-7 of TMDS0 channel transmit bits 0-3 of Cb _p .

Bits 0-3 of TMDS1 channel transmit bits 4-7 of _Yi .

4-7 bits of TMDS1 channel transmit 4-7 bits of Cb _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i ;

In the second 24-bit video stream:

Bits 0-3 of TMDS0 channel transmit bits 0-3 of Yi ₊₁ .

Bits 4-7 of TMDS0 channel transmit bits 0-3 of Cr _p .

Bits 0-3 of TMDS1 channel transmit bits 4-7 of Yi ₊₁ .

4-7 bits of TMDS1 channel transmit 4-7 bits of Cr _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i+1 ;

Among them, f represents the number of the video stream, i represents the number of the α channel value, α _i represents the i-th α channel value, _Yi represents the i-th Y component, Cb _p represents the p-th Cb component, Cr _p represents the p-th Cr component, i and p are both ≥0 and are integers, f is ≥1 and is an integer; the initial values of i and p are 0, and the initial value of f is 1.

，

。As a preferred technical solution, when i=i+1,

,

.

As a preferred technical solution, the 8-bit data of the α channel value replaces the 0-3 bits of Y and the 0-3 bits of C in the video stream to form a Y\CbCr\α4:4:4 video stream.

As a preferred technical solution, the 8-bit data of the α channel value replaces the 0-3 bits of Y and the 0-3 bits of C in the video stream, and Cb and Cr are placed in the same channel to form a Y\CbCr\α 4:4:4 video stream.

As a preferred technical solution, in the first 24-bit video stream:

Bits 0-7 of TMDS0 channel transmit bits 0-7 of _Yi ,

TMDS1 channel 0-3 bits transmit Cb _p 0-3 bits,

Bits 4-7 of TMDS1 channel transmit bits 0-3 of Cr _p .

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i ;

In the second 24-bit data transfer,

Bits 0-7 of TMDS0 channel transmit bits 0-7 of Yi ₊₁ .

TMDS1 channel 0-3 bits transmit Cb _p 4-7 bits,

4-7 bits of TMDS1 channel transmit 4-7 bits of Cr _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i+1 ;

Among them, f represents the number of the video stream, i represents the number of the α channel value, α _i represents the i-th α channel value, _Yi represents the i-th Y component, Cb _p represents the p-th Cb component, Cr _p represents the p-th Cr component, i and p are both ≥0 and are integers, f is ≥1 and is an integer; the initial values of i and p are 0, and the initial value of f is 1.

，

。As a preferred technical solution, when i=i+1,

,

.

Compared with the prior art, the present invention has the following beneficial effects:

(1) The method of the present invention adjusts the bits occupied by each component in the HDMI Y\Cb\Cr 4:2:2 transmission mode (discarding the original 0-3 bits of Y and C, changing from 12 bits to 8 bits), adds 8 bits of the α channel value, and forms Y\Cb\Cr\α 4:2:2:4, but the total number of bits remains the same as the original (still 24 bits). Cb and Cr are transmitted in an interlaced manner at every 24 bits to obtain the YCbCr+α channel value;

(2) In the case of Y\Cb\Cr4:2:2, the method of the present invention adjusts the bits occupied by each component (discarding the original 0-3 bits of Y and C, changing from 12 bits to 8 bits), and puts Cb and Cr into the same channel, and adds the 8 bits of the α channel value to form Y\CbCr\α4:4:4, but the total number of bits remains the same as the original (still 24 bits). Cb and Cr are no longer transmitted in an interleaved manner every 24 bits, and a method of obtaining the YCbCr+α channel value is obtained;

(3) The storage method of the Y, Cb, Cr, and α data in the TMDS channel as described in the method of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a transmission schematic diagram of the prior art under the Y\Cb\Cr 4:2:2 pixel encoding method;

FIG2 is a transmission schematic diagram of a transmission method for carrying α channel values during HDMI transmission shown in Example 1;

FIG. 3 is a transmission schematic diagram of a transmission method for carrying α channel values during HDMI transmission shown in Embodiment 2.

DETAILED DESCRIPTION

The present invention will be further described in detail below in conjunction with embodiments and drawings, but the embodiments of the present invention are not limited thereto.

Example 1

As shown in Figures 1 to 3, transmission mode 1 is as follows:

Each TMDS channel has 8 bits and is transmitted in the order of Y, Cb, α, Y, Cr, α, Y…

In the first 24-bit video stream:

Bits 0-3 of TMDS0 channel are transmitted as bits 0-3 of Y ₀ .

Bits 4-7 of TMDS0 channel are transmitted as bits 0-3 of Cb ₀ .

TMDS1 channel 0-3 bits transmit Y ₀ bits 4-7,

Bits 4-7 of TMDS1 channel transmit bits 4-7 of Cb ₀ .

Bits 0-7 of TMDS2 channel transmit bits 0-7 of α ₀ ;

In the second 24-bit video stream:

Bits 0-3 of TMDS0 channel are transmitted as bits 0-3 of _Y1 .

Bits 4-7 of TMDS0 channel transmit bits 0-3 of Cr ₀ .

TMDS1 channel 0-3 bits transmit Y ₁ bits 4-7,

Bits 4-7 of TMDS1 channel transmit bits 4-7 of Cr ₀ .

Bits 0-7 of TMDS2 channel transmit bits 0-7 of α ₁ ;

The 24 bits of the three channels include three types of data, Y, Cb, α/Y, Cr, and α. After every 48 bits, the subscripts of Cb and Cr are increased by 2, as shown in Figure 2.

This method is equivalent to adjusting the bits occupied by each component in the case of Y\Cb\Cr4:2:2 (discarding the original 0-3 bits of Y and C, changing from 12 bits to 8 bits) and adding 8 bits of the α channel value to form Y\Cb\Cr\α4:2:2:4, but the total number of bits remains the same as the original (still 24 bits). Cb and Cr are transmitted interleaved every 24 bits.

Furthermore, the above scheme is further expanded as follows:

In the first 24-bit video stream:

Bits 0-3 of TMDS0 channel transmit bits 0-3 of _Yi ,

Bits 4-7 of TMDS0 channel transmit bits 0-3 of Cb _p .

Bits 0-3 of TMDS1 channel transmit bits 4-7 of _Yi .

4-7 bits of TMDS1 channel transmit 4-7 bits of Cb _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i ;

In the second 24-bit video stream:

Bits 0-3 of TMDS0 channel transmit bits 0-3 of Yi ₊₁ .

Bits 4-7 of TMDS0 channel transmit bits 0-3 of Cr _p .

Bits 0-3 of TMDS1 channel transmit bits 4-7 of Yi ₊₁ .

4-7 bits of TMDS1 channel transmit 4-7 bits of Cr _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i+1 ;

，

。Where, f represents the number of the video stream, i represents the number of the α channel value, α _i represents the i-th α channel value, _Yi represents the i-th Y component, Cb _p represents the p-th Cb component, Cr _p represents the p-th Cr component, i and p are both ≥ 0 and are integers, f ≥ 1 and are both integers; the initial values of i and p are 0, and the initial value of f is 1. When i=i+1,

,

.

Example 2

As shown in Figures 1 to 3, transmission mode 2 is as follows:

Each TMDS channel has 8 bits and is transmitted in the order of Y, Cb, Cr, α, Y, Cb, Cr, α, Y…

In the first 24-bit video stream:

Bits 0-7 of TMDS0 channel are transmitted as bits 0-7 of Y ₀ .

Bits 0-3 of TMDS1 channel are transmitted as bits 0-3 of Cb ₀ .

Bits 4-7 of TMDS1 channel transmit bits 0-3 of Cr ₀ .

Bits 0-7 of TMDS2 channel transmit bits 0-7 of α ₀ ;

In the second 24-bit data transfer,

Bits 0-7 of TMDS0 channel are transmitted as bits 0-7 of _Y1 .

Bits 0-3 of TMDS1 channel transmit bits 4-7 of Cb ₀ .

Bits 4-7 of TMDS1 channel transmit bits 4-7 of Cr ₀ .

Bits 0-7 of TMDS2 channel transmit bits 0-7 of α ₁ ;

The 24 bits of the three channels each include four types of data: Y, Cb, Cr, and α. After every 48 bits, the subscripts of Cb and Cr are increased by 2, as shown in Figure 3.

This method is equivalent to adjusting the bits occupied by each component in the case of Y\Cb\Cr4:2:2 (discarding the original 0-3 bits of Y and C, taking the upper 8 bits, changing from 12 bits to 8 bits), and putting Cb and Cr in the same channel (TMDS2), plus the 8 bits of the α channel value, forming Y\CbCr\α4:4:4, but the total number of bits remains the same as the original (still 24 bits) Cb and Cr are no longer transmitted interleaved every 24 bits.

Furthermore, the above scheme is further expanded as follows:

In the first 24-bit video stream:

Bits 0-7 of TMDS0 channel transmit bits 0-7 of _Yi ,

TMDS1 channel 0-3 bits transmit Cb _p 0-3 bits,

Bits 4-7 of TMDS1 channel transmit bits 0-3 of Cr _p .

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i ;

In the second 24-bit data transfer,

Bits 0-7 of TMDS0 channel transmit bits 0-7 of Yi ₊₁ .

TMDS1 channel 0-3 bits transmit Cb _p 4-7 bits,

4-7 bits of TMDS1 channel transmit 4-7 bits of Cr _p ,

Bits 0-7 of the TMDS2 channel transmit bits 0-7 of α _i+1 ;

，

。Where, f represents the number of the video stream, i represents the number of the α channel value, α _i represents the i-th α channel value, _Yi represents the i-th Y component, Cb _p represents the p-th Cb component, Cr _p represents the p-th Cr component, i and p are both ≥ 0 and are integers, f ≥ 1 and are both integers; the initial values of i and p are 0, and the initial value of f is 1. When i=i+1,

,

.

In summary:

The α channel value cannot be transmitted in the traditional HDMI. This method is an improvement on the HDMI transmission of Y\Cb\Cr4:2:2. It supports the transmission of α channel value in HDMI. The maximum data volume of each component input of Y, Cb, and Cr is 12 bits. The traditional Y\Cb\Cr4:4:4 can generally only take 8 bits of data as input. When transmitting 12 bits per component, taking a single TMSclock 24 bits as an example, since the data encoding in the video stage is serial transmission, after the 8 bits of each channel are filled, the high 4 bits of data must be arranged in the next 24 bits corresponding channel, which is equivalent to 3 TMS clocks to complete the three-component transmission of 2 pixels, (12 (bits per component) × 3 (components) × 2 (two pixels) = 24 (three-channel bits) × 3 (TMDS clocks)). In the process of transmitting 12 bits per component, this method not only carries the α channel value, but also can complete the three-component transmission of 2 pixels + 2 α channel values in 2 TMS clocks.

The present invention mainly proposes two specific methods for carrying Alpha channel values in the HDMI Y\Cb\Cr 4:2:2 mode.

The present invention has the following characteristics:

1. The method of the present invention adjusts the bits occupied by each component in the HDMI Y\Cb\Cr 4:2:2 transmission mode (discarding the original 0-3 bits of Y and C, changing from 12 bits to 8 bits), adds 8 bits of the α channel value, and forms Y\Cb\Cr\α 4:2:2:4, but the total number of bits remains the same as the original (still 24 bits), and Cb and Cr are transmitted in an interlaced manner every 24 bits to obtain the YCbCr+α channel value;

2. The method of the present invention, in the case of Y\Cb\Cr4:2:2, adjusts the bits occupied by each component (discards the original 0-3 bits of Y and C, changing from 12 bits to 8 bits), puts Cb and Cr into the same channel, and adds 8 bits of the α channel value to form Y\CbCr\α4:4:4, but the total number of bits remains the same as the original (still 24 bits), and Cb and Cr are no longer transmitted in an interleaved manner every 24 bits, thereby obtaining a method of obtaining the YCbCr+α channel value;

3. The storage method of the Y, Cb, Cr, and α data in the TMDS channel in the method of the present invention.

As described above, the present invention can be preferably implemented.

All features disclosed in all embodiments in this specification, or steps in all methods or processes implicitly disclosed, except for mutually exclusive features and/or steps, can be combined and/or expanded or replaced in any manner.

The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. According to the technical essence of the present invention, within the spirit and principles of the present invention, any simple modification, equivalent replacement and improvement made to the above embodiment still falls within the protection scope of the technical solution of the present invention.

Claims (1)

1. In the pixel coding mode of YCbCr4:2, replacing partial component data in video stream transmitted by HDMI with data of alpha channel value, and keeping the total bit number and the bit number before replacement consistent after replacement;

the video stream of each TMDS channel occupies 8bits, the video streams of the three TMDS channels occupy 24bits, and partial data of Y component and C component in the video stream are replaced by data of alpha channel value; wherein, the three TMDS channels are respectively marked as TMDS0 channel, TMDS1 channel and TMDS2 channel, and C represents Cb or Cr;

the specific alternative method comprises the following steps:

replacing the 8-bit data of the alpha channel value with the 0-3 bit of Y and the 0-3 bit of C in the video stream to form a YCbCr alpha 4:2:2:4 video stream;

in the 1 st 24-bit video stream:

0-3 bit transfer Y for TMDS0 channel _i In the range of 0 to 3 bits of the formula,

4-7 bit transfer Cb for TMDS0 channel _p In the range of 0 to 3 bits of the formula,

0-3 bit transfer Y for TMDS1 channel _i In the order of 4-7 bits of the sequence,

4-7 bit transfer Cb for TMDS1 channel _p In the order of 4-7 bits of the sequence,

0-7 bit transmission alpha of TMDS2 channel _i 0-7 of (C);

in the 2 nd 24-bit video stream:

0-3 bit transfer Y for TMDS0 channel _i+1 In the range of 0 to 3 bits of the formula,

4-7 bit transmission Cr of TMDS0 channel _p In the range of 0 to 3 bits of the formula,

0-3 bit transfer Y for TMDS1 channel _i+1 In the order of 4-7 bits of the sequence,

4-7 bit transmission Cr of TMDS1 channel _p In the order of 4-7 bits of the sequence,

0-7 bit transmission alpha of TMDS2 channel _i+1 0-7 of (C);

where f denotes the number of the video stream, i denotes the number of the alpha channel value, alpha _i Represents the ith alpha channel value, Y _i Represents the ith Y component, cb _p Represents the p-th Cb component, cr _p Representing the p-th Cr component, wherein i and p are both more than or equal to 0 and are integers, and f is more than or equal to 1 and is an integer; i. the initial value of p is 0, and the initial value of f is 1;

when i=i+1,

，

；

or;

replacing 0-3 bits of Y and 0-3 bits of C in the video stream with 8-bit data of an alpha channel value, and putting Cb and Cr in the same channel to form a YCbCr alpha 4:4:4 video stream;

in the 1 st 24-bit video stream:

0-7 bit transfer Y for TMDS0 channel _i In the range of 0 to 7 bits of the formula,

0-3 bit transfer Cb of TMDS1 channel _p In the range of 0 to 3 bits of the formula,

4-7 bit transmission Cr of TMDS1 channel _p In the range of 0 to 3 bits of the formula,

0-7 bit transmission alpha of TMDS2 channel _i 0-7 of (C);

in the 2 nd 24 th bit data transmission,

0-7 bit transfer Y for TMDS0 channel _i+1 In the range of 0 to 7 bits of the formula,

0-3 bit transfer Cb of TMDS1 channel _p In the order of 4-7 bits of the sequence,

4-7 bit transmission Cr of TMDS1 channel _p In the order of 4-7 bits of the sequence,

0-7 bit transmission alpha of TMDS2 channel _i+1 0-7 of (C);

where f denotes the number of the video stream, i denotes the number of the alpha channel value, alpha _i Represents the ith alpha channel value, Y _i Represents the ith Y component, cb _p Represents the p-th Cb component, cr _p Representing the p-th Cr component, wherein i and p are both more than or equal to 0 and are integers, and f is more than or equal to 1 and is an integer; i. the initial value of p is 0, and the initial value of f is 1;

when i=i+1,

，

。/>

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