CN115832118A - Chip transfer method and display panel - Google Patents

Abstract

The invention relates to a chip transfer method and a display panel. The chip transfer method comprises the steps of providing a chip carrier plate, forming a guide structure, wherein the guide structure comprises guide posts arranged on a chip and limiting through holes arranged on the chip carrier plate and used for the guide posts to pass through, arranging the positions of a target substrate and the chip carrier plate to enable one side, provided with the chip, of the chip carrier plate to be opposite to one side, used for arranging the chip, of the target substrate, enabling the chip to be transferred to be separated from the chip carrier plate and fall to the target substrate under the matching of the guide posts and the limiting through holes, and removing the guide posts falling onto the chip of the target substrate. In the process that the chip falls to the target substrate, the guide post can cooperate with the limiting through hole to limit the movement of the chip, and the accuracy of chip transfer is improved.

Description

Chip transfer method and display panel

Technical Field

The invention relates to the field of chip transfer, in particular to a chip transfer method and a display panel.

Background

Micro-LED (Micro Light-Emitting Diode) is a new display technology, and compared with the conventional display technology, the display with the Micro-LED technology as the core has the characteristics of high response speed, autonomous Light emission, high contrast, long service life, high photoelectric efficiency and the like.

In Micro-LED industry, millions or even tens of millions of LED (Light-Emitting Diode) chips are transferred from a growth substrate to a temporary storage substrate, and then from the temporary storage substrate to a back plate. In a traditional chip transfer scheme, chips are often transferred for multiple times, so that the problems of chip precision reduction, yield loss and the like are caused.

Therefore, how to improve the chip transfer precision in the chip transfer process is an urgent problem to be solved.

Disclosure of Invention

In view of the above disadvantages of the related art, the present application aims to provide a chip transfer method and a display panel, and aims to solve the problem of low chip transfer accuracy in the chip transfer process.

A chip transfer method, comprising: providing a chip carrier plate, wherein a chip is arranged on one side of the chip carrier plate;

forming a guide structure, wherein the guide structure comprises a guide post arranged on the chip and a limiting through hole arranged on the chip carrier plate for the guide post to pass through;

setting the positions of a target substrate and the chip carrier plate so that the side of the chip carrier plate, provided with the chip, is opposite to the side of the target substrate, used for arranging the chip;

the chip to be transferred is separated from the chip carrier plate under the matching of the guide post and the limiting through hole and falls to the target substrate;

removing the guide posts on the chip falling on the target substrate.

According to the chip transfer method, the guide structure is formed in advance before the chip is separated from the chip carrier plate, and in the process that the chip is separated from the chip carrier plate and falls to the target substrate, the guide structure can limit the displacement and/or inclination of the chip to a certain extent, so that the falling direction and the offset of the chip are well controlled. In addition, in some implementation processes, the chip transfer method can be well applied to selective transfer.

Optionally, the forming a guide structure includes:

forming the limiting through hole in the area of the chip carrier plate on which the chip is arranged;

and forming the guide post penetrating through the limiting through hole on the chip.

Optionally, the chip carrier plate is provided with the limiting through hole formed in the area of the chip, including:

arranging a first photoresist layer on one side of the chip carrier plate, which is not provided with the chip;

patterning the first photoresist layer to form a first temporary through hole at a position of the first photoresist layer corresponding to the chip;

etching the chip carrier plate by using the first photoresist layer as a mask plate, so that the region of the chip carrier plate corresponding to the first temporary through hole is removed, and the limiting through hole is formed;

and removing the first photoresist layer.

Optionally, the forming of the guide post on the chip through the limiting through hole includes:

arranging a second photoresist layer on one side of the chip carrier plate, which is not provided with the chip, wherein the second photoresist layer is filled in the limiting through hole;

patterning the second photoresist layer to form a second temporary through hole at a position of the second photoresist layer corresponding to the limiting through hole, wherein the cross sectional area of the second temporary through hole is smaller than that of the limiting through hole, and the inner wall of the limiting through hole is covered by the photoresist layer;

arranging a preset material in the second temporary through hole to form the guide post;

and removing the second photoresist layer.

It can be understood that the second temporary through hole is made first by means of photolithography and a preset material is arranged in the second temporary through hole to form the guide post, so that the forming precision is high, and the manufacturing of the guide post is facilitated.

Optionally, the preset material includes a material that can be dissolved by a target solvent, and the removing the guide posts falling on the chip of the target substrate includes:

and dissolving and removing the guide column by using a target solvent.

It will be appreciated that the guide posts are formed of a dissolvable material to facilitate removal after transfer is complete.

Optionally, setting the positions of the target substrate and the chip carrier further includes:

and enabling the distance between the chip on the chip carrier plate and the target substrate to be smaller than the length of the guide post.

It can be understood that, after the chip falls to the target substrate, some guide posts are still in spacing through-hole, also fall to the whole in-process of target substrate at the chip, can both cooperate between guide post and the spacing through-hole, carry out the restriction to a certain extent to the activity of chip, guarantee the precision of chip in the transfer process.

Optionally, the chip carrier includes a growth substrate on which the chip grows, the chip includes an epitaxial layer grown on the growth substrate, the epitaxial layer includes a buffer layer, the buffer layer contacts with the growth substrate, and the guide post penetrates through the limiting through hole on the growth substrate and is connected with the buffer layer;

make the chip that waits to shift break away from under the cooperation of guide post with spacing through-hole the chip carrier plate includes:

removing the buffer layer between the chip to be transferred and the growth substrate;

the chip that makes to wait to shift breaks away from the chip carrier plate under the cooperation of guide post with spacing through-hole to after falling to the target substrate, still include:

and removing the buffer layer between the chip and the guide post.

Optionally, the target substrate includes a circuit substrate, and a die attach region is disposed on the circuit substrate;

the setting of the positions of the target substrate and the chip carrier plate further comprises:

aligning the electrode of the chip on the chip carrier plate with the bonding area of the die bonding area;

the chip that makes to wait to shift breaks away from the chip carrier plate under the cooperation of guide post with spacing through-hole to after falling to the target substrate, still include:

bonding the chip to the circuit substrate.

It can be understood that, in some implementation processes, the chip transfer method can realize the chip transfer from the growth substrate of the chip to the circuit substrate, reduce the times of chip transfer, avoid the precision reduction caused by multiple transfers, and further ensure the high-precision transfer of the chip.

Optionally, before the forming the guiding structure, the method further includes:

and thinning the chip carrier plate to reduce the thickness of the chip carrier plate.

It will be appreciated that thinner chip carriers are more likely to form the limiting through holes of the guide structure during the chip transfer process.

Based on the same inventive concept, the application also provides a display panel, which comprises a light-emitting chip and a circuit substrate, wherein the light-emitting chip is transferred to a die bonding area of the circuit substrate by the chip transfer method of the example.

The light emitting chip of the display panel is high in setting precision and good in quality. In some implementation processes, the light-emitting chips of the display panel can be directly transferred to the circuit substrate from the growth substrate, the transfer times are few, the influence on the yield of the light-emitting chips is low, and meanwhile, the transfer times are fewer, and the accuracy of chip transfer is also guaranteed.

Drawings

Fig. 1 is a schematic basic flow chart of a chip transfer method according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a guide structure according to an embodiment of the present invention;

fig. 3 is a schematic diagram illustrating arrangement positions of a target substrate and a chip carrier according to an embodiment of the invention;

fig. 4 is a schematic diagram of a chip detachment chip carrier according to an embodiment of the present invention;

FIG. 5 is a schematic view of a chip provided in an embodiment of the present invention after removing the guide posts;

FIG. 6 is a schematic structural diagram of a guide structure according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a basic process for forming a guiding structure according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of a process for forming a limiting through hole according to an embodiment of the present invention;

FIG. 9 is a schematic view of a first photoresist layer being exposed according to an embodiment of the present invention;

FIG. 10 is a schematic view of the patterning of the first photoresist layer of FIG. 9;

FIG. 11 is a schematic diagram of the chip carrier of FIG. 10 etched to form a limiting through hole;

FIG. 12 is a schematic diagram illustrating a process for forming a guiding pillar on a chip according to an embodiment of the present invention;

fig. 13 is a schematic view illustrating a second photoresist layer disposed on a chip carrier according to an embodiment of the present invention;

FIG. 14 is a schematic view of the second photoresist layer patterning of FIG. 13;

FIG. 15 is a schematic view of the filling of predetermined material in FIG. 14 to form a guide pillar;

FIG. 16 is a schematic flow chart illustrating another method for forming a guide structure according to an embodiment of the present invention;

FIG. 17 is a schematic view of patterning a third photoresist layer provided in accordance with an embodiment of the present invention;

FIG. 18 is a top view of FIG. 17;

FIG. 19 is a schematic diagram of a chip carrier in FIG. 17 etched to form a stripe-shaped groove;

FIG. 20 is a schematic structural view of a guide structure formed by the process of FIG. 16;

FIG. 21 is a schematic diagram illustrating a distance arrangement between a chip and a target substrate on a chip carrier according to an embodiment of the invention;

FIG. 22 is a schematic view of the chip of FIG. 21 being dropped onto a target substrate;

fig. 23 is a schematic diagram illustrating a dimensional relationship between a second temporary through hole and a limiting through hole according to an embodiment of the present invention;

fig. 24 is a schematic diagram illustrating arrangement of widths of the stripe-shaped grooves according to the embodiment of the present invention;

FIG. 25 is a schematic structural diagram of a chip with a guiding pillar according to an embodiment of the present invention;

fig. 26 is a schematic view illustrating a buffer layer between a chip and a chip carrier according to an embodiment of the invention being removed;

FIG. 27 is a schematic view of the chip of FIG. 26 being landed on a target substrate;

FIG. 28 is a schematic structural diagram of a chip with guide pillars formed thereon according to an embodiment of the present invention;

FIG. 29 is a schematic view of a chip of a growth substrate directly transferred to a circuit substrate according to an embodiment of the invention;

description of reference numerals:

1-chip; 11-a buffer layer; a 12-N type semiconductor layer; 13-an active layer; a 14-P type semiconductor layer; 15-an electrode; 2-a guide post; 3-chip carrier plate; 31-a growth substrate; 4-limiting through holes; 5-a target substrate; 51-a circuit substrate; 61-a first photoresist layer; 601-a first temporary via; 62-a second photoresist layer; 602-a second temporary via; 63-a third photoresist layer; 603-strip-shaped grooves; 7-mask plate.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

In the chip transfer process, the problem of low chip transfer precision exists.

Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.

Example (b):

the present embodiment provides a chip transfer method, please refer to fig. 1, the chip transfer method includes:

s101, providing a chip carrier plate, wherein a chip is arranged on one side of the chip carrier plate;

s102, forming a guide structure;

it should be noted that, referring to fig. 2, the guiding structure of the present embodiment includes a guiding post 2 disposed on the chip 1, and a limiting through hole 4 disposed on the chip carrier 3 for the guiding post 2 to pass through. In some examples, the limiting through hole 4 exposes a partial region of one side of the chip 1 close to the chip carrier 3, the guiding post 2 is disposed in the exposed region of the chip 1, a gap exists between the guiding post 2 and an inner wall of the limiting through hole 4 so that the guiding post 2 can move along the thickness direction of the chip carrier 3 without being obstructed by the chip carrier 3, and the guiding post 2 is configured to cooperate with the limiting through hole 4 to limit the movement of the chip 1 in the non-thickness direction of the chip carrier 3 after the chip 1 is detached from the chip carrier 3. It should be noted that the penetrating in this embodiment is not limited to the length of the guiding column being longer than the length of the limiting through hole, and the guiding column may be not longer than the limiting through hole and completely located inside the limiting through hole.

S103, setting the positions of the target substrate and the chip carrier plate so that the side of the chip carrier plate, provided with the chip, is opposite to the side of the target substrate, used for arranging the chip;

for example, as shown in fig. 3, the target substrate 5 is disposed opposite to the chip carrier 3.

S104, separating the chip to be transferred from the chip carrier plate under the matching of the guide post and the limiting through hole;

as shown in fig. 4, since the chip carrier 3 is vertically above the target substrate 5, the chip 1 falls toward the target substrate 5 after being detached from the chip carrier 3, it can be understood that the movement of the chip in the process of falling toward the target substrate 5 is limited to a certain extent due to the guiding posts penetrating in the limiting through holes. In some transfer processes, the guide posts, the limiting through holes and the matching can limit the displacement and/or inclination of the chip to a certain extent, and the falling direction and the offset of the chip are well controlled. As an example, the target substrate is arranged in a direction vertically downward of the chip carrier, the chip 1 to be transferred can vertically fall to the target substrate 5 under an external force including gravity, the guide posts 2 fall along with the chip 1, and cooperate with the limiting through holes 4 to limit the movement of the chip 1 in a non-vertical direction during the falling process.

And S105, removing the guide posts on the chip falling to the target substrate.

As shown in fig. 5, the guiding studs on the chip 1 are removed, and it will be understood that the chip carrier plate is removed after the chip 1 has fallen onto the target substrate 5.

In the chip transfer method of the embodiment, the chip is not in contact with the chip carrier plate before being peeled off and transferred to the chip carrier plate, and the chip can be selectively separated from the chip carrier plate in practical application, that is, the chip can be selectively transferred.

The chip carrier may be any carrier provided with chips, including but not limited to a growth substrate for growing chips, a temporary storage substrate for temporarily holding chips, and a transfer substrate for picking up and transferring chips, etc. The chip transfer method of the embodiment accurately transfers the chip on the chip carrier to the target substrate. The target substrate may also be any substrate that receives a chip, including but not limited to a temporary storage substrate for temporarily holding the chip and a transfer substrate for picking up and transferring the chip, a circuit substrate for setting the chip to implement a corresponding function, and the like.

It is understood that the chip carrier is any material that can be formed with through holes, including but not limited to sapphire, silicon carbide, silicon, gallium arsenide, and other semiconductor materials.

The chip in this embodiment includes but is not limited to an LED light emitting chip or any other chip that needs to be transferred. Illustratively, the LED Light Emitting chip includes, but is not limited to, a Mini-LED (Mini Light-Emitting Diode) chip, a Micro-LED, etc., for example, in one example, the LED chip may be a Mini-LED chip; in yet another example, the LED chip may be a Micro-LED chip.

In this embodiment, the shape of the guiding pillars and the number of guiding pillars corresponding to a single chip are not limited, the guiding pillars may be cylinders, polygonal prisms, etc., and the number of guiding pillars may also be one or more than one. For example, when a guide post is formed on a single chip, the guide post may be disposed in the central region of the chip to ensure that the chip is more stable during the falling process. In another example, referring to fig. 6, two guide posts 2 are provided on the same chip 1, and the two guide posts 2 are symmetrically arranged on both sides of the chip 1.

Referring to fig. 7, in some embodiments, a guide structure is formed comprising:

s201, forming a limiting through hole in an area where a chip is arranged on a chip carrier plate;

in one example, the limiting through hole extends along the thickness direction of the chip carrier plate, the cross-sectional area of the limiting through hole is smaller than the contact area of the chip and the chip carrier plate, and the limiting through hole exposes the chip.

S202, forming a guide post penetrating through the limiting through hole on the chip;

that is, in some embodiments, the limiting through holes are formed first, and then the guiding posts are separately formed.

Referring to fig. 8, in some embodiments, forming a limiting through hole in a region where a chip is disposed on a chip carrier includes:

s2011, arranging a first photoresist layer on one side of the chip carrier plate, which is not provided with the chip;

s2012, patterning the first photoresist layer to form a first temporary through hole at a position of the first photoresist layer corresponding to the chip;

referring to fig. 9, the first photoresist layer 61 is exposed using the reticle 7, in this example, the first photoresist layer 61 is selected to be a positive photoresist, and it is understood that in other examples, a negative photoresist may be selected. As shown in fig. 10, the exposed first photoresist layer 61 is developed, and a first temporary through hole 601 is formed on the first photoresist layer 61.

S2013, etching the chip carrier plate by using the first photoresist layer as a mask plate, so that the region of the chip carrier plate corresponding to the first temporary through hole is removed, and a limiting through hole is formed;

as shown in fig. 11, a portion of the chip carrier 3 is removed to form a limiting through-hole 4. For example, the Etching on the chip carrier plate may adopt, but is not limited to, dry Etching, such as Reactive Ion Etching (RIE), inductively Coupled Plasma (ICP) Etching.

And S2014, removing the first photoresist layer.

Referring to fig. 12, in some embodiments, a guide post passing through a limiting through-hole is formed on a chip, including:

s2021, arranging a second photoresist layer on one side of the chip carrier plate, which is not provided with the chip;

as an example, referring to fig. 13, the thickness of the second photoresist layer 62 is not less than the thickness of the chip carrier 3, and the second photoresist layer 62 fills the limiting through hole 4. In other examples, the thickness of the second photoresist layer may be smaller than that of the chip carrier, that is, the second photoresist layer does not fill the limiting through holes, but the length of the finally formed guide posts is also reduced correspondingly.

S2022, patterning the second photoresist layer to form a second temporary through hole at a position of the second photoresist layer corresponding to the limiting through hole;

illustratively, referring to fig. 14, the second temporary through hole 602 exposes the chip 1, the cross-sectional area of the second temporary through hole 602 is smaller than that of the limiting through hole 4, and the inner wall of the limiting through hole 4 is covered by the second photoresist layer 62;

s2023, arranging a preset material in the second temporary through hole to form a guide column;

referring to fig. 15, the predetermined material is completely filled in the second temporary through hole 602 in this example, and the guide post is formed to have the same shape as the inner shape of the second temporary through hole 602.

S2024, removing the second photoresist layer.

In some embodiments, the predetermined material includes a material that can be dissolved by a target solvent, and the removing of the guide posts on the chip that have fallen onto the target substrate includes:

and dissolving and removing the guide column by using the target solvent.

In one example, the predetermined material is a glue material including Polyimide (PI) and the like that can be dissolved by a solvent such as ethanol, isopropanol, methanol and the like. It will be appreciated that since the guide posts are formed and then subjected to a step of detaching the chip from the chip carrier, the guide posts should not be damaged during the process, for example, the chip is detached from the chip carrier by laser lift-off, and the guide posts should be of a material that is not broken by laser decomposition or other forms, for example, in the process of detaching the chip from the chip carrier by laser lift-off, the material of the guide posts may be selected from the polyimide exemplified above.

It will be appreciated that the manner of forming the guide structure is not limited to the above examples, and that usable guide structures may be formed in any other manner. As another example, referring to fig. 16, another way of forming the guide structure includes:

s301, arranging a third photoresist layer on one side of the chip carrier plate, which is not provided with the chip;

s302, patterning the third photoresist layer to form strip-shaped grooves corresponding to the chip on the third photoresist layer, wherein the strip-shaped grooves are closed end to form a closed graph;

as shown in fig. 17 and 18, for example, the figure formed by sealing the end to end of the strip-shaped groove 603 is a circular ring, and the cross sections of the finally formed limiting through hole and the guide post are circular. It will be appreciated that the pattern of the strip-shaped grooves 603 closed end-to-end may be any other pattern, and the manner of the subsequent formation of the guide structures is consistent with the following examples.

Illustratively, the annular developing region on the third photoresist layer can be formed by multiple exposures.

S303, etching the chip carrier plate by using the third photoresist layer as a mask plate to remove the area of the chip carrier plate corresponding to the strip-shaped groove;

s304, removing the third photoresist layer;

referring to fig. 19, the third photoresist layer 63 is used as a mask to etch and form a stripe-shaped groove on the chip carrier 3, which is equivalent to transferring the pattern on the third photoresist layer 63 to the chip carrier 3. The outer diameter of the circular ring on the chip carrier plate is equal to the inner diameter of the limiting through hole to be formed, and the inner diameter of the circular ring is equal to the outer diameter of the guide post to be formed. The ring width of the circular ring is equal to the distance of the gap between the guide post and the inner wall of the limiting through hole. As shown in fig. 20, which shows the guiding structure formed by the steps of this example, the part of the chip carrier plate 3 inside the strip-shaped groove is divided, the material of the part of the chip carrier plate becomes the guiding post 2, the thickness of the guiding post 2 is the same as the thickness of the chip carrier plate 3, and the outer wall of the strip-shaped groove becomes the inner wall of the limiting through hole. In the example, the chip carrier plate is directly utilized, and the limiting through hole and the guide column are formed at the same time, so that the process complexity and the cost for forming the guide structure are reduced.

In some embodiments, before forming the guiding structure, the chip carrier is further thinned to reduce the thickness of the chip carrier. The formation of the guiding structure requires that a limiting through hole is formed on the chip carrier, which is equivalent to removing a part of material on the chip carrier, and the thinner chip carrier is adopted, so that the guiding structure is easier to form.

In order to further ensure the accuracy of the chip during the transferring process, the distance between the target substrate and the chip carrier board may be adjusted, and in some embodiments, the closer distance between the target substrate and the chip carrier board may reduce the possible offset of the chip to some extent. In some examples, the step S103: setting the positions of the target substrate and the chip carrier plate, further comprising:

and S1031, enabling the distance between the chip on the chip carrier plate and the target substrate to be smaller than the length of the guide post.

As shown in fig. 21, the distance between the chip 1 and the target substrate 5 on the chip carrier plate 3 is selected according to the length of the formed guide posts 2, in this example, the length of the guide posts 2 is h1, and the positions of the target substrate 5 and the chip carrier plate 3 are set such that the distance between the chip 1 and the target substrate 5 is h2, where h1 is greater than h2. It is understood that h2 is the distance that chip 1 needs to move when contacting target substrate 5, i.e. the distance between the electrode of chip 1 and the bonding pad in the die bonding area on target substrate 5.

As shown in fig. 22, after the chip 1 of the present example is dropped onto the target substrate 5, a part of the guide posts 2 are still located in the limiting through holes 4, that is, in the whole process of dropping the chip 1 onto the target substrate 5, the guide posts 2 and the limiting through holes 4 can be matched to limit the movement of the chip 1 to a certain extent.

However, it is understood that even though the length of the guiding column is not greater than the distance between the chip and the target substrate in some examples, the guiding column and the limiting through hole limit the moving range of the chip when the chip falls to the target carrier before the guiding column completely falls out of the limiting through hole, and there is a guiding effect on the falling of the chip, which can also improve the accuracy of chip transfer.

Can also pass through the good cooperation between guide post and the spacing through-hole to guarantee the precision of chip in the transfer process. In some embodiments, the spacing between the guide posts and the inner wall of the spacing via is no greater than 500nm, e.g., 100nm, 150nm, 200nm, 250nm, 300nm, 400nm, 500nm, etc. It can be understood that the smaller the gap between the guide post and the chip carrier plate is, the smaller the movable range of the guide post is, and correspondingly, the smaller the space movable to other directions in the process that the chip falls on the target carrier plate is, thereby ensuring the accuracy of chip transfer.

As shown in fig. 23, in the foregoing step S2022, the size of the second temporary through hole 602 formed by patterning the second photoresist layer 62 is controlled, so that the gap between the fabricated guide post and the inner wall of the limiting through hole is not greater than 500nm. Specifically, it is only necessary to ensure that the distance between the inner wall of the second temporary through hole 602 and the inner wall of the limiting through hole is not greater than 500nm, that is, the thickness of the second photoresist layer 62 on the limiting through hole is not greater than 500nm.

As shown in fig. 24, in the foregoing step S302, the width of the strip-shaped groove 603 etched on the third photoresist layer 63 is controlled not to be greater than 500nm, and the width of the strip-shaped groove 603 formed after etching the chip carrier based on the third photoresist layer 63 as a mask is also controlled not to be greater than 500nm, so that the gap between the guide pillar and the inner wall of the limiting through hole is not greater than 500nm.

In some embodiments, the chip carrier comprises a growth substrate for growing the chip, the chip comprises an epitaxial layer grown on the growth substrate, the epitaxial layer comprises a buffer layer, the buffer layer is in contact with the growth substrate, the limiting through holes expose the buffer layer, and the guide posts are connected with the buffer layer through the limiting through holes on the growth substrate;

make the chip that waits to shift break away from the chip support plate under the cooperation of guide post and spacing through-hole, include:

removing the buffer layer between the chip to be transferred and the growth substrate;

make the chip that waits to shift break away from the chip support plate under the cooperation of guide post and spacing through-hole, after falling to the target substrate, still include:

and removing the buffer layer between the chip and the guide post.

As a specific example, referring to fig. 25, the chip is a Micro-LED chip, the chip carrier 3 is a growth substrate for growing the Micro-LED chip, the Micro-LED chip on the growth substrate includes an epitaxial layer and an electrode 15, the epitaxial layer includes, but is not limited to, a buffer layer 11, an N-type semiconductor layer 12, an active layer 13, and a P-type semiconductor layer 14 in sequence, the active layer 13 may include a quantum well layer, and may also include other structures. In other examples, the epitaxial layer may further optionally include at least one of a reflective layer and a passivation layer. The material and shape of the electrodes are not limited, and for example, the material of the electrodes may include, but is not limited to, at least one of Cr, ni, al, ti, au, pt, W, pb, rh, sn, cu, and Ag. In the above example, after the limiting through hole is formed on the chip carrier, the buffer layer of the chip is exposed, and the guide post is connected with the buffer layer.

The buffer layer is made of materials including but not limited to gallium nitride (GaN), gallium nitride can be decomposed into nitrogen and metal gallium at a certain temperature, and in practical application, gallium nitride can be irradiated by laser so that gallium nitride absorbs photon energy to generate heat, and the temperature is raised and the gallium nitride is decomposed. When the chip in the above example is separated from the chip carrier plate by the cooperation of the guide posts and the limiting through holes, the buffer layer made of gallium nitride is irradiated by the target laser, please refer to fig. 26, in this embodiment, the target laser (shown by an arrow in the figure, the example uses laser with a wavelength of 248nm, and other examples may select different wavelengths) only selectively irradiates the buffer layer 11 connected with the chip carrier plate 3, the buffer layer 11 between the chip and the chip carrier plate 3 is almost completely decomposed, the buffer layer 11 connected with the guide posts 2 still remains, and the chip is separated from the chip carrier plate 3 under the action of gravity and the impact force of gas generated by gallium nitride decomposition, and falls down to the target substrate. In other examples, the guiding column may also be formed by a non-light-tight material, which has lower requirement on the precision of the target laser during selective irradiation, and reduces the complexity of selective irradiation of the target laser.

Referring to fig. 27, after the chip of the above example is dropped onto the target substrate 5, the buffer layer 11 and the guide posts 2 remain on the chip, and the guide posts 2 and the buffer layer 11 can be removed in sequence. Or in other examples, the buffer layer 11 is directly removed, and the guide posts 2 are also simultaneously detached from the chip due to the removal of the buffer layer 11, that is, the removal steps of the buffer layer 11 and the guide posts 2 are equivalent to the same step.

Referring to fig. 28, in another example, when forming the guiding structure, the region of the buffer layer 11 of the chip corresponding to the guiding pillar 2 is also removed, and the chip body at the lower layer of the epitaxial layer of the chip is exposed (the "lower layer" is expressed by referring to the direction of the drawing), and the guiding pillar 2 is directly connected to the chip body, taking the Micro-LED chip structure of the previous example of the present embodiment as an example, and the guiding pillar 2 is connected to the N-type semiconductor layer 12 of the chip. In this example, after the chip is dropped onto the target substrate, the buffer layer is removed, and only the guide posts connected to the chip need to be removed.

In some embodiments, the target substrate includes a circuit substrate, the circuit substrate is provided with a die attach region, and positioning the target substrate and the chip carrier further includes aligning electrodes of a chip on the chip carrier with bonding regions of the die attach region, the bonding regions include, but are not limited to, regions of bonding pads. And the chip to be transferred is separated from the chip carrier plate under the matching of the guide post and the limiting through hole and falls to the target substrate, and then the chip is bonded with the circuit substrate. In an example, as shown in fig. 29, the chip is aligned with the die bonding region of the circuit substrate 51 and is directly transferred from the growth substrate 31 to the circuit substrate 51 without an intermediate transfer process, that is, the chip transfer method of the embodiment can realize direct transfer, and the growth substrate 31 and the circuit substrate 51 do not need to be in contact, which is beneficial to selective transfer of the chip. The chips of the growth substrate are directly transferred to the circuit substrate, so that other intermediate transfer steps are omitted, the transfer times are reduced, the influence on the yield of the chips is less, and the accuracy of chip transfer is further guaranteed by fewer transfer times.

In practical applications, the chip transfer method of the embodiment may be non-selective transfer or selective transfer, that is, all chips on the chip carrier can be transferred, and part of chips on the chip carrier can be selectively transferred. It can be appreciated that selective transfer can be achieved by selectively detaching the chip from the chip carrier. For example, in the case where the chip carrier is a growth substrate for growing chips, and the chips are Micro-LED chips including buffer layers, the target laser is adopted to selectively irradiate a part of the chips to be transferred, so that only the part of the chips to be transferred is separated from the chip carrier, and the selective transfer can be achieved.

In other examples, the chip carrier may also be a temporary storage substrate or a transfer substrate, and the chip carrier may be connected by some glue materials, such as photolysis glue, and the like. Even in some examples, the chip can be detached from the chip carrier board by external force directly, for example, by applying a vertically downward external force to the guide posts.

The present embodiment further provides a display panel, where the display panel includes a light emitting chip and a circuit substrate, and the light emitting chip is transferred to a die attach area of the circuit substrate by the above-mentioned chip transfer method of the present embodiment. The display panel of the embodiment has the advantages that the setting precision of the light emitting chip is high, and the quality is good. In some implementation processes, the light-emitting chips of the display panel can be directly transferred to the circuit substrate from the growth substrate, the transfer times are few, the influence on the yield of the light-emitting chips is low, and meanwhile, the transfer times are fewer, and the accuracy of chip transfer is also guaranteed.

It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.

Claims (10)

1. A method of chip transfer, comprising:

providing a chip carrier plate, wherein a chip is arranged on one side of the chip carrier plate;

forming a guide structure, wherein the guide structure comprises a guide post arranged on the chip and a limiting through hole arranged on the chip carrier plate for the guide post to pass through;

setting positions of a target substrate and the chip carrier plate so that one side of the chip carrier plate, which is provided with the chip, is opposite to one side of the target substrate, which is used for arranging the chip;

the chip to be transferred is separated from the chip carrier plate under the matching of the guide post and the limiting through hole and falls to the target substrate;

removing the guide posts on the chip falling on the target substrate.

2. The chip transfer method of claim 1, wherein said forming a guide structure comprises:

forming the limiting through hole in the area of the chip carrier plate on which the chip is arranged;

and forming the guide post penetrating through the limiting through hole on the chip.

3. The chip transfer method according to claim 2, wherein the forming of the limiting through hole in the area where the chip is disposed on the chip carrier comprises:

arranging a first photoresist layer on one side of the chip carrier plate, which is not provided with the chip;

patterning the first photoresist layer to form a first temporary through hole at a position of the first photoresist layer corresponding to the chip;

etching the chip carrier plate by using the first photoresist layer as a mask plate, so that the region of the chip carrier plate corresponding to the first temporary through hole is removed, and the limiting through hole is formed;

and removing the first photoresist layer.

4. The chip transfer method according to claim 2, wherein said forming the guide post on the chip through the stopper through-hole comprises:

arranging a second photoresist layer on one side of the chip carrier plate, which is not provided with the chip, wherein the second photoresist layer is filled in the limiting through hole;

patterning the second photoresist layer to form a second temporary through hole at a position of the second photoresist layer corresponding to the limiting through hole, wherein the cross sectional area of the second temporary through hole is smaller than that of the limiting through hole, and the inner wall of the limiting through hole is covered by the photoresist layer;

arranging a preset material in the second temporary through hole to form the guide post;

and removing the second photoresist layer.

5. The chip transfer method according to claim 4, wherein the predetermined material includes a material that can be dissolved by a target solvent, and the removing the guide posts on the chip that have fallen onto the target substrate includes:

and dissolving and removing the guide column by using a target solvent.

6. The chip transfer method according to claim 1, wherein the setting of the positions of the target substrate and the chip carrier further comprises:

and enabling the distance between the chip on the chip carrier plate and the target substrate to be smaller than the length of the guide post.

7. The chip transfer method according to claim 1, wherein the chip carrier comprises a growth substrate on which the chip is grown, the chip comprises an epitaxial layer grown on the growth substrate, the epitaxial layer comprises a buffer layer, the buffer layer is in contact with the growth substrate, and the guide posts are connected with the buffer layer through the limiting through holes on the growth substrate;

make the chip that waits to shift break away from under the cooperation of guide post with spacing through-hole the chip carrier plate includes:

removing the buffer layer between the chip to be transferred and the growth substrate;

the chip that makes to wait to shift breaks away from the chip carrier plate under the cooperation of guide post with spacing through-hole to after falling to the target substrate, still include:

and removing the buffer layer between the chip and the guide post.

8. The chip transfer method according to any one of claims 1 to 7, wherein the target substrate includes a circuit substrate on which a die bonding region is provided;

the setting of the positions of the target substrate and the chip carrier plate further comprises:

aligning the electrode of the chip on the chip carrier plate with the bonding area of the die bonding area;

the chip that makes to wait to shift breaks away from the chip carrier plate under the cooperation of guide post with spacing through-hole to after falling to the target substrate, still include:

bonding the chip to the circuit substrate.

9. The chip transfer method according to any one of claims 1 to 7, further comprising, before forming the guide structure:

and thinning the chip carrier plate to reduce the thickness of the chip carrier plate.

10. A display panel comprising a light emitting chip and a circuit substrate, wherein the light emitting chip is transferred to a die attach region of the circuit substrate by the chip transfer method according to any one of claims 1 to 9.

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