CN115829825B - Loading control method of primitive data, graphic processor, equipment and storage medium - Google Patents
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Abstract
The invention discloses a loading control method of primitive data, a graphic processor, equipment and a storage medium. The method is performed by a primitive loader in a graphics processor and includes obtaining an output vertex stream from a thread constructor in the graphics processor; performing attribute cache hit test on each vertex in the output vertex stream, and forming an extended vertex stream carrying hit description information according to test results; and loading the extended vertex stream to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphics processor. According to the technical scheme, the output vertex stream output by the thread constructor is subjected to the attribute cache hit test at first, then the primitive loading is carried out, the output vertex can be subjected to the hit test under the condition that the thread keeps running and the vertex data is not written into the vertex data buffer area, the invalid repetition number of the attribute cache hit test is reduced, the condition that the primitive loader is empty is avoided, and the working efficiency of the GPU is improved.
Description
Technical Field
The present invention relates to the field of image processing technologies, and in particular, to a method for controlling loading of primitive data, a graphics processor, a device, and a storage medium.
Background
In a graphics rendering pipeline of a graphics processor (graphics processing unit, GPU), a front-end Shader (Shader) generally includes a Vertex Shader (VS), a Hull Shader (Hull Shader, HS), a Domain Shader (DS), and a Geometry Shader (GS), which all output Vertex data after the front-end Shader is operated, and a primitive loader is responsible for loading output Vertex streams into primitive Vertex streams.
The primitive loader mainly comprises two functional modules, a primitive loading module and an attribute cache hit test module. And the primitive loading module is used for loading the vertex stream to obtain a primitive vertex stream, and then carrying out attribute cache hit test on each vertex in the primitive vertex stream by the attribute cache hit test module, so that the primitive loader finally outputs the primitive vertex stream carrying the attribute cache hit test result of each vertex.
In the prior art, in the process of loading the output vertex stream to obtain the primitive vertex stream, the same vertex needs to be multiplexed multiple times. For example, in the process that the primitive loading module loads the four output vertices of V0, V1, V2 and V3 into the primitive vertices (V0, V1, V2) and (V1, V3, V2) of 2 triangles, V1 and V2 are multiplexed twice, so in the attribute cache hit test module, two attribute cache hits are repeated for V1 and V2 respectively. Therefore, when more vertices are multiplexed in the primitive vertex stream, the conventional primitive loading mechanism can cause the repeated invalidation times of the attribute cache hit test to be correspondingly increased, and the working efficiency of the GPU is reduced; meanwhile, since the attribute cache hit test module needs to use the primitive vertex stream output by the primitive loading module to perform the attribute cache hit test, when the processing logic of vertex data is complex, the primitive loading module may perform long-time query waiting because the input vertex to be loaded is not written into the vertex data buffer area, and at this time, the attribute cache hit test module in the primitive loader also enters an idle state for a long time.
Disclosure of Invention
The invention provides a loading control method, a graphic processor, equipment and a storage medium of graphic element data, which are used for providing a new graphic element loader working mode and remarkably improving the working efficiency of a Graphic Processing Unit (GPU).
In a first aspect, the present invention provides a primitive data loading control method, which is executed by a primitive loader in a graphics processor, including:
obtaining an output vertex stream from a thread constructor in the graphics processor;
performing attribute cache hit test on each vertex in the output vertex stream, and forming an extended vertex stream carrying hit description information according to a test result;
and loading the extended vertex stream to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphic processor.
In a second aspect, the present invention provides a graphics processor,
the graphics processor includes at least one primitive loader, the primitive loader comprising:
an output vertex stream acquisition module for acquiring an output vertex stream from a thread constructor in the graphics processor;
the extended vertex stream forming module is used for carrying out attribute cache hit test on each vertex in the output vertex stream and forming an extended vertex stream carrying hit description information according to a test result;
And the extended primitive vertex stream loading module is used for loading the extended vertex stream to obtain an extended primitive vertex stream and sending the extended primitive vertex stream to a vertex data collector in the graphic processor.
In a third aspect, the present invention provides an electronic device, including:
at least one graphics processor; and
a memory communicatively coupled to the at least one graphics processor; wherein,,
the memory stores a computer program executable by the at least one graphic processor to enable the at least one graphic processor to perform the primitive data loading control method according to any one of the present invention.
In a fourth aspect, the present invention provides a computer-readable storage medium storing computer instructions for causing a processor to implement the method for controlling loading of primitive data according to any one of the present invention.
According to the technical scheme, after the primitive loader in the graphic processor acquires the output vertex stream from the thread constructor, firstly, attribute cache hit test is carried out on each vertex in the output vertex stream, an extended vertex stream is formed according to a test result, then the extended vertex stream is loaded to obtain the extended primitive vertex stream, and finally, the extended primitive vertex stream is sent to the vertex data collector in the graphic processor for subsequent processing.
It should be understood that the description in this section is not intended to identify key or critical features of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is an interactive diagram of a primitive data loading control method implemented in the prior art;
FIG. 2 is a schematic diagram of a primitive vertex loading result implemented in the prior art;
FIG. 3 is a flowchart of a method for controlling loading of primitive data according to a first embodiment of the present invention;
FIG. 4 is a flowchart of a method for controlling loading of primitive data according to a second embodiment of the present invention;
FIG. 5 is an interaction diagram of a method for controlling loading of primitive data implemented by the method according to the second embodiment of the present invention;
FIG. 6 is a schematic diagram of a graphics processor according to a third embodiment of the present invention;
fig. 7 is a schematic structural diagram of an electronic device implementing a method for controlling loading of primitive data according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In order to make the person skilled in the art better understand the scheme of the present invention, the complete processing procedure of vertex data in the prior art will be briefly described. Specifically, as shown in fig. 1:
in the prior art, after a thread constructor constructs a plurality of threads for calculating vertex data, a scheduling executor is notified to execute each thread, and after the execution of each thread is completed, the scheduling executor notifies the thread constructor that each thread is completed, and simultaneously stores the vertex data calculated by each thread into a matched storage address in a vertex buffer.
The thread constructor provides the output vertices that match each thread to the primitive loader in the form of a data stream (i.e., output vertex stream) at the same time as each thread is constructed. The thread constructor does not send the vertex data of the output vertex to the primitive loader directly, but sends the vertex identifier of each output vertex to the primitive loader, specifically, the vertex identifier may be a storage address (VCID, abbreviated as V) of the vertex data of the output vertex in a vertex data buffer.
The primitive loader, upon receiving the primitive, takes the form: after the output vertex streams of V1, V2, V3, V4 and … … are output, firstly, inquiring whether vertex data of each output vertex to be loaded in the output vertex streams is written into a vertex data buffer area or not through a primitive loading module, and if the vertex data is not written into the vertex data buffer area, continuing waiting until the output vertex to be loaded is successfully written into. Then, the primitive loading module loads the vertex data as primitives, for example, as shown in fig. 2, four output vertices of V0, V1, V2 and V3 may be loaded into primitive vertices (V0, V1, V2) and (V1, V3, V2) of 2 triangles, where the two triangles represent one image segment in the image frame displayed by the graphics processor.
Furthermore, the primitive loading module may provide the primitive vertex stream obtained by converting each output vertex stream to the primitive vertex stream to the attribute cache hit test module. The attribute cache hit test module stores the identification information, such as VCID, of each vertex of which the vertex attribute buffer in the geometric primitive generator is cached with attribute information. And the attribute cache hit test module is used for carrying out hit test on each vertex included in each primitive vertex after receiving each primitive vertex, and outputting information about whether each vertex in the primitive vertices hits or not. In one specific example, the following is true for the shape: the primitive vertex of (V0, V1, V2) may output the primitive vertex stream carrying the attribute buffer hit information ((V0, hit), (V1, hit), (V2, miss)) accordingly.
The primitive loader can further send the primitive vertex stream carrying the attribute buffer hit information to a vertex data collector, the vertex data collector is responsible for collecting the loaded primitive vertex stream, reads vertex data from a vertex data buffer, sends the primitive vertex stream and the vertex data to a primitive vertex attribute buffer of a geometric primitive generator, cuts, perspectively divides, generates geometric primitives, and then enters a rasterization processing stage.
In the prior art, a conventional primitive loader loads an output vertex stream into a primitive vertex stream, and then performs an attribute cache hit test on the primitive vertex stream. From the above analysis, the process of loading vertex streams into primitive vertex streams requires multiplexing the same vertex multiple times. For example, in the process that the primitive loading module loads the four output vertices of V0, V1, V2 and V3 into the primitive vertices (V0, V1, V2) and (V1, V3, V2) of 2 triangles, V1 and V2 are multiplexed twice, so in the attribute cache hit test module, two attribute cache hits are repeated for V1 and V2, respectively.
In practice, when the primitive loading module assembles primitives such as triangles or rectangles, the same vertex is multiplexed for multiple times, which results in increasing the repeated invalidation times for performing the attribute cache hit test, and reduces the working efficiency of the GPU; meanwhile, when the running time of the thread is long, the time for writing the vertex data into the vertex data buffer area is long, so that the waiting time for writing the vertex data of each output vertex to be loaded into the vertex data buffer area by the primitive loading module is long, and the attribute cache hit test module frequently generates an empty load state because of waiting for inputting the vertex stream of the primitive.
Example 1
Fig. 3 is a flowchart of a primitive data loading control method according to an embodiment of the present invention, where the embodiment is applicable to a case where a graphics processor performs primitive loading in an image display scene, and the method may be performed by a primitive loader of the graphics processor. As shown in fig. 3, the method includes:
s110, obtaining an output vertex stream from a thread constructor in the graphics processor.
In this embodiment, the output vertex stream is composed of vertex identifications of a plurality of output vertices. Each time the thread constructor constructs a thread for calculating vertex data of output vertices, vertex identifications of the output vertices in the thread are added into a vertex data stream and sent to the primitive loader.
Wherein the graphics processor may include: microprocessors for performing image and graphic related operations on personal computers, workstations, game consoles and some mobile devices; furthermore, the GPU is in a multithreaded parallel operation mode, after one operation task is decomposed, the thread constructor firstly decomposes the operation task into one thread task, and then sends the thread task to the scheduling executor to execute the corresponding operation task.
Alternatively, the thread task may be a base thread task; further, the basic thread can be understood as the minimum unit of operation scheduling that the graphics processor can perform, and is included in the process, and is the actual operation unit in the process. One thread refers to a single sequential control flow in a process, and multiple threads can be parallel in a process, and each thread can execute different vertex data calculation tasks in parallel.
When a basic thread is constructed, the thread constructor pre-allocates a vertex buffer area required by the current thread, and then sends the vertex buffer area to a scheduling executor for execution; further, after the basic thread is completed, the operation result is stored in a pre-allocated vertex data buffer, so that each output vertex is pre-allocated to a buffer address in the vertex data buffer when the thread is constructed. Further, each buffer address may be sequentially output to the primitive loader as a vertex identifier.
S120, performing attribute cache hit test on each vertex in the output vertex stream, and forming an extended vertex stream carrying hit description information according to test results.
The attribute cache hit test is to verify whether the attribute information of the vertex is cached in the primitive vertex attribute buffer of the geometric primitive generator. If yes, hit description information of the cache is hit, otherwise, hit description information of the miss cache is generated.
In an optional implementation manner of this embodiment, forming an extended vertex stream carrying hit description information according to a test result may include:
and respectively assembling hit description information corresponding to each vertex into each vertex of the output vertex stream to obtain the extended vertex stream.
Wherein, the data form of the output vertex stream is assumed to be: v1, V2, V3, and V4, the data form of the extended vertex stream to complete the attribute cache hit test may be: (V1, hit), (V2, hit), (V3, hit) and (V4, miss). That is, in the extended vertex stream, the data is still in units of vertex identifications, but at the same time carries hit description information for each output vertex. The attribute hit test can be completed by an attribute hit test module in the primitive loader.
In this embodiment, unlike the implementation scheme in the prior art, after the output vertex stream carrying the vertex identifier is output by the thread constructor, the output vertex stream is not input into the primitive loading module of the primitive loader at first, but is directly input into the attribute hit test module to perform the attribute hit test, so that the attribute hit test can be performed in advance by taking the output vertex as a unit under the condition that the vertex data is not written into the vertex data buffer area, and the performance of the primitive loader is fully exerted.
Optionally, the method for performing the attribute cache hit test on each vertex in the output vertex stream may include:
and matching the vertex identifications of the vertices in the output vertex stream with a pre-stored buffer vertex identification set respectively to obtain hit description information corresponding to the vertices respectively.
Wherein the set of buffered vertex identifications matches the buffer contents within a primitive vertex attribute buffer in a geometry primitive generator in the graphics processor.
As previously described, the vertex identification may be a unique address of the vertex in the data buffer. The attribute hit test module may pre-maintain a set of buffered vertex identifiers, where vertex identifiers of vertices in a primitive vertex attribute buffer in the geometric primitive generator store attribute information. For example, if attribute information of V1, V2, and V3 is cached in the primitive vertex attribute buffer, { V1, V2, V3} may be synchronously recorded in the buffered vertex identification set. Specifically, the attribute hit test module may request a synchronization buffer vertex identification set from the geometric primitive generator every set update time period.
Optionally, the vertex identifications of the vertices in the output vertex stream are respectively matched with a pre-stored buffer vertex identification set to obtain hit description information respectively corresponding to the vertices, which specifically includes:
if the vertex identification of the first vertex which is currently matched belongs to the buffer vertex identification set, generating hit description information of a hit cache aiming at the first vertex;
And if the vertex identification of the second vertex which is currently matched does not belong to the buffer vertex identification set, generating hit description information of a miss buffer aiming at the second vertex.
Specifically, after the output vertex stream is input into the attribute hit test module, the attribute hit test module traverses all vertex identifications carried by the output vertex stream; further, on the basis of the above steps, if the currently traversed vertex identification belongs to the buffered vertex identification set, the vertex identification may be marked as a first vertex, and hit description information of a hit buffer is generated for the first vertex, and if the previously traversed vertex identification does not belong to the buffered vertex identification set, the vertex identification may be marked as a second vertex, and hit description information of a miss buffer is generated for the second vertex.
S130, loading the extended vertex stream to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphics processor.
The extended primitive vertex stream may be obtained by performing primitive loading operation on output vertices in the extended vertex stream written into the vertex data buffer. Further, the operation of loading the extended vertex stream to obtain the extended primitive vertex stream may be implemented by a primitive loading module in the primitive loader.
After obtaining the extended vertex stream, the primitive loading module firstly obtains a plurality of extended vertices to be loaded from the extended vertex stream, and then inquires the thread constructor whether vertex data of each extended vertex is written into a vertex data buffer area, if so, loads the extended vertices to obtain matched primitive vertices; and if not, waiting until all the expansion vertexes to be loaded are written into the data buffer area.
The primitive loading module can perform primitive loading operation. Further, the primitive loading operation may include: and loading the extended vertex stream into an extended primitive vertex stream matched with the set primitive shape.
Illustratively, the primitive loading module receives a primitive in the form of: after the extended vertex streams of (V1, hit), (V2, hit), (V3, hit) and (V4, miss), two triangle extended primitive vertices of the form ((V1, hit), (V2, hit), (V3, hit)) and ((V1, hit), (V2, hit), (V4, miss)) can be assembled according to a preset triangle primitive data loading rule, and the extended primitive vertices of the two triangles are output to a vertex data collector in an extended primitive vertex stream mode for subsequent processing.
According to the technical scheme, after the primitive loader in the graphic processor acquires the output vertex stream from the thread constructor, firstly, attribute cache hit test is carried out on each vertex in the output vertex stream, an extended vertex stream is formed according to a test result, then the extended vertex stream is loaded to obtain the extended primitive vertex stream, and finally, the extended primitive vertex stream is sent to the vertex data collector in the graphic processor for subsequent processing.
Example two
Fig. 4 is a flowchart of a method for controlling loading of primitive data according to a second embodiment of the present invention, and this embodiment is a refinement of the steps of the foregoing embodiment. Specifically, loading the extended vertex stream to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphics processor is thinned as follows: acquiring a vertex to be primitive loaded from the extended vertex stream according to a preset primitive data loading rule, and detecting whether the vertex to be primitive loaded meets primitive data loading conditions or not; if so, carrying out the primitive data loading on the vertex to be primitive loaded, and returning to execute the operation of acquiring the vertex to be primitive loaded from the extended vertex stream according to the preset primitive loading rule until the extended primitive vertex stream matched with the primitive data loading rule is successfully loaded; if not, after waiting for the preset time, returning to execute the operation of detecting whether the vertex to be primitive loaded meets the primitive data loading condition or not until the vertex to be primitive loaded meets the primitive data loading condition.
Accordingly, as shown in fig. 4, the method includes:
s210, obtaining an output vertex stream from a thread constructor in the graphics processor.
S220, performing attribute cache hit test on each vertex in the output vertex stream, and forming an extended vertex stream carrying hit description information according to test results.
S230, obtaining the vertex to be primitive loaded from the extended vertex stream according to a preset primitive data loading rule.
The primitive loading vertices may be a plurality of expansion vertices included in the expansion vertex stream, which are currently used for assembling to obtain a primitive vertex.
S240, detecting whether the loading vertex of the primitive to be loaded meets the loading condition of the primitive data: if yes, executing S250; if not, S260 is performed.
The primitive data loading rule may be one or more of a preset triangle primitive data loading rule, a rectangle primitive data loading rule, or a hexagon primitive data loading rule, which is not limited in this embodiment. The detecting whether the vertex to be primitive loading can meet the primitive data loading condition may include:
obtaining a target vertex identifier of the loading vertex of the primitive to be mapped, and constructing vertex data according to the target vertex identifier and writing the vertex data into a query request;
Sending the vertex data writing query request to the thread constructor so that the thread constructor queries whether vertex data corresponding to the target vertex mark is successfully written in a vertex data buffer area;
and if a successful writing query result fed back by the thread constructor is received, determining that the loading condition of the primitive data is met.
Optionally, the target vertex identifier may be a VCID of the vertex to be loaded on the primitive, and because the VCID has uniqueness, the vertex data writing query request constructed according to the target vertex identifier also has uniqueness, that is, one target vertex identifier has unique vertex data corresponding to the unique vertex data.
The query request may be a request command for querying whether vertex data corresponding to the target vertex identifier is successfully written in the vertex data buffer.
The vertex data are specific data obtained after the thread constructed by the thread constructor is executed by the scheduling executor.
S250, after loading the primitive data on the vertex to be primitive loaded, S270 is executed.
And S260, after waiting for a preset time period, returning to the step S240.
The preset duration is set manually, and can be adjusted according to the performance of the graphics processor, for example, 1 millisecond or 5 milliseconds.
S270, judging whether the extended primitive vertex stream matched with the primitive data loading rule is successfully loaded or not: if yes, executing S280; otherwise, execution returns to S230.
S280, sending the extended primitive vertex stream to a vertex data collector in the graphics processor.
According to the technical scheme, the thread constructor is used for acquiring the output vertex stream, performing attribute cache hit test on each vertex in the output vertex stream, forming an extended vertex stream according to a test result, detecting whether the vertex to be subjected to primitive loading meets the primitive data loading condition according to a preset primitive data loading rule, and finally sending the extended primitive vertex stream to the vertex data collector in the graphic processor according to the detection result, so that the problem of reduced primitive loader efficiency caused by idle load or repeated hit test of the graphic processor is solved, the number of times of vertex hit test is reduced, the condition that the primitive loader is idle is avoided, and the working efficiency is improved.
Specific application scene
In order to more clearly describe the technical solution provided by the embodiment of the present invention, fig. 5 is a flowchart of a specific application scenario to which the second embodiment of the present invention is applied.
Compared with the prior art, on one hand, after the output vertex stream carrying the vertex mark is output by the thread constructor, the output vertex stream is not input into the primitive loading module of the primitive loader, the primitive loading module inquires whether the output vertex data is written into the vertex data buffer area or not, if not, the output vertex stream waits until the output vertex data to be loaded is written, and the output vertex stream is directly input into the attribute hit test module for attribute hit test. The method provided by the embodiment furthest avoids the condition that the attribute cache hit test module in the primitive loader is empty.
On the other hand, since the attribute cache hit test in the prior art is performed after the primitive loading module loads the output vertex stream into the source vertex stream (as shown in fig. 1), the process of loading the vertex stream into the primitive vertex stream requires multiplexing the same vertex multiple times. In practice, when the primitive loading module assembles primitives such as triangles or rectangles, the same vertex is multiplexed multiple times, which results in increasing the repeated invalidation times for performing the attribute cache hit test, and reduces the working efficiency of the GPU.
Specifically, in the present embodiment, as shown in fig. 5:
the thread constructor informs the dispatch executor to execute each thread after a plurality of threads for calculating the vertex data are built, and the dispatch executor stores the vertex data calculated by each thread into matched storage addresses in the vertex buffer area when informing the thread constructor that each thread is executed after the execution of each thread is completed.
The thread constructor provides the output vertices that match each thread to the primitive loader in the form of a data stream (i.e., output vertex stream) at the same time as each thread is constructed. The thread constructor does not send the vertex data of the output vertex to the primitive loader directly, but sends the vertex identifier of each output vertex to the primitive loader, specifically, the vertex identifier may be a storage address (VCID, abbreviated as V) of the vertex data of the output vertex in a vertex data buffer.
The primitive loader, upon receiving the primitive, takes the form: after the output vertex flows of V1, V2, V3, V4 and … … are output, firstly, an attribute hit test module is used for carrying out an attribute hit test on the output vertex flows. The attribute cache hit test module stores the identification information, such as VCID, of each vertex of which the vertex attribute buffer in the geometric primitive generator is cached with attribute information. And the attribute cache hit test module is used for carrying out hit test on each vertex included in each primitive vertex after receiving each primitive vertex, and outputting information about whether each vertex in the primitive vertices hits or not. In one specific example, the following is true for the shape: the primitive vertices of (V0, V1, V2) may output the extended vertex stream carrying the attribute buffer hit information ((V0, hit), (V1, hit), (V2, miss)) accordingly.
Furthermore, the primitive loader may convert each acquired output vertex stream into an extended vertex stream, and then provide the extended vertex stream to the primitive loading module. The primitive loader, upon receiving the primitive, takes the form: after the output vertex stream of "(V0, hit), (V1, hit), (V2, miss), (V3, hit), … …", the thread constructor is firstly queried by the primitive loading module whether the vertex data of each output vertex to be loaded in the extended vertex stream is written into the vertex data buffer, if not, the primitive loading module continues waiting until the output vertex to be loaded is successfully written, and then the primitive loading module loads the vertex data as primitives, for example, four output vertices of V0, V1, V2 and V3 can be loaded into primitive vertices (V0, hit), (V1, hit), (V3, hit)) of 2 triangles and ((V0, hit), (V1, hit), (V2, miss)), and outputs the extended primitive vertex stream after being loaded. It should be noted that the primitive vertices loaded at this time all contain attribute hit test information.
The primitive loader can further send the extended primitive vertex stream carrying the attribute buffer hit information to a vertex data collector, the vertex data collector is responsible for collecting the loaded extended primitive vertex stream, reads vertex data from a vertex data buffer, sends the extended primitive vertex stream and the vertex data to a primitive vertex attribute buffer of a geometric primitive generator, cuts, perspectively segments, generates geometric primitives, and then enters a rasterization processing stage.
Example III
Fig. 6 is a schematic structural diagram of a primitive loader according to a third embodiment of the present invention, where the primitive loader may be configured in a graphics processor, and the graphics processor includes at least one primitive loader, and the primitive loader includes:
an output vertex stream acquisition module 310, an extended vertex stream formation module 320, and an extended primitive vertex stream loading module 330, wherein:
an output vertex stream acquisition module 310 for acquiring an output vertex stream from a thread constructor in the graphics processor;
an extended vertex stream forming module 320, configured to perform an attribute cache hit test on each vertex in the output vertex stream, and form an extended vertex stream carrying hit description information according to a test result;
and the extended primitive vertex stream loading module 330 is configured to load the extended vertex stream to obtain an extended primitive vertex stream, and send the extended primitive vertex stream to a vertex data collector in the graphics processor.
According to the technical scheme, after the primitive loader in the graphic processor acquires the output vertex stream from the thread constructor, firstly, attribute cache hit test is carried out on each vertex in the output vertex stream, an extended vertex stream is formed according to a test result, then the extended vertex stream is loaded to obtain the extended primitive vertex stream, and finally, the extended primitive vertex stream is sent to the vertex data collector in the graphic processor for subsequent processing.
Based on the above embodiments, the vertex stream forming module 320 is expanded. For the purpose of:
matching vertex identifications of the vertices in the output vertex stream with a pre-stored buffer vertex identification set respectively to obtain hit description information corresponding to the vertices respectively;
wherein the set of buffered vertex identifications matches the buffer contents within a primitive vertex attribute buffer in a geometry primitive generator in the graphics processor.
Based on the above embodiments, the extended vertex stream forming module 320 is further configured to:
if the vertex identification of the first vertex which is currently matched belongs to the buffer vertex identification set, generating hit description information of a hit cache aiming at the first vertex;
and if the vertex identification of the second vertex which is currently matched does not belong to the buffer vertex identification set, generating hit description information of a miss buffer aiming at the second vertex.
Based on the above embodiments, the extended vertex stream forming module 320 is further configured to:
and respectively assembling hit description information corresponding to each vertex into each vertex of the output vertex stream to obtain the extended vertex stream.
Based on the above embodiments, the extended primitive vertex stream loading module 330 is configured to:
acquiring a vertex to be primitive loaded from the extended vertex stream according to a preset primitive data loading rule, and detecting whether the vertex to be primitive loaded meets primitive data loading conditions or not;
if so, carrying out the primitive data loading on the primitive loading vertexes, and returning to execute the operation of acquiring the primitive loading vertexes from the extended vertex stream according to the preset primitive loading rules until the primitive loading vertexes are successfully loaded to obtain the extended primitive vertex stream matched with the primitive data loading rules.
Based on the above embodiments, the extended primitive vertex stream loading module 330 is further configured to:
obtaining a target vertex identifier of the loading vertex of the primitive to be mapped, and constructing vertex data according to the target vertex identifier and writing the vertex data into a query request;
sending the vertex data writing query request to the thread constructor so that the thread constructor queries whether vertex data corresponding to the target vertex mark is successfully written in a vertex data buffer area;
and if a successful writing query result fed back by the thread constructor is received, determining that the loading condition of the primitive data is met.
Based on the above embodiments, the extended primitive vertex stream loading module 330 is further configured to:
if not, after waiting for the preset time, returning to execute the operation of detecting whether the vertex to be primitive loaded meets the primitive data loading condition or not until the vertex to be primitive loaded meets the primitive data loading condition.
The graphics processor provided by the embodiment of the invention can execute the loading control method of the primitive data provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example IV
Fig. 7 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 7, the electronic device 10 includes at least one graphic processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one graphic processor 11, in which the memory stores a computer program executable by the at least one graphic processor, and the graphic processor 11 may perform various suitable actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The graphic processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
Specifically, the loading control method of the primitive data specifically includes:
obtaining an output vertex stream from a thread constructor in the graphics processor;
performing attribute cache hit test on each vertex in the output vertex stream, and forming an extended vertex stream carrying hit description information according to a test result;
and loading the extended vertex stream to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphic processor.
In some embodiments, the method of controlling loading of primitive data may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the graphic processor 11, one or more steps of the above-described loading control method of the primitive data may be performed. Alternatively, in other embodiments, graphics processor 11 may be configured to perform the loading control method of primitive data in any other suitable manner (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (8)
1. A loading control method of primitive data, which is executed by a primitive loader in a graphic processor, comprising:
obtaining an output vertex stream from a thread constructor in the graphics processor; the output vertex stream is composed of vertex identifications of a plurality of output vertices, and does not carry primitive membership relations among the vertices;
performing attribute cache hit test on each vertex in the output vertex stream, and respectively assembling hit description information corresponding to each vertex into each vertex of the output vertex stream to obtain an extended vertex stream carrying the hit description information; the attribute cache hit test is used for verifying whether attribute information of the vertex is cached in a primitive vertex attribute buffer zone of the geometric primitive generator;
Obtaining a primitive loading vertex to be loaded from the extended vertex stream according to a preset primitive data loading rule to obtain an extended primitive vertex stream, and sending the extended primitive vertex stream to a vertex data collector in the graphics processor; the extended primitive vertex stream carries primitive membership relations among vertexes;
performing an attribute cache hit test on each vertex in the output vertex stream, including:
matching vertex identifications of the vertices in the output vertex stream with a pre-stored buffer vertex identification set respectively to obtain hit description information corresponding to the vertices respectively;
wherein the set of buffered vertex identifications matches the buffer contents within a primitive vertex attribute buffer in a geometry primitive generator in the graphics processor.
2. The method of claim 1, wherein matching vertex identifications of vertices in the output vertex stream with a pre-stored set of buffered vertex identifications, respectively, to obtain hit description information corresponding to each of the vertices, respectively, comprises:
if the vertex identification of the first vertex which is currently matched belongs to the buffer vertex identification set, generating hit description information of a hit cache aiming at the first vertex;
And if the vertex identification of the second vertex which is currently matched does not belong to the buffer vertex identification set, generating hit description information of a miss buffer aiming at the second vertex.
3. The method of claim 1, wherein obtaining the extended primitive vertex stream from the extended vertex stream for primitive loading according to a preset primitive data loading rule comprises:
acquiring a vertex to be primitive loaded from the extended vertex stream according to a preset primitive data loading rule, and detecting whether the vertex to be primitive loaded meets primitive data loading conditions or not;
if so, carrying out the primitive data loading on the primitive loading vertexes, and returning to execute the operation of acquiring the primitive loading vertexes from the extended vertex stream according to the preset primitive loading rules until the primitive loading vertexes are successfully loaded to obtain the extended primitive vertex stream matched with the primitive data loading rules.
4. A method according to claim 3, wherein detecting whether the primitive loading vertices to be primitive satisfy a primitive data loading condition comprises:
obtaining a target vertex identifier of the loading vertex of the primitive to be mapped, and constructing vertex data according to the target vertex identifier and writing the vertex data into a query request;
Sending the vertex data writing query request to the thread constructor so that the thread constructor queries whether vertex data corresponding to the target vertex mark is successfully written in a vertex data buffer area;
and if a successful writing query result fed back by the thread constructor is received, determining that the loading condition of the primitive data is met.
5. The method according to claim 3 or 4, further comprising, after detecting whether the primitive loading vertex to be primitive satisfies a primitive data loading condition:
if not, after waiting for the preset time, returning to execute the operation of detecting whether the vertex to be primitive loaded meets the primitive data loading condition or not until the vertex to be primitive loaded meets the primitive data loading condition.
6. A graphics processor, the graphics processor comprising at least one primitive loader, the primitive loader comprising:
an output vertex stream acquisition module for acquiring an output vertex stream from a thread constructor in the graphics processor; the output vertex stream is composed of vertex identifications of a plurality of output vertices, and does not carry primitive membership relations among the vertices;
The extended vertex stream forming module is used for carrying out attribute cache hit test on each vertex in the output vertex stream, respectively assembling hit description information corresponding to each vertex into each vertex of the output vertex stream, and obtaining an extended vertex stream carrying the hit description information; the attribute cache hit test is used for verifying whether attribute information of the vertex is cached in a primitive vertex attribute buffer zone of the geometric primitive generator;
the graphics processor comprises an extended primitive vertex stream loading module, a vertex data collector and a graphics processor, wherein the extended primitive vertex stream loading module is used for acquiring a primitive loading vertex to be loaded from the extended vertex stream to obtain an extended primitive vertex stream according to a preset primitive data loading rule, and sending the extended primitive vertex stream to the vertex data collector in the graphics processor; the extended primitive vertex stream carries primitive membership relations among vertexes;
an extended vertex stream forming module for:
matching vertex identifications of the vertices in the output vertex stream with a pre-stored buffer vertex identification set respectively to obtain hit description information corresponding to the vertices respectively;
wherein the set of buffered vertex identifications matches the buffer contents within a primitive vertex attribute buffer in a geometry primitive generator in the graphics processor.
7. An electronic device, the electronic device comprising:
at least one graphics processor; and
a memory communicatively coupled to the at least one graphics processor; wherein,,
the memory stores a computer program executable by the at least one graphic processor to enable the at least one graphic processor to perform the loading control method of the primitive data according to any one of claims 1 to 5.
8. A computer readable storage medium storing computer instructions for causing a processor to implement the method of loading control of primitive data according to any one of claims 1 to 5 when executed.
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