CN115827031A - Firmware updating system and updating method - Google Patents

Firmware updating system and updating method Download PDF

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Publication number
CN115827031A
CN115827031A CN202211541461.0A CN202211541461A CN115827031A CN 115827031 A CN115827031 A CN 115827031A CN 202211541461 A CN202211541461 A CN 202211541461A CN 115827031 A CN115827031 A CN 115827031A
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China
Prior art keywords
firmware
module
storage area
data packet
new firmware
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Pending
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CN202211541461.0A
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Chinese (zh)
Inventor
郑娟
耿进龙
张立鹏
周庭梁
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Casco Signal Ltd
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Casco Signal Ltd
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Priority to CN202211541461.0A priority Critical patent/CN115827031A/en
Publication of CN115827031A publication Critical patent/CN115827031A/en
Pending legal-status Critical Current

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Abstract

A maintenance terminal divides a new firmware into a plurality of data packets, respectively encrypts each data packet by MD5, and transmits the encrypted data packets to a BMC module in blocks; the BMC module decrypts the received multiple data packets of the new firmware by MD5 and sends the data packets to the FPGA module; the FPGA module runs old firmware in a first storage area, and temporarily stores a plurality of received data packets of new firmware in a second storage area; and the FPGA module verifies a plurality of data packets of the new firmware, and after the verification is passed, the FPGA module erases the old firmware in the first storage area and writes the new firmware passing the verification in the second storage area into the first storage area. The upgrading process of the invention can not affect the normal use of the firmware, thus realizing non-inductive upgrading, enhancing the safety factor, improving the upgrading efficiency and the reliability and maintainability of the system.

Description

Firmware updating system and updating method
Technical Field
The invention relates to a firmware updating system and a firmware updating method based on double storage areas.
Background
Software in the rail transit signal industry depends on board cards to operate, the types of the board cards are various, and each board card needs to be periodically updated with firmware to overcome the defects of old versions of firmware. At present, a single buffer scheme is generally adopted for updating firmware, namely only one operation area is provided, the old firmware and the new firmware share the operation area, the new firmware directly covers the old firmware, and before the upgrade is completed, the normal functions of the equipment cannot be used, so that the requirement of the upgrading experience of an insensitive user cannot be met.
The statements herein merely provide background information related to the present disclosure and may not necessarily constitute prior art.
Disclosure of Invention
The invention aims to provide a firmware updating system and a firmware updating method, which can not influence the normal use of firmware in the updating process, realize non-inductive updating, enhance the safety coefficient, improve the updating efficiency and improve the reliability and maintainability of the system.
In order to achieve the above object, the present invention provides a firmware update system, comprising:
the maintenance terminal is used for dividing the new firmware into a plurality of data packets, respectively carrying out MD5 encryption on each data packet, and transmitting the encrypted data packets to the BMC module in the board card to be upgraded in a blocking manner;
the BMC module is positioned in the board card to be upgraded, performs data transmission with the maintenance terminal through a wireless network, and is used for transmitting the received data packet to the FPGA module after MD5 decryption;
the FPGA module is located in the board card to be upgraded and comprises a first storage area and a second storage area, the first storage area is used for operating firmware, the second storage area is used for temporarily storing the received new firmware, and the FPGA module is used for verifying the received new firmware.
The invention also provides a firmware updating method, which comprises the following steps:
the maintenance terminal divides the new firmware into a plurality of data packets, respectively carries out MD5 encryption on each data packet, and transmits the encrypted data packets to the BMC module in blocks;
the BMC module decrypts the received multiple data packets of the new firmware by MD5 and sends the data packets to the FPGA module;
the FPGA module runs old firmware in a first storage area, and temporarily stores a plurality of received data packets of new firmware in a second storage area;
the FPGA module verifies a plurality of data packets of the new firmware, after the verification is passed, the FPGA module erases the old firmware in the first storage area, and writes the new firmware which passes the verification in the second storage area into the first storage area.
Maintaining multithread synchronous work of the terminal, the BMC module and the FPGA module, and synchronously performing the following operations: the method comprises the steps that a maintenance terminal encrypts a data packet, the maintenance terminal transmits the encrypted data packet to a BMC module, the BMC module receives the encrypted data packet, the BMC module decrypts the data packet, the BMC module sends the decrypted data packet to an FPGA module, the FPGA module stores the received data packet, and the FPGA module conducts check on the data packet.
And the BMC module and the maintenance terminal perform data transmission through a wireless network.
And if the BMC module fails to decrypt the new firmware or the FPGA module fails to verify the new firmware, the firmware is updated again, and the maintenance terminal encrypts the new firmware in a sub-packet mode again and transmits the new firmware to the BMC module in blocks.
The BMC module sequentially judges each data packet in the new firmware, renews the firmware as long as any data packet is not decrypted successfully, and adds 1 to the renewal times.
And the FPGA module sequentially judges each data packet in the new firmware respectively, updates the firmware again as long as any data packet is not successfully verified, and adds 1 to the updating times.
And setting the maximum updating times, stopping updating the firmware if the updating times exceed the maximum updating times, and alarming to inform maintenance personnel.
The invention has the following beneficial effects:
1. the two storage areas are used for storing old firmware and new firmware respectively, the two areas are independent, noninductive upgrading can be achieved, and the defect that in the prior art, if upgrading fails, a system changes bricks is overcome.
2. And the data packet is encrypted and decrypted by using the MD5 encryption algorithm, so that the integrity and consistency of the transmission process of the new firmware are ensured, and the safety factor is enhanced.
3. And block transmission and block verification are carried out on the new firmware, so that multichannel parallel work of the BMC module and the FPGA module is ensured, and the upgrading efficiency is improved.
4. The maximum request updating frequency is defined, when the request updating frequency exceeds the maximum value, the updating is not successful, the firmware updating process is ended, and an alarm prompt is given, so that maintenance personnel can further confirm the reason of failure of firmware updating, and the reliability and maintainability of the system are enhanced.
5. The new firmware is downloaded in a wireless mode, software upgrading can be carried out on equipment distributed in various places, and operation and maintenance personnel do not need to run around the places.
6. If decryption fails or upgrading fails, the upgrading request can be initiated again to realize circular upgrading.
Drawings
Fig. 1 is a block diagram of a firmware update system according to the present invention.
FIG. 2 is a flowchart illustrating a firmware update method according to an embodiment of the present invention.
Detailed Description
The preferred embodiment of the present invention will be described in detail below with reference to fig. 1 and 2.
With the development of railway signal technology and embedded software technology, the single buffer implementation scheme gradually exposes its laggard nature, when upgrading, after entering a bootloader (boot loader) program, the old firmware is erased first, then the new firmware is downloaded to the same buffer bank0, if there is a problem in the upgrading process or there is a problem with the new firmware, the application can only stay in the bootloader, the application at this moment cannot be used normally, the user experience is poor, the validity of the new firmware is verified after the downloading is completed, if the verification validity result is failed, the firmware upgrading process needs to be entered again, and the upgrading efficiency is low.
In view of the above-mentioned drawbacks, the present invention provides a firmware update system, as shown in fig. 1, the firmware update system comprising:
the maintenance terminal 1 is used for dividing the new firmware into a plurality of data packets, respectively performing MD5 encryption on each data packet, and transmitting the encrypted data packets to the board card to be upgraded in blocks;
a BMC (Baseboard Management Controller) module 2, which is located in the board card to be upgraded, where the BMC module 2 performs data transmission with the maintenance terminal 1 through a wireless network, and the BMC module 2 is configured to decrypt a received data packet with an MD5 and send the decrypted data packet to a second storage area 302 in the FPGA module;
the FPGA module 3 is located in a board card to be upgraded, the FPGA module 3 comprises a first storage area 301 and a second storage area 302, the first storage area 301 is used for running firmware, the second storage area 302 is used for temporarily storing received new firmware, and the FPGA module 3 is used for verifying the received new firmware.
The invention provides a firmware updating method, wherein old firmware and new firmware respectively occupy a memory area (bank 0 and bank1 respectively). Assuming that an old firmware is placed in a bank0 (operation area) and a new firmware is placed in a bank1 (download area), during upgrading, MD5 encryption is performed on the new firmware and the new firmware is downloaded into the bank1 in blocks, only after the new firmware is completely downloaded and verified successfully, the system jumps into a bootLoader program (boot loader program), then the bank0 area where the old firmware is located is erased, the new firmware of the bank1 is copied into the bank0, and if the firmware verification fails, a firmware upgrading request is sent again, so that the application can be guaranteed to work normally before the new firmware verification is completed, the non-inductive upgrading is realized, and the upgrading efficiency is improved; the integrity and consistency of a firmware transmission process can be ensured by MD5 encryption; the block transmission can ensure the synchronous transmission and downloading, and improve the upgrading efficiency.
As shown in fig. 2, in an embodiment of the present invention, a firmware update method is provided, which performs firmware update on a board by using the firmware update system shown in fig. 1. The firmware updating method specifically comprises the following steps:
s0, setting the maximum value of the update request times max _ request _ count by the FPGA module, and enabling the initial value of the update request times max _ request _ count to be 0;
s1, the FPGA module initiates a firmware updating request to the BMC module, and adds 1 to a max _ request _ count value;
s2, the BMC module initiates a connection request to a maintenance terminal through a wireless network;
step S3, after receiving the connection request, the maintenance terminal divides the new firmware package into a plurality of data packages, the size of each data package is not more than 1k, for example, the data packages are divided into 3 data packages, D1 (1 k), D2 (1 k) and D3 (0.5 k), the maintenance terminal sequentially carries out MD5 encryption on the data packages D1, D2 and D3 and sends the encrypted data packages D1, D2 and D3 to the BMC module through a wireless network;
s4, after receiving the data packets D1, D2 and D3, the BMC module sequentially performs MD5 decryption on the data packets;
step S5, the BMC module judges whether decryption is successful, if so, the step S6 is carried out, if not, and the value of the requested update time max _ request _ count is smaller than the maximum value of the requested update time, the step S1 is returned to be executed, if not, and the value of the requested update time max _ request _ count is larger than or equal to the maximum value of the requested update time, the update process is ended, and a maintainer is requested to check whether the firmware update fails due to other reasons;
the BMC module judges each data packet in sequence, and returns to the step S1 to add 1 to the max _ request _ count value as long as any data packet is not decrypted successfully;
s6, the BMC module sends the decrypted data packets D1, D2 and D3 to a second storage area bank1 in the FPGA module in sequence;
s7, the FPGA module sequentially checks the data packets D1, D2 and D3 in the second storage area bank1;
step S8, the FPGA module judges whether the verification is successful, if so, the step S9 is carried out, if not, and the numerical value of the requested updating times max _ request _ count is smaller than the maximum value of the requested updating times, the step S1 is returned to be executed, if not, and the numerical value of the requested updating times max _ request _ count is larger than or equal to the maximum value of the requested updating times, the updating process is ended, and a maintainer is requested to check whether the firmware updating fails due to other reasons;
the FPGA module judges each data packet in sequence, and returns to the step S1 to add 1 to the max _ request _ count value as long as any data packet is not successfully verified;
and S9, erasing the old firmware in the first storage area bank0 by the FPGA module, writing the new firmware contents passing the verification in the second storage area bank1 into the first storage area bank0, and ending the updating process.
The invention has the following beneficial effects:
1. the two storage areas are used for storing old firmware and new firmware respectively, the two areas are independent of each other, noninductive upgrading can be achieved, and the defect that if upgrading fails, a system changes bricks in the prior art is overcome.
2. And the data packet is encrypted and decrypted by using an MD5 encryption algorithm, so that the integrity and consistency of the transmission process of the new firmware are ensured, and the safety coefficient is enhanced.
3. And block transmission and block verification are carried out on the new firmware, so that multichannel parallel work of the BMC module and the FPGA module is ensured, and the upgrading efficiency is improved.
4. The maximum request updating frequency is defined, when the request updating frequency exceeds the maximum value, the updating is not successful, the firmware updating process is ended, and an alarm prompt is given, so that maintenance personnel can further confirm the reason of failure of firmware updating, and the reliability and maintainability of the system are enhanced.
5. The new firmware is downloaded in a wireless mode, software upgrading can be carried out on equipment distributed in various places, and operation and maintenance personnel do not need to run around the places.
6. If decryption fails or upgrading fails, the upgrading request can be initiated again to realize circular upgrading.
It should be noted that, in the embodiments of the present invention, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship shown in the drawings, and are only for convenience of describing the embodiments, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.

Claims (8)

1. A firmware update system, comprising:
the maintenance terminal is used for dividing the new firmware into a plurality of data packets, respectively performing MD5 encryption on each data packet, and then transmitting the encrypted data packets in blocks to a BMC module in the board card to be upgraded;
the BMC module is positioned in the board card to be upgraded, performs data transmission with the maintenance terminal through a wireless network, and is used for transmitting the received data packet to the FPGA module after MD5 decryption;
the FPGA module is located in the board card to be upgraded and comprises a first storage area and a second storage area, the first storage area is used for operating firmware, the second storage area is used for temporarily storing the received new firmware, and the FPGA module is used for verifying the received new firmware.
2. A firmware updating method using the firmware updating system according to claim 1, comprising the steps of:
the maintenance terminal divides the new firmware into a plurality of data packets, respectively carries out MD5 encryption on each data packet, and then transmits the encrypted data packets to the BMC module in blocks;
the BMC module decrypts the received multiple data packets of the new firmware by MD5 and sends the data packets to the FPGA module;
the FPGA module runs old firmware in a first storage area, and temporarily stores a plurality of received data packets of new firmware in a second storage area;
and the FPGA module verifies a plurality of data packets of the new firmware, and after the verification is passed, the FPGA module erases the old firmware in the first storage area and writes the new firmware passing the verification in the second storage area into the first storage area.
3. The firmware updating method according to claim 2, wherein the maintenance terminal, the BMC module and the FPGA module are in multi-thread synchronization, and the following operations are performed simultaneously: the method comprises the steps that a maintenance terminal encrypts a data packet, the maintenance terminal transmits the encrypted data packet to a BMC module, the BMC module receives the encrypted data packet, the BMC module decrypts the data packet, the BMC module sends the decrypted data packet to an FPGA module, the FPGA module stores the received data packet, and the FPGA module conducts check on the data packet.
4. The firmware updating method according to claim 2, wherein data transmission is performed between the BMC module and the maintenance terminal through a wireless network.
5. The firmware updating method according to claim 2, wherein if the BMC module fails to decrypt the new firmware or the FPGA module fails to verify the new firmware, the firmware updating is performed again, and the maintenance terminal packetizes and encrypts the new firmware again and transmits the new firmware to the BMC module in blocks.
6. The firmware updating method according to claim 5, wherein the BMC module determines each data packet in the new firmware in turn, re-updates the firmware as long as any one of the data packets is not decrypted successfully, and increments the number of updates by 1.
7. The firmware updating method according to claim 5, wherein the FPGA module determines each data packet in the new firmware in turn, and updates the firmware again and adds 1 to the number of updates as long as any data packet is not verified.
8. A firmware update method according to claim 6 or 7, wherein a maximum update time is set, and if the update time exceeds the maximum update time, the firmware update is stopped and a warning is given to a maintenance person.
CN202211541461.0A 2022-12-02 2022-12-02 Firmware updating system and updating method Pending CN115827031A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211541461.0A CN115827031A (en) 2022-12-02 2022-12-02 Firmware updating system and updating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211541461.0A CN115827031A (en) 2022-12-02 2022-12-02 Firmware updating system and updating method

Publications (1)

Publication Number Publication Date
CN115827031A true CN115827031A (en) 2023-03-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211541461.0A Pending CN115827031A (en) 2022-12-02 2022-12-02 Firmware updating system and updating method

Country Status (1)

Country Link
CN (1) CN115827031A (en)

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