CN115826946A

CN115826946A - Program exception vector space optimization system, method, device and medium

Info

Publication number: CN115826946A
Application number: CN202310128388.2A
Authority: CN
Inventors: 杨亮; 何鹏飞; 白艳; 陈静静
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-02-17
Filing date: 2023-02-17
Publication date: 2023-03-21
Anticipated expiration: 2043-02-17
Also published as: CN115826946B

Abstract

The invention belongs to the field of computers, and particularly relates to a system, equipment and a medium for optimizing program abnormal vector space. A system, comprising: the code analysis module analyzes an output file compiled by the program to determine a hole space in an abnormal vector space corresponding to the program and a target variable compiled by the program; the void space distribution module generates a distribution strategy for distributing the target variable to a void space in the abnormal vector space through a preset algorithm and sends the distribution strategy to the code modification module; the code modification module modifies a target variable in source code of a program based on the allocation policy to generate a target code file. According to the program abnormal vector space optimization system provided by the invention, the abnormal vector space is used for storing program data, so that the size of a program image file is reduced, and the storage space occupied by the program image file can be effectively reduced.

Description

Program exception vector space optimization system, method, device and medium

Technical Field

The invention belongs to the field of computers, and particularly relates to a system, equipment and a medium for optimizing program abnormal vector space.

Background

The program has two addresses during compiling and running: a called link address, i.e. the address when the program is linked after compiling, the address is generally in one-to-one correspondence with the address stored in the mirror image file; the other is called a running address, namely an address in the process of running the program. Most of the time the addresses of both are consistent, but this leads to a problem: in order to ensure that the link addresses and the running addresses are matched one by one, the program image file is subjected to 0 filling processing at the hollow place, so that the image file is enlarged. Sometimes, in order to reduce the size of the program image file and achieve the purpose of loading the program at an accelerated speed, a compaction technique is used, for example, an at (absolute position variable identifier in the embedded field, a memory address of a target variable in a C program can be set, and a keyword in the form of a "variable name __ at __") is used in a link file, so that it is indicated that an address where the program actually runs is a parameter of the at keyword, codes and data are arranged in sequence in the image file, and binary codes or data are moved to a running address in the program running process, and at this time, the link address is inconsistent with the running address, so that the program running time is increased although the program loading time is reduced. Therefore, the loading time and the running time of the program seem to be a pair of spears, and the loading time is reduced along with the increase of the running time; the run time is reduced and the load time is increased.

Therefore, an effective solution to solve the above problems is needed.

Disclosure of Invention

In order to solve the above problems, the present invention provides a program abnormal vector space optimization system, which includes a code analysis module, a void space allocation module, and a code modification module, wherein:

the code analysis module is configured to analyze an output file after the program is compiled so as to determine a cavity space in an abnormal vector space corresponding to the program and a target variable after the program is compiled;

the void space allocation module is configured to generate an allocation strategy for allocating a target variable to a void space in the abnormal vector space through a predetermined algorithm, and send the allocation strategy to a code modification module;

the code modification module is configured to modify a target variable in source code of a program based on the allocation policy to generate a target code file.

In some embodiments of the invention, the code analysis module comprises:

the first text searching module is configured to determine a description part and a target variable corresponding to an abnormal vector space in an output file after the program is compiled according to a compiling mode of the program.

In some embodiments of the invention, the code analysis module further comprises:

a redundant code analysis module configured to determine redundant data present in the description portion based on a preset anomaly vector space template.

and the void space confirmation module is configured to analyze the redundant data of the description part determined by the first text search module and/or the description part determined by the redundant code analysis module, and determine an available void space in an abnormal vector space corresponding to the description part.

a ranking module configured to rank the target variables based on their data sizes.

In some embodiments of the invention, the void space allocation module comprises:

an allocation policy module configured to generate an allocation policy for allocating the target variable to a hollow space in the anomaly vector space through a plurality of allocation algorithms.

In some embodiments of the present invention, the hole space allocation module further comprises:

and the cavity space management module is configured to store the distribution strategy generated by the distribution algorithm corresponding to the distribution strategy module, and restore the initial state of the cavity space to the next distribution algorithm for distribution operation when the next distribution algorithm runs.

and the optimal solution output module is configured to acquire the distribution strategies generated by the multiple distribution algorithms from the void space management module, and determine the optimal solution of the distribution strategies according to a preset mode based on the distribution strategies generated by the multiple distribution algorithms.

In some embodiments of the invention, the code modification module comprises:

a second text lookup module configured to find a location of a variable associated with an allocation policy in a source code of a program according to the allocation policy.

In some embodiments of the invention, the code modification module further comprises:

and the abnormal vector modification module is configured to delete the corresponding code of the redundant data in the abnormal vector space analyzed by the program by the code analysis module in the program source code.

and the data area variable modification module is configured to replace variables of the target variables in the program source code with corresponding pointers according to the allocation strategy and point the pointers to corresponding addresses in the abnormal vector space allocated in the allocation strategy.

In some embodiments of the invention, the data region variable modification module is further configured to:

and putting the corresponding variable of the target variable in the program source code into a label representing an abnormal vector space in a mode of assembling the label of the code according to the distribution strategy and the corresponding variable of the target variable in the program source code.

and the intermediate result updating module is configured to store the modification of the program source code by the data area variable modification module and the exception vector modification module.

In some embodiments of the invention, the system further comprises:

an exception vector template module configured to provide a corresponding exception vector space template to the code analysis module according to the hardware architecture of the program.

In some embodiments of the invention, the system further comprises:

the system comprises a merging module and a source code generating module, wherein the merging module is configured to merge user-allowed contents in an object code file into the source code of the program according to user operation.

In some embodiments of the invention, the incorporation module is further configured to:

judging whether the object code files are all merged into the source code of the program, recompiling the merged source code files of the program according to a preset mode in response to the fact that the object code files are not all merged into the source code of the program, and sending the compiled output files to the code analysis module.

in response to the object code file being fully merged into the source code of the program, compiling the source code of the merged program into an executable file.

Another aspect of the present invention provides a method for optimizing a program exception vector space, including:

analyzing an output file compiled by the program to determine a cavity space in an abnormal vector space corresponding to the program and a target variable compiled by the program;

generating an allocation strategy for allocating a target variable to a void space in the abnormal vector space through a predetermined algorithm;

and modifying target variables in the source code of the program based on the allocation strategy to generate a target code file.

Yet another aspect of the present invention also provides a computer apparatus, including:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of the above embodiments.

Yet another aspect of the present invention further provides a computer-readable storage medium, which stores a computer program, and the computer program realizes the steps of the method of any one of the above embodiments when executed by a processor.

By the program abnormal vector space optimization method, the abnormal vector space is used for storing program data, so that the size of a program image file is reduced, the storage space occupied by the program image file can be effectively reduced, and the program loading time is shortened along with the reduction of the program image file; meanwhile, the invention also avoids the problem of inconsistent link address and running address caused by using the at keyword technology in the link script.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.

Fig. 1 is a schematic structural diagram of a system for optimizing a program exception vector space according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating a method for optimizing a program exception vector space according to an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a computer device according to an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a computer-readable storage medium according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a code analysis module according to an embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a cavity space allocation module according to an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a code modification module according to an embodiment of the present invention;

FIG. 8 is a block diagram of a system for optimizing program exception vector space according to an embodiment of the present invention;

fig. 9 is a schematic diagram of data distribution of exception handling in an exception vector space corresponding to the exception vector space based on the ARMv8 architecture according to the embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are only used for convenience of expression and should not be construed as a limitation to the embodiments of the present invention, and no description is given in the following embodiments.

The invention aims to solve the problem that the storage space of equipment is wasted in the abnormal processing process when an abnormal processing program occurs in the program running process in the traditional program compiling mode, and particularly on some terminal IOT equipment, wearing equipment such as a bracelet and the like and networking equipment such as household electrical equipment, a chip platform with low power consumption and low performance is generally selected as a hardware base due to the fact that business and cost factors are considered in the design of the equipment, so that the operation speed and the storage space capacity of the equipment are limited. But it is desirable to achieve the technical effect of fast start-up or fast response on these platforms. Therefore, how to realize fast start and response in low configuration is an urgent problem to be solved.

To solve the above problem, as shown in fig. 1, the present invention provides a program exception vector space optimization system, which includes a code analysis module 1, a void space allocation module 2, and a code modification module 3, wherein:

the code analysis module 1 is configured to analyze an output file after program compilation to determine a cavity space in an abnormal vector space corresponding to a program and a target variable 2 after program compilation;

the void space allocation module 2 is configured to generate an allocation policy for allocating a target variable to a void space in the abnormal vector space through a predetermined algorithm, and send the allocation policy to the code modification module 3;

the code modification module 3 is configured to modify an object variable in source code of a program based on the allocation policy to generate an object code file.

In the embodiment of the invention, a general program image file is divided into a code segment and a data segment; the data segment is divided into a full 0 data segment and a non-zero data segment; wherein the optimization of code segments is extremely complex and is not considered within the scope of this patent; all-0 data segments, namely bss segments, actually store only the starting position and size of the data segment, and therefore, there is no optimized space; while the non-0 data segment, that is, the data segment, is often stored independently of the code, the arrangement mode often causes voids between the data segment and the code segment, and in order to ensure that the link address is consistent with the operation address, when the program image file is generated, the compiler performs a 0 filling operation in the void spaces; in addition, since some code segments also have aligned operations, the sample 0 filling process is also performed, and thus, the program image file is enlarged. Considering that the positions of some segments in the program image file are fixed and the utilization rate is not high, the invention fills the void space processed by filling 0 into more meaningful data, and can reduce the loading time of the program image and the running time of the program. The most representative segment is the data segment in which the abnormal vector space is located. The exception vector space is a data space in which exception processing is performed when a program is abnormal. As shown in FIG. 9, FIG. 9 shows the spatial distribution of data corresponding to the spatial distribution of exception vectors for an ARMv8 processor. For example, the 128 bytes represented by 10 × 080 to 0 × 180 in the figure are the interrupt space for executing IRQ/vrrq under Current El witsp 0, and normally, the 128 bytes of data space mainly stores register data for exception handling operation (the specific content is different, more or less, depending on the logic of the program), and the exception handling vector mainly operates as follows:

1) Stacking the necessary registers, often referred to as saving the field;

2) Skipping to an exception handling process;

3) Restoring the register stored in the stack, which is often called a restoration site;

4) Return to execution before exception.

Therefore, the vector space stores the data required in the above process into a space represented by 128 bytes, i.e., 0x080 to 0x180, according to the binary data command after program compilation (assuming that the exception handling is IRQ interruption). In practice, however, programs cannot fully utilize the exception vector space after compilation. Therefore, the compiler will occupy the unused data in 0-filling manner during compilation.

It should be noted that the exception vector space of the program is a scheme in which the exception handling is already implemented after the program source code is compiled into the executable program, that is, the exception handling of the program is implemented after the program is compiled, which is a mechanism designed by the program and hardware for maintaining the stable operation of the program. Different exception vector spaces may be available after compilation of the same program for different hardware platforms (processor architectures).

Therefore, when optimizing an abnormal vector space of a certain program, the program is compiled first, and a compiled output file is obtained, where the output file includes: symbol table, disassembling file, address mapping table file and executable program file.

The code analysis module 1 analyzes the output file and finds out the abnormal vector space corresponding to the program in the executable program and the target variable capable of being stored in the abnormal vector space by the hardware platform according to the adopted compiling tool. And determining the part filled with 0 by the compiler in the abnormal vector space according to the recorded content of the abnormal vector space, regarding the part filled with 0 as a hole space, and sending the hole space to the hole space distribution module 2 together with the target variable.

Further, the void space allocation module 2 generates an allocation policy for adding the target variable to the void space through a plurality of allocation algorithms, and sends the allocation policy to the code modification module 3.

And the code modification module 3 modifies the scope of some variables corresponding to the target variables in the source code of the program according to the allocation strategy so as to add the variables into the exception vector space. For example, the variables are originally stored in the memory after the program runs, and are changed into the registers corresponding to the exception vector space. Thus, the object code optimized to the program is generated and stored as an object code file.

In some embodiments of the invention, the code analysis module 1 comprises:

the first text search module 11 is configured to determine, in an output file obtained by compiling the program, a description portion and a target variable corresponding to an abnormal vector space in the output file according to a compiling mode of the program.

As shown in fig. 5, the code analysis module further includes a first text search module 11, where the first text search module mainly searches for content in an output file after the program is compiled, and analyzes the content in the compiled output file according to a compiling tool and a hardware platform adopted by the program to find a description portion of an abnormal vector space in the output file corresponding to abnormal processing of the program. And further determining an abnormal vector space of the program based on the description part, simultaneously acquiring all variable information of the program through the disassembled file and the address mapping table file, and determining a corresponding global variable and a variable which cannot be changed in the program operation as a target variable.

In some embodiments of the invention, the code analysis module 1 further comprises:

a redundant code analysis module 12, said redundant code analysis 12 module configured to determine redundant data present in said description portion based on a preset anomaly vector space template.

In this embodiment, the code analysis module 1 further includes a redundant code analysis module 12, where the redundant code analysis module compares the abnormal vector space of the program according to a preset or selected abnormal vector space template based on the determined abnormal vector space, determines the redundant data of the abnormal vector space compared with the abnormal vector space module, and uses the redundant data of the abnormal vector space as redundant data.

Specifically, as shown in the abnormal vector space reference table shown in fig. 9, assuming that the content in the abnormal vector space template is only the address of jumping to the abnormal process flow and the process flow address executed before returning to the abnormal, and the sizes of the two data addresses are 64 bits, i.e., 8 bytes, respectively, by taking an IRQ interrupt corresponding to 0x080 as an example. In this case, if it is assumed that there is data other than the address of the jump to the exception processing flow and the processing flow address executed before the return to the exception in the 128-byte space corresponding to 0x080 in the exception vector space of the program, the data other than the address is redundant data with respect to the selected vector space template, and it is necessary to mark the data.

In some embodiments of the present invention, the code analysis module 1 further comprises:

a cavity space confirmation module 13, where the cavity space confirmation module 13 is configured to analyze the description part determined by the first text search module 11 and/or the redundant data of the description part determined by the redundant code analysis module 12, and determine an available cavity space in an abnormal vector space corresponding to the description part.

In this embodiment, the code analysis module 1 further includes a void space confirmation module 13, and the void space confirmation module 13 analyzes the 0 filling part and the redundant data in the abnormal vector space included in the description part, determines a corresponding data address range, and takes the corresponding address range as an available void space of the program abnormal vector space.

a sorting module 14, the sorting module 14 configured to sort the target variables based on the data sizes of the target variables.

In this embodiment, the sorting module in the code analysis module 1 sorts the target variables according to the data sizes of the variables, and sends the sorted target variables to the void space allocation module.

In some embodiments of the present invention, the void space allocation module 2 includes:

an allocation policy module 21, wherein the allocation policy module 21 is configured to generate an allocation policy for allocating the target variable to a hollow space in the abnormal vector space through a plurality of allocation algorithms.

In this embodiment, the allocation policy module 21 allocates the target variable to the hole space through algorithms such as dynamic programming, a greedy algorithm, and a knapsack algorithm according to the hole space and the target variable sent by the code analysis module, that is, fills the hole space according to the data size of the target variable.

In some embodiments of the present invention, the void space allocation module 2 further includes:

and the cavity space management module 22 is configured to store the allocation strategy generated by the allocation algorithm corresponding to the allocation strategy module, and restore the initial state of the cavity space to the next allocation algorithm for allocation operation when the next allocation algorithm runs.

In this embodiment, the void space allocation module 2 is further provided with a void space management module 22, and the void space management module 22 provides initialization work of vector spaces for each algorithm in the allocation policy module 21, and stores an allocation policy given by each algorithm.

and an optimal solution output module 23, where the optimal solution output module 23 is configured to obtain the distribution strategies generated by the multiple distribution algorithms from the void space management module, and determine an optimal solution of the distribution strategies according to a predetermined manner based on the distribution strategies generated by the multiple distribution algorithms.

In this embodiment, after the allocation strategies are given by all of the algorithms, the optimal solution output module 23 obtains the allocation strategies given by each allocation algorithm and the remaining unallocated target variables from the void space management module 22, and evaluates the optimal solution according to the remaining unallocated target variables, the number of the target variables allocated to the abnormal vector space, and the data size of the target variables allocated to the abnormal vector space. For example, according to the characteristics of a hardware platform on which a program runs and a scheduling mechanism in which the program runs, a corresponding evaluation tendency is selected, for example, if the storage space of the hardware platform is small, data access is frequent, and a target variable with a large data amount is preferentially allocated to an allocation policy, when the allocation of each algorithm is evaluated, the data size of the remaining unallocated target variable is used as a main judgment basis, and the smaller the data size of the remaining target variable of the allocation scheme of which algorithm is, the optimal solution is obtained.

In some embodiments of the invention, the number of times the target variable is used in the program is also used as an evaluation basis for whether the target variable is allocated to the abnormal vector space. If the target variables are frequently called in the program, the smaller the number of the target variables which are not distributed is taken as a judgment basis, and the smaller the number of the target variables which are left in the distribution scheme of which algorithm is, the better the result is, and the result is considered as an optimal solution.

In some embodiments of the invention, the code modification module 3 comprises:

a second text lookup module 31 configured to find a location of a variable related to the allocation policy in the source code of the program according to the allocation policy.

In this embodiment, the code modification module 3 is provided with a second text search module 31, and the second text search module 31 finds the position of the corresponding target variable allocated to the abnormal vector space in the source code of the program according to the optimal allocation scheme given in the void space allocation module 2.

In some embodiments of the invention, the code modification module 3 further comprises:

an exception vector modification module 32, where the exception vector modification module 32 is configured to delete, by the code analysis module 1, a corresponding code in the program source code for the redundant data in the exception vector space analyzed by the program.

In the present embodiment, the abnormal vector modification module 32 clears the code corresponding to the abnormal vector space redundancy data given by the code analysis module 1 in the program source code in the optimal allocation scheme.

a data area variable modification module 33, where the data area variable modification module 33 is configured to replace a variable of a target variable in a program source code with a corresponding pointer according to an allocation policy, and point the pointer to a corresponding address in an exception vector space allocated in the allocation policy.

In this embodiment, the data area variable modification module 33 replaces the variable at the corresponding position in the program source code in the form of a pointer according to the position of the target variable in the program source code determined by the second text lookup module 31, and points the pointer to the address of the corresponding abnormal vector space in the allocation policy. Therefore, the target variable is added into the hole space of the abnormal vector space after compiling.

In some embodiments of the present invention, the data region variable modification module 33 is further configured to:

In this embodiment, attribute tags are added to corresponding variables in the program source code, and the attribute tags are added to the corresponding exception vector space. For example, a corresponding target variable is added to a connection file corresponding to the "section name" through "attribute" (section name) "of the C language.

an intermediate result update module 34, wherein the intermediate result update module 34 is configured to save modifications to the program source code by the data area variable modification module and the exception vector modification module.

In this embodiment, the code modification module 3 is further provided with an intermediate result update module for storing the source code modification result.

In some embodiments of the present invention, since the target code modified by the code modification module 3 is created in a branch manner, the modified target code needs to be merged into the original branch after modification, and a user is required to confirm whether to approve the modification during merging. Therefore, the target code file of each modification by the code modification module 3 needs to be saved as an intermediate result.

In some embodiments of the invention, the system further comprises:

an abnormal vector template module 4, wherein the abnormal vector template module 4 is configured to provide a corresponding abnormal vector space template to the code analysis module according to the hardware architecture of the program.

As shown in fig. 8, in the present embodiment, the exception vector template module records the simplest exception vector space under each architecture, such as the most common ARM architecture, RISCV architecture, and MIPS architecture, and is called by the code modification module. And provides a corresponding abnormal vector space template for the code analysis module.

In some embodiments of the invention, the system further comprises:

a merging module 5, wherein the merging module 5 is configured to merge user-allowed contents in the object code file into the source code of the program according to a user operation.

As shown in fig. 8, the importing module 5 is used to provide the target code modified by the code modifying module 3 to a programmer for review, as described above, and the user confirms which modifications can be merged into the main branch and which modifications cannot be merged into the main branch.

In some embodiments of the invention, the incorporation module 5 is further configured for:

judging whether the object code files are all merged into the source codes of the programs or not, recompiling the merged source code files of the programs according to a preset mode in response to the fact that the object code files are not all merged into the source codes of the programs, and sending the compiled output files to the code analysis module 1.

Further, in this embodiment, the merge module 5 determines, according to the merging scenario confirmed by the user (programmer), whether the modified object codes in the merged codes are all agreed to be merged into the main branch by the user (if not, it indicates that there still exists a void space in the abnormal vector space, and therefore, another round of analysis, distribution, and modification is required, at this time, the merge module sends the source codes of the program confirmed by the user to the compiling module 6, and sets corresponding parameters to output multiple types of output files (a disassembly file, an address mapping table file, and the like). The code analysis module 1 performs analysis and starts the next round of optimization.

In this embodiment, if the user agrees to merge all object code files into the main source code branch of the program, or the user indicates that the next round of optimization is not to be performed, the merge module sends the source code confirmed by the user directly to the compiler module 6 to compile the executable file of the program.

The embodiment is as follows:

in this embodiment, the exception vector space of the ARMv8 architecture is taken as an example to implement the program exception vector space optimization system provided by the present invention.

When the ARMv8CPU is in the AArch64 state, each EL has independent 16 entries, and the 16 entries are divided into four types of exceptions, namely: IRQ, FIQ, serror, synchronous. There are again four different regions depending on whether EL level migration will occur when an exception is triggered and whether AArch64 or AArch32 instruction sets are used to generate the migration. Unlike the 4 bytes of vector space for each exception in ARMv7, each entry in ARMv8 is 0x80 bytes, which can put more code in the vector table. The classification and offset relationships in the vector table for the entire 16 entries are shown in FIG. 9.

It can be seen from FIG. 9 that the entire exception vector space is 0x800 bytes in size, i.e., 2048 bytes; such vector tables are 3 under the AArch64 architecture, so the total exception vector space is 6144 bytes, i.e., 6KB in size.

Specifically, based on the ARMv8CPU platform, the structure diagram of the program exception vector space optimization system implemented in this embodiment is shown in fig. 8, and includes a code analysis module 1, a hole space allocation module 2, and a code modification module 3.

The compiling module 5: the module has the main functions of selecting a proper tool chain according to a hardware architecture, calling a compiling tool chain to finish the compiling work of codes and generating files required by subsequent modules, such as: symbol tables, disassembled files, address mapping tables, etc.

Code analysis module 1: and analyzing whether redundant codes exist in the abnormal vector space or not according to the generated executable file and the disassembled codes. The exception handling vector mainly operates the following steps:

step one, stacking necessary registers, which is often called as saving the field;

step two, skipping to an exception handling process;

thirdly, restoring the register stored in the stack, which is often called as a restoration site;

and step four, returning to the execution before the exception.

In order to simplify writing and consider security in a conventional implementation manner, all registers are stacked in the first step, and all registers are popped out in the third step, so that the size of an exception handling vector is increased, the space of a runtime stack is increased, and more CPU runtime is consumed for saving more registers. Additionally analyzing the exception handling vector table in the linux kernel finds that if the exception handling vector size is less than 0x80 bytes, the insufficient portion will be filled with nop instructions. It can be seen that the anomaly vector space is wasted in practical applications.

Therefore, the processing flow considering the exception vector in this embodiment does not actually require special parameter passing, such as the interrupt processing flow: that is, in the ARMv8 architecture, the CPU obtains an interrupt number by operating a GIC (general interrupt controller), finds a corresponding interrupt processing function, and then executes it. Therefore, in the process of jumping from assembly to C language in the second step in the process, only the register to be used needs to be stored theoretically; similarly, for exceptions, the CPU reads the exception register to determine how to handle the exception.

Following the above principle, the code analysis module 1 analyzes the exception vector to reduce unnecessary operations in the exception handling vector as much as possible. After the analysis is finished, recording the analysis result in an intermediate process file; the actual size of each exception handling vector also needs to be recorded.

In addition to the two main work contents, the code analysis module 1 needs to analyze the space occupied by each variable stored in the data segment by using the address mapping table file generated by the compiling module 6, and output the information after sequencing, so that the subsequent distribution activities can be reasonably carried out.

Therefore, to summarize, the main functions of the code analysis module 1 are the following three items:

a) Analyzing whether each abnormal vector in the abnormal vector space has a redundant code or not, and finding out the part which is really subjected to abnormal processing;

b) Recording hole space original information according to the result after A) is finished;

c) Analyzing the space occupied by each variable of the data segment;

in this embodiment, the void space allocation module 2 allocates the content of the data area to the space of the interrupt vector table according to a preset algorithm, such as a dynamic programming or greedy algorithm, according to the output of the code analysis module 1, and records the information for updating the output of the code analysis module, that is, the intermediate result output by the void space management module, and outputs the optimal solution of the current round after completion. And after the completion, calling a code modification module to modify the attribute of the variable to complete the work of distributing the variable of the data area to the abnormal vector space.

However, since the program design has various requirements and partial modification may have a large influence, it is possible that a user does not incorporate the object code file generated by the program abnormal vector space optimization system into the original code, that is, only selects a part of the object code to be incorporated into the main branch, and it is necessary to continue to circulate the process after the incorporation is completed until the redundant space in the abnormal vector space is completely allocated or the data stored in the data area is larger than the remaining space in the abnormal vector space. At this time, an optimal solution is generated, and the content of the data area which is not allocated to the void space is recorded for the subsequent incorporation module to use.

In this embodiment, the code modification module 3 deletes the redundant code in the abnormal vector space according to the output of the code analysis module 1, further analyzes the abnormal vector space preset in the abnormal vector template, determines whether the abnormal vector space in the abnormal vector template can be used for replacement, and modifies the processing function in the template into the processing function actually called in the program.

In addition, the code modification module 3 needs to modify the attribute of the variable corresponding to the code stored in the data area according to the output of the void space allocation module 2, so as to complete the operation of really allocating the content of the data area to the abnormal vector space; the label is added to the assembly code, the initial value of the corresponding variable is placed in the space behind the label, and the label is set to be of a global type, so that the label is a global variable, the global variable can be used in the C code, and the operation of allocating the variable of the data area to the abnormal vector space can be completed similarly. And after the code modification is finished, calling the compiling module again for compiling, and starting a subsequent flow.

In this embodiment, after the above process is completed, the merge module 5 presents the content modified by the code modification module, and prompts the user that there may be risks in modifying the content according to the modified content, and finally the user decides whether to merge the modified content into the main code branch. And after the completion of the incorporation, the process is operated again, and the result is checked. For the content of the data area which is not allocated to the abnormal vector space finally, the module gives a prompt to inform the user of the reason of the failure in the integration and a feasible suggestion.

In the embodiment, the exception vector template 4 records the most compact exception vector space under each architecture, such as the most common ARM architecture, RISCV architecture, MIPS architecture, and the like, and is called by the code modification module.

As shown in fig. 2, another aspect of the present invention provides a method for optimizing a program exception vector space, including:

s1, analyzing an output file compiled by a program to determine a hole space in an abnormal vector space corresponding to the program and a target variable compiled by the program;

s2, generating a distribution strategy for distributing a target variable to a cavity space in the abnormal vector space through a preset algorithm;

and S3, modifying target variables in the source codes of the programs based on the distribution strategies to generate target code files.

As shown in fig. 3, another aspect of the present invention also provides a computer device, including:

at least one processor 21; and

a memory 22, said memory 22 storing computer instructions 23 executable on said processor 21, said instructions 23 when executed by said processor 21 implementing the steps of the method of any of the above embodiments.

As shown in fig. 4, a further aspect of the present invention also proposes a computer-readable storage medium 401, where the computer-readable storage medium 401 stores a computer program 402, and the computer program 402 implements the steps of the method according to any one of the above embodiments when being executed by a processor.

The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The numbers of the embodiments disclosed in the above embodiments of the present invention are merely for description, and do not represent the advantages or disadvantages of the embodiments.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims

1. The program exception vector space optimization system is characterized by comprising a code analysis module, a hole space distribution module and a code modification module, wherein:

2. The system of claim 1, wherein the code analysis module comprises:

3. The system of claim 2, wherein the code analysis module further comprises:

4. The system of claim 3, wherein the code analysis module further comprises:

5. The system of claim 2, wherein the code analysis module further comprises:

6. The system of claim 1, wherein the hole space allocation module comprises:

7. The system of claim 6, wherein the hole space allocation module further comprises:

8. The system of claim 7, wherein the void space allocation module further comprises:

9. The system of claim 1, wherein the code modification module comprises:

10. The system of claim 1, wherein the code modification module further comprises:

11. The system of claim 9, wherein the code modification module further comprises:

12. The system of claim 11, wherein the data region variable modification module is further configured to:

13. The system of claim 11, wherein the code modification module further comprises:

and the intermediate result updating module is configured to store the modifications of the program source code by the data area variable modifying module and the abnormal vector modifying module.

14. The system of claim 1, further comprising:

15. The system of claim 1, further comprising:

16. The system of claim 15, wherein the import module is further configured to:

judging whether the object code files are all merged into the source codes of the programs or not, in response to that the object code files are not all merged into the source codes of the programs, recompiling the merged source code files of the programs according to a preset mode, and sending the compiled output files to the code analysis module.

17. The system of claim 16, wherein the import module is further configured to:

18. A method for optimizing program exception vector space is characterized by comprising the following steps:

19. A computer device, comprising:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of claim 18.

20. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method as claimed in claim 18.