CN115826915A

CN115826915A - Power calculation method and device, storage medium and electronic equipment

Info

Publication number: CN115826915A
Application number: CN202211275174.XA
Authority: CN
Inventors: 夏传荣; 李洋
Original assignee: Xi'an Yufei Electronic Technology Co ltd
Current assignee: Xi'an Yufei Electronic Technology Co ltd
Priority date: 2022-10-18
Filing date: 2022-10-18
Publication date: 2023-03-21

Abstract

The embodiment of the application discloses a power calculation method, a device, a storage medium and electronic equipment, wherein the method comprises the following steps: converting the integer power of the signal into logarithmic power, wherein the logarithmic power comprises fractional part power and exponential part power; calculating the decimal power by a table look-up method to obtain a decimal power decibel value; calculating an exponential power decibel value corresponding to the exponential partial power; and adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal. By adopting the embodiment of the application, logarithmic power can be converted into fractional power and exponential power, the depth of a lookup table can be reduced under the condition of meeting the calculation precision, and further memory resources are reduced.

Description

Power calculation method and device, storage medium and electronic equipment

Technical Field

The present application relates to the field of electronic device communications, and in particular, to a power calculation method, apparatus, storage medium, and electronic device.

Background

With the development of science and technology, people have higher and higher requirements on living standards and communication requirements, the traditional communication technology cannot meet the increasing communication requirements of people, and the wireless communication technology is produced and gradually replaces the traditional communication technology.

In the wireless communication process, power calculation is often required, and a logarithmic calculation problem is inevitably involved. In the prior art, logarithm calculation is usually performed by a table look-up method, which is implemented as follows: and obtaining a power value through a logarithmic function, establishing a lookup table according to the corresponding relation between the power value and the power decibel value, and traversing the lookup table to obtain a corresponding power decibel value when the signal power needs to be calculated.

However, in order to ensure the accuracy of the calculation result, the depth of the lookup table needs to be increased, which consumes a large amount of memory resources.

Disclosure of Invention

The application provides a power calculation method, a device, a storage medium and electronic equipment, which can convert logarithmic power into fractional power and exponential power, reduce the depth of a lookup table and further reduce memory resources.

In a first aspect of the present application, a method for power calculation is provided, which is applied to an electronic device, and includes:

converting the integer power of the signal into logarithmic power, wherein the logarithmic power comprises fractional part power and exponential part power;

calculating the decimal power by a table look-up method to obtain a decimal power decibel value;

calculating an exponential power decibel value corresponding to the exponential partial power;

and adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

By adopting the technical scheme, the integer power of the signal is converted into logarithmic power comprising fractional part power and exponential part power, wherein the exponential part power can be directly obtained by calculation, and the calculation error of the part is mainly caused by approximate calculation and can be ignored; the power of the decimal part is obtained by a table look-up method, and the result obtained by the lookup table with shallow depth can also meet the calculation precision of the decimal part due to the small number of data bits; the method can be comprehensively obtained, and consumes less storage resources on the premise of meeting the precision and meeting the condition of calculating the precision of the result through the floating point conversion and the table look-up method.

Optionally, the converting the integer power of the signal into logarithmic power includes:

converting the integer power into floating-point power according to a floating-point number standard formula;

converting the floating point number power to the logarithmic power according to a logarithmic formula.

By adopting the technical scheme, the integer power is converted into the floating point power, and then the floating point power is converted into the logarithmic power, so that the calculation accuracy can be further improved.

Optionally, the floating-point number standard formula is:

y＝(-1) ^S *(1.f)*2 ^E ；

wherein y is the logarithmic power; s is the sign bit of the floating-point number power; e is the exponent of the floating-point number power; e = E ^-127 (ii) a f is the decimal of the floating-point number;

the logarithmic formula is:

y＝10.0*log ₁₀ (1.f)+E*(10.0*log ₁₀ 2.0)；

in the formula, 10.0 log ₁₀ (1.f) is the fractional portion power; e (10.0 log) ₁₀ 2.0 ) is an exponential partial power.

By adopting the technical scheme, the floating-point power is converted into the fractional part power and the exponential part power by using a logarithmic formula, wherein the exponential part power comprises a constant part, and the calculation result of the constant part can be stored, so that the calculation amount of the electronic equipment is further reduced.

Optionally, the calculating the exponent partial power to obtain an exponent power decibel value includes:

calculating the power value of the index part according to a displacement formula to obtain the decibel value of the index power;

the shift formula is:

B*C＝C+(C＜＜1)；

wherein B is a constant of the exponential portion power; c is the fraction of the exponential-part power value.

By adopting the technical scheme, the multiplication calculation is converted into the addition calculation, and the calculation amount is further reduced.

Optionally, the method further includes:

and calculating a decimal power decibel value corresponding to the decimal part power according to a CORDIC algorithm.

By adopting the technical scheme, the decimal power decibel value is obtained by using a table look-up method, or the decimal part power decibel value is directly calculated according to the CORDIC algorithm, and compared with the method of calculating the decimal power decibel value by using the table look-up method only, the storage capacity of the electronic equipment is reduced.

Optionally, before converting the integer power into the logarithmic power, the method further includes:

and setting the table look-up depth, the table look-up address and the output data bit width according to the preset precision.

By adopting the technical scheme, the table look-up depth, the table look-up address and the bit width of the output data are set according to the preset precision, and the storage resources of the electronic equipment can be further reasonably distributed.

Optionally, the calculating a decibel value of the decimal power corresponding to the decimal power according to the CORDIC algorithm includes:

according to a modification formula, modifying the fractional part power to obtain the modified fractional part power;

substituting the modified fractional power into an inverse hyperbolic tangent formula to obtain a modified fractional power value;

substituting the deformed decimal power value into a deformation formula to obtain a decimal power decibel value;

the variant formula is:

wherein y is a decimal power decibel value; log (log) ₁₀ (1.f) is fractional part power;

the fractional part power value after the modification is adopted; the inverse hyperbolic tangent formula is as follows:

in the formula (I), the compound is shown in the specification,

by adopting the technical scheme, the decimal power decibel value is obtained by calculating the power of the decimal part according to the CORDIC algorithm, the calculation result has high precision, and the calculation does not need a table look-up method, so that the memory space of the electronic equipment can be further reduced.

In a second aspect of the present application, there is provided a power calculation apparatus, the apparatus comprising:

a logarithmic power obtaining module for converting the integer power of the signal into a logarithmic power, wherein the logarithmic power comprises a fractional part power and an exponential part power;

the decimal part power calculation module is used for acquiring a decimal power decibel value corresponding to the decimal part power;

the index part power calculation module is used for calculating an index power decibel value corresponding to the index part power;

and the total power decibel value calculating module is used for adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

By adopting the technical scheme, the integer power of the signal is converted into logarithmic power comprising fractional part power and exponential part power, wherein the exponential part power can be directly obtained by calculation, and because the calculation error is mainly caused by approximate calculation and can be ignored; the power of the decimal part is obtained by a table look-up method, and the result obtained by the lookup table with shallow depth can also meet the calculation precision of the decimal part due to the small number of data bits; the method can be comprehensively obtained, and on the premise of meeting the precision, the method can consume less storage resources under the condition of meeting the precision of the calculation result through the floating point conversion and table look-up method.

In a third aspect of the application, a computer-readable storage medium is provided, having stored thereon a plurality of instructions adapted to be loaded by a processor and to carry out the above-mentioned method steps.

In a fourth aspect of the present application, there is provided an electronic device comprising: a processor, a memory; wherein the memory stores a computer program adapted to be loaded by the processor and to perform the above-mentioned method steps.

In summary, the present application includes at least one of the following benefits:

1. the integer power of the signal is converted into fractional power and exponential power, and logarithmic power is calculated, wherein the exponential power can be directly calculated, the fractional power can be obtained by table lookup through a table lookup method, and compared with the method of calculating the signal power by only using the table lookup method, the method has the advantages that the table lookup depth is shallow, the consumed storage resources are less, and the storage capacity of the electronic equipment in the logarithm calculation process is further reduced;

2. the decimal power decibel value of the decimal part power is calculated through the CORDIC algorithm, the decimal power decibel value can be directly calculated without table lookup, the storage resource of the electronic equipment is saved, and the calculation precision is high.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic flowchart of a power calculation method provided in an embodiment of the present application;

FIG. 2 is a schematic flow chart diagram illustrating another power calculation method provided by an embodiment of the present application;

FIG. 3 is a diagram illustrating a standard structure of a floating-point number according to an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a power calculating apparatus according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Description of reference numerals: 1. a power calculation device; 11. a logarithmic power obtaining module; 12. a fractional part power calculation module; 13. an exponential portion power calculation module; 14. a total power decibel value calculation module; 1000. an electronic device; 1001. a processor; 1002. a communication bus; 1003. a user interface; 1004. a network interface; 1005. a memory.

Detailed Description

In order to make those skilled in the art better understand the technical solutions in the present specification, the technical solutions in the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

In the description of the embodiments of the present application, the words "exemplary," "for example," or "for instance" are used to indicate instances, or illustrations. Any embodiment or design described herein as "exemplary," "e.g.," or "e.g.," is not to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the words "exemplary," "such as," or "for example" are intended to present relevant concepts in a concrete fashion.

In the description of the embodiments of the present application, the term "and/or" is only one kind of association relationship describing an associated object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, B exists alone, and A and B exist at the same time. In addition, the term "plurality" means two or more unless otherwise specified. For example, the plurality of systems refers to two or more systems, and the plurality of screen terminals refers to two or more screen terminals. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit indication of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.

In the field of wireless communication, power calculation, signal-to-noise ratio estimation, spectrum sensing and other processing are often required, which inevitably involves a logarithmic calculation problem. A wireless communication device such as a data link generally uses a Field Programmable Gate Array (FPGA) as a main chip for processing a modem algorithm, and therefore, the FPGA is generally used for performing a logarithmic calculation process.

Taking signal power calculation as an example, if the dynamic range of the signal power is minus 100 db-mw to 20 db-mw, the accuracy is 0.5 db. And carrying out normalization processing on the signal power to obtain 241 dB values in total from 0 to 240, wherein 0 represents minus 100 dB milliwatts, 1 represents minus 99.5 dB milliwatts, … and 240 represents 20 dB milliwatts. In the prior art, calculation is mainly performed by a table look-up method, and the realization method is as follows:

the logarithmic calculation function is: y =10.0 log ₁₀ x (formula 1), wherein x is the signal power value and y is the decibel value of the signal power.

The inverse of the logarithmic calculation function is:

the 241 decibel values are substituted into the formula 2, and the corresponding 241 signal power values can be obtained and stored in a lookup table. During calculation, the input value of the signal power is compared with 241 data in the lookup table, and the decibel value of the signal power can be determined.

In the process of table lookup, a dichotomy can be used for searching and searching in the lookup table, and log is required in the process ₂ 241 is approximately equal to 7.913 times, and the rounding is 8 times of retrieval comparison.

However, as the calculation accuracy increases or the range of the input value expands, the memory resources consumed by the table lookup calculation increase in decimal order. For example, if the depth of the lookup table is 241 bits, the data bit width of the lookup table is 32 bits, and the consumed memory resources are 32 × 241 bits.

Aiming at the problems of the logarithm calculation method, the logarithm power can be converted by adopting a floating point conversion method to obtain the fractional part power and the exponential part power, wherein the exponential part power can be directly calculated, the fractional part power can be obtained by looking up a table through a table look-up method, compared with the method of calculating the signal power by only using the table look-up method, the method has the advantages of shallower table look-up depth and less consumed storage resources, and further reduces the storage capacity of the electronic equipment in the logarithm calculation process.

The present application will be described in detail with reference to specific examples.

In one embodiment, as shown in fig. 1, a flow chart of a power calculation method is specifically proposed, and the method is mainly applied to a cloud server side, can be implemented by relying on a computer program, can be implemented by relying on a single chip microcomputer, and can also run on a power calculation device based on a von neumann system. The computer program may be integrated into the application or may run as a separate tool-like application.

Specifically, the power calculation includes:

step 101: the integer power of the signal is converted to logarithmic power, which includes fractional and exponential partial powers.

The integer data is numerical data which does not contain an exponential part, is used for representing an integer and is stored in a computer in a binary form. The integer power of the signal is understood in the embodiments of the present application to be a function of the power of the 32-bit signal to be calculated.

The logarithmic power in the embodiments of the present application may be understood as a function of logarithmic form power, where the logarithmic power includes fractional part power and exponential part power, and may be understood as a function of logarithmic form, where one part is a fractional function and the other part is an exponential function.

Specifically, the electronic device shapes the signal power after receiving the signal powerThe function in power form is converted to a function in logarithmic power form. For example, converting integer power form power to y =10.0 log ₁₀ x＝10.0*log ₁₀ (1.f)+10.0*log ₁₀ (2 ^E ) (ii) a y is the total power value, 10.0 log ₁₀ x is a function of the power in logarithmic form, 10.0 log ₁₀ (1.f) is a partial fractional function of the logarithmic form of the power variant, 10.0 log ₁₀ (2 ^E ) A partial exponential function obtained for a logarithmic form of the power variation.

Step 102: and calculating the decimal power by a table look-up method to obtain a decimal power decibel value.

Specifically, the electronic device converts the 32-bit integer power into a power containing a fractional part and an exponential part, wherein the precision of the fractional part is 8 bits, and a lookup table pre-stored in advance by the electronic device can be searched through a lookup table method to obtain a calculation result, namely a fractional power decibel value.

In this process, assuming that the depth of the lookup tables is the same, these lookup tables are all 241 bits, the storage space consumed for obtaining the decimal power decibel value is 8 × 241 bits, and the storage space consumed for the integer power consumption is 32 × 241 bits. In addition, the decimal part power of 8 bits does not need to be set with a depth value of 241, and in practical application, the depth value is set to 64, so that the calculation accuracy can be ensured, and the storage space consumed by the decimal power decibel value is 8 x 64 bits, and compared with the integral power, the table lookup calculation is directly carried out, and the storage space is obviously saved.

Step 103: and calculating an exponential power decibel value corresponding to the power of the exponential part.

Specifically, after receiving the signal power, the electronic device converts the function in the form of integer power into a function in the form of logarithm, where the function in the form of logarithm includes a part of exponential functions, and the part of exponential functions can be directly calculated by a computer. For example, the exponential partial function is 10.0 log ₁₀ (2 ^E ) Wherein E = E ^-127 Is a constant value, therefore, 10.0 log may be used ₁₀ (2 ^E ) The calculation result of (2) is stored in the memory as a constant, and the amount of program operation for logarithmic calculation can be further reduced.

Step 104: and adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

Specifically, after the decimal power decibel value and the exponential power decibel value are calculated by the electronic equipment through a table lookup method, the two power values can be directly added to obtain a total power decibel value.

Referring to fig. 2, fig. 2 is a schematic flowchart illustrating a power calculation method according to another embodiment of the present disclosure.

Step 201: and setting the table look-up depth, the table look-up address and the output data bit width according to the preset precision.

Specifically, the electronic device converts the integer power into a power including a fractional part power and an exponential part power, wherein the fractional part power needs to be solved by lookup through a lookup table, and in order to ensure the precision of the lookup table, the depth of the lookup table, the address of the lookup table, and the bit width of output data need to be set. For example, when searching for the fractional part of a single-precision floating point number, the depth of the lookup table may be set to 64 bits, the address bit width of the lookup table may be set to 6 bits, the upper 6 bits of the fractional part of the single-precision floating point number may be taken as the address of the lookup table, and the output data bit width of the lookup table may be set to 8 bits, where the integer part occupies 3 bits and the exponent part occupies 5 bits.

Step 202: and converting the integer power of the signal into the floating-point power according to a floating-point standard formula, and converting the floating-point power into the logarithmic power according to a logarithmic formula.

The floating-point standard formula is understood in the present embodiment to be a modified formula set according to IEEE754 binary floating-point arithmetic standard, and referring to fig. 3, as can be seen from fig. 3, a 32-bit single-precision floating-point number is composed of a sign bit S, a fractional part e and an exponent part f, wherein the sign bit S occupies the most significant bit, the fractional part is also called a rank code and occupies the middle 8 bits, and the exponent part f is also called a mantissa and occupies the lower 23 bits.

Specifically, the floating-point number standard formula is: y = (-1) ^S *(1.f)*2 ^E Wherein y is the logarithmic power; s is the sign bit of the floating-point number power; e is the decimal of the floating-point number power; e = E ^-127 (ii) a f is the exponent of the floating point number, obviously, the power value of the signal is positive, then (-1) ^S Can be considered as 1. Therefore, the above standard formula can be converted into: x = (1.f) × 2 ^E . From a logarithmic formula it can be deduced that: y =10.0 log ₁₀ x, i.e., y =10.0 log ₁₀ (1.f*2 ^E ) Finally, the integer power can be converted to logarithmic power: y =10.0 log ₁₀ (1.f)+E*(10.0*log ₁₀ 2.0)。

Step 203: and calculating the power value of the index part according to a displacement formula to obtain an index power decibel value.

Specifically, the electronic device converts integer power to floating-point power, wherein the index portion of the floating-point power is E × (10.0 × log) ₁₀ 2.0 B may be noted as B × E, B is a constant, about 3.0103, which is typically taken as an integer of 3,b × E =3 × E, and can be expressed by the shift formula: b C = C + (C < 1) is simplified, which is equivalent to B E = E + (E < 1), (E < 1) represents that the integer E is shifted left by 1 bit, which is equivalent to multiplying E by 2, and the calculated amount is simplified.

Step 204: and obtaining a decimal power decibel value corresponding to the decimal part power through table lookup.

Specifically, the discussion of step 102 may be referred to for the relevant discussion of obtaining the decibel value of the fractional power corresponding to the fractional power through table lookup, and will not be described in detail herein.

Step 205: and adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

Specifically, the decimal power decibel value and the exponential power decibel value are added to obtain the relevant discussion of the total power decibel value corresponding to the signal, which is referred to the discussion of step 104 and will not be described in detail herein.

On the basis of the foregoing embodiments, as an optional embodiment, the power calculation method further includes:

and transforming the fractional part power according to a transformation formula to obtain the transformed fractional part power, substituting the transformed fractional part power into an inverse hyperbolic tangent formula to obtain a transformed fractional part power value, and substituting the transformed fractional part power value into the transformation formula to obtain a fractional power decibel value.

The inverse hyperbolic tangent formula in the embodiment of the application is a core formula applied to a CORDIC algorithm, namely a coordinate rotation digital calculation method, and is mainly used for calculating trigonometric functions, hyperbolas, fractions and logarithms.

Specifically, the electronic device converts the integer power to a logarithmic power comprising a fractional power and an exponential power, wherein the fractional power can be directly calculated by the CORDIC algorithm. Firstly according to a deformation formula

The power of the decimal part is modified to obtain the modified decimal part

Wherein ln2, log ₁₀ e are constants and values can be stored in advance. Then according to the inverse hyperbolic tangent formula

The fractional part after modification

Substituting to obtain:

wherein the content of the first and second substances,

whereby the fractional part of the power log can be reduced ₁₀ (1.f) is converted to the computation of the inverse hyperbolic tangent function, acrtanh ().

In the embodiment of the application, the precision of logarithm calculation through the CORDIC algorithm is high, the result can be obtained without table lookup, and memory resources are not consumed, but if the CORDIC algorithm is realized in an FPGA, more logic unit resources are consumed due to the fact that addition and subtraction and shift operations are required for multiple times, and certain delay exists.

In the embodiment of the application, the electronic equipment converts the integer power of a signal into logarithmic power, the logarithmic power comprises fractional power and exponential power, the fractional power is calculated through a table look-up method to obtain fractional power decibel values, the exponential power decibel values corresponding to the exponential power are calculated, and the fractional power decibel values and the exponential power decibel values are added to obtain total power decibel values corresponding to the signal; compared with a simple table look-up method, the table look-up depth is shallow, the consumed storage resources are less, and the storage capacity of the electronic equipment in the logarithm calculation process is further reduced; converting the integer power of the signal into floating point power according to a floating point standard formula, and converting the floating point power into logarithmic power according to a logarithmic formula; the accuracy of calculation can be further improved; calculating the power value of the index part according to a displacement formula to obtain an index power decibel value; by shifting the calculation index part power value, the calculation amount can be further reduced; calculating a decimal power decibel value corresponding to the decimal part power according to a CORDIC algorithm; compared with the method of calculating the decimal power decibel value by using a table look-up method, the storage capacity of the electronic equipment can be reduced; setting the table look-up depth, the table look-up address and the bit width of the output data according to the preset precision; the storage resources of the electronic equipment can be further reasonably distributed; modifying the fractional part power according to a modification formula to obtain modified fractional part power, substituting the modified fractional part power into an inverse hyperbolic tangent formula to obtain a modified fractional part power value, and substituting the modified fractional part power value into the modification formula to obtain a fractional power decibel value; the memory capacity of the electronic device can be further reduced.

Referring to fig. 4, a schematic structural diagram of a power computing device according to an exemplary embodiment of the present application is shown. Such a power calculation means may be implemented as all or part of a system in software, hardware or a combination of both. The power calculation apparatus 1 includes: the device comprises a logarithmic power obtaining module 11, a fractional part power calculating module 12, an exponential part power calculating module 13 and a total power decibel value calculating module 14.

A logarithmic power obtaining module 11, configured to convert the integer power of the signal into a logarithmic power, where the logarithmic power includes a fractional power and an exponential power;

a decimal part power calculating module 12, configured to calculate the decimal part power through a table lookup method to obtain a decimal power decibel value; an exponent part power calculating module 13, configured to calculate an exponent power decibel value corresponding to the exponent part power;

and a total power decibel value calculation module 14, configured to add the decimal power decibel value to the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

Optionally, the power calculation apparatus 1 further includes: a memory setup module.

And the memory setting module is used for setting the table look-up depth, the table look-up address and the output data bit width according to the preset precision.

Optionally, the logarithmic power obtaining module 11 includes: a floating point type power conversion unit and a logarithmic power conversion unit.

The floating point type power conversion unit is used for converting the integer power of the signal into the floating point type power according to a floating point number standard formula;

and the logarithmic power conversion unit is used for converting the floating point number power into the logarithmic power according to a logarithmic formula.

Optionally, the exponent section power calculating module 13 includes: and a shift calculating unit.

And the displacement calculation unit is used for calculating the power value of the exponential part according to a displacement formula to obtain the decibel value of the exponential power.

Optionally, the fractional part power calculating module 12 includes: a table look-up power calculation unit and a CORDIC algorithm power calculation unit.

The table look-up method power calculation unit is used for obtaining a decimal power decibel value corresponding to the decimal part power through table look-up; and the CORDIC algorithm power calculating unit is used for calculating a decimal power decibel value corresponding to the decimal part power according to the CORDIC algorithm.

Optionally, the CORDIC algorithm power calculating unit includes: the decimal part power modification subunit, the decimal part power value obtaining subunit and the decimal power decibel value obtaining subunit.

The fractional part power modification subunit is used for modifying the fractional part power according to a modification formula to obtain the modified fractional part power;

the fractional part power value obtaining subunit is used for substituting the modified fractional part power into an inverse hyperbolic tangent formula to obtain a modified fractional part power value;

and the decimal power decibel value obtaining subunit is used for substituting the deformed decimal part power value into a deformation formula to obtain a decimal power decibel value.

It should be noted that, when the power calculation apparatus provided in the foregoing embodiment executes the power calculation method, only the division of the functional modules is illustrated, and in practical applications, the above function distribution may be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules, so as to complete all or part of the functions described above. In addition, the power calculating device and the power calculating method provided by the above embodiments belong to the same concept, and details of implementation processes thereof are referred to in the method embodiments and are not described herein again.

An embodiment of the present application further provides a computer storage medium, where the computer storage medium may store a plurality of instructions, where the instructions are suitable for being loaded by a processor and executing the power calculation method according to the embodiment shown in fig. 1 to fig. 3, and a specific execution process may refer to specific descriptions of the embodiment shown in fig. 1 to fig. 3, which is not described herein again.

Please refer to fig. 5, which is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. As shown in fig. 5, the electronic device 1000 may include: at least one processor 1001, at least one network interface 1004, a user interface 1003, memory 1005, at least one communication bus 1002.

Wherein a communication bus 1002 is used to enable connective communication between these components.

The user interface 1003 may include a Display screen (Display) and a Camera (Camera), and the optional user interface 1003 may also include a standard wired interface and a wireless interface.

The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface), among others.

Processor 1001 may include one or more processing cores, among other things. The processor 1001, which is connected to various parts throughout the electronic device 1000 using various interfaces and lines, performs various functions of the electronic device 1000 and processes data by executing or executing instructions, programs, code sets, or instruction sets stored in the memory 1005 and calling data stored in the memory 1005. Alternatively, the processor 1001 may be implemented in at least one hardware form of Digital Signal Processing (DSP), field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 1001 may integrate one or more of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a modem, and the like. Wherein, the CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is used for rendering and drawing the content required to be displayed by the display screen; the modem is used to handle wireless communications. It is understood that the modem may not be integrated into the processor 1001, but may be implemented by a single chip.

The Memory 1005 may include a Random Access Memory (RAM) or a Read-Only Memory (Read-Only Memory). Optionally, the memory 1005 includes a non-transitory computer-readable medium. The memory 1005 may be used to store an instruction, a program, code, a set of codes, or a set of instructions. The memory 1005 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing the various method embodiments described above, and the like; the storage data area may store data and the like referred to in the above respective method embodiments. The memory 1005 may alternatively be at least one memory device located remotely from the processor 1001. As shown in fig. 5, the memory 1005, which is a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program of a method of power calculation therein.

It should be noted that: in the above embodiment, when the device implements the functions thereof, only the division of the functional modules is illustrated, and in practical applications, the functions may be distributed by different functional modules according to needs, that is, the internal structure of the device may be divided into different functional modules to implement all or part of the functions described above. In addition, the apparatus and method embodiments provided by the above embodiments belong to the same concept, and specific implementation processes thereof are described in the method embodiments for details, which are not described herein again.

In the electronic device 1000 shown in fig. 5, the user interface 1003 is mainly used as an interface for providing input for a user, and acquiring data input by the user; and the processor 1001 may be used to invoke an application program in the memory 1005 that stores a method of power calculation that, when executed by the one or more processors, causes the electronic device to perform the method as described in one or more of the above embodiments.

An electronic device readable storage medium having instructions stored thereon. When executed by one or more processors, cause an electronic device to perform a method as described in one or more of the above embodiments.

It is clear to a person skilled in the art that the solution of the present application can be implemented by means of software and/or hardware. The term "unit" and "module" in this specification refers to software and/or hardware capable of performing a specific function independently or in cooperation with other components, wherein the hardware may be, for example, a Field-ProgrammaBLE Gate Array (FPGA), an Integrated Circuit (IC), or the like.

It should be noted that for simplicity of description, the above-mentioned embodiments of the method are described as a series of acts, but those skilled in the art should understand that the present application is not limited by the described order of acts, as some steps may be performed in other orders or simultaneously according to the present application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implementing, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some service interfaces, devices or units, and may be an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method described in the embodiments of the present application. And the aforementioned memory comprises: various media capable of storing program codes, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.

Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash disks, read-Only memories (ROMs), random Access Memories (RAMs), magnetic or optical disks, and the like.

The above description is only an exemplary embodiment of the present disclosure, and the scope of the present disclosure should not be limited thereby. That is, all equivalent changes and modifications made in accordance with the teachings of the present disclosure are intended to be included within the scope of the present disclosure. Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains.

Claims

1. A power calculation method applied to an electronic device, the method comprising:

2. The method of claim 1, wherein converting the shaped power of the signal to logarithmic power comprises:

converting the integral power of the signal into floating point power according to a floating point number standard formula;

3. The method of claim 2, wherein the floating point number standard formula is:

；

wherein y is the logarithmic power; s is the sign bit of the floating point number power; e is the exponent of the floating point number power; e =

(ii) a f is the fractional part of the floating point number;

the logarithmic formula is:

；

in the formula (I), the compound is shown in the specification,

is the fractional part power;

is an exponential partial power.

4. The method according to claim 1, wherein the calculating an exponential power decibel value corresponding to the exponential partial power comprises:

calculating the power of the index part according to a displacement formula to obtain the decibel value of the index power;

the shift formula is:

；

wherein B is a constant of the exponential partial power; c is the fraction of the exponential-part power value.

5. The method of claim 1, wherein prior to converting the shaped power of the signal to logarithmic power, further comprising:

6. The method of power computation of claim 1, further comprising:

7. The method according to claim 6, wherein the calculating the decibel value of the fractional power corresponding to the fractional part power according to the CORDIC algorithm comprises:

modifying the fractional part power according to a modification formula to obtain modified fractional part power;

the variant formula is:

；

wherein y is a decimal power decibel value;

fractional part power;

the fractional part power value after the modification is adopted;

the inverse hyperbolic tangent formula is as follows:

in the formula (I), the compound is shown in the specification,

8. a power computation apparatus, the apparatus comprising:

a logarithmic power obtaining module (11) for converting the integer power of the signal into a logarithmic power, the logarithmic power comprising a fractional part power and an exponential part power;

a decimal part power calculation module (12) for acquiring a decimal power decibel value corresponding to the decimal part power;

the index part power calculating module (13) is used for calculating an index power decibel value corresponding to the index part power;

and a total power decibel value calculation module (14) for adding the decimal power decibel value and the exponential power decibel value to obtain a total power decibel value corresponding to the signal.

9. A computer readable storage medium having stored thereon a plurality of instructions adapted to be loaded by a processor and to perform the method of any of claims 1~7.

10. An electronic device (1000), comprising:

a processor (1001) and a memory (1005);

wherein the memory (1005) stores a computer program adapted to be loaded by the processor (1001) and to perform the method steps of any of claims 1~7.