CN115811897A - Display panel and electronic device - Google Patents

Abstract

The embodiment of the application provides a display panel and electronic equipment, relates to and shows technical field, can improve the separation effect of wall portion to water oxygen. A display panel, comprising: the display device comprises a display area and an opening area, wherein the opening area comprises an opening and a partition area, and the partition area is positioned between the opening and the display area; the display panel comprises a circuit layer, a planarization layer, an anode layer and a light emitting layer which are sequentially stacked in a display area; the planarization layer is provided with a first partition structure in the partition area, and the side surface of the first partition structure is provided with a groove; the anode layer is provided with a second partition structure positioned at the top end of the first partition structure in the partition area, and the first partition structure and the second partition structure form a partition part; the display panel is provided with a base layer in the partition area, and the partition part is a raised structure relative to the base layer; the light emitting layer includes a first portion on a surface of the partition and a second portion on a surface of the base layer outside the partition in the partition area, with a space therebetween in a direction perpendicular to a plane of the display panel.

Description

Display panel and electronic device

Technical Field

The present application relates to the field of display technologies, and in particular, to a display panel and an electronic device.

Background

With the development of display technology, the screen occupation ratio of electronic devices such as mobile phones is increasing, and in order to further increase the screen occupation ratio and provide mobile phones with front-facing cameras, a technology for forming holes in a display panel to install optical devices such as front-facing cameras is being developed. In order to prevent water and oxygen from entering the display area from the opening of the display panel and avoid the problem of black spots caused by the corrosion of the water and oxygen to the display panel, a partition part is arranged between the opening and the display area to block the water and oxygen, however, the blocking effect of the partition part on the water and oxygen is poor at present.

Disclosure of Invention

A display panel and an electronic device are provided, which can improve the blocking effect of a blocking part on water and oxygen.

In a first aspect, a display panel is provided, including: the display device comprises a display area and an opening area, wherein the opening area comprises an opening and a partition area, and the partition area is positioned between the opening and the display area; the display panel comprises a circuit layer, a planarization layer, an anode layer and a light emitting layer which are sequentially stacked in a display area; the planarization layer is provided with a first partition structure in the partition area, the first partition structure comprises a top surface and a bottom surface which are opposite in the direction vertical to the plane of the display panel, and a side surface connecting the top surface and the bottom surface, and the side surface of the first partition structure is provided with a groove; the anode layer is provided with a second partition structure positioned at the top end of the first partition structure in the partition area, and the first partition structure and the second partition structure form a partition part; the display panel is provided with a base layer in the partition area, and the partition part is a raised structure relative to the base layer; the light emitting layer comprises a first part on the surface of the partition and a second part on the surface of the base layer outside the partition in the partition area, and a gap is formed between the first part and the second part in a direction perpendicular to the plane of the display panel. The first partition structure is manufactured around the opening by utilizing the planarization layer, the second partition structure is manufactured on the top of the first partition structure by utilizing the anode layer, the side face of the first partition structure is provided with the groove, the partition of the light-emitting layer is realized through the partition part formed by the first partition structure and the second partition structure, the partition effect of the light-emitting layer is improved, namely, the barrier effect of water and oxygen is improved, and the problem of black spots caused by the fact that the water and oxygen invade into the display area is solved. The partition part made of the flattening layer and the anode layer has larger thickness, is not easy to collapse, is not easy to form the climbing of the luminescent layer on the edge, and has better partition effect on the luminescent layer; the time consumption of the manufacturing process is short; and the process control difficulty is low.

In a possible embodiment, the depth of the groove on the side surface of the first partition structure is L, and L is more than or equal to 0.8 mu m and less than or equal to 1.2 mu m. On the one hand, the blocking effect on the luminous layer is improved, and on the other hand, the probability that the packaging layer cracks at the groove is reduced, so that the packaging isolation effect is improved.

In one possible embodiment, the thickness of the first partition structure is H,1.5 μm ≦ H ≦ 2.5 μm. The whole thickness of the display panel is controlled on the premise of ensuring that the packaging layer covers and fills around the first partition structure with better effect

In one possible embodiment, the partition extends along the edge of the opening, the width of the partition is W, and W is greater than or equal to 10 μm and less than or equal to 15 μm.

In one possible embodiment, the thickness of the second partition structure is h, and h is greater than or equal to 100nm and less than or equal to 120nm. The second partition structure is large in thickness and not easy to collapse.

In a possible embodiment, the spacing distance between any two adjacent partitions is M, and M is less than or equal to 10 μ M and less than or equal to 15 μ M. The organic material between the partition parts is easy to clean, the adverse effect on the partition effect of the luminescent layer caused by residue is improved, and the space utilization rate is improved.

In one possible implementation manner, the circuit layer comprises a semiconductor layer, a gate insulating layer, a gate metal layer, a capacitor dielectric layer, a capacitor metal layer, an interlayer insulating layer and a source drain metal layer which are sequentially stacked; the grid metal layer and/or the capacitance metal layer are/is provided with a padding structure in the partition area, and the padding structure is positioned below the partition part. The step difference between the luminescent layer at the top end of the partition part and the luminescent layer outside the partition part is larger through the heightening structure, so that the partition effect of the luminescent layer is improved.

In a possible embodiment, the display panel further includes a cathode layer located at a side of the light emitting layer away from the anode layer, and an encapsulation layer located at a side of the cathode layer away from the light emitting layer in the display area; the packaging layer comprises a first packaging inorganic layer, an ink-jet printing layer and a second packaging inorganic layer which are sequentially stacked; the display panel is provided with an ink-jet printing partition part in the partition area, and the ink-jet printing layer extends from the display area to the ink-jet printing partition part in the partition area; the partition part comprises an outer partition part and an inner partition part, the ink-jet printing partition part is positioned between the outer partition part and the inner partition part, the inner partition part is positioned between the ink-jet printing partition part and the display area, the outer partition part is positioned between the opening and the ink-jet printing partition part, the first packaging inorganic layer, the ink-jet printing layer and the second packaging inorganic layer cover the inner partition part, the first packaging inorganic layer and the second packaging inorganic layer cover the outer partition part, and the ink-jet printing layer is not overlapped with the outer partition part.

In one possible embodiment, the anode layer comprises indium tin oxide, silver and indium tin oxide, arranged in a stack in that order.

In one possible embodiment, the display panel further includes: and the flexible substrate layer is positioned on one side of the circuit layer, which is far away from the planarization layer, and covers the display area and the partition area.

In one possible embodiment, the flexible substrate layer includes a first polyimide layer, an isolation layer, an amorphous silicon layer, and a second polyimide layer, which are sequentially stacked.

In a second aspect, an electronic device is provided, which includes the display panel.

Drawings

FIG. 1 is a schematic cross-sectional view of a display panel according to the related art;

fig. 2 is a schematic sectional view showing a partial region of another display panel according to the related art;

FIG. 3 is a schematic sectional view showing a partial region of another display panel according to the related art;

FIG. 4A is a schematic view of a display panel according to an embodiment of the present disclosure;

FIG. 4B is a schematic view of another display panel according to an embodiment of the present disclosure;

FIG. 5 is a cross-sectional view along direction AA' of FIG. 4A;

FIG. 6 is an enlarged partial view of the exclusion zone of FIG. 5;

FIG. 7 is an enlarged view of a portion of the area of FIG. 4A;

FIG. 8 is a schematic view of another cross-sectional structure along direction AA' in FIG. 4A;

FIG. 9 is a schematic view of another cross-sectional structure along direction AA' in FIG. 4A;

FIG. 10 is a schematic diagram of a process for forming a planarization layer on a partition region during a display panel manufacturing process according to an embodiment of the present disclosure;

FIG. 11 is a schematic diagram illustrating a first partition structure formed in a partition region during a display panel manufacturing process according to an embodiment of the present disclosure;

FIG. 12 is a schematic diagram of forming partitions in partition areas in a process of manufacturing a display panel according to an embodiment of the present disclosure.

Detailed Description

Before introducing the embodiments of the present application, several structures of the partition of the open area in the related art are first introduced, as shown in fig. 1, the display panel includes a display area 001, an open hole 002, and a partition 003 located between the display area 001 and the open hole 002, the display panel includes a substrate layer 01, a buffer layer 02, a semiconductor layer 03, a gate insulating layer 04, a gate metal layer 05, a capacitor dielectric layer 06, a capacitor metal layer 07, an interlayer insulating layer 08, a source-drain metal layer 09, a planarization layer 010, an anode layer 011, a pixel defining layer 012, a light emitting layer 013, a cathode layer 014, and an encapsulation layer 015, which are sequentially stacked in the display area 001, in the first related art, the partition 020 formed by the source-drain metal layer 09 is disposed in the partition 003, the source-drain metal layer 09 is a laminated layer formed by laminating metal titanium Ti, metal aluminum Al and metal titanium Ti, wherein a recessed structure is formed between the Al layer and the Ti layer through side etching so as to facilitate blocking of a light emitting layer, and the partition 020 is used for breaking the light emitting layer (the light emitting layer between the partition 020 and the encapsulation layer 015 is omitted in fig. 1) at the edge of the partition 020 in the manufacturing process so as to block transmission of water and oxygen based on the light emitting layer 013 through the partition 020 and prevent the water and oxygen at the edge of the opening 002 from invading and extending to the display area 001 through the light emitting layer 013, however, since the thickness of the Ti layer at the top end of the source-drain metal layer 09 is small and less than 50nm, the Ti layer is easy to collapse in the subsequent photoresist stripping and water washing processes, and the partition effect on the light emitting layer is poor; the thickness of the source-drain metal layer 09 is small, and the light-emitting layer is likely to form a climbing slope at the edge of the partition 020, which is likely to cause partition failure of the light-emitting layer. As shown in fig. 2, in the second related art, a partition 020 formed by a part of the substrate layer 01 and the buffer layer 02 is disposed in the partition region 003, the substrate layer 01 in the partition 020 is partially made of Polyimide (PI), and in the process of manufacturing the partition 020, it is necessary to first etch down by oxygen to obtain a PI protrusion, and then etch a side surface of the PI protrusion to form a groove of the side surface, which is time-consuming in the process. As shown in fig. 3, in the third related art, a partition 020 formed by an inorganic layer 030 and a planarization layer 010 is disposed in a partition region 003, where the inorganic layer 030 may be a film layer in the buffer layer 02, the gate insulating layer 04, the capacitor dielectric layer 06, and the interlayer insulating layer 08, and in the process of fabricating the partition 020, a groove needs to be formed by etching a side surface of the raised inorganic layer 030 to partition the light emitting layer, but the difficulty of controlling the etching process on the side surface of the inorganic layer 030 is large. The display panel in the embodiment of the present application will be explained below.

As shown in fig. 4A, 4B, 5, 6, and 7, an embodiment of the present application provides a display panel including: a display area 1 and an opening area 2, the display area 1 being disposed around or half-around the opening area 2, for example, in fig. 4A, the display area 1 surrounds the opening area 2, in fig. 4B, the display area 1 half-surrounds the opening area 2, the opening area 2 includes an opening 21 and a blocking area 22, and the blocking area 22 is located between the opening 21 and the display area 1; the display panel comprises a circuit layer 3, a planarization layer 4, an anode layer 5, a light-emitting layer 6, a cathode layer 7 and a packaging layer 8 which are sequentially stacked in a display area 1; the planarization layer 4 is provided with a first partition structure 11 in the partition region 22, the first partition structure 11 comprises a top surface and a bottom surface which are opposite in a direction perpendicular to the plane of the display panel, and a side surface connecting the top surface and the bottom surface, and the side surface of the first partition structure 11 is provided with a groove; the anode layer 5 is provided with a second partition structure 12 positioned at the top end of the first partition structure 11 in the partition region 22, the first partition structure 11 and the second partition structure 12 form a partition 10, and the cross-sectional view structure of the partition 10 can be mushroom-head-shaped; the display panel has a base layer 201 in the partition region 22, and the partition 10 is a raised structure relative to the base layer 201; the light emitting layer 6 includes a first portion 61 on the surface of the partition 10 and a second portion 62 on the surface of the base layer 201 outside the partition 10 in the partition region 22, and the first portion 61 and the second portion 62 have a space therebetween in a direction perpendicular to the plane of the display panel even if the light emitting layer 6 is broken at the edge of the partition 10 in the partition region 22. The planarization layer 4 may be made of an organic material, and the anode layer 5 may be a metal material or a composite film of metal and other materials. In the display area 1, the planarisation layer 4 is used to provide a planarisation surface for the anode layer 5 to facilitate light extraction, and the cathode layer 7 is used to provide electrons for the light emitting layer 6. The base layer 201 located in the partition region 22 may be formed as a part of a film layer in the circuit layer 3, or may be formed as a part of a film layer below the circuit layer 3, for example, in the structures shown in fig. 5 and fig. 6, the base layer 201 includes the flexible substrate layer 20 and the buffer layer 30 located in the partition region 22, and the embodiment of the present application is not limited to the specific composition of the base layer 201.

Specifically, the partition 10 may be a dam or a dam structure extending along the edge of the opening 21, so that the light emitting layer 6 is blocked by the partition 10 in the partition region 22, and a continuous film layer from the opening 21 to the display region 1 cannot be formed, and the number of the partitions 10 may be one or more, and the number of the partitions 10 in the embodiment of the present application is not limited, for example, for a circular opening 21, the partition 10 may be disposed around the circular opening 21, that is, in the partition region 22, and if there are a plurality of partitions 10, that is, each partition 10 forms a ring-shaped structure around the opening 21, a plurality of ring-shaped partitions 10 around the opening 21 are formed. In the manufacturing process of the display panel, the light emitting layer 6 is manufactured after the partition 10 is manufactured, so that in the partition region 22, since the partition 10 forms a protrusion with respect to the base layer 201, in the process of forming the light emitting layer 6, the first portion 61 of the light emitting layer 6 is formed on the top end of the partition 10 and the second portion 62 is formed on the surface of the base layer 201 except for the partition 10 in the partition region 22, so that the first portion 61 on the top end of the partition 10 and the second portion 62 except for the partition 10 are disconnected due to the protrusion step difference of the partition 10 itself. Moreover, since the side surfaces of the first partition structures 11 are provided with the grooves, the connection between the first portion 61 of the light-emitting layer 6 at the top end of the partition 10 and the second portion 62 of the light-emitting layer 6 outside the partition 10 is further obstructed, and the breaking effect of the light-emitting layer 6 at the edge of the partition 10 is enhanced. By the disconnection of the light emitting layer 6, it is possible to prevent the water oxygen of the opening 21 from invading through the light emitting layer 6 and extending to the display region 1 to cause the black spot problem. The part of the planarization layer 4 in the display area 1 needs to be patterned to form a via hole, and the electrical connection between the anode layer 5 and the circuit layer 3 is realized through the via hole on the planarization layer 4, so that a protrusion structure (the protrusion structure is used for forming the first partition structure 11 in the subsequent process) can be synchronously formed in the partition area 22 in the process of patterning the planarization layer 4, then the anode layer 5 is manufactured, and the part of the anode layer 5 in the display area 1 needs to be patterned to form an anode pattern corresponding to each light emitting device, so that the pattern of the second partition structure 12 can be synchronously formed in the partition area 22 in the process of patterning the anode layer 5, and then the structure of the second partition structure 12 is used as a mask, the side surface of the protrusion structure is etched through oxygen, and a groove facing inwards is formed, so that the first partition structure 11, namely the partition portion 10 is formed, thus, most of the patterning process of the partition portion 10 and the patterning process of the corresponding film layer in the display area 1 are realized through the same patterning process, and the additional patterning process of the first partition structure 11 only needs to be performed outside, so that the additional etching process is less difficult and the manufacturing process is simple. Compared with the first related art shown in fig. 1, the second partition structure 12 in the embodiment of the present application has the same thickness as the anode in the light emitting device, and is larger in thickness and less prone to collapse; in addition, the overall thickness of the planarization layer 4 and the anode layer 5 in the partition portion 10 is large, so that the light-emitting layer 6 is not likely to form a slope at the edge of the partition portion 10 to cause partition failure, and the partition effect on the light-emitting layer 6 can be more effectively improved. Compared with the second related art shown in fig. 2, in the manufacturing process of the partition 10 in the embodiment of the present application, the main patterning process can be performed by the same communication process as the patterning process of the display region 1 itself, and only the side surface of the first partition structure 11 needs to be additionally etched, so that the time consumption of the process is short. Compared with the third related art shown in fig. 3, in the embodiment of the present application, the second partition structure 12 may be used as a mask for performing oxygen etching on the groove on the side surface of the first partition structure 11, so that the difficulty of process control is low, and a groove meeting requirements may be manufactured more easily, so as to improve the partition effect on the light emitting layer 6 by using the groove.

The display panel in the embodiment of the application utilizes the planarization layer to manufacture a first partition structure around the opening, utilizes the anode layer to manufacture a second partition structure at the top of the first partition structure, wherein the side surface of the first partition structure is provided with the groove, and the partition part formed by the first partition structure and the second partition structure realizes the partition of the luminescent layer, thereby improving the partition effect of the luminescent layer, namely improving the separation effect of water and oxygen, and improving the black spot problem caused by the intrusion of water and oxygen into the display area. The partition part manufactured by the flattening layer and the anode layer has larger thickness, is not easy to collapse, is not easy to form the climbing of the luminous layer on the edge, and has better partition effect on the luminous layer; the time consumption of the manufacturing process is short; and the process control difficulty is low.

In some embodiments of the present application, the depth of the groove on the side surface of the first partition structure 11 is L, which may range from 0.8 μm L1.2 μm. The depth L of the groove on the side surface of the first partition structure 11 has a large influence on the partition effect of the light emitting layer 6, and through experiments, if the depth L of the groove is less than 0.8 μm, the light emitting layer 6 is easy to form a climbing slope on the side surface of the partition portion 10 in the subsequent process of manufacturing the light emitting layer 6, so that the light emitting layer 6 on the top end of the partition portion 10 and the light emitting layer 6 outside the partition portion 10 may be connected through the climbing slope on the side surface; on the other hand, after the partition 10 and the light-emitting layer 6 are formed, the encapsulating layer 8 is formed, and the partition 10 is covered with the encapsulating layer 8 in the partition region 22 to further block the intrusion and transmission of water and oxygen. If the depth L of the side grooves of the first partition structure 11 is greater than 1.2 μm, the corners of the encapsulation layer 8 at the side grooves of the first partition structure 11 are large and are easily cracked, thereby reducing the encapsulation isolation effect. Therefore, in the embodiment of the present application, the depth L of the side groove of the first partition structure 11 is set to be in a range of 0.8 μm or more and L or less than 1.2 μm, so that on one hand, the blocking effect on the light emitting layer 6 is improved, and on the other hand, the probability of cracking of the encapsulation layer 8 at the groove is reduced, so as to improve the encapsulation isolation effect.

In some embodiments of the present application, the thickness of the first partition structure 11 is H, which may range from 1.5 μm to 2.5 μm. The thickness in the embodiment of the application refers to the dimension in the plane direction perpendicular to the display panel, and the thickness H of the first partition structure 11 is too small, which easily causes the poor covering and filling effect of the encapsulation layer 8; the thickness H of the first partition structure 11 is too large, which may result in a large overall thickness of the display panel, and is not favorable for improving the space utilization rate. Therefore, the range of the rear end H of the first partition structure 11 in the embodiment of the present application is moderate, and the overall thickness of the display panel is controlled on the premise that the effect of covering and filling the encapsulation layer 8 around the first partition structure 11 is good.

In some embodiments of the present application, the partition 10 extends along the edge of the opening 21, the width of the partition 10 is W, which may range from 10 μm W15 μm, and the width W of the partition 10 refers to the dimension of the partition 10 in the direction perpendicular to the extending direction thereof.

In some embodiments of the present application, the thickness of the second partition structure 12 is h, which may range from 100nm ≦ h ≦ 120nm. The second partition structure 12 has a large thickness and is not easily collapsed.

In other embodiments of the present application, a display panel may include: the spacing distance between any two adjacent partition parts 10 is M, and M is more than or equal to 10 mu M and less than or equal to 15 mu M. If the distance between the partition portions 10 is too small, the first partition structure 11 of the organic material is not easily cleaned, and may remain between the partition portions 10, thereby adversely affecting the partition effect of the light emitting layer 6; if the distance between the partitions 10 is too large, the overall space utilization rate is low, and the number of partitions 10 that can be provided in a limited space is small, which may adversely affect the partition effect of the light-emitting layer 6. Therefore, setting M to be not less than 10 μ M and not more than 15 μ M makes the organic material between the partition parts 10 easy to clean, improves the adverse effect on the partition effect of the light-emitting layer 6 caused by residue, and improves the space utilization rate.

In some embodiments of the present application, as shown in fig. 8, the circuit layer 3 includes a semiconductor layer 31, a gate insulating layer 32, a gate metal layer 33, a capacitor dielectric layer 34, a capacitor metal layer 35, an interlayer insulating layer 36, and a source-drain metal layer 37, which are sequentially stacked; the gate metal layer 33 and/or the capacitor metal layer 35 have a pad-up structure 9 in the partition region 22, that is, the pad-up structure 9 may be formed by the gate metal layer 33 or the capacitor metal layer 35, the pad-up structure 9 may also be formed by the gate metal layer 33 and the capacitor metal layer 35, the pad-up structure 9 is located below the partition portion 10, an inorganic layer 91 may be disposed between the pad-up structure 9 and the planarization layer 4, and the inorganic layer 91 may be one or more of the gate insulating layer 32, the capacitor dielectric layer 34 and the interlayer insulating layer 36. The elevated structure 9 is arranged below the partition part 10, and the elevated structure 9 is not arranged outside the partition part 10, so that the step difference between the light-emitting layer 6 at the top end of the partition part 10 and the light-emitting layer 6 outside the partition part 10 is larger through the elevated structure 9, and the partition effect of the light-emitting layer 6 is improved. Since the source-drain metal layer 37 is adjacent to the planarization layer 4, it is difficult to realize the source-drain metal layer 37 as a raised structure in terms of process, so that the raised structure 9 may be formed by using the gate metal layer 33 or the capacitor metal layer 35.

Specifically, the semiconductor layer 31 is used to form a channel pattern of a transistor and a wiring pattern in a circuit; the material of the gate insulating layer 32 may be silicon oxide SiO ₂ A thickness of, for example, 120nm, for achieving an insulating effect between the transistor gate and the semiconductor layer 31; the material of the gate metal layer 33 may be molybdenum Mo, for example, 220nm thick, and is used to form a gate pattern of a transistor and a lower electrode pattern of a capacitor, in an embodiment where the elevated structure 9 is not required, the gate metal layer 33 may be removed from the blocking region 22, and in an embodiment where the elevated structure 9 is required, the blocking region 22 may only remain the gate metal layer 33 pattern used to form the elevated structure 9; capacitor dielectricThe material of layer 34 may be silicon nitride SiN _x A thickness of, for example, 130nm, functioning as a capacitive medium; the material of the capacitor metal layer 35 may be Mo metal, for example, 220nm thick, and is used to form an upper electrode pattern of a capacitor, in an embodiment that does not require the step-up structure 9, the capacitor metal layer 35 may be removed from the partition region 22, and in an embodiment that requires the step-up structure 9, the partition region 22 may only retain the capacitor metal layer 35 pattern used to form the step-up structure 9; the interlayer insulating layer 36 may be a composite film layer, such as SiO ₂ A film layer with a thickness of 300nm and a silicon nitride SiN layer on the film layer _x The thickness of the film layer is 200nm, the interlayer insulating layer 36 can be used for insulating a gate electrode of the transistor and the source drain metal layer 37, and can provide H atoms for a polycrystalline silicon channel in the semiconductor layer 31 to fill in defects; the source-drain metal layer 37 may be a composite film layer of metal titanium Ti, metal aluminum Al, and metal titanium Ti, the thicknesses of the three layers may be 50nm,650nm, and 50nm, respectively, that is, the thickness of the Ti layer is 50nm, the thickness of the Al layer is 650nm, the source-drain metal layer 37 is used to form a metal trace, and is used to provide current for an anode of a light emitting device, control the light emitting brightness of the light emitting device, and the source-drain metal layer 37 may be removed from the partition region 22. In the structure shown in fig. 8, the base layer 201 includes the flexible substrate layer 20, the buffer layer 30, and the inorganic layer 91 at the exclusion area 22.

In one possible embodiment, as shown in fig. 9, the display panel includes a cathode layer 7 on the side of the light emitting layer 6 away from the anode layer 5, and an encapsulation layer 8 on the side of the cathode layer 7 away from the light emitting layer 6 in the display area 1; the encapsulation layer 8 includes a first encapsulation inorganic layer 81, an inkjet printing layer 80, and a second encapsulation inorganic layer 82, which are sequentially stacked; the display panel is provided with an ink jet printing partition part 13 in a partition area 22, and an ink jet printing layer 80 extends from the display area 1 to the ink jet printing partition part 13 in the partition area 22; the partition part 10 comprises an outer partition part 101 and an inner partition part 102, the inkjet printing partition part 13 is located between the outer partition part 101 and the inner partition part 102, the inner partition part 102 is located between the inkjet printing partition part 13 and the display area 1, the outer partition part 101 is located between the opening 21 and the inkjet printing partition part 13, the first encapsulation inorganic layer 81, the inkjet printing layer 80 and the second encapsulation inorganic layer 82 cover the inner partition part 102, the first encapsulation inorganic layer 81 and the second encapsulation inorganic layer 82 cover the outer partition part 101, and the inkjet printing layer 80 does not overlap with the outer partition part 101.

Specifically, the material of the first encapsulation inorganic layer 81 may be silicon oxynitride SiON, the thickness may range from 0.8 μm to 1 μm (inclusive), and the material of the second encapsulation inorganic layer 82 may be silicon nitride SiN _x The thickness may range from 1 μm to 1.2 μm (inclusive), the first inorganic encapsulating layer 81 and the second inorganic encapsulating layer 82 are used to ensure that the light emitting device and the cathode are not invaded by water and oxygen, and the first inorganic encapsulating layer 81 and the second inorganic encapsulating layer 82 cover the partition region 22 to form a better encapsulation barrier effect. The inkjet printing layer 80 is made of an organic material, the thickness range of the inkjet printing layer 80 can be 10 μm to 12 μm (including an extreme value), and the inkjet printing layer 80 is used for achieving planarization and a certain foreign matter wrapping effect and improving the packaging performance. The inkjet printing partition 13 is used to prevent overflow of the inkjet printing layer 80, and achieve a better edge sealing effect.

In one possible embodiment, the anode layer 5 includes Indium Tin Oxide (ITO), silver Ag, and Indium Tin Oxide (ITO) stacked in this order, and the thicknesses of the three layers may be 10nm,100nm, and 7nm from bottom to top, i.e., from the direction gradually away from the circuit layer 3.

In one possible embodiment, the display panel further includes: a flexible substrate layer 20 on the side of the circuit layer 3 remote from the planarisation layer 4, the flexible substrate layer 20 covering the display area 1 and the exclusion areas 22.

In one possible embodiment, the flexible substrate layer 20 comprises a first polyimide layer, an isolating layer barrier, an amorphous silicon layer and a second polyimide layer, arranged in succession one above the other.

Specifically, the thickness of the first polyimide layer may be 10 ± 1 μm, and the isolation layer may be SiO ₂ The material may have a thickness of 650nm, for example, the amorphous silicon a-Si layer may have a thickness of 5nm, and the second polyimide layer may have a thickness of 10 ± 1 μm. In addition, a buffer layer 30 may be further disposed between the flexible substrate layer 20 and the circuit layer 3, and the buffer layer 30 may be SiN _x And SiO ₂ The composite film layer of (1), wherein SiN _x The thickness of the film layer may be 200nm ₂ The thickness of the film layer may be 350nm. In addition, in the display region 1, a pixel definition layer 40 (PDL) is further disposed between the planarization layer 4 and the light emitting layer 6, the pixel definition layer 40 is used to form patterned openings, each of which corresponds to one light emitting device for defining a light emitting region, and the thickness of the pixel definition layer 40 ranges, for example, from 1.5 μm to 2 μm (inclusive). The thickness of the light-emitting layer 6 may be 300nm. The cathode layer 7 may be a magnesium Mg silver Ag alloy material, the thickness of the cathode layer 7 being, for example, 12nm.

The display panel in the embodiment of the present application is described below by a complete display panel manufacturing method:

step S1: cleaning the glass substrate, coating a PI material on the surface of the glass substrate, wherein the thickness of the PI material is 10 +/-1 mu m, and forming a first polyimide layer in the flexible substrate layer 20;

step S2: sequentially depositing an isolation layer, barrier and an amorphous silicon a-Si layer on the first polyimide layer by using Plasma Enhanced Chemical Vapor Deposition (PECVD) technique, wherein barrier can be SiO ₂ The thickness of the film layer is 650nm, the thickness of the a-Si (amorphous silicon) film layer can be 5nm, and the film layer can play a role in absorbing Laser Lift Off (LLO) energy in the subsequent process of peeling off the glass substrate and preventing the transistor from being damaged;

and step S3: continuously coating a PI layer with the thickness of 10 +/-1 um to form a second polyimide layer in the flexible substrate layer 20;

and step S4: depositing a buffer layer 30 on the PI by PECVD technique, the buffer layer 30 being SiN _x And SiO ₂ The composite film layer has the thicknesses of 200nm and 350nm respectively, can provide a heat preservation effect for a subsequent Excimer Laser Annealing (ELA) process, and the isolation layer and the buffer layer 30 can also play a role in isolating Na + and K + ions in the glass substrate;

step S5: depositing an amorphous silicon layer by PECVD, carrying out dehydrogenation treatment (450 ℃,2 hours), and then carrying out ELA process to realize the conversion from amorphous silicon to polycrystalline silicon, namely forming a semiconductor layer 31;

step S6: exposing, developing and etching the polycrystalline silicon to realize the patterning of a Thin Film Transistor (TFT) channel and the patterning of a wiring;

step S7: the gate insulating layer 32 is deposited by PECVD using SiO as the material ₂ The thickness is 120nm, and the function of a gate insulating layer is realized;

step S8: depositing a grid metal layer 33 made of Mo metal and having a thickness of 220nm by using a sputtering Sputter process, then performing exposure, development and etching to form a grid electrode and capacitor electrode pattern, wherein the grid electrode and capacitor electrode pattern can play a role of serving as a TFT grid electrode and a lower electrode of a capacitor, and removing the Mo metal at the edge position of the opening 21;

step S9: the capacitor dielectric layer 34 is deposited by PECVD and is made of SiN _x The thickness is 130nm, and the capacitor has the function of a capacitor dielectric layer;

step S10: depositing a capacitor metal layer 35 made of Mo metal and having a thickness of 220nm by using a Sputter process, and then performing exposure, development and etching to form an upper electrode of the storage capacitor, but removing the Mo metal at the edge position of the opening 21;

step S11: depositing an interlayer insulating layer 36 by using PECVD technology, wherein the interlayer insulating layer 36 is a composite film layer, and SiO is arranged below the composite film layer ₂ A film layer with a thickness of 300nm and SiN on the upper part _x The thickness of the film layer is 200nm, and then hydrogenation treatment is carried out (350 ℃ for 2 hours), so that the interlayer insulating layer 36 can be used for repairing a dangling bond on the surface of the polycrystalline silicon;

step S12: etching the interlayer insulating layer 36 to form a via hole required by the TFT, and then depositing a source drain metal layer 37, wherein the source drain metal layer 37 is a Ti, al and Ti composite film layer with the thickness of 50nm,650nm and 50nm respectively;

step S13: after the deposition of the source-drain metal layer 37 is finished, carrying out exposure etching development to form a metal wiring pattern, and removing the source-drain metal layer 37 at the edge position of the opening 21;

step S14: after the deposition of the source/drain metal layer 37 is completed, the planarization layer 4 is coated and exposed and developed (with a thickness of 1.5-2 um), and an anode via hole is formed in the display region 1, as shown in fig. 10, a boss of the annular planarization layer 4 is formed in the partition region 22, the width W of the boss is 10-15um, the gap M is 10-15um, the height H is 1.5-2.5um, and the display panel in fig. 10 is manufactured on the glass substrate 50;

step S15: after the planarization layer 4 is coated and patterned, an anode layer 5 is formed, the anode layer is made of an ITO/AG/ITO composite material with the thickness of 10nm,100nm and 7nm, and etching patterning is performed after deposition is completed, so that the preparation of an anode is completed, as shown in fig. 11, the ITO/AG/ITO is similarly deposited and patterned in the partition region 22, and a second partition structure 12 in the shape of a column mushroom head is formed;

step S16: after the second partition structure 12 supported by the ITO/AG/ITO material is prepared, the planarization layer 4 of the partition area 22 is subjected to side etching, oxygen etching gas is adopted, the second partition structure 12 is used as a self-aligned mask, the side etching width is 0.8-1.2mm (photoresist protection is carried out on the display area 1 in the etching process so as to avoid adverse effects on the structure of the display area 1), a groove is formed on the side surface of the boss of the planarization layer 4, a first partition structure 11 is formed as shown in FIG. 12, and a partition part 10 is formed by the first partition structure 11 and the second partition structure 12;

step S17: coating, exposing and developing the pixel definition layer 40 to obtain a thickness of 1.5-2um, wherein an opening area formed by etching the pixel definition layer 40 is a light emitting area;

step S18: coating, exposing and developing a Pixel Support (PS) layer (not shown in the figure), wherein the PS layer has a thickness of 2um, and the PS layer plays a role of supporting a superfine metal mask (FMM) during subsequent evaporation of the light-emitting layer 6, so that the light-emitting layer 6 can be conveniently manufactured based on the FMM in the subsequent process;

step S19: after the PS layer is manufactured, the light emitting layer 6 and the cathode layer 7 are formed by performing normal evaporation on the light emitting layer 6, the cathode layer 7 may be made of Mg/Ag alloy, the thickness of the light emitting layer 6 is 300nm, the thickness of the cathode layer 7 is 12nm, and evaporation on a light coupling layer (CPL) and LiF (CPL and LiF are not shown in the figure) is performed subsequently, the CPL is an organic layer and mainly functions to adjust the refractive index, so that the light emitting efficiency is the highest, and the LiF is an inorganic salt and mainly plays a role in electromagnetic shielding;

step S20: then, a first packaging inorganic layer 81 is deposited, the first packaging inorganic layer 81 is made of SiON materials and is 0.8-1um thick, then the ink-jet printing layer 80 is coated and cured, the ink-jet printing layer 80 is made of organic materials and is 10-12um thick, finally, a second packaging inorganic layer 82 is deposited, the materials are SiNx and are 1-1.2um thick, and the partition portion 10 in the partition area 22 is covered by the laminated layer of the first packaging inorganic layer 81 and the second packaging inorganic layer 82. To this end, the entire display panel process is completed, and the glass substrate may be peeled off from the display panel by LLO to form a flexible display panel.

The embodiment of the present application further provides an electronic device, which includes the display panel in any of the above embodiments. The specific structure and principle of the display panel are the same as those of the above embodiments, and are not described herein again. The electronic device may be any product or component having a display function, such as a display, a mobile phone, a television, a tablet computer, a navigator, a watch, a bracelet, and the like.

In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, and means that there may be three relationships, for example, a and/or B, and may mean that a exists alone, a and B exist simultaneously, and B exists alone. Wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made to the present application by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (12)

1. A display panel, comprising:

the display device comprises a display area and an opening area, wherein the opening area comprises an opening and a partition area, and the partition area is positioned between the opening and the display area;

the display panel comprises a circuit layer, a planarization layer, an anode layer and a light-emitting layer which are sequentially stacked in the display area;

the planarization layer is provided with a first partition structure in the partition area, the first partition structure comprises a top surface and a bottom surface which are opposite in the direction perpendicular to the plane of the display panel, and a side surface connecting the top surface and the bottom surface, and the side surface of the first partition structure is provided with a groove;

the anode layer is provided with a second partition structure positioned at the top end of the first partition structure in the partition area, and the first partition structure and the second partition structure form a partition part;

the display panel is provided with a base layer in the partition area, and the partition part is a raised structure relative to the base layer;

the light emitting layer includes a first portion on a surface of the partition and a second portion on a surface of the base layer outside the partition in the partition region, and the first portion and the second portion have a space therebetween in a direction perpendicular to a plane of the display panel.

2. The display panel according to claim 1,

the depth of the groove on the side surface of the first partition structure is L, and L is more than or equal to 0.8 mu m and less than or equal to 1.2 mu m.

3. The display panel according to claim 1,

the thickness of the first partition structure is H, and H is more than or equal to 1.5 mu m and less than or equal to 2.5 mu m.

4. The display panel according to claim 1,

the partition part extends along the edge of the opening, the width of the partition part is W, and W is more than or equal to 10 mu m and less than or equal to 15 mu m.

5. The display panel according to claim 1,

the thickness of the second partition structure is h, and h is not less than 100nm and not more than 120nm.

6. The display panel according to claim 1, comprising:

the spacing distance between any two adjacent partition parts is M, and M is more than or equal to 10 mu M and less than or equal to 15 mu M.

7. The display panel according to claim 1,

the circuit layer comprises a semiconductor layer, a grid electrode insulating layer, a grid electrode metal layer, a capacitor dielectric layer, a capacitor metal layer, an interlayer insulating layer and a source drain metal layer which are sequentially stacked;

the grid metal layer and/or the capacitance metal layer are/is provided with a padding structure in the partition area, and the padding structure is positioned below the partition part.

8. The display panel according to claim 1,

the display panel further comprises a cathode layer positioned on one side of the light emitting layer, which is far away from the anode layer, and an encapsulation layer positioned on one side of the cathode layer, which is far away from the light emitting layer in the display area;

the packaging layer comprises a first packaging inorganic layer, an ink-jet printing layer and a second packaging inorganic layer which are sequentially stacked;

the display panel is provided with an ink-jet printing partition part in the partition area, and the ink-jet printing layer extends from the display area to the ink-jet printing partition part in the partition area;

the partition part comprises an outer partition part and an inner partition part, the ink-jet printing partition part is located between the outer partition part and the inner partition part, the inner partition part is located between the ink-jet printing partition part and the display area, the outer partition part is located between the opening and the ink-jet printing partition part, the first packaging inorganic layer, the ink-jet printing layer and the second packaging inorganic layer cover the inner partition part, the first packaging inorganic layer and the second packaging inorganic layer cover the outer partition part, and the ink-jet printing layer is not overlapped with the outer partition part.

9. The display panel according to claim 1,

the anode layer comprises indium tin oxide, silver and indium tin oxide which are sequentially stacked.

10. The display panel according to claim 1, further comprising:

and the flexible substrate layer is positioned on one side of the circuit layer, which is far away from the planarization layer, and covers the display area and the partition area.

11. The display panel according to claim 10,

the flexible substrate layer comprises a first polyimide layer, an isolation layer, an amorphous silicon layer and a second polyimide layer which are sequentially stacked.

12. An electronic device characterized by comprising the display panel according to any one of claims 1 to 11.

Images