CN115811025B - Overcurrent protection circuit, device and safety chip for self-adaptive soft-off current - Google Patents

Overcurrent protection circuit, device and safety chip for self-adaptive soft-off current Download PDF

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CN115811025B
CN115811025B CN202310057164.7A CN202310057164A CN115811025B CN 115811025 B CN115811025 B CN 115811025B CN 202310057164 A CN202310057164 A CN 202310057164A CN 115811025 B CN115811025 B CN 115811025B
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soft
current
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mos tube
resistor
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CN115811025A (en
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陈文凯
林涛
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Suzhou Novosense Microelectronics Co ltd
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    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The application discloses overcurrent protection circuit, device and safety chip of self-adaptation soft shutoff electric current includes: the voltage comparison unit is used for inputting the sampling signal and the reference voltage of the controlled module and outputting an overcurrent protection signal under the enabling control of the pulse width modulation signal; the soft shutdown signal generation unit is connected with the voltage comparison unit and is used for latching an overcurrent protection signal output when the last pulse width modulation signal is at a high level when the pulse width modulation signal is at a low level and outputting a soft shutdown enabling signal; the soft shutdown control unit is connected with the soft shutdown signal generation unit and is used for generating a driving control signal of the controlled module according to the soft shutdown enabling signal and the sampling signal of the controlled module. The soft turn-off time duration is long when the overcurrent is serious; when the overcurrent is small, the duration of the soft off time is short, so that the controlled module is protected.

Description

Overcurrent protection circuit, device and safety chip for self-adaptive soft-off current
Technical Field
The application relates to the technical field of electronic circuits, in particular to an overcurrent protection circuit, an overcurrent protection device and a safety chip for self-adaptive soft-off current.
Background
The functional safety chip has wide application prospect in the aspects of the intellectualization of new energy automobiles and common automobiles, and the motor drive on the automobile, which is related to life safety, needs functional safety guarantee. Compared with a common vehicle-mounted chip, the functional safety chip has stricter requirements for protecting an IGBT (Insulated GateBipolar Transistor ) or a SIC (SemiconductorIntegrated Circuit, semiconductor integrated circuit).
However, in some existing driving product schemes, the IGBT is generally turned off by using a fixed Soft Shutdown (SSD) current, and after the overcurrent protection (Over CurrentProtection, OCP) occurs, the normal working period of the IGBT is affected, which may cause the system to fail to work normally.
Under the condition that the IGBT is over-current, the IGBT is turned off by using a fixed SSD current, when the over-current is large or small, the SSD current is the same, and when the over-current is possibly caused to be large, the IGBT is turned off too quickly, so that too large dv/dt (differential of voltage variation relative to time) is generated at a collector of the IGBT, and the IGBT is easy to damage; if the closing is too slow, the closing time is too long when the overcurrent is small, which has a relatively large influence on the system response.
Disclosure of Invention
In order to solve the problems in the prior art, the IGBT is turned off by using fixed SSD current, and if the IGBT is turned off too fast, too large dv/dt is generated at the collector of the IGBT, so that the IGBT is easy to damage; and if the closing is too slow, the closing time is too long, which has a relatively large influence on the system response.
One of the purposes of the present application is to provide an overcurrent protection device for adaptive soft off current.
It is an object of the present application to provide a security chip.
To achieve one of the above objects, an embodiment of the present application provides an adaptive soft-off current over-current protection circuit, including:
the voltage comparison unit is used for inputting a reference voltage and a sampling signal of the controlled module, and comparing the reference voltage with the sampling signal of the controlled module to obtain a comparison result; under the enabling control of the pulse width modulation signal, the voltage comparison unit outputs an overcurrent protection signal according to the comparison result;
the soft shutdown signal generation unit is connected with the voltage comparison unit and is used for latching an overcurrent protection signal when the pulse width modulation signal is at a low level; the voltage comparison unit outputs the overcurrent protection signal when the overcurrent protection signal is at the high level of the last pulse width modulation signal; the soft shutdown signal generation unit outputs a soft shutdown enable signal when the pulse width modulation signal is at a low level;
the soft shutdown control unit is connected with the soft shutdown signal generation unit and generates a driving control signal of the controlled module according to the soft shutdown enabling signal and the controlled module sampling signal.
As a further improvement of an embodiment of the present application, the soft-off signal generating unit includes a first RS flip-flop, a delay unit, an and gate unit, a second RS flip-flop, and a soft-off time control unit;
the S input end of the first RS trigger is connected with the voltage comparison unit, and the first RS trigger is used for receiving the overcurrent protection signal; the R input end of the first RS trigger is connected with the inverse signal of the pulse width modulation signal;
the delay unit is connected with the first RS trigger and the AND gate unit and is used for delaying the output signal of the first RS trigger to obtain an overcurrent protection pulse width modulation delay signal; the AND gate unit carries out AND logic judgment on the overcurrent protection pulse width modulation delay signal and the inverse signal of the pulse width modulation signal to obtain a logic judgment result; the AND gate unit inputs the logic judgment result to an S input end of the second RS trigger;
the R input end of the second RS trigger is connected with a soft-off time control unit; the second RS flip-flop outputs a soft off enable signal.
As a further improvement of an embodiment of the present application, the soft-off time control unit includes a current source, a soft-off bias current generating unit, and a first resistor;
the input end of the current source is connected with a power supply, the output end of the current source is connected with the first end of the soft-off bias current generating unit, and the second end of the soft-off bias current generating unit is connected to the ground GND through the first resistor;
the first end of the soft-off bias current generating unit is connected to the R input end of the second RS trigger.
As a further improvement of an embodiment of the present application, the soft-off bias current generating unit includes a first operational amplifier and a first MOS transistor;
the output end of the current source is connected with the drain electrode of the first MOS tube, and the source electrode of the first MOS tube is connected to the ground GND through the first resistor; the forward input end of the first operational amplifier is connected with the sampling signal of the controlled module, the reverse input end of the first operational amplifier is connected with the source electrode of the first MOS tube, and the output end of the first operational amplifier is connected with the grid electrode of the first MOS tube.
As a further improvement of an embodiment of the present application, the soft-off control unit includes a second operational amplifier, a second resistor, a third resistor, a second MOS transistor, and a third MOS transistor;
the positive input end of the second operational amplifier is connected to the drain electrode of the first MOS tube and one end of the second resistor, the other end of the second resistor is connected to the ground GND, the reverse input end of the second operational amplifier is connected to the source electrode of the second MOS tube, and the enabling end of the second operational amplifier is connected to the output end of the second RS trigger; the output end of the second operational amplifier is connected to the grid electrode of the second MOS tube and the grid electrode of the third MOS tube;
the source electrode of the second MOS tube is connected to the ground GND through the third resistor; the source electrode of the third MOS tube is connected to the ground GND;
the drain electrode of the second MOS tube is connected to the drain electrode of the third MOS tube, and the drain electrode of the third MOS tube is connected to the control end of the controlled module.
As a further improvement of an embodiment of the present application, the current on the second MOS transistor is represented as follows:
Figure SMS_1
wherein Inld0 is the current of the second MOS transistor, ssd_vbias is the voltage formed by subtracting the current Ibias1 generated by the soft-off bias current generating unit from the current Ibias0 generated by the current source on the second resistor, and R3 is the resistance of the third resistor.
Further, the current on the third MOS transistor is expressed as follows:
Figure SMS_2
wherein, inld1 is the current of the third MOS tube, K is the multiple of the chip size of the third MOS tube relative to the chip size of the second MOS tube, and the chip size refers to the width-to-length ratio of the chip; ibias0 is the current generated by the current source, OC_SENSE is the sampling signal of the controlled module, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, and R3 is the resistance value of the third resistor.
MOS, an abbreviation for MOSFET. MOSFET Metal-Oxide-semiconductor field-effect transistor (MOSFET) is abbreviated as Metal-Oxide-semiconductor field-Effect Transistor.
In order to achieve one of the above-mentioned purposes, an embodiment of the present application provides an adaptive soft-off current overcurrent protection device, which includes the adaptive soft-off current overcurrent protection circuit according to any one of the above-mentioned technical schemes.
In order to achieve one of the above-mentioned purposes, an embodiment of the present application provides a safety chip, which includes the adaptive soft-off current overcurrent protection circuit according to any one of the above-mentioned technical schemes.
One of the above technical solutions has the following advantages or beneficial effects:
compared with the prior art, the self-adaptive soft-off current overcurrent protection circuit provided by the application generates an overcurrent protection signal through the voltage comparison unit, and the state of overcurrent protection is realized through the first RS trigger, the delay unit and the AND gate unit, so that the state of overcurrent protection is enabled when the pulse width modulation signal PWM is turned down, namely, the system really needs to turn off the IGBT, and the influence of the overcurrent protection on the state of the system is avoided.
According to the soft-off time control unit composed of the current source, the soft-off bias current generating unit and the first resistor, the soft-off time can be adjusted according to the voltage SSD_VBIAS formed by subtracting the soft-off bias current Ibias1 generated by the soft-off bias current generating unit from the current Ibias0 generated by the current source.
The SSD current (namely the current Inld1 of the third MOS tube) generated by the soft turn-off control unit is related to the sampling signal OC_SENSE of the controlled module, so that when the overcurrent is large, the OC_SENSE is relatively large, the current Inld1 on the third MOS tube is relatively small, and the IGBT turn-off speed is relatively slow, so that the IGBT is protected from overvoltage impact of VCE (collector C to emitter E voltage of the IGBT). When the over-current of the IGBT is smaller, the OC_SENSE is smaller, the Inld1 is larger, and the IGBT closing speed is higher, so that the response speed of the system is improved when the over-current is not serious.
Drawings
The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way. In addition, the shapes, proportional sizes, and the like of the respective components in the drawings are merely illustrative for aiding the understanding of the present application, and are not particularly limited. Those skilled in the art who have the benefit of the teachings of this application may select various possible shapes and scale dimensions to practice this application as the case may be. In the drawings:
fig. 1 is a schematic structural diagram of an overcurrent protection circuit for adaptive soft-off current according to an embodiment of the present application;
fig. 2 is a waveform diagram of an over-current protection circuit for adaptive soft off current in an embodiment of the present application when IGBT heavy current is applied to turn off;
reference numerals: the device comprises a 1-voltage comparison unit, a 2-soft shutdown signal generation unit, a 3-soft shutdown control unit, a 4-sampling unit, a 201-first RS trigger, a 202-delay unit, a 203-AND gate unit, a 204-second RS trigger, a 205-current source, a 206-soft shutdown bias current generation unit, a 261-first operational amplifier, a 262-first MOS transistor, a 301-second operational amplifier, a 302-second MOS transistor, a 303-third MOS transistor, a 11-first resistor, a 12-second resistor, a 13-third resistor and a 14-fourth resistor.
Detailed Description
In order to better understand the technical solutions in the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the term "comprises," "comprising," or any other variation thereof is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
The functional safety chip is a micro control unit and is widely applied to the intellectualization of new energy automobiles and common automobiles. The automobile safety chip is also called as an automobile standard safety chip, and the automobile standard is a standard applicable to automobile electronic components. Compared with other industrial electronic components, the vehicle-gauge electronic component has low requirements on external working environments, long service life and high reliability and consistency. The automobile-scale safety chip is a chip with safety performance, which is produced according to the specification standard of automobile electronic components.
Compared with a common vehicle-mounted chip, the functional safety chip has stricter requirements on protection of the IGBT or the SIC, and in the process of closing the IGBT or the SIC, a turn-off mode called graded turn-off is adopted, and the grid voltage of the IGBT can be controlled by detecting the collector voltage of the IGBT or the Drain terminal voltage of the SIC, so that the purpose of reducing dv/dt is achieved, and the IGBT or the SIC is better protected.
In some existing drive product schemes, the IGBT is generally turned off by using a fixed soft off (SSD) current, and after the OCP occurs, even if the IGBT is turned off, the normal working period of the IGBT is affected, which may cause the system to fail to work normally. Under the condition that the IGBT is over-current, the IGBT is turned off by using a fixed SSD current, when the over-current is large or small, the SSD current is the same, and the over-current is possibly caused to be large, the turn-off is too fast, so that the excessive dv/dt is generated at the collector of the IGBT, the IGBT is easy to damage, and if the turn-off is too slow, the turn-off time is too long when the over-current is small, and the system response is greatly influenced.
How to adapt to the overcurrent protection circuit of the soft off current to protect the controlled module is one of the purposes of the application.
An embodiment of the present application provides an overcurrent protection circuit for adaptive soft-off current, which may be disposed in any one of a safety chip or an overcurrent protection device for adaptive soft-off current, or may independently exist in other application scenarios, and is used for performing overcurrent protection on a controlled module.
As shown in fig. 1, the overcurrent protection circuit for adaptive soft off current includes:
the voltage comparison unit 1 is used for inputting a sampling signal and a reference voltage of the controlled module, the voltage comparison unit 1 performs voltage comparison on the sampling signal and the reference voltage, and under the enabling control of the pulse width modulation signal PWM, an overcurrent protection signal is output according to a comparison result;
the soft shutdown signal generating unit 2 is connected with the voltage comparing unit 1 and is used for latching an overcurrent protection signal output by the voltage comparing unit 1 when the pulse width modulation signal is at a low level and the soft shutdown signal generating unit 2 outputs a soft shutdown enabling signal when the pulse width modulation signal is at a low level;
the soft shutdown control unit 3, the soft shutdown control unit 3 is connected with the soft shutdown signal generation unit 2, and is used for generating a driving control signal of the controlled module according to the soft shutdown enabling signal and the sampling signal of the controlled module.
The invention solves the problem of overvoltage of IGBT or SIC caused by directly closing the power tube in the traditional scheme, and the VCE voltage of the IGBT is detected to be closed in a grading way, thereby improving the VCE overvoltage of the IGBT under the condition of heavy current application. The overcurrent protection circuit provided by the embodiment can better protect the controlled module (such as IGBT).
As shown in fig. 1, the soft-off signal generating unit 2 optionally includes a first RS flip-flop 201, a delay unit 202, an and gate unit 203, a second RS flip-flop 204, and a soft-off time control unit;
the S input end of the first RS trigger 201 is connected with the voltage comparison unit 1 and is used for receiving an overcurrent protection signal; the R input end of the first RS trigger 201 is connected with an inverse signal PWM_B of the pulse width modulation signal PWM;
the delay unit 202 is connected to the first RS flip-flop 201 and the and gate unit 203, and is configured to delay an output signal of the first RS flip-flop 201, obtain an over-current protection PWM delay signal (see OCP PWM off Delay in fig. 1), and then the and gate unit 203 performs an and logic judgment on the over-current protection PWM delay signal and an inverse signal pwm_b of the PWM signal, and inputs the result to an S input terminal of the second RS flip-flop 204; the R input end of the second RS trigger 204 is connected with a soft-off time control unit; the second RS flip-flop 204 outputs the soft-off enable signal EN SSD.
The soft-off time control unit includes a current source 205, a soft-off bias current generation unit 206, and a first resistor 11;
an input end of the current source 205 is connected with a power supply, an output end of the current source 205 is connected with a first end of the soft-off bias current generating unit 206, and a second end of the soft-off bias current generating unit 206 is connected with the ground GND through the first resistor 11; a first terminal of the soft-off bias current generation unit 206 is connected to an R input terminal of the second RS flip-flop 204.
Optionally, the soft-off bias current generating unit 206 includes a first op-amp 261 and a first MOS transistor 262.
The output end of the current source 205 is connected with the drain electrode of the first MOS tube 262, and the source electrode of the first MOS tube 262 is connected with the first resistor 11 and is connected with the ground GND; the forward input end of the first operational amplifier 261 is connected with the sampling signal OC_SENSE of the controlled module, the reverse input end of the first operational amplifier 261 is connected with the source electrode of the first MOS tube 262, and the output end of the first operational amplifier 261 is connected with the grid electrode of the first MOS tube 262.
The soft-off control unit 3 comprises a second operational amplifier 301, a second MOS tube 302, a third MOS tube 303, a second resistor 12 and a third resistor 13; the positive input end of the second operational amplifier 301 is connected to the drain electrode of the first MOS tube 262 and one end of the second resistor 12, the other end of the second resistor 12 is connected to the ground GND, the negative input end of the second operational amplifier 301 is connected to the source electrode of the second MOS tube 302, and the enabling end of the second operational amplifier 301 is connected to the output end of the second RS trigger 204; the output end of the second operational amplifier 301 is connected to the gate of the second MOS tube 302 and the gate of the third MOS tube 303; the source electrode of the second MOS tube 302 is connected to the ground GND through the third resistor 13; the source of the third MOS transistor 303 is connected to ground GND; the drain electrode of the second MOS tube 302 is connected to the drain electrode of the third MOS tube 303, and the drain electrode of the third MOS tube 303 is connected to the control end of the controlled module.
As shown in fig. 1, the IGBT sampling signal is obtained by the sampling unit 4 in the present embodiment. The IGBT sampling signal OC_SENSE is obtained by connecting the sampling resistor Rsense with the source electrode of the IGBT, converting the current into a voltage signal and measuring the voltage signal.
In the adaptive soft-off current overcurrent protection circuit provided in this embodiment, when PWM is high, i.e., when IGBT is turned on, the voltage comparing unit 1 compares the IGBT sampling signal oc_sense with the reference voltage VREF signal, if oc_sense is higher than VREF, the voltage comparing unit 1 outputs high, outputs the overcurrent protection signal, latches the overcurrent protection signal into the first RS flip-flop 201, when PWM becomes low, the first RS flip-flop 201 is set to zero, the delay unit 202 maintains the overcurrent protection signal (i.e., OCP alarm signal) output by the first RS flip-flop 201 for a certain time (e.g., 100 ns), obtains the overcurrent protection pulse width modulation delay signal, AND the overcurrent protection pulse width modulation delay signal is subjected to an AND gate unit 203 (AND) AND an inverse PWM pwm_b phase to obtain a pulse signal of about 100ns, so that the second RS flip-flop 204 can latch the OCP alarm signal output by the first RS flip-flop 201 when PWM becomes high when PWM is low, the second RS flip-flop 204 outputs the soft-flop ssd_b signal (i.e., enables the second PWM to turn-off signal 301 to start to work.
The soft-off bias current generating unit 206 converts the voltage signal of the controlled module sampling signal oc_sense into a current signal Ibias1, the current generated by the current source 205, that is, the current Ibias0 minus Ibias1, forms a reference voltage ssd_vbias with information oc_sense on the second resistor 12, and the reference voltage ssd_vbias is converted into a current on the second MOS transistor 302 (i.e., NLD0 in fig. 1) through the second op amp 301, with the following expression:
Figure SMS_3
wherein Inld0 is the current of the second MOS transistor 302, ssd_vbias is the voltage formed by subtracting the soft-off bias current Ibias1 generated by the soft-off bias current generating unit 206 from the current Ibias0 generated by the current source 205 on the second resistor 12, and R3 is the resistance of the third resistor 13.
The chip size of the third MOS transistor 303 (i.e., NLD1 in fig. 1) is K times the chip size of the second MOS transistor 302 (i.e., NLD0 in fig. 1), where the chip size refers to the aspect ratio of the chip; the current expression on NLD1 is as follows:
Figure SMS_4
wherein, inld1 is the current of the third MOS transistor 303; ibias0 is the current generated by current source 205; OC_SENSE is a controlled module sampling signal, R1 is the resistance value of the first resistor 11, R2 is the resistance value of the second resistor 12, and R3 is the resistance value of the third resistor 13.
From the above, the current Inld1 related to the sampling signal OC_SENSE of the controlled module can be obtained to close the IGBT, so that when the overcurrent is large, the OC_SENSE is relatively large, the Inld1 is relatively small, and the closing speed of the IGBT is relatively slow, so that the IGBT is protected from the overvoltage impact of the VCE. When the over-current of the IGBT is small, the OC_SENSE is small, the Inld1 is large, and the IGBT closing speed is high, so that the response speed of the system is improved when the over-current is not serious, and the over-current protection waveform of the IGBT under the self-adaptive SSD current is shown in fig. 2. In addition, the duration of SSD, SSD_time can also be adjusted according to SSD_VBIAS voltage, OC_SENSE is relatively large when overcurrent is serious, and SSD_time duration is long. When the overcurrent is small, oc_sense is shorter than the duration of the small ssd_time. The maximum and minimum values of SSD current can be adjusted by setting the magnitude of Ibias 0.
The delay unit 202 in this application comprises a delay circuit. It should be noted that a circuit for delaying an electrical signal for a period of time is called a delay circuit, and is widely used in the field of circuit design. The delay circuit used in this application is prior art, but is not described.
In other embodiments, the drain of the third MOS transistor 303 is connected to the control terminal (e.g., the G terminal of the IGBT) of the controlled module through the fourth resistor 14 (e.g., the resistor ROL in fig. 1).
Optionally, the drain electrode of the third MOS transistor 303 may also be connected to the control end of the controlled module by a filtering unit formed by combining basic elements such as a resistor, a capacitor, and an inductor, and the filtering unit is not the application point of the present application, but the disclosure of this section is not limited thereto.
In summary, the self-adaptive soft-off current overcurrent protection circuit provided by the application generates an overcurrent protection signal through the voltage comparison unit 1, and the state of realizing overcurrent protection is formed by the first RS trigger 201, the delay unit 202 and the AND gate unit 203, so that the overcurrent protection is enabled when the pulse width modulation signal PWM is turned down, namely, the system really turns off the IGBT, and the influence of the overcurrent protection on the system state is avoided.
The soft-off time control unit composed of the current source 205, the soft-off bias current generating unit 206 and the first resistor 11 is used for adjusting the soft-off time by subtracting the voltage ssd_vbias formed by the soft-off bias current Ibias1 generated by the soft-off bias current generating unit 206 on the second resistor 12 from the current Ibias0 generated by the current source 205, so that the sampling signal oc_sense of the controlled module is larger when the overcurrent is serious, and the duration of the soft-off time ssd_time is long. When the overcurrent is small, the sampling signal OC_SENSE of the controlled module is small, and the duration of the soft off time SSD_time is short.
According to the method, the SSD current Inld1 related to the sampling signal OC_SENSE of the controlled module can be generated on the third MOS tube 303, so that when the overcurrent is large, OC_SENSE is large, inld1 is small, the IGBT closing speed is low, and the IGBT is protected from being impacted by VCE overvoltage. When the over-current of the IGBT is smaller, the OC_SENSE is smaller, the Inld1 is larger, and the IGBT closing speed is higher, so that the response speed of the system is improved when the over-current is not serious.
Further, an embodiment of the present application provides a safety chip, including any one of the above-mentioned adaptive soft-off current over-current protection circuits, where the circuit is configured to perform over-current protection on a controlled module. The security chip may further include an operation module, a communication management module, a power management module, and the like. The safety chip can be provided with a plurality of self-adaptive soft-off current overcurrent protection circuits for driving the multipath controlled modules. Specifically, the controlled module may be any one of an IGBT (Insulated Gate Bipolar Transistor ) and a SiC (silicon carbide) power device.
The embodiment of the application also provides an overcurrent protection device for the self-adaptive soft off current, which comprises any one of the overcurrent protection circuits for the self-adaptive soft off current, so as to realize the overcurrent protection function of the self-adaptive soft off current. The self-adaptive soft-off current overcurrent protection device can be arranged in the safety chip and connected with the controlled module, and also can be arranged in any other power utilization system, so that the controlled module which needs to be driven in the related system is connected to realize overcurrent protection.
The invention solves the problem of overvoltage of IGBT or SIC caused by directly closing the power tube in the traditional scheme, and the VCE voltage of the IGBT is detected to be closed in a grading way, thereby improving the VCE overvoltage of the IGBT under the condition of heavy current application.
It is to be understood that the above description is intended to be illustrative, and not restrictive. Many embodiments and many applications other than the examples provided will be apparent to those of skill in the art upon reading the above description. The scope of the present teachings should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. The disclosures of all articles and references, including patent applications and publications, are incorporated herein by reference for the purpose of completeness. The omission of any aspect of the subject matter disclosed herein in the preceding claims is not intended to forego such subject matter, nor should the applicant be deemed to have such subject matter not considered to be part of the subject matter of the disclosed application.

Claims (10)

1. The overcurrent protection circuit of self-adaptation soft off current is characterized by comprising:
the voltage comparison unit is used for inputting a reference voltage and a sampling signal of the controlled module, and comparing the reference voltage with the sampling signal of the controlled module to obtain a comparison result; under the enabling control of the pulse width modulation signal, the voltage comparison unit outputs an overcurrent protection signal according to the comparison result;
the soft shutdown signal generation unit is connected with the voltage comparison unit and is used for latching an overcurrent protection signal when the pulse width modulation signal is at a low level; the voltage comparison unit outputs the overcurrent protection signal when the overcurrent protection signal is at the high level of the last pulse width modulation signal; the soft shutdown signal generation unit outputs a soft shutdown enable signal when the pulse width modulation signal is at a low level;
the soft shutdown control unit is connected with the soft shutdown signal generation unit and generates a driving control signal of the controlled module according to the soft shutdown enabling signal and the controlled module sampling signal;
the soft-off signal generating unit comprises a first RS trigger, a delay unit, an AND gate unit, a second RS trigger and a soft-off time control unit;
the S input end of the first RS trigger is connected with the voltage comparison unit, and the first RS trigger is used for receiving an overcurrent protection signal output by the voltage comparison unit; the R input end of the first RS trigger is connected with the inverse signal of the pulse width modulation signal;
the delay unit is connected with the first RS trigger and the AND gate unit and is used for delaying the output signal of the first RS trigger to obtain an overcurrent protection pulse width modulation delay signal; the AND gate unit carries out AND logic judgment on the overcurrent protection pulse width modulation delay signal and the inverse signal of the pulse width modulation signal to obtain a logic judgment result, and the AND gate unit inputs the logic judgment result to the S input end of the second RS trigger;
the R input end of the second RS trigger is connected with the soft-off time control unit; the second RS flip-flop outputs a soft off enable signal.
2. The adaptive soft off current foldback circuit of claim 1, wherein,
the soft-off time control unit comprises a current source, a soft-off bias current generating unit and a first resistor;
the input end of the current source is connected with a power supply, the output end of the current source is connected with the first end of the soft-off bias current generating unit, and the second end of the soft-off bias current generating unit is connected to the ground GND through the first resistor;
the first end of the soft-off bias current generating unit is connected to the R input end of the second RS trigger.
3. The adaptive soft-off current overcurrent protection circuit of claim 2, wherein the soft-off bias current generation unit comprises a first op-amp and a first MOS transistor;
the output end of the current source is connected with the drain electrode of the first MOS tube, and the source electrode of the first MOS tube is connected to the ground GND through the first resistor; the forward input end of the first operational amplifier is connected with the sampling signal of the controlled module, the reverse input end of the first operational amplifier is connected with the source electrode of the first MOS tube, and the output end of the first operational amplifier is connected with the grid electrode of the first MOS tube.
4. The adaptive soft off current foldback circuit of claim 3, wherein,
the soft turn-off control unit comprises a second operational amplifier, a second resistor, a third resistor, a second MOS tube and a third MOS tube;
the positive input end of the second operational amplifier is respectively connected to the drain electrode of the first MOS tube and one end of the second resistor, the other end of the second resistor is connected to the ground GND, the reverse input end of the second operational amplifier is connected to the source electrode of the second MOS tube, and the enabling end of the second operational amplifier is connected to the output end of the second RS trigger; the output end of the second operational amplifier is respectively connected to the grid electrode of the second MOS tube and the grid electrode of the third MOS tube;
the source electrode of the second MOS tube is connected to the ground GND through the third resistor; the source electrode of the third MOS tube is connected to the ground GND; the drain electrode of the second MOS tube is connected to the drain electrode of the third MOS tube, and the drain electrode of the third MOS tube is connected to the control end of the controlled module.
5. The adaptive soft off current over-current protection circuit of claim 4, wherein the current of the second MOS transistor is represented as follows:
Figure QLYQS_1
wherein Inld0 is the current of the second MOS transistor, ssd_vbias is the voltage formed by subtracting the current Ibias1 generated by the soft-off bias current generating unit from the current Ibias0 generated by the current source on the second resistor, and R3 is the resistance of the third resistor.
6. The adaptive soft off current foldback circuit of claim 4, wherein,
the current of the third MOS transistor is expressed as follows:
Figure QLYQS_2
wherein, inld1 is the current of the third MOS tube, K is the multiple of the chip size of the third MOS tube relative to the chip size of the second MOS tube, and the chip size refers to the width-to-length ratio of the chip; ibias0 is the current generated by the current source, OC_SENSE is the sampling signal of the controlled module, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, and R3 is the resistance value of the third resistor.
7. The adaptive soft off current foldback circuit of claim 4, wherein,
the drain electrode of the third MOS tube is connected to the control end of the controlled module through a fourth resistor.
8. The adaptive soft off current over-current protection circuit of claim 1, wherein the controlled module is any one of an IGBT or a silicon carbide power device.
9. An adaptive soft off current overcurrent protection device, comprising the adaptive soft off current overcurrent protection circuit according to any one of claims 1-8.
10. A security chip comprising the adaptive soft off current over-current protection circuit of any one of claims 1-8.
CN202310057164.7A 2023-01-19 2023-01-19 Overcurrent protection circuit, device and safety chip for self-adaptive soft-off current Active CN115811025B (en)

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