CN115800751A

CN115800751A - Isolated converter

Info

Publication number: CN115800751A
Application number: CN202210233288.1A
Authority: CN
Inventors: 黄文育; 王世勋; 林鸿铨
Original assignee: Delta Electronics Inc
Current assignee: Delta Electronics Inc
Priority date: 2021-09-10
Filing date: 2022-03-10
Publication date: 2023-03-14
Also published as: TWI787097B; TW202312641A

Abstract

An isolated converter comprises an input circuit, a transformer, a first switch, a second switch and a buffer circuit. The input circuit comprises at least two input capacitors for providing an input voltage. A voltage dividing node is arranged between the input capacitors. The transformer comprises a primary winding and a secondary winding, and is used for generating an output voltage on the secondary winding according to an input voltage. The primary winding of the transformer is electrically connected between the first switch and the second switch. The buffer circuit is electrically connected between the first switch and the second switch, and forms a discharge path with the primary winding. The buffer circuit is used for receiving the reflected voltage reflected by the secondary winding back to the primary winding, and the voltage division node is connected to the discharge path.

Description

Isolated converter

Technical Field

The present disclosure relates to an isolated converter, and more particularly, to a circuit structure capable of converting an input voltage into an output voltage.

Background

With the rapid development of technology, voltage converters have been widely used in various electronic products. The voltage converter may convert an input voltage having one voltage level on an input terminal to an output voltage having another voltage level on an output terminal. However, during operation, the various electronic components within the voltage converter must be able to withstand voltage variations in the circuit in order to provide a stable output voltage.

Disclosure of Invention

One embodiment of the present disclosure is an isolated converter including an input circuit, a transformer, a first switch, a second switch, and a buffer circuit. The input circuit comprises at least two input capacitors for providing input voltage. A voltage division node is arranged between the input capacitors. The transformer comprises a primary winding and a secondary winding, and is used for generating an output voltage on the secondary winding according to an input voltage. The primary winding of the transformer is electrically connected between the first switch and the second switch. The buffer circuit is electrically connected between the first switch and the second switch, and forms a discharge path with the primary winding. The buffer circuit is used for receiving the reflected voltage reflected by the secondary winding back to the primary winding, and the voltage division node is connected to the discharge path.

Another embodiment of the present disclosure is an isolated converter including an input circuit, a transformer, a first switch, a second switch, and a buffer circuit. The input circuit comprises at least two input capacitors for providing an input voltage. A voltage division node is arranged between the input capacitors. The transformer comprises a primary winding and a secondary winding, and is used for generating an output voltage on the secondary winding according to an input voltage. The primary winding of the transformer is electrically connected between the first switch and the second switch. And the buffer circuit is electrically connected between the first switch and the second switch, and forms a discharge path with the primary winding to receive the reflected voltage reflected by the secondary winding back to the primary winding, wherein a node on the discharge path is fixed to the divided voltage.

The present disclosure connects the voltage dividing node to the discharge path, so that the cross-voltage of the first switch and the second switch can be determined by the voltage on the voltage dividing node and a part of the reflected voltage reflected by the secondary winding back to the primary winding.

Drawings

Fig. 1 is a schematic diagram of an isolated converter according to some embodiments of the present disclosure.

Fig. 2A, 2B, and 2C are schematic diagrams illustrating an operation manner of an isolated converter according to some embodiments of the disclosure.

Fig. 3 is a schematic diagram of an isolated converter according to another embodiment of the disclosure.

Fig. 4 is a schematic diagram of an isolated converter according to another embodiment of the disclosure.

Fig. 5A, 5B, 5C, 5D, 5E, and 5F are schematic diagrams of an isolated converter according to another embodiment of the disclosure.

Fig. 6 is a schematic diagram of an isolated converter according to another embodiment of the disclosure.

Fig. 7 is a schematic diagram of an isolated converter according to another embodiment of the disclosure.

Description of reference numerals:

100: isolated converter

110: input circuit

120: transformer

130: buffer circuit

140: output circuit

200: isolated converter

300: isolated converter

400: isolated converter

500: isolated converter

540: output circuit

600: isolated converter

700: isolated converter

701-702: one-way switch

S1: first switch

S2: second switch

C1-C2: input capacitance

Ca-Cc: buffer capacitor

Co: output capacitor

Ct: center tap

Ra: impedance element

R1-R3: impedance element

N1: first node

N2: second node

Na: voltage dividing node

Nb: node point

RL: load(s)

And Lk: leakage inductance

Lm: excitation inductor

Np1-Np2: winding wire

Np: primary winding

Ns: secondary winding

D1-D2: diode with a high-voltage source

And (2) Do: diode with a high-voltage source

Do1-Do2: diode with a high-voltage source

Vin: input power supply

Detailed Description

In the following description, for purposes of explanation, numerous implementation details are set forth in order to provide a thorough understanding of the present invention. It should be understood, however, that these implementation details are not to be interpreted as limiting the invention. That is, in some embodiments of the invention, such implementation details are not necessary. In addition, some conventional structures and elements are shown in the drawings in a simple schematic manner for the sake of simplifying the drawings.

When an element is referred to as being "connected" or "coupled," it can be referred to as being "electrically connected" or "electrically coupled. "connected" or "coupled" may also be used to indicate that two or more elements are in mutual engagement or interaction. Moreover, although terms such as "first," "second," "8230," etc. may be used herein to describe various elements, such terms are used only to distinguish one element or operation from another element or operation described in similar technical terms. Unless the context clearly dictates otherwise, the terms do not specifically refer or imply an order or sequence nor are they intended to limit the invention.

Fig. 1 is a schematic diagram of an isolated converter 100 according to some embodiments of the present disclosure. The isolated converter 100 includes an input circuit 110, a transformer 120, a first switch S1, a second switch S2, an output circuit 140, and a buffer circuit 130. The input circuit 110 is configured to receive an input voltage provided by an input power Vin through at least two input capacitors C1 and C2. For convenience of description, a node at which the first capacitor C1 and the second capacitor C2 are connected is referred to as a "voltage dividing node Na".

In one embodiment, the first capacitor C1 and the second capacitor C2 have the same capacitance, so that when the input circuit 110 stores the input voltage, the voltage of the voltage dividing node is "half of the input voltage". However, the disclosure is not limited thereto, and the capacitance values of the first capacitor C1 and the second capacitor C2 may be different from each other in other embodiments.

In one embodiment, the input circuit 110 is connected to a dc input power Vin. In some embodiments, the input circuit 110 may include a rectifying circuit (e.g., a bridge rectifying circuit) for receiving an ac power and storing a rectified input voltage to the input capacitors C1 and C2.

The transformer 120 includes a primary winding Np and a secondary winding Ns. In one embodiment, the polarity positions of the primary winding Np and the secondary winding Ns are opposite to each other. The primary winding Np is electrically connected to the input circuit 110 for receiving the input voltage from the input circuit 110, and the secondary winding Ns is used for generating the output voltage by induction according to the input voltage. The transformer 120 further includes an exciting inductance Lm and a leakage inductance Lk. In some embodiments, the isolated converter 100 may be a boost converter or a buck converter.

The first switch S1 and the second switch S2 are electrically connected to two ends of the primary winding Np, respectively. In other words, the primary winding Np of the transformer 120 is electrically connected between the first switch S1 and the second switch S2. For convenience of description, both ends of the primary winding Np are referred to as a first node N1 and a second node N2 herein.

In the embodiment of fig. 1, the first switch S1 and the second switch S2 are implemented by N-Type Metal Oxide Semiconductor Field Effect transistors (N-Type MOSFETs), but the disclosure is not limited thereto. In some other embodiments, the first switch S1 and the second switch S2 can also be implemented by a P-Type Metal Oxide Semiconductor Field Effect Transistor (P-Type MOSFET) or other types of switching devices.

The output circuit 140 is electrically connected to the secondary winding Ns, and includes a diode Do and an output capacitor Co. The output circuit 140 is configured to receive the output power from the secondary winding and output the output power to the load RL when the primary winding Np stops receiving the input voltage (i.e., when the first switch S1 and the second switch S2 are turned off). In other words, the isolated converter 100 is a Flyback converter (Flyback). In other embodiments, the isolated converter can also be designed as a Forward converter (Forward), and the structure will be described in the following paragraphs.

The snubber circuit 130 is electrically connected between the first switch S1 and the second switch S2 (i.e., between the first node N1 and the second node N2, and connected in parallel with the primary winding Np). The snubber circuit 130 and the primary winding Np of the transformer 120 may form a discharge path for absorbing energy reflected back to the primary winding Np by the leakage inductance Lk and/or the secondary winding Ns. In other words, when the first switch S1 and the second switch S2 are turned off, the energy reflected by the leakage inductance Lk and/or the secondary winding Ns back to the primary winding Np may be discharged to the snubber circuit 130. In addition, the voltage dividing node Na is electrically connected to the discharge path, so that the voltage of one of the nodes on the discharge path is fixed to the divided voltage of the voltage dividing node Na.

In some embodiments, the buffer circuit 130 includes a plurality of buffer capacitors Ca, cb (snubber capacitors) and at least one impedance element Ra. The voltage dividing node Na is electrically connected to a node Nb between the buffer capacitor Ca and the buffer capacitor Cb. Specifically, the first buffer capacitor Ca is electrically connected to the first switch S1 and the voltage dividing node Na, and the second buffer capacitor Cb is electrically connected to the second switch S2 and the voltage dividing node Na. The impedance element Ra is electrically connected between the first switch S1 and the second switch S2. However, the position of the voltage dividing node Na connected to the discharge path is not limited to the structure shown in fig. 1, and the rest of the connection manner will be described in the following paragraphs.

In the present disclosure, the voltage dividing node Na is connected to the discharge path, so that the isolated converter 100 determines the voltage across the first switch S1 and the second switch S2 according to the divided voltage of the voltage dividing node Na and a part of the discharge energy. For example, if the capacitance values of the input capacitors C1 and C2 are equal, the capacitance values of the buffer capacitors Ca and Cb are equal, and the leakage inductance energy is neglected, the energy stored in each of the input capacitors C1 and C2 is half of the input voltage, and the energy stored in each of the buffer capacitors Ca and Cb is half of the reflected voltage. Accordingly, the voltage across the first switch S1 and the second switch S2 can be controlled to be small.

Fig. 2A, 2B, and 2C are schematic diagrams illustrating operation of the isolated converter 100 according to some embodiments of the disclosure. As shown in fig. 2A, when the first switch S1 and the second switch S2 are turned on, the primary winding Np receives an input voltage. At this time, since the diode of the output circuit 140 is not turned on, the secondary winding Ns does not generate an output voltage or current.

Fig. 2B and 2C show the current change after the first switch S1 and the second switch S2 are turned off (two diagrams are shown to avoid the complicated figure). After the first switch S1 and the second switch S2 are turned off, the secondary winding Ns provides the output voltage to the load RL. Meanwhile, the leakage inductance Lk of the primary winding Np and the reflected voltage reflected by the secondary winding Ns onto the primary winding Np release energy to the buffer circuit 130 through a discharge path (as indicated by an arrow in fig. 2B), so that the buffer capacitors Ca and Cb absorb energy. Then, as shown in fig. 2C, the buffer capacitors Ca and Cb release the absorbed energy to the impedance element Ra.

As shown, the buffer capacitors Ca and Cb are used for receiving the leakage inductance Lk and the reflected voltage. Therefore, the voltage across the first switch S1 is approximately equal to the sum of the voltages stored in the first input capacitor C1 and the buffer capacitor Ca. Similarly, the voltage across the second switch S2 is approximately equal to the sum of the voltages stored in the second input capacitor C2 and the buffer capacitor Cb.

For example, if the input voltage provided by the input power source is 1500V, each of the input capacitors C1 and C2 stores 750V, and the divided voltage at the voltage dividing node Na is 750V. When the reflected voltage reflected by the secondary winding Ns back to the primary winding Np is 120V, the voltages stored in the buffer capacitors Ca and Cb are 60V, respectively. Therefore, the voltage across the first switch S1 will be "750V +60V". Similarly, the voltage across the second switch S2 is also "750V +60V". Since the energy stored in the buffer capacitors Ca and Cb is usually not larger than the energy stored in the input capacitors C1 and C2, the voltage across the first switch S1 or the second switch S2 will be controlled to be smaller than the input voltage by connecting the voltage dividing node Na to the discharging path. In other words, the withstand voltage required for the first switch S1 or the second switch S2 can be reduced.

In some embodiments, the snubber circuit 130 further includes at least one diode D1, D2, and the conduction direction of the diode D1, D2 is the same as the current direction of the discharge path.

Fig. 3 is a schematic diagram of an isolated converter according to another embodiment of the disclosure. In this embodiment, the buffer circuit 130 includes a plurality of impedance elements R1, R2. Specifically, the first impedance element R1 is connected in parallel to the first buffer capacitor Ca, and the second impedance element R2 is connected in parallel to the second buffer capacitor Cb. Accordingly, when the buffer circuit 130 discharges, the first buffer capacitor Ca discharges to the first impedance element R1, and the second buffer capacitor Cb discharges to the second impedance element R2.

Fig. 4 is a schematic diagram of an isolated converter 200 according to another embodiment of the disclosure. In fig. 4, similar components related to the embodiment of fig. 1 are denoted by the same reference numerals for easy understanding, and the specific principles of the similar components are described in detail in the previous paragraphs, which are not repeated herein unless necessary to introduce them in a cooperative relationship with the components of fig. 4.

In this embodiment, the voltage dividing node Na is connected to a center tap Ct (center tap) of the primary winding Np. The center tap Ct divides the primary winding Np into two windings Np1, np2, the windings Np1, np2 have the same number of turns, but the disclosure is not limited thereto. The voltage dividing node Na is electrically connected to the center tap Ct. In the embodiment shown in fig. 4, the first switch S1 and the second switch S2 are turned on and off alternately to generate the output voltage on the secondary winding Ns. When the secondary winding Ns outputs the output voltage, the reflected voltage of the secondary winding Ns reflected to the primary winding Np is distributed to the windings Np1, np2. Therefore, the voltage across the first switch S1 will be determined by the energy stored by the first input capacitor C1 and the winding Np 1; the voltage across the second switch S2 will be determined by the energy stored in the second input capacitor C2 and the winding Np2. Accordingly, the voltage across the first switch S1 and the second switch S2 can be controlled similarly.

In this embodiment, the buffer circuit 140 includes a buffer capacitor Cc and an impedance element R3. The buffer capacitor Cc and the impedance element R3 are electrically connected between the first switch S1 and the second switch S2, and the buffer capacitor Cc and the impedance element R3 are connected in parallel.

In the above embodiments, the voltage dividing node Na is connected to the node Nb or the center tap Ct, but in other embodiments, the voltage dividing node Na may be connected to both the node Nb and the center tap Ct. Fig. 5A-5F illustrate schematic diagrams of an isolated converter 400 according to another embodiment of the disclosure. In fig. 5A, 5B, 5C, 5D, 5E and 5F, similar elements related to the embodiment of fig. 1 are denoted by the same reference numerals for easy understanding, and the specific principles of the similar elements have been described in detail in the previous paragraphs, which are not repeated herein unless necessary for description in a cooperative relationship with the elements of fig. 5A, 5B, 5C, 5D, 5E and 5F.

In this embodiment, the voltage dividing node Na is connected to the node Nb and the center tap Ct simultaneously, and the first switch S1 and the second switch S2 are alternately turned on and off to generate the output voltage on the secondary winding. In other words, the isolated converter 400 is an interleaved converter.

As shown in fig. 5A, when the first switch S1 is turned on and the second switch S2 is turned off, the first input capacitor C1 provides a portion of the input voltage to the winding Np1. As shown in fig. 5B and 5C (in order to avoid the complicated drawings, the state after the switches S1 and S2 are turned off is shown in two diagrams), when the first switch S1 is turned off, a first discharge path (indicated by an arrow in fig. 5B) is formed between the winding Np1 and the first snubber capacitor Ca. At this time, the first buffer capacitor Ca receives the leakage inductance Lk and the reflected voltage reflected by the secondary winding Ns to the winding Np1. Then, the first buffer capacitor Ca releases the received energy to the impedance element Ra in the buffer circuit 130.

Similarly, as shown in fig. 5D, when the first switch S1 is turned off and the second switch S2 is turned on, the second input capacitor C2 provides part of the input voltage to the winding Np2. As shown in fig. 5B and 5C, when the second switch S2 is turned off, a second discharge path (as indicated by an arrow in fig. 5E) is formed between the winding Np2 and the second buffer capacitor Cb. At this time, the second buffer capacitor Cb receives the reflected voltage reflected by the secondary winding Ns to the winding Np2. Then, the second buffer capacitor Cb releases the received energy to the impedance element Ra in the buffer circuit 130.

As mentioned above, in some embodiments, the isolated converter may also be designed as a Forward converter (Forward). Fig. 6 is a schematic diagram of an isolated converter 500 according to another embodiment of the disclosure. In fig. 6, similar components related to the embodiment of fig. 1 are denoted by the same reference numerals for easy understanding, and the specific principles of the similar components are described in detail in the previous paragraphs, which are not repeated herein unless necessary for introduction in a cooperative relationship with the components of fig. 6. In this embodiment, the output circuit 540 is electrically connected to the secondary winding Ns. The output circuit 540 includes an output inductor Lo, diodes Do1 and Do2, and an output capacitor Co, and is configured to provide an output power to the load when the windings Np1 and Np2 receive the input voltage and the secondary winding Ns generates the output voltage.

Fig. 7 is a schematic diagram of an isolated converter 600 according to another embodiment of the disclosure. In fig. 7, similar components related to the embodiments of fig. 1 and 6 are denoted by the same reference numerals for easy understanding, and the specific principles of the similar components have been described in detail in the previous paragraphs, which are not repeated herein unless necessary for introduction in a cooperative relationship with the components of fig. 7.

In this embodiment, the isolated converter 700 further comprises at least one unidirectional switch (e.g., the

unidirectional switches

701, 702, which may be implemented by diodes). The

unidirectional switches

701, 702 are electrically connected to the primary winding Np. The

unidirectional switches

701, 702 are turned on in the opposite direction to the diodes in the snubber circuit 130. When the first switch S1 or the second switch S2 is turned off, the

unidirectional switches

701 and 702 are used to prevent current from flowing to the first switch S1 or the second switch S2. For example, when the first switch S1 is turned on and the second switch S2 is turned off, if the windings Np1 and Np2 have different numbers of turns (e.g., the number of turns of the winding Np1 is smaller than that of the winding Np 2), the difference of the induced transformation will generate current, which may flow through the parasitic diode of the second switch S2. By the unidirectional switch 702, an abnormal current path in such a case can be prevented.

Various elements, method steps or technical features of the foregoing embodiments may be combined with each other, and are not limited by the order of description or the order of presentation of the figures in the present disclosure.

Although the present disclosure has been described with reference to specific embodiments, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the disclosure.

Claims

1. An isolated converter, comprising:

an input circuit, comprising at least two input capacitors for providing an input voltage, wherein a voltage division node is provided between the input capacitors;

a transformer, including a primary winding and a secondary winding, for generating an output voltage on the secondary winding according to the input voltage;

the primary winding of the transformer is electrically connected between the first switch and the second switch; and

a buffer circuit electrically connected between the first switch and the second switch and forming a discharge path with the primary winding, wherein the buffer circuit is used for receiving a reflected voltage reflected by the secondary winding back to the primary winding, and the voltage dividing node is connected to the discharge path.

2. The isolated converter of claim 1, wherein the voltage divider node is connected between a plurality of buffer capacitors in the buffer circuit.

3. The isolated converter according to claim 2, wherein the buffer capacitors comprise a first buffer capacitor and a second buffer capacitor, the first buffer capacitor is electrically connected to the first switch and the voltage dividing node, and the second buffer capacitor is electrically connected to the second switch and the voltage dividing node; the buffer circuit further includes:

at least one impedance element electrically connected between the first switch and the second switch.

4. The isolated transformer of claim 3, wherein the at least one impedance element comprises:

a first impedance element connected in parallel to the first buffer capacitor; and

a second impedance element connected in parallel to the second buffer capacitor.

5. The isolated converter of claim 1 wherein the voltage divider node is connected to a center tap of the primary winding.

6. The isolated converter of claim 5, wherein the buffer circuit comprises:

a buffer capacitor electrically connected between the first switch and the second switch; and

an impedance element electrically connected between the first switch and the second switch.

7. The isolated converter of claim 5, wherein the first switch and the second switch are turned on alternately to generate the output voltage on the secondary winding.

8. The isolated converter of claim 7, further comprising:

and the at least one unidirectional switch is electrically connected to the primary winding, and is used for preventing current from flowing to the first switch or the second switch when the first switch or the second switch is turned off.

9. The isolated converter of claim 8, wherein the snubber circuit further comprises at least one diode, the at least one diode being turned on in a direction opposite to a direction in which the at least one unidirectional switch is turned on.

10. The isolated converter of claim 1, wherein the voltage divider node is connected between a plurality of buffer capacitors and a center tap of the primary winding.

11. An isolated converter, comprising:

an input circuit, comprising at least two input capacitors for providing an input voltage, wherein a voltage division node between the input capacitors has a divided voltage;

a transformer including a primary winding and a secondary winding for generating an output voltage on the secondary winding according to the input voltage;

a first switch and a second switch, wherein the primary winding of the transformer is electrically connected between the first switch and the second switch; and

a buffer circuit electrically connected between the first switch and the second switch and forming a discharge path with the primary winding to receive a reflected voltage reflected by the secondary winding back to the primary winding, wherein a node on the discharge path is fixed to the divided voltage.

12. The isolated converter of claim 11, wherein the voltage divider node is connected between a plurality of buffer capacitors in the buffer circuit.

13. The isolated converter according to claim 12, wherein the buffer capacitors include a first buffer capacitor and a second buffer capacitor, the first buffer capacitor is electrically connected to the first switch and the voltage dividing node, and the second buffer capacitor is electrically connected to the second switch and the voltage dividing node; the buffer circuit further includes:

14. The isolated transformer of claim 13, wherein the at least one impedance element comprises:

15. The isolated converter of claim 11 wherein the voltage divider node is connected to a center tap of the primary winding.

16. The isolated converter of claim 15, wherein the buffer circuit comprises:

17. The isolated converter of claim 15, wherein the first switch and the second switch are alternately turned on to generate the output voltage on the secondary winding.

18. The isolated converter of claim 17, further comprising:

19. The isolated converter of claim 18, wherein the snubber circuit further comprises at least one diode, the at least one diode being turned on in a direction opposite to a direction in which the at least one unidirectional switch is turned on.

20. The isolated converter of claim 11, wherein the voltage divider node is connected between a plurality of buffer capacitors and to a center tap of the primary winding.