CN115800692A

CN115800692A - Gallium nitride driving circuit

Info

Publication number: CN115800692A
Application number: CN202211540423.3A
Authority: CN
Inventors: 李可; 朱力强; 周浩; 丁炜
Original assignee: On Bright Electronics Shanghai Co Ltd
Current assignee: On Bright Electronics Shanghai Co Ltd
Priority date: 2022-12-01
Filing date: 2022-12-01
Publication date: 2023-03-14

Abstract

Embodiments of the present invention provide a gallium nitride driving circuit. The gallium nitride driving circuit provided by the embodiment of the invention comprises a control chip and a gallium nitride power tube, wherein the drain of the gallium nitride power tube is connected to the primary winding of the transformer of the gallium nitride driving circuit, the gate of the gallium nitride power tube is connected to the control chip, the source of the gallium nitride power tube is grounded through a first resistor, and the control chip is configured to: detecting the source electrode voltage of the gallium nitride power tube; and when the source voltage of the gallium nitride power tube is detected to increase, providing a gate voltage which is increased along with the increase of the source voltage of the gallium nitride power tube to the gate of the gallium nitride power tube, so that the voltage difference value between the gate voltage and the source voltage of the gallium nitride power tube is kept unchanged.

Description

Gallium nitride driving circuit

Technical Field

The invention belongs to the field of integrated circuits, and particularly relates to a gallium nitride driving circuit.

Background

Compared with a traditional power device metal-oxide-semiconductor field effect transistor (MOSFET), the GaN power tube has lower on-resistance and parasitic capacitance aiming at a switching power supply system, so that the frequency characteristic is better, and the working frequency and the working efficiency of the switching power supply can be greatly improved. Therefore, gaN power transistors are becoming more and more popular as power transistors.

Compared with the conventional power device MOSFET, the grid withstand voltage of the GaN power tube is lower, and is usually around 7V. In an application, in order to fully take advantages such as low impedance and high current capability of the GaN power tube, the gate driving voltage value of the GaN power tube is usually set to be slightly lower than the gate breakdown voltage point.

Disclosure of Invention

In one aspect, an embodiment of the present invention provides a gallium nitride driving circuit, including: the power supply circuit comprises a control chip and a gallium nitride power tube, wherein the drain electrode of the gallium nitride power tube is connected to the primary winding of the transformer of the gallium nitride driving circuit, the grid electrode of the gallium nitride power tube is connected to the control chip, the source electrode of the gallium nitride power tube is grounded through a first resistor, and the control chip is configured to: detecting the source voltage of the gallium nitride power tube; and when the source voltage of the gallium nitride power tube is detected to increase, providing a gate voltage which is increased along with the increase of the source voltage of the gallium nitride power tube to the gate of the gallium nitride power tube, so that the voltage difference value between the gate voltage and the source voltage of the gallium nitride power tube is kept unchanged.

In another aspect, an embodiment of the present invention provides a gallium nitride driving circuit, including a control chip and a gallium nitride power tube, where a drain of the gallium nitride power tube is connected to a primary winding of a transformer of the gallium nitride driving circuit, a gate of the gallium nitride power tube is connected to the control chip, a source of the gallium nitride power tube is grounded via a first resistor, the source of the gallium nitride power tube is used as a reference ground of the control chip, an end of the first resistor away from the source of the gallium nitride power tube is connected to the control chip, and the control chip is configured to: when the gallium nitride power tube is in an off state, providing a grid voltage of zero to the grid of the gallium nitride power tube; and when the gallium nitride power tube is in a conducting state, providing a grid voltage which is at a high level and is constant relative to a source voltage of the gallium nitride power tube to a grid of the gallium nitride power tube, so that a voltage difference value between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged.

The gallium nitride driving circuit provided by the embodiment of the invention can provide the grid voltage which is increased along with the increase of the source voltage of the gallium nitride power tube to the grid of the gallium nitride power tube when the increase of the source voltage of the gallium nitride power tube is detected, so that the voltage difference value between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged, the increase of power consumption on the gallium nitride power tube caused by insufficient conduction of the gallium nitride power tube is prevented, and the damage to the gallium nitride power tube is further prevented.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 shows a schematic structural diagram of a conventional gallium nitride drive circuit;

fig. 2 is a waveform diagram showing relevant signals of a conventional gallium nitride drive circuit;

fig. 3 is a schematic structural diagram of a gallium nitride driving circuit according to a first embodiment of the invention;

FIG. 4 is a waveform diagram showing signals associated with the GaN driver circuit of FIG. 3;

fig. 5 is a schematic structural diagram of a gallium nitride driving circuit according to a second embodiment of the present invention;

FIG. 6 is a waveform diagram showing relevant signals of the GaN driving circuit shown in FIG. 5;

fig. 7 is a schematic structural diagram of a gallium nitride driving circuit according to a third embodiment of the present invention;

FIG. 8 is a waveform diagram showing signals associated with the GaN driver circuit of FIG. 7;

fig. 9 shows a schematic structural diagram of a gallium nitride driving circuit according to a fourth embodiment of the invention; and

fig. 10 is a waveform diagram showing signals associated with the gallium nitride drive circuit shown in fig. 9.

Detailed Description

Features of various aspects and exemplary embodiments of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising 8230; \8230;" comprises 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

In order to better understand the gan driver circuit provided by the embodiment of the present invention, a conventional gan driver circuit will be described first. As shown in fig. 1, fig. 1 is a schematic structural diagram of a conventional gan driver circuit, which is introduced by taking a flyback (flyback) LED driving switching power supply as an example.

As shown in fig. 1, the GaN driver circuit may include a control chip 100, a GaN power transistor (GaN), a transformer T, a resistor Rcs, a diode D1, an output capacitor Cout2, an LED load (e.g., an LED lamp), and the like.

As shown in fig. 1, an output terminal of the control chip 100 may be connected to a Gate of the GaN power tube to output a Gate driving signal Gate for controlling on and off of the GaN power tube, a drain of the GaN power tube may be connected to one end of a primary winding of a transformer T, another end of the primary winding may receive a bus voltage Vbus, a source of the GaN power tube may be connected to the ground via a resistor Rcs, a common terminal of the source of the GaN power tube and the resistor Rcs serves as a CS terminal, the CS terminal may be connected to the control chip 100 to provide a voltage signal Vcs representing a magnitude of a primary current to the control chip 100, one end of a secondary winding of the transformer T is connected to one end of an LED load via a diode D1, another end of the LED load is connected to another end of the secondary winding, and another end of the secondary winding is connected to a load ground, and a capacitor Cout2 is connected in parallel to both ends of the LED load.

Referring to fig. 1, the control chip 100 may be used to control on and off of the GaN power tube. When the GaN power tube is in a conducting state, the input energy is stored in the primary winding, and when the GaN power tube is in an off state, the energy stored in the primary winding is transferred to the auxiliary winding to provide energy for the output end of the gallium nitride driving circuit. The control chip 100 can make the output current of the gallium nitride driving circuit constant by controlling the ratio between the on time and the off time of the GaN power tube, thereby providing a constant output current for the LED load.

The resistor Rcs may be configured to sample a primary side peak current, and provide the sampled primary side peak current to the control chip 100, so that the control chip 100 generates a Pulse Width Modulation (PWM) signal, and outputs a Gate driving signal Gate based on the PWM signal to control the turn-off time of the GaN power tube, thereby adjusting a ratio between the turn-on time and the turn-off time of the GaN power tube, and making an output current of the GaN driving circuit constant.

Fig. 2 is a schematic diagram of waveforms of related signals of a conventional gan driving circuit. Referring to fig. 1 and 2, when the Gate driving signal Gate is at a high level, the GaN power transistor is in a conducting state, the primary current linearly increases, and thus the CS voltage (corresponding to the source voltage of the GaN power transistor) also linearly increases, eventually resulting in a gradual decrease of the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor over time. It is to be noted that when the CS voltage is too high, insufficient conduction of the GaN power tube may be caused, so that power consumption on the GaN power tube increases, heat generation amount increases, and temperature rises. In some severe cases, there may be a risk of damaging the GaN power tube.

Therefore, in order to solve one or more of the above problems, embodiments of the present invention provide a novel GaN driving scheme, by which the gate voltage Vg of the GaN power tube can be increased as the source voltage Vs of the GaN power tube is increased, so as to maintain the voltage difference Vgs thereof constant.

In some embodiments, the GaN driver circuit may include a control chip and a GaN power tube, wherein a drain of the GaN power tube may be connected to a primary winding of a transformer of the GaN driver circuit, a gate of the GaN power tube may be connected to the control chip, a source of the GaN power tube may be grounded via a resistor, and the control chip may be configured to detect a source voltage of the GaN power tube; and when the source voltage is detected to increase, providing a grid voltage which is increased along with the increase of the source voltage of the GaN power tube to the grid of the GaN power tube, so that a voltage difference value Vgs between the grid voltage and the source voltage of the GaN power tube is kept unchanged.

As an example, first, a gallium nitride drive circuit provided in a first embodiment of the present invention will be described below. Fig. 3 shows a schematic structural diagram of a gallium nitride driving circuit according to a first embodiment of the present invention.

As shown in fig. 3, the GaN driver circuit may include a control chip 300, a GaN power transistor, a transformer T, a resistor Rcs, a diode D1, an output capacitor Cout2, an LED load (e.g., an LED lamp), and the like.

As shown in fig. 3, the output terminal of the control chip 300 may be connected to the Gate of the GaN power tube to output a Gate driving signal Gate for controlling on and off of the GaN power tube, the drain of the GaN power tube may be connected to one end of a primary winding of the transformer T, the other end of the primary winding may receive a bus voltage Vbus, the source of the GaN power tube may be connected to the ground via a resistor Rcs, a common terminal of the source of the GaN power tube and the resistor Rcs serves as a CS terminal, the CS terminal may be connected to the control chip 300 to provide a voltage signal Vcs representing the magnitude of a primary current to the control chip 300, one end of a secondary winding of the transformer T is connected to one end of an LED load via a diode D1, the other end of the LED load is connected to the other end of the secondary winding, and the other end of the secondary winding is connected to the load ground, and a capacitor Cout2 is connected in parallel to the two ends of the LED load.

In some embodiments, the control chip 300 may be configured to detect the source voltage Vs of the GaN power tube (i.e., the voltage Vcs across the resistor Rcs), and when it is detected that the source voltage Vs of the GaN power tube increases linearly, provide the gate voltage Vg to the gate of the GaN power tube, which increases with the increase of the source voltage Vs of the GaN power tube, so that the voltage difference Vgs between the gate voltage Vg and the source voltage Vs of the GaN power tube remains unchanged, thereby preventing insufficient turn-on of the GaN power tube, and preventing the GaN power tube from being damaged due to an increase of heat generation amount due to an increase of power consumption on the GaN power tube.

As one example, the control chip 300 may include a supply voltage generation circuit 302 and a gate driving circuit 304, wherein the supply voltage generation circuit 302 may be configured to supply a supply voltage PVDD, which increases with the increase of the source voltage Vs of the GaN power tube, to the gate driving circuit 304 when detecting the increase of the source voltage Vs of the GaN power tube, and the gate driving circuit 304 may be configured to supply a gate voltage Vg, which increases with the increase of the supply voltage PVDD, to the gate of the GaN power tube, such that a voltage difference Vgs between the gate voltage Vg and the source voltage Vs of the GaN power tube remains constant.

As an example, the power supply voltage generation circuit 302 may include an operational amplifier 306, a transistor (e.g., NMOS) transistor M1, resistors R2, R1, and Rc, a variable current source I1, and the like.

As shown, a first terminal (e.g., a positive phase input terminal) of the operational amplifier 306 may receive the preset voltage threshold Vref, a second terminal (e.g., a negative phase input terminal) may be grounded via the variable current source I1, wherein a current of the variable current source I1 increases as a source voltage of the GaN power transistor increases, a first terminal (e.g., a drain) of the transistor M1 may be connected to an internal power supply of the power supply voltage generating circuit 302, a second terminal (e.g., a gate) may be connected to a third terminal (e.g., an output terminal) of the operational amplifier 306, a first terminal of the resistor R2 may be connected to a third terminal (e.g., a source) of the transistor M1, and a third terminal (e.g., a source) of the transistor M1 may be used to output the power supply voltage PVDD, a first terminal of the resistor R1 may be connected to a second terminal of the resistor R2, a second terminal of the resistor R1 may be grounded, a first terminal of the resistor Rc may be connected to a second terminal (e.g., a negative phase input terminal) of the operational amplifier 306, and a second terminal of the resistor Rc may be connected to a common terminal of the resistor R2 and the resistor R1.

As one example, the gate driving circuit 304 may be configured to control a ratio between an on time and an off time of the GaN power tube based on a Pulse Width Modulation (PWM) signal, wherein the PWM signal is generated based on a peak magnitude of a source voltage of the GaN power tube.

Specifically, the first terminal of the Gate driving circuit 304 may receive a PWM signal, the second terminal may receive the power supply voltage PVDD from the power supply voltage generating circuit 302, and the third terminal may be connected to the Gate of the GaN power tube to provide the Gate driving signal Gate thereto, where the PWM signal is related to the peak magnitude of the source voltage of the GaN power tube (the peak magnitude of the source voltage of the GaN power tube is related to the peak magnitude of the primary current flowing through the GaN power tube), and the PWM signal may be used to control the ratio between the on-time and the off-time of the GaN power tube, so as to provide a constant output current to the LED load.

In some embodiments, the Gate driving circuit 304 may be configured to adjust a ratio between on-time and off-time of the GaN power tube based on the PWM signal, and output the Gate driving signal Gate at a high level when the PWM signal is at a high level, and adjust a magnitude of the Gate driving signal Gate based on the power supply voltage PVDD, and output the Gate driving signal Gate at a low level when the PWM signal is at a low level.

For better understanding of the gan driver circuit shown in fig. 3, the operation principle thereof will be described with reference to fig. 4, and fig. 4 is a waveform diagram of relevant signals of the gan driver circuit shown in fig. 3.

As an example, in conjunction with fig. 3 and 4, the supply voltage generation circuit 302 may be further configured to provide the supply voltage PVDD equal to a first preset voltage threshold (e.g., 5.5V) to the gate drive circuit 304 when the GaN power tube is in an off state (the PWM signal is at a low level), and the gate drive circuit 304 may be further configured to provide the gate voltage Vg equal to zero to the gate of the GaN power tube when the GaN power tube is in an off state (the PWM signal is at a low level) such that the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube is zero.

The supply voltage generating circuit 302 may be further configured to provide a supply voltage (V) equal to the sum of the source voltage of the GaN power transistor and a first preset voltage threshold to the gate driving circuit 304 when the GaN power transistor is in a conducting state (the PWM signal is at a high level) _PVDD ＝5.5V+V _CS ) And the gate driving circuit 304 may be further configured to provide a gate voltage (V) equal to the power supply voltage to the gate of the GaN power tube when the GaN power tube is in the on state (the PWM signal is at a high level) _g ＝5.5V+V _CS ) So that the grid voltage (V) of the GaN power tube _g ＝5.5V+V _CS ) And source voltage (V) _S ＝V _CS ) The voltage difference Vgs therebetween is maintained at a first preset voltage threshold (e.g., 5.5V) during the source voltage increase of the GaN power tube.

In summary, when the GaN power transistor is in the on state, the source voltage of the GaN power transistor increases linearly, and the control chip 300 can output the Gate driving signal Gate at a high level through the internal circuit to increase linearly following the linear increase of the source voltage of the GaN power transistor, so as to keep the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor constant.

Specifically, the control chip 300 may sample a peak magnitude of the primary current through the CS port and generate a PWM signal based on the sampled peak magnitude of the primary current, and the Gate driving circuit 304 may be configured to output a Gate driving signal Gate based on the PWM signal to control a ratio between on and off times of the GaN power transistor, a power voltage of the Gate driving circuit 304 is PVDD, and during a period when the PWM signal is at a high level, output the Gate driving signal Gate that increases with an increase of the power voltage PVDD, so that the high level of the Gate driving signal Gate is a PVDD level, and a low level is zero, thereby keeping a voltage difference between the Gate voltage and the source voltage of the GaN power transistor constant during the period when the PWM signal is at the high level.

Specifically, the supply voltage generation circuit 302 may be used to generate the PVDD signal while controlling the supply voltage PVDD to increase with an increase in the source voltage of the GaN power transistor. For example, the power supply voltage generating circuit 302 may be configured to detect a source voltage of the GaN power transistor, control to output a power supply voltage PVDD at a constant voltage, for example, 5.5V, when the GaN power transistor is in an off state and when the source voltage of the GaN power transistor is detected to be zero, and control to output a power supply voltage PVDD that linearly increases with a linear increase of the source voltage of the GaN power transistor when the GaN power transistor is in an on state and when the source voltage of the GaN power transistor is detected to linearly increase, and finally control a relationship between the power supply voltage PVDD and the source voltage of the GaN power transistor during a period when the PWM signal is at a high level as follows: v _PVDD ＝5.5V+V _S 。

In this way, when the GaN power tube is turned on and the source voltage of the GaN power tube changes, the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube is kept constant.

As an example, the control chip 300 may be further configured to: by adjusting the current value I1 of the variable current source, the increment of the power supply voltage is controlled to be equal to the increment of the source voltage of the GaN power tube, and the increment of the grid voltage is controlled to be equal to the increment of the power supply voltage, so that the voltage difference value between the grid voltage and the source voltage of the GaN power tube is kept unchanged.

Specifically, referring to fig. 3 and 4, when the Gate driving signal Gate is at a high level, the GaN power tube is in an on state, and the source voltage of the GaN power tube is linearly increased. Meanwhile, the source voltage of the GaN power tube can be used for controlling the current I1 of the variable current source, and when the source voltage of the GaN power tube is increased, the current I1 is increased. The operational amplifier 306 may be used to adjust the voltage at the V1 node to equal the predetermined voltage threshold Vref. As the current I1 increases, the voltage drop across the resistor Rc increases, causing the voltage V2 to increase, eventually increasing the regulated supply voltage PVDD. By adjusting the value of the current I1, the increase of the power supply voltage PVDD can be made equal to the increase of the source voltage of the GaN power tube. Therefore, the high level of the Gate driving signal Gate increases with the increase of the power supply voltage PVDD, and finally the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor is maintained. When the Gate driving signal Gate is at a low level, the GaN power tube is in an off state, the source voltage of the GaN power tube is at a zero level, and the power supply voltage PVDD is a constant voltage.

As an example, the control chip is further configured to clamp the gate voltage and the source voltage of the GaN power tube by providing a clamp circuit between the gate and the source of the GaN power tube such that a voltage difference between the gate voltage and the source voltage of the GaN power tube remains unchanged.

Specifically, as shown in fig. 5, fig. 5 shows a schematic structural diagram of a gallium nitride driving circuit according to a second embodiment of the present invention.

As shown in fig. 5, the GaN driver circuit may include a control chip 500, a GaN power transistor, a transformer T, a resistor Rcs, a diode D1, an output capacitor Cout2, an LED load (e.g., an LED lamp), and the like.

Referring to fig. 5, an output terminal of the control chip 500 may be connected to a Gate of the GaN power tube to output a Gate driving signal Gate for controlling on and off of the GaN power tube, a drain of the GaN power tube may be connected to one end of a primary winding of the transformer T, another end of the primary winding may receive a bus voltage Vbus, a source of the GaN power tube may be connected to the ground via a resistor Rcs, a common terminal of the source of the GaN power tube and the resistor Rcs serves as a CS terminal, the CS terminal may be connected to the control chip 500 to provide the control chip 500 with a voltage signal Vcs representing a magnitude of a primary current, one end of a secondary winding of the transformer T is connected to one end of an LED load via a diode D1, another end of the LED load is connected to another end of the secondary winding, and another end of the secondary winding is connected to a load ground, and a capacitor Cout2 is connected in parallel to both ends of the LED load.

As an example, the control chip 500 may include a clamping circuit 502 and a gate driving circuit 504, wherein, as described above, one end of the gate driving circuit 504 may receive the PWM signal, the other end may receive the power supply voltage PVDD, and the clamping circuit 502 may be connected between the gate and the source of the GaN power transistor to clamp the gate voltage and the source voltage of the GaN power transistor, so that the voltage difference between the gate voltage and the source voltage of the GaN power transistor remains unchanged.

In some embodiments, in order to maintain the voltage difference value Vgs between the gate and source voltages of the GaN power transistor to be constant when the GaN power transistor is turned on, the embodiment shown in fig. 5 adds a clamping circuit 502 in the control chip 500, for example, the clamping circuit 502 may be composed of a zener diode. One end of the clamping circuit 502 can be connected to the CS terminal, and the other end can be connected to the gate of the GaN power tube, which is used to clamp the voltage difference between the gate voltage of the GaN power tube and the CS terminal voltage. When the PWM signal is at a high level, the Gate driving signal Gate is at a high level, and the GaN power tube is in a conducting state. Meanwhile, since the power voltage PVDD is much larger than the clamping voltage, the Gate driving signal Gate is controlled by the clamping circuit 502. Meanwhile, the clamping circuit 502 can be used to control the Gate voltage of the GaN power transistor to remain unchanged relative to the CS terminal voltage, so that the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor can be kept unchanged when the Gate driving signal Gate is at a high level.

For better understanding of the gallium nitride driving circuit shown in fig. 5, the operation principle thereof is described below with reference to fig. 6, and referring to fig. 6, fig. 6 shows a waveform diagram of relevant signals of the gallium nitride driving circuit shown in fig. 5.

In fig. 6, when the PWM signal is at a high level, the Gate driving signal Gate is at a high level, the GaN power transistor is in a conducting state, and the source voltage of the GaN power transistor increases linearly with time. Meanwhile, the grid voltage of the GaN power tube also linearly increases along with the linear increase of the source voltage of the GaN power tube. The high level of the Gate driving signal Gate can be kept stable at a clamping voltage with respect to the source voltage of the GaN power transistor by the clamping circuit 502 shown in fig. 5. And finally, maintaining the voltage difference Vgs between the grid voltage and the source voltage of the GaN power tube to be constant. When the PWM signal is at a low level, the Gate driving signal Gate is at a low level, the GaN power tube is in an off state, and the source voltage of the GaN power tube is at a zero level.

Referring to fig. 7, fig. 7 is a schematic structural diagram of a gallium nitride driving circuit according to a third embodiment of the present invention.

As shown in fig. 7, the GaN driver circuit may include a control chip 700, a GaN power transistor, a transformer T, a resistor Rcs, a diode D1, an output capacitor Cout2, an LED load (e.g., an LED lamp), and the like.

Referring to fig. 7, an output terminal of a control chip 700 may be connected to a Gate of a GaN power tube to output a Gate driving signal Gate for controlling on and off of the GaN power tube, a drain of the GaN power tube may be connected to one end of a primary winding of a transformer T, the other end of the primary winding may receive a bus voltage Vbus, a source of the GaN power tube may be connected to the ground via a resistor Rcs, a common terminal of the source of the GaN power tube and the resistor Rcs serves as a CS terminal, the CS terminal may be connected to the control chip 700 to provide a voltage signal Vcs representing a magnitude of a primary current to the control chip 700, one end of a secondary winding of the transformer T is connected to one end of an LED load via a diode D1, the other end of the LED load is connected to the other end of the secondary winding, and the other end of the secondary winding is connected to a load ground, and a capacitor Cout2 is connected in parallel to both ends of the LED load.

As an example, the control chip 700 may include a bootstrap driving circuit 702 and a bootstrap circuit (e.g., a capacitor C1), where the bootstrap driving circuit 702 may be configured to charge the gate voltage of the GaN power tube to a supply voltage PVDD of the bootstrap driving circuit 702 during a first period when a time when the source voltage of the GaN power tube starts to increase to a third preset voltage threshold is detected, and to suspend the gate of the GaN power tube during a second period when the source voltage of the GaN power tube is detected to increase from the third preset voltage threshold to a maximum value of the source voltage of the GaN power tube, and the bootstrap circuit may be configured to control the gate voltage of the GaN power tube to increase with the increase of the source voltage of the GaN power tube after the gate of the GaN power tube is suspended, so that a voltage difference between the gate voltage and the source voltage of the GaN power tube remains unchanged.

As one example, the bootstrap driving circuit 702 may include a pulse generation circuit 704, an inverter 706, and switching tubes M2 and M1, wherein the pulse generation circuit 704 may be configured to generate the first control signal a at a low level during a first period, and to generate the first control signal a at a high level during a second period; the inverter 706 may be configured to generate the second control signal B at a low level during the first period and the second period; the switching tube M2 may be configured to be in an on state in response to the first control signal a during a first period, and to be in an off state in response to the first control signal a during a second period; the switching tube M1 may be configured to be in an off state in response to the second control signal B during the first period and the second period; the bootstrap driving circuit 702 may be further configured to charge the gate voltage of the GaN power tube to the power supply voltage PVDD of the bootstrap driving circuit during a first period when the switch tube M2 is in the on state and the switch tube M1 is in the off state, and to suspend the gate of the GaN power tube during a second period when both the switch tube M2 and the switch tube M1 are in the off state.

For better understanding of the gan driver circuit shown in fig. 7, the operation principle thereof will be described with reference to fig. 8, and fig. 8 is a waveform diagram of relevant signals of the gan driver circuit shown in fig. 7.

Specifically, with reference to fig. 7 and 8, when the PWM signal is at a high level, the inverter 706 generates the second control signal B at a low level, the switching tube M1 is in an off state, the pulse generating circuit 704 first generates the first control signal a at a low level, and when the first control signal a is at a low level, the switching tube M2 is in an on state, the gate voltage of the GaN power tube is charged to a PVDD level, and the GaN power tube is turned on. Next, the pulse generating circuit 704 generates the first control signal a at a high level, the switching tube M2 is in an off state, the switching tube M1 is also in an off state, and the gate of the GaN power tube is in a floating state, in this case, since there is no discharge path for the charge on the capacitor C1, the voltage across the capacitor C1 remains unchanged, and finally, the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube remains unchanged when the CS voltage increases.

As shown in fig. 8, when the PWM signal changes from low level to high level, a first control signal a changing from high level to low level is first generated, a second control signal B changes from high level to low level, the switching tube M1 is turned off, the switching tube M2 is turned on, the gate voltage of the GaN power tube is rapidly charged to the power supply voltage PVDD, the GaN power tube is turned on, and the CS voltage is increased relatively little. Next, when the low-level pulse of the first control signal a is ended, the first control signal a changes from low level to high level, the switching tube M2 is turned off, and since the switching tube M1 is turned off, so that the gate of the GaN power tube is in a floating state, the charge on the capacitor C1 has no discharge path, the gate voltage of the GaN power tube also linearly increases along with the linear increase of the CS voltage, so that the gate voltage of the GaN power tube is kept unchanged relative to the CS voltage, and thus the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube is kept unchanged.

When the PWM signal is at a low level, the first control signal a is at a high level, the second control signal B changes from a low level to a high level, the Gate driving signal Gate changes from a high level to a low level, the CS voltage is at a zero level, and the GaN power transistor is turned off.

As an example, an embodiment of the present invention further provides a gallium nitride driving circuit, including a control chip and a GaN power tube, where a drain of the GaN power tube may be connected to a primary winding of a transformer of the gallium nitride driving circuit, a gate of the GaN power tube may be connected to the control chip, a source of the GaN power tube may be grounded via a resistor, and the source of the GaN power tube serves as a reference ground of the control chip, one end of the resistor away from the source of the GaN power tube may be connected to the control chip, and the control chip may be configured to provide a gate voltage of zero to the gate of the GaN power tube when the GaN power tube is in an off state; and when the GaN power tube is in a conducting state, providing a grid voltage which is at a high level and is constant relative to a source voltage (namely, a reference ground of the control chip) of the GaN power tube to the grid electrode of the GaN power tube, so that a voltage difference value between the grid voltage and the source voltage of the GaN power tube is kept unchanged.

Referring to fig. 9, fig. 9 is a schematic structural diagram of a gallium nitride driving circuit according to a fourth embodiment of the present invention.

As shown in fig. 9, the GaN driver circuit may include a control chip 900, a GaN power transistor, a transformer T, a resistor Rcs, a diode D1, an output capacitor Cout2, an LED load (e.g., an LED lamp), and the like.

Referring to fig. 9, an output terminal of the control chip 900 may be connected to a Gate of the GaN power tube to output a Gate driving signal Gate for controlling on and off of the GaN power tube, a drain of the GaN power tube may be connected to one end of a primary winding of the transformer T, the other end of the primary winding may receive a bus voltage Vbus, a source of the GaN power tube may be connected to the ground via a resistor Rcs, and the source of the GaN power tube serves as a reference ground of the control chip, one end of the resistor Rcs, which is far away from the source of the GaN power tube, serves as a CS terminal, the CS terminal may be connected to the control chip 900 to provide a voltage signal Vcs representing a magnitude of a primary current to the control chip 900, one end of a secondary winding of the transformer T is connected to one end of an LED load via a diode D1, the other end of the LED load is connected to the other end of the secondary winding, and the other end of the secondary winding is connected to a load ground, and a capacitor Cout2 is connected in parallel to both ends of the LED load.

For better understanding of the gallium nitride driving circuit shown in fig. 9, the operation principle thereof is described below with reference to fig. 10, and referring to fig. 10, fig. 10 shows a waveform diagram of relevant signals of the gallium nitride driving circuit shown in fig. 9.

Specifically, in conjunction with fig. 9 and 10, the control chip 900 controls the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube to remain unchanged through the negative voltage detection system.

As shown in fig. 9, the control chip 900 uses the source of the GaN power transistor as the reference ground of the control chip. When the gate driving signal gate is at a high level, the GaN power tube is in a conducting state, the primary current is increased, and the voltage drop across the resistor Rcs is increased. Since the source of the GaN power transistor is at zero potential with respect to the control chip 900, the other end of the resistor Rcs (i.e., the CS terminal of the chip) is at negative potential with respect to the control chip 900, while the Gate control signal Gate is at a constant voltage with respect to the control chip, so that the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor is at a constant voltage.

Fig. 10 is a related waveform of the negative voltage detection current chip, and the zero potential point of the control chip is shown in fig. 10. For the control chip 900, when the Gate driving signal Gate is at a high level, the current flowing through the GaN power tube increases linearly, and the slope of the CS terminal voltage is negative, i.e., decreases linearly. While the voltage difference Vgs between the gate voltage and the source voltage of the GaN power tube remains constant. When the Gate driving signal Gate is at a low level, the GaN power transistor is turned off, the CS level is zero, and the voltage difference Vgs between the Gate voltage and the source voltage of the GaN power transistor is also zero.

It is to be understood that the invention is not limited to the precise arrangements and instrumentalities shown. A detailed description of known methods is omitted herein for the sake of brevity. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present invention are not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications and additions or change the order between the steps after comprehending the spirit of the present invention.

The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of the invention are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranets, etc.

It should also be noted that the exemplary embodiments noted in this patent describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed at the same time.

As described above, only the specific embodiments of the present invention are provided, and it can be clearly understood by those skilled in the art that, for convenience and simplicity of description, the specific working processes of the system, the module and the unit described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.

Claims

1. A gallium nitride driving circuit, comprising a control chip and a gallium nitride power tube, wherein a drain of the gallium nitride power tube is connected to a primary winding of a transformer of the gallium nitride driving circuit, a gate of the gallium nitride power tube is connected to the control chip, a source of the gallium nitride power tube is grounded via a first resistor, and the control chip is configured to:

detecting the source voltage of the gallium nitride power tube; and

when the source voltage of the gallium nitride power tube is detected to increase, the grid voltage which is increased along with the increase of the source voltage of the gallium nitride power tube is provided for the grid of the gallium nitride power tube, so that the voltage difference value between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged.

2. The gallium nitride driving circuit according to claim 1, wherein the control chip comprises a power supply voltage generating circuit and a gate driving circuit, wherein:

the power supply voltage generating circuit is configured to provide a power supply voltage which is increased along with the increase of the source voltage of the gallium nitride power tube to the gate driving circuit when the increase of the source voltage of the gallium nitride power tube is detected; and is provided with

The gate driving circuit is configured to provide a gate voltage to the gate of the gallium nitride power tube, which increases with an increase in the power supply voltage, so that a voltage difference between the gate voltage and the source voltage of the gallium nitride power tube remains unchanged.

3. The gallium nitride drive circuit according to claim 2,

the power supply voltage generation circuit is further configured to provide a power supply voltage equal to a first preset voltage threshold to the gate drive circuit when the gallium nitride power tube is in an off state; when the gallium nitride power tube is in a conducting state, a power supply voltage equal to the sum of the source voltage of the gallium nitride power tube and the first preset voltage threshold value is provided for the grid driving circuit; and is provided with

The gate driving circuit is further configured to provide a gate voltage equal to zero to the gate of the gallium nitride power tube when the gallium nitride power tube is in an off state, so that a voltage difference between the gate voltage and the source voltage of the gallium nitride power tube is zero; and when the gallium nitride power tube is in a conducting state, providing a grid voltage equal to the power supply voltage to the grid of the gallium nitride power tube, so that the voltage difference value between the grid voltage and the source voltage of the gallium nitride power tube is kept at the first preset voltage threshold value.

4. The gallium nitride drive circuit of claim 2, wherein the gate drive circuit is further configured to:

controlling a ratio between an on-time and an off-time of the gallium nitride power tube based on a Pulse Width Modulation (PWM) signal, wherein the PWM signal is generated based on a peak magnitude of a source voltage of the gallium nitride power tube.

5. The gallium nitride drive circuit according to claim 2, wherein the power supply voltage generation circuit comprises:

an operational amplifier, a first terminal of which receives a second preset voltage threshold value, and a second terminal of which is grounded via a variable current source, wherein the current of the variable current source increases with the increase of the source voltage of the GaN power tube;

a transistor having a first terminal connected to an internal power supply of the power supply voltage generation circuit and a second terminal connected to a third terminal of the operational amplifier;

a second resistor whose first terminal is connected to the third terminal of the transistor, and whose third terminal is used for outputting the power supply voltage;

a third resistor having a first terminal connected to a second terminal of the second resistor, the second terminal connected to ground; and

a fourth resistor having a first terminal connected to the second terminal of the operational amplifier and a second terminal connected to a common terminal of the second resistor and the third resistor.

6. The gallium nitride drive circuit of claim 5, wherein the control chip is further configured to:

controlling, by a current value of the variable current source, an increase in the supply voltage to be equal to an increase in a source voltage of the gallium nitride power tube, and an increase in the gate voltage to be equal to an increase in the supply voltage, such that a voltage difference between the gate voltage and the source voltage of the gallium nitride power tube remains unchanged.

7. The gallium nitride drive circuit of claim 1, wherein the control chip is further configured to:

clamping the grid voltage and the source voltage of the gallium nitride power tube by providing a clamping circuit between the grid electrode and the source electrode of the gallium nitride power tube, so that the voltage difference between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged.

8. The gan driver circuit of claim 1, wherein the control chip comprises a bootstrap driver circuit and a bootstrap circuit, wherein:

the bootstrap drive circuit is configured to:

charging the gate voltage of the gallium nitride power tube to the power supply voltage of the bootstrap driving circuit during a first period from a moment when the increase of the source voltage of the gallium nitride power tube is detected to a third preset voltage threshold; and

suspending the gate of the GaN power tube during a second period when the source voltage of the GaN power tube is detected to increase from the third preset voltage threshold to the maximum value of the source voltage of the GaN power tube;

the bootstrap circuit is configured to:

after the grid of the gallium nitride power tube is suspended, the grid voltage of the gallium nitride power tube is controlled to increase along with the increase of the source voltage of the gallium nitride power tube, so that the voltage difference between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged.

9. The gallium nitride driver circuit according to claim 8, wherein the bootstrap driver circuit comprises:

a pulse generation circuit configured to generate the first control signal at a low level during the first period and generate the first control signal at a high level during the second period;

an inverter configured to generate a second control signal at a low level during the first period and the second period;

a first switching tube configured to be in an on state in response to the first control signal during the first period and to be in an off state in response to the first control signal during the second period;

a second switching tube configured to be in an off state in response to the second control signal during the first period and the second period; wherein the content of the first and second substances,

the bootstrap driving circuit is further configured to charge a gate voltage of the gallium nitride power tube to a supply voltage of the bootstrap driving circuit during the first period when the first switch tube is in an on state and the second switch tube is in an off state, and to float a gate of the gallium nitride power tube during the second period when the first switch tube and the second switch tube are both in an off state.

10. A gan driver circuit, comprising a control chip and a gan power tube, wherein a drain of the gan power tube is connected to a primary winding of a transformer of the gan driver circuit, a gate of the gan power tube is connected to the control chip, a source of the gan power tube is grounded via a first resistor, the source of the gan power tube is used as a reference ground of the control chip, one end of the first resistor far from the source of the gan power tube is connected to the control chip, and the control chip is configured to:

when the gallium nitride power tube is in an off state, providing a zero grid voltage to a grid electrode of the gallium nitride power tube; and

when the gallium nitride power tube is in a conducting state, a grid voltage which is at a high level and is constant relative to a source voltage of the gallium nitride power tube is provided for a grid electrode of the gallium nitride power tube, so that a voltage difference value between the grid voltage and the source voltage of the gallium nitride power tube is kept unchanged.