CN115794325A - Cross-module function scheduling method and device - Google Patents
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Abstract
The application provides a method and a device for scheduling cross-module functions, wherein the method comprises the following steps: defining a plurality of memory segments in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling functions corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function, so that the problem that errors are easily introduced when a task scheduling file is manually modified in the prior art is solved.
Description
Technical Field
The present application relates to the field of functions, and in particular, to a method and an apparatus for scheduling cross-module functions, a computer-readable storage medium, and a processor.
Background
In the prior art, situations often occur in embedded C code programming that a function in one C file needs to call functions of external multiple modules, such as an initialization scheduling function and a periodic scheduling function that need to call multiple different modules in a task scheduling file. Generally, the task scheduling file is modified by multiple persons, or a specially-assigned person is arranged to be responsible for specially adding function scheduling when other developers add a scheduling interface, the multiple persons modify the same file to cause management confusion, the specially-assigned person is arranged to occupy one labor, and the version of the file is changed frequently and errors are easily introduced no matter the multiple persons modify the file or the specially-assigned person modifies the file.
The function to be scheduled in the task scheduling file is set as a callback function, and when other developers newly add a scheduling interface, the functions to be scheduled need to be registered, and the method has the following defects: 1) A certain RAM space is reserved for placing the scheduling functions registered later by considering the maximum number of the scheduling functions which can be added, so that some RAM space is wasted, and the RAM space is unacceptable in an embedded development environment with very tight RAM resources; 2) The logic statement for executing the register callback function also needs to be put into a certain executable function, and other files also need to be modified; 3) Since the scheduling function is placed in RAM space, the risk of malicious tampering is increased.
In view of the above problems in the related art, no effective solution has been proposed so far.
Disclosure of Invention
The present application mainly aims to provide a method and an apparatus for scheduling cross-module functions, a computer-readable storage medium, and a processor, so as to solve the problem in the prior art that an error is easily introduced when a task scheduling file is modified manually.
In order to achieve the above object, according to an aspect of the present application, there is provided a method for scheduling a function across modules, including: defining a plurality of memory segments in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function.
Optionally, defining a plurality of memory segments in the link file includes: a plurality of memory segments are defined in the link file by a segment command.
Optionally, storing entry addresses of a plurality of predetermined scheduling functions in corresponding memory segments, including: determining the type of a predetermined scheduling function, wherein the type of the predetermined scheduling function is used for characterizing the execution time or the execution function of the function; and storing the entry address of the preset scheduling function in the corresponding memory segment according to the type of the preset scheduling function.
Optionally, storing entry addresses of a plurality of predetermined scheduling functions in corresponding memory segments, including: entry addresses of a plurality of predetermined scheduling functions are stored in corresponding memory segments by segment identifiers, wherein the segment identifiers are used for identifying the positions of the entry addresses.
Optionally, defining a plurality of memory segments in the link file includes: and adding a preset identifier in the memory segment, wherein the preset identifier is used for representing the identifier of the execution end of the memory segment.
Optionally, after reading the target entry address in the memory segment and executing the target scheduling function according to the target entry address, the method includes: and stopping executing the target scheduling function when the preset identification is read.
Optionally, reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, including: determining an execution sequence of the target scheduling function according to the memory segmentation sequence identifier, wherein the memory segmentation sequence identifier is used for representing a command for executing the sequence of the target scheduling function; and controlling the sequence of the target scheduling functions according to the execution sequence.
In order to achieve the above object, according to an aspect of the present application, there is provided a scheduling apparatus of a function across modules, including: a defining unit, configured to define a plurality of memory segments in a link file; the memory unit is used for storing the entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling functions corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and the reading unit is used for reading a target entry address in the memory segment and executing the target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function.
To achieve the above object, according to another aspect of the present application, there is provided a computer-readable storage medium including a stored program, wherein the program performs any one of the above methods of scheduling functions across modules.
To achieve the above object, according to another aspect of the present application, there is provided a processor for executing a program, wherein the program performs any one of the above methods for scheduling functions across modules.
By applying the technical scheme of the application, a plurality of memory segments are defined in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; the method comprises the steps of reading target entry addresses in memory segments, executing a target scheduling function according to the target entry addresses, wherein the target entry addresses are entry addresses of the target scheduling function, defining a plurality of memory segments in a link file in the scheme, and storing the entry addresses of the added scheduling function in the corresponding memory segments when the scheduling function is added, so that the problem that errors are easily introduced when a task scheduling file is artificially modified in the prior art is solved without adding the scheduling function in a task scheduling file manually, errors caused by artificially adding the scheduling function are eliminated, and when the function is scheduled, the entry addresses in the memory segments are read and the scheduling is performed according to the entry addresses.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of the application, and the description of the exemplary embodiments and illustrations of the application are intended to explain the application and are not intended to limit the application. In the drawings:
FIG. 1 is a flow chart illustrating a method for scheduling functions across modules according to an embodiment of the present application;
fig. 2 is a schematic diagram illustrating a scheduling apparatus of a cross-module function according to an embodiment of the present application.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the accompanying drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be used. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
As mentioned in the background section, in order to solve the above problem, in the prior art, an error problem is easily introduced by manually modifying a task scheduling file, and in an exemplary embodiment of the present application, a method, an apparatus, a computer-readable storage medium, and a processor for scheduling a cross-module function are provided.
According to an embodiment of the application, a method for scheduling functions across modules is provided.
Fig. 1 is a flowchart of a method for scheduling functions across modules according to an embodiment of the present application. As shown in fig. 1, the method comprises the steps of:
step S101, defining a plurality of memory segments in a link file;
step S102, storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling;
step S103, reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, where the target entry address is an entry address of the target scheduling function.
In the method for scheduling the function of the ground-crossing module, a plurality of memory segments are defined in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function. In the scheme, a plurality of memory segments are defined in a link file, when a scheduling function is added, the entry address of the added scheduling function is stored in the corresponding memory segment, so that the scheduling function does not need to be added in a task scheduling file manually, errors caused by manual addition of the scheduling function are eliminated, when the function is scheduled, the entry address in the memory segment is read, scheduling is carried out according to the entry address, and the problem that errors are easily introduced when the task scheduling file is manually modified in the prior art is solved.
Specifically, in the compiling stage, the compiler determines a memory segment in which an entry address of the scheduling function is stored through a link file, the link file has a plurality of memory segments, the memory segment is a memory management technology, a main memory is divided into a plurality of segments, one type of scheduling function corresponds to one memory segment, for example, a plurality of initialized scheduling functions are located in the same memory segment, and a plurality of periodic scheduling functions are located in the same memory segment. And storing the entry address of the scheduling function in the corresponding memory segment, wherein the entry address is used for representing the initial position of the code execution of the function, reading the entry address corresponding to the function in the memory segment when the function is scheduled, and executing the scheduling function according to the entry address. By the method, when the scheduling function is newly added, the task scheduling file does not need to be manually modified, and only the corresponding module code needs to be modified, so that the workload of development and verification is reduced, a callback function does not need to be used, the use of RAM space is reduced, and the risk of malicious tampering is reduced.
In a specific embodiment of the present application, defining a plurality of memory segments in a link file includes: a plurality of memory segments are defined in the link file by a segment command. In the embodiment, a plurality of memory segments are determined in the link file through the segment command, and the plurality of memory segments in the link file have the function of summarizing the entry addresses of the scheduling functions to the same memory segment according to the types of the scheduling functions, so that the callback function does not need to be set, the RAM space is saved, and the risk of tampering is reduced.
Specifically, a plurality of memory segments are defined in the link file through a segment command, optionally, the segment command is rodata, for example, through rodata. And defining a memory segment for storing a 10ms periodic task scheduling function through rodata.
In a specific embodiment of the present application, storing entry addresses of a plurality of predetermined scheduling functions in corresponding memory segments includes: determining the type of a predetermined scheduling function, wherein the type of the predetermined scheduling function is used for characterizing the execution time or execution function of the function; and storing the entry address of the preset scheduling function in the corresponding memory segment according to the type of the preset scheduling function. In the embodiment, the predetermined scheduling functions have different types, and the entry addresses of the predetermined scheduling functions are stored in the corresponding memory segments according to the types of the predetermined scheduling functions, so that the task scheduling file is not required to be added manually, errors cannot be introduced manually when the version of the task scheduling file is changed, and the problem that errors are easily introduced when the task scheduling file is modified manually is solved.
Specifically, the predetermined scheduling functions have different types, for example, an initialization scheduling function and a periodic scheduling function, and according to the type of the predetermined scheduling function, entry addresses of the predetermined scheduling functions are stored in corresponding memory segments, for example, when the type of the predetermined scheduling function is the initialization scheduling function, the entry addresses are stored in a data. And when the type of the preset scheduling function is a periodic scheduling function, storing the entry address into the Rodata.
In a specific embodiment of the present application, storing entry addresses of a plurality of predetermined scheduling functions in corresponding memory segments includes: entry addresses of a plurality of predetermined scheduling functions are stored in corresponding memory segments by segment identifiers, wherein the segment identifiers are used for identifying the positions of the entry addresses. In the embodiment, the entry address of the preset scheduling function is stored in the corresponding memory segment through the segment identifier, and the scheduling function does not need to be manually added in the task scheduling file, so that the human resources are saved.
Specifically, the entry address of the predetermined scheduling function is stored in the corresponding memory segment through the segment identifier, which may be a # pragma section, for example, when the type of the predetermined scheduling function is an initialized scheduling function, the entry address is stored in the memory segment initialized by the scheduling function through the # pragma section ". Data.funclist.init"; when the type of the preset scheduling function is the periodic scheduling function, the storage of the entry address to the memory segment of the 10ms periodic task scheduling function is realized through # pragma section ". Data.funclist.task10ms".
In a specific embodiment of the present application, defining a plurality of memory segments in a link file includes: and adding a preset identifier in the memory segment, wherein the preset identifier is used for representing the identifier of the execution end of the memory segment. In this embodiment, the end of the execution of the memory segment is represented by the predetermined identifier, so that the execution process of the scheduling function in the memory segment in the link file is more strict.
Specifically, a predetermined flag is added after each memory segment, and the predetermined flag may be 0x00000000, and is used to identify the end of the scheduling function.
In a specific embodiment of the present application, after reading a target entry address in a memory segment and executing a target scheduling function according to the target entry address, the method includes: and stopping executing the target scheduling function when the preset identification is read. In the embodiment, when the predetermined identifier is identified, the memory segment execution is finished, and the target scheduling function is stopped from being executed, so that the code integrity of the target scheduling function executed according to the target entry address is ensured.
Specifically, according to the entry address of the scheduling function, the entry addresses in the memory segment are sequentially read, and the memory segment is not executed until a predetermined flag is read, where the predetermined flag may be 0x00000000.
In a specific embodiment of the present application, reading a target entry address in a memory segment, and executing a target scheduling function according to the target entry address includes: determining an execution sequence of the target scheduling function according to the memory segmentation sequence identifier, wherein the memory segmentation sequence identifier is used for representing a command for executing the sequence of the target scheduling function; and controlling the sequence of the target scheduling functions according to the execution sequence. In the embodiment, the execution sequence of the target scheduling function is determined according to the memory segmentation sequence identifier, so that the execution of the target scheduling function does not need to manually edit the task scheduling file to determine the execution sequence, and the problem that errors are easily caused by manually editing the task scheduling file is solved.
Specifically, when the type of the scheduling function is an initialized scheduling function, under the condition that the execution sequence of the scheduling function needs to be specified, the initialization sequence of each scheduling function is required, and the order fixing of the scheduling function is realized by refining the memory segment order identifier, for example, the specified scheduling functions in the memory segment can be placed in four memory segments of.rodata. When the type of the scheduling function is a periodic scheduling function, in the case of a scenario that the execution sequence of the scheduling function needs to be specified, the periodic sequence of each scheduling function is required, and the order fixing of the scheduling function is realized by refining the memory segment order identification, for example, the scheduling functions specified in the memory segment can be placed in four memory segments of.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order different than here.
It should be noted that the scheduling apparatus for a cross-module function according to the embodiment of the present application may be used to execute the scheduling method for a cross-module function according to the embodiment of the present application. The following describes a cross-module function scheduling apparatus provided in an embodiment of the present application.
Fig. 2 is a schematic diagram of a scheduling apparatus for cross-module functions according to an embodiment of the present application. As shown in fig. 2, the apparatus includes: a defining unit 201, configured to define multiple memory segments in a link file; a storage unit 202, configured to store entry addresses of multiple predetermined scheduling functions in corresponding memory segments, where one type of the predetermined scheduling function corresponds to one memory segment, where the types of the predetermined scheduling functions corresponding to any two memory segments are different, the entry address is used to represent a starting position of code execution of a function, and the predetermined scheduling function is a function to be scheduled; the reading unit 203 is configured to read a target entry address in the memory segment, and execute a target scheduling function according to the target entry address, where the target entry address is an entry address of the target scheduling function.
In the scheduling device of the function of the ground-crossing module, a plurality of memory segments are defined in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function. In the scheme, a plurality of memory segments are defined in a link file, when a scheduling function is added, the entry address of the added scheduling function is stored in the corresponding memory segment, the fact that the scheduling function is not required to be added in a task scheduling file manually is achieved, errors caused by manual addition of the scheduling function are eliminated, when the function is scheduled, the entry address in the memory segment is read, scheduling is carried out according to the entry address, and the problem that errors are easily introduced when the task scheduling file is modified manually in the prior art is solved.
Specifically, in the compiling stage, the compiler determines a memory segment in which an entry address of the scheduling function is stored through a link file, the link file has a plurality of memory segments, the memory segment is a memory management technology, a main memory is divided into a plurality of segments, one type of scheduling function corresponds to one memory segment, for example, a plurality of initialized scheduling functions are located in the same memory segment, and a plurality of periodic scheduling functions are located in the same memory segment. And storing the entry address of the scheduling function in the corresponding memory segment, wherein the entry address is used for representing the initial position of the code execution of the function, reading the entry address corresponding to the function in the memory segment when the function is scheduled, and executing the scheduling function according to the entry address. By the aid of the device, when the scheduling function is newly added, the task scheduling file does not need to be manually modified, and only the corresponding module code needs to be modified, so that workload of development and verification is reduced, callback functions do not need to be used, RAM space usage is reduced, and risk of malicious tampering is reduced.
In a specific embodiment of the present application, the defining unit 201 includes: and the definition subunit is used for defining a plurality of memory segments in the link file through the segment command. In the embodiment, a plurality of memory segments are determined in the link file through the segment command, and the plurality of memory segments in the link file have the function of summarizing the entry addresses of the scheduling functions to the same memory segment according to the types of the scheduling functions, so that the callback function does not need to be set, the RAM space is saved, and the risk of tampering is reduced.
Specifically, a plurality of memory segments are defined in the link file through a segment command, optionally, the segment command is rodata, for example, through rodata. Through data, funclist, task10ms, a memory segment for storing a task scheduling function of 10ms period is defined.
In a specific embodiment of the present application, the storage unit 202 includes: the first determining subunit is used for determining the type of the predetermined scheduling function, wherein the type of the predetermined scheduling function is used for characterizing the execution time or execution function of the function; the first storage subunit is configured to store the entry address of the predetermined scheduling function in the corresponding memory segment according to the type of the predetermined scheduling function. In the embodiment, the predetermined scheduling functions have different types, and the entry addresses of the predetermined scheduling functions are stored in the corresponding memory segments according to the types of the predetermined scheduling functions, so that the task scheduling file is not required to be added manually, errors cannot be introduced manually when the version of the task scheduling file is changed, and the problem that errors are easily introduced when the task scheduling file is modified manually is solved.
Specifically, the predetermined scheduling functions have different types, for example, an initialized scheduling function and a periodic scheduling function, and entry addresses of the predetermined scheduling functions are stored in corresponding memory segments according to the types of the predetermined scheduling functions, for example, when the type of the predetermined scheduling function is the initialized scheduling function, the entry addresses are stored in the data. And when the type of the preset scheduling function is a periodic scheduling function, storing the entry address into the coarse.
In a specific embodiment of the present application, the storage unit 202 includes: and the second storage subunit is used for storing the entry addresses of the plurality of preset scheduling functions in the corresponding memory segments through segment identification, wherein the segment identification is used for identifying the positions of the entry addresses. In the embodiment, the entry address of the preset scheduling function is stored in the corresponding memory segment through the segment identifier, and the scheduling function does not need to be manually added in the task scheduling file, so that the human resources are saved.
Specifically, the entry address of the predetermined scheduling function is stored in the corresponding memory segment through the segment identifier, which may be a # pragma section, for example, when the type of the predetermined scheduling function is an initialized scheduling function, the entry address is stored in the memory segment initialized by the scheduling function through the # pragma section ". Data.funclist.init"; when the type of the preset scheduling function is the periodic scheduling function, the storage of the entry address to the memory segment of the 10ms periodic task scheduling function is realized through # pragma section ". Data.funclist.task10ms".
In a specific embodiment of the present application, the defining unit 201 includes: and the adding subunit is used for adding a predetermined identifier to the memory segment, wherein the predetermined identifier is used for representing an identifier for ending the execution of the memory segment. In this embodiment, the end of the execution of the memory segment is represented by the predetermined identifier, so that the execution process of the scheduling function in the memory segment in the link file is more strict.
Specifically, a predetermined flag is added after each memory segment, and the predetermined flag may be 0x00000000, and is used to identify the end of the scheduling function.
In a specific embodiment of the present application, the apparatus comprises: and the stopping unit is used for stopping executing the target scheduling function under the condition that a preset mark is read after the target entry address in the memory segment is read and the target scheduling function is executed according to the target entry address. In the embodiment, when the predetermined identifier is identified, the memory segment execution is finished, and the target scheduling function is stopped from being executed, so that the code integrity of the target scheduling function executed according to the target entry address is ensured.
Specifically, according to the entry address of the scheduling function, the entry addresses in the memory segment are sequentially read, and the memory segment is not executed until a predetermined flag is read, where the predetermined flag may be 0x00000000.
In a specific embodiment of the present application, the reading unit 203 includes: the second determining subunit is configured to determine an execution sequence of the target scheduling function according to the memory segment sequence identifier, where the memory segment sequence identifier is used to represent a command for executing the target scheduling function sequence; and the control subunit is used for controlling the sequence of the target scheduling function according to the execution sequence. In the embodiment, the execution sequence of the target scheduling function is determined according to the memory segmentation sequence identifier, so that the execution of the target scheduling function does not need to manually edit the task scheduling file to determine the execution sequence, and the problem that errors are easily caused by manually editing the task scheduling file is solved.
Specifically, when the type of the scheduling function is an initialized scheduling function, under the condition that the execution sequence of the scheduling function needs to be specified, the initialization sequence of each scheduling function is required, and the order fixing of the scheduling function is realized by refining the memory segment order identifier, for example, the specified scheduling functions in the memory segment can be placed in four memory segments of.rodata. When the type of the scheduling function is a periodic scheduling function, in the case of a scenario that the execution sequence of the scheduling function needs to be specified, the periodic sequence of each scheduling function is required, and the order fixing of the scheduling function is realized by refining the memory segment order identification, for example, the scheduling functions specified in the memory segment can be placed in four memory segments of.
The scheduling device for cross-module functions includes a processor and a memory, the definition unit 201 and the like are stored in the memory as program units, and the processor executes the program units stored in the memory to implement corresponding functions.
The processor comprises a kernel, and the kernel calls the corresponding program unit from the memory. The kernel can be set to be one or more than one, and the problem that errors are easily introduced when the task scheduling file is manually modified in the prior art is solved by adjusting kernel parameters.
The memory may include volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM), including at least one memory chip.
The embodiment of the invention provides a computer-readable storage medium, which includes a stored program, wherein when the program runs, a device where the computer-readable storage medium is located is controlled to execute the cross-module function scheduling method.
The embodiment of the invention provides a processor, which is used for running a program, wherein the program executes the cross-module function scheduling method during running.
An embodiment of the present invention provides an apparatus, where the apparatus includes a processor, a memory, and a program that is stored in the memory and is executable on the processor, and when the processor executes the program, at least the following steps are implemented:
step S101, defining a plurality of memory segments in a link file;
step S102, storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling;
step S103, reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, where the target entry address is an entry address of the target scheduling function.
The device herein may be a server, a PC, a PAD, a mobile phone, etc.
The present application further provides a computer program product adapted to perform a program initialized with at least the following method steps when executed on a data processing device:
step S101, defining a plurality of memory segments in a link file;
step S102, storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling functions corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling;
step S103, reading a target entry address in the memory segment, and executing the target scheduling function according to the target entry address, where the target entry address is an entry address of the target scheduling function.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Disks (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
1) In the cross-module function scheduling determination method, a plurality of memory segments are defined in a link file; storing entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function. In the scheme, a plurality of memory segments are defined in a link file, when a scheduling function is added, the entry address of the added scheduling function is stored in the corresponding memory segment, the fact that the scheduling function is not required to be added in a task scheduling file manually is achieved, errors caused by manual addition of the scheduling function are eliminated, when the function is scheduled, the entry address in the memory segment is read, scheduling is carried out according to the entry address, and the problem that errors are easily introduced when the task scheduling file is modified manually in the prior art is solved.
2) In the scheduling determination device for the cross-module function, a definition unit is used for defining a plurality of memory segments in a link file; the memory unit is used for storing the entry addresses of a plurality of preset scheduling functions in corresponding memory segments, wherein one type of the preset scheduling functions corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the initial positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling; and the reading unit is used for reading a target entry address in the memory segment and executing the target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function. In the device, a plurality of memory segments are defined in a link file, when a scheduling function is added, the entry address of the added scheduling function is stored in the corresponding memory segment, so that the scheduling function does not need to be added in a task scheduling file manually, the error caused by manual addition of the scheduling function is eliminated, when the function is scheduled, the entry address in the memory segment is read, the scheduling is carried out according to the entry address, and the problem that the error is easily introduced when the task scheduling file is manually modified in the prior art is solved.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A method for scheduling cross-module functions, comprising:
defining a plurality of memory segments in a link file;
storing entry addresses of a plurality of preset scheduling functions in the corresponding memory segments, wherein one type of the preset scheduling function corresponds to one memory segment, the types of the preset scheduling functions corresponding to any two memory segments are different, the entry addresses are used for representing the starting positions of code execution of the functions, and the preset scheduling functions are functions needing scheduling;
and reading a target entry address in the memory segment, and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function.
2. The method of claim 1, wherein defining a plurality of memory segments in a link file comprises:
and defining a plurality of memory segments in the link file through a segment command.
3. The method of claim 1, wherein storing entry addresses of a plurality of predetermined scheduling functions in the corresponding memory segment comprises:
determining the type of the predetermined scheduling function, wherein the type of the predetermined scheduling function is used for characterizing the execution time or execution function of the function;
and storing the entry address of the preset scheduling function in the corresponding memory segment according to the type of the preset scheduling function.
4. The method of claim 1, wherein storing entry addresses of a plurality of predetermined scheduling functions in the corresponding memory segment comprises:
and storing the entry addresses of the plurality of predetermined scheduling functions in the corresponding memory segments through segment identifiers, wherein the segment identifiers are used for identifying the positions of the entry addresses.
5. The method of claim 1, wherein defining a plurality of memory segments in a link file comprises:
and adding a preset identifier in the memory segment, wherein the preset identifier is used for representing an identifier for ending the execution of the memory segment.
6. The method of claim 5, wherein after reading a target entry address in the memory segment and executing a target scheduling function according to the target entry address, the method comprises:
and stopping executing the target scheduling function when the preset identification is read.
7. The method of claim 1, wherein reading a target entry address in the memory segment and executing a target scheduling function according to the target entry address comprises:
determining an execution sequence of the target scheduling function according to a memory segmentation sequence identifier, wherein the memory segmentation sequence identifier is used for representing a command for executing the sequence of the target scheduling function;
and controlling the sequence of the target scheduling function according to the execution sequence.
8. An apparatus for scheduling functions across modules, comprising:
the device comprises a defining unit, a searching unit and a judging unit, wherein the defining unit is used for defining a plurality of memory segments in a link file;
a storage unit, configured to store entry addresses of multiple predetermined scheduling functions in corresponding memory segments, where one type of the predetermined scheduling function corresponds to one memory segment, and the types of the predetermined scheduling functions corresponding to any two memory segments are different, where the entry address is used to represent a starting position of code execution of the function, and the predetermined scheduling function is a function to be scheduled;
and the reading unit is used for reading a target entry address in the memory segment and executing a target scheduling function according to the target entry address, wherein the target entry address is an entry address of the target scheduling function.
9. A computer-readable storage medium, comprising a stored program, wherein the program, when executed, controls an apparatus in which the computer-readable storage medium is located to perform the method for scheduling functions across modules according to any one of claims 1 to 7.
10. A processor configured to run a program, wherein the program when running performs the method of scheduling cross-module functions of any one of claims 1 to 7.
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