CN115794014A

CN115794014A - Data restoration detection method and device for image input interface and storage medium

Info

Publication number: CN115794014A
Application number: CN202211454687.7A
Authority: CN
Inventors: 郑木彬; 陈超
Original assignee: Zhuhai Haiqi Semiconductor Co ltd
Current assignee: Zhuhai Haiqi Semiconductor Co ltd
Priority date: 2022-11-21
Filing date: 2022-11-21
Publication date: 2023-03-14

Abstract

The invention provides a data reduction detection method, equipment and a storage medium of an image input interface, wherein the method comprises the following steps: a tracing unit is arranged on the data input side of the Video Capture unit; acquiring a Clock signal, adjusting the delay value of the Clock signal by using a Block delay unit, generating a Clock CLKP and/or a Clock CLKN, and inputting the Clock CLKP and/or the Clock CLKN to a tracking _ ctrl unit; controlling the delay series of the Block delay unit by using a tracking _ ctrl unit, adjusting to ctrl and data signals meeting the Clock signal sampling input by adopting an adjusting strategy, and recording a delay setting interval meeting the requirement; using the control information of the RGB interface protocol as a basis for judging the correct sampling data of the Clock signal; and after the Training _ ctrl unit acquires the effective adjustment value, directly transmitting the effective adjustment value to the processing module to complete data restoration of the image input interface. The invention enables the image data to be truly restored through the detection and adjustment circuit, thereby enabling the image data timing to meet the standard specifications of CEA/VESA and the like.

Description

Data restoration detection method and device for image input interface and storage medium

Technical Field

The invention relates to the technical field of data processing, in particular to a data reduction detection method of an image input interface and a Training unit applied to the algorithm, and also relates to computer equipment and a storage medium for realizing the method.

Background

With the popularization of high-resolution lcd screens, the requirement of larger transmission bandwidth is brought, for example, RGB interfaces, on one hand, the total bandwidth per unit time can be increased by increasing the clock; in addition, the data interface of some screens adopts a DDR data format, so that the transmission bandwidth of a unit clock can be doubled, and the transmission requirement of images with higher resolution can be met.

In general data format interfaces, such as DDR, DRAM interfaces, SDIO interfaces, and the like, to ensure that both receiving sides sample based on correct clocks, a tracing operation is required, and when the tracing operation is performed, a sending side sends specific data to a receiving side, and the receiving side ensures that the data can be effectively restored through the tracing operation. However, the RGB input image interface does not have a tracing procedure defined in the protocol, so the sender does not send specific data required for tracing, and the receiver cannot restore data by tracing.

At present, an existing RGB input image interface chip circuit, for example, supporting image interfaces such as bt.656/bt.601/bt.1120/RGB888, generally uses a single edge or double edges of a clock to acquire input data and then to restore image data, if a resolution ratio is relatively high, a clock frequency is relatively high, a timing margin between a clock line and a data line or a control line is relatively small, and an additional chip has different horns, which is easy to cause a situation of acquiring an unstable region or even a metastable state of data, so that a timing sequence of timing is not stable enough, and is not completely in accordance with a standard, and an image error may be caused.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention aims to provide a data reduction detection method, equipment and a storage medium of an image input interface.

In a first aspect, the present invention provides a method for detecting data restoration of an image input interface, including: a tracing unit is arranged on the data input side of the Video Capture unit; acquiring a Clock signal, adjusting the delay value of the Clock signal by using a Block delay unit, generating a Clock CLKP and/or a Clock CLKN, and inputting the Clock CLKP and/or the Clock CLKN to a tracking _ ctrl unit; controlling the delay series of the Block delay unit by using a tracking _ ctrl unit, adjusting to ctrl and data signals meeting the Clock signal sampling input by adopting an adjusting strategy, and recording a delay setting interval meeting the requirement; using the control information of the RGB interface protocol as a basis for judging the correct sampling data of the Clock signal; and after the Training _ ctrl unit acquires the effective adjustment value, directly transmitting the effective adjustment value to the processing module to complete data restoration of the image input interface.

According to the data restoration detection method of the image input interface provided by the invention, the tracking unit comprises a Block delay unit, an inverter and a tracking _ ctrl unit, wherein the Block delay unit is used for adjusting clock delay of an input clock, the inverter is used for outputting an inverted clock CLKN, and the tracking _ ctrl unit is used for controlling the delay series of the Block delay unit.

According to the data restoration detection method of the image input interface provided by the invention, the Clock CLKP is directly output by the Block delay unit through the Clock signal after passing through the Block delay unit, the reverse Clock CLKN is obtained through the inverter through the Clock signal after passing through the Block delay unit, and if the image input interface is in a DDR protocol mode, the Clock CLKN and the CLKP are simultaneously used as data sampling Clock edges.

According to the data reduction detection method of the image input interface provided by the invention, a designed Block delay unit is assumed to be n-level, and a tracking _ ctrl unit is used for configuring an adjustment strategy of the Block delay unit, wherein the method comprises the following steps of: carrying out incremental adjustment from the 0 level until the correctly sampled data is obtained to obtain the minimum effective delay value, then carrying out incremental adjustment from the n-1 level until the correctly sampled data is obtained to obtain the maximum effective delay value, and then taking the intermediate number of the minimum effective delay value and the maximum effective delay value as the final result;

according to the data restoration detection method of the image input interface provided by the invention, a designed Block delay unit is assumed to be n-level, and a tracking _ ctrl unit is used for configuring an adjustment strategy of the Block delay unit, and the method comprises the following steps: starting with level 0 incremental adjustments, the configuration of all erroneous sample data is recorded and the configuration furthest from all erroneous configurations is then selected as the optimal configuration.

According to the data restoration detection method of the image input interface provided by the invention, a designed Block delay unit is assumed to be n-level, and a tracking _ ctrl unit is used for configuring an adjustment strategy of the Block delay unit, and the method comprises the following steps: setting a threshold value m, starting from level 0 and increasing the adjustment, and if detecting that all the delays of the continuous m times of configurations have correct samples, selecting the median value of the continuous m times of correct sample configurations as a final result.

According to the data restoration detection method of the image input interface, the protocol of BT.656/BT.1120 containing SAV/EAV key code words is judged whether the acquired continuous data meet the SAV/EAV key code words or not as the judgment basis for judging whether the data are correct or not.

According to the data restoration detection method of the image input interface provided by the invention, for the BT.601 or RGB interface, as the interface is provided with a control signal and meets the timing protocol, 1 or more conditions are configured and detected to be used as an effective judgment basis, or a continuous meeting condition of a single condition is configured to be used as an effective judgment basis.

According to the data restoration detection method of the image input interface, after the Training _ ctrl unit obtains the effective adjustment value, an interrupt state is output to inform the system of completing correction and the corresponding state.

Therefore, compared with the prior art, the invention can be applied to an RGB input image interface chip circuit, a simple internal tracing method is added mainly aiming at an RGB input image interface, and the image data can be quickly, conveniently and correctly restored on the premise of not increasing the requirement on a sender.

Therefore, a tracing logic is added in the Video Capture unit to ensure that correct data can be sampled, so that the problems of unstable areas or metastable states of different kernel ICs and multi-bit data bus sampling are solved.

In a second aspect, the present invention also provides an electronic device, comprising:

a memory storing computer-executable instructions;

a processor configured to execute the computer-executable instructions,

when the computer-executable instructions are executed by the processor, the method for detecting data restoration of the image input interface is implemented.

In a third aspect, the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores computer-executable instructions, and when executed by a processor, the computer-executable instructions implement the steps of the data restoration detection method for an image input interface according to any one of the foregoing methods.

It can be seen that the present invention provides an electronic device and a storage medium for a data restoration detection method of an image input interface, including: one or more memories, one or more processors. The memory is used for storing the program codes and intermediate data generated in the program running process, storing the model output result and storing the model and the model parameters; the processor is used for processor resources occupied by code running and a plurality of processor resources occupied when the model is trained.

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

Drawings

Fig. 1 is a schematic diagram of a system of an embodiment of a data reduction detection method for an image input interface according to the present invention.

Fig. 2 is a schematic diagram of a Training unit in an embodiment of a data reduction detection method for an image input interface according to the present invention.

FIG. 3 is a flowchart illustrating an embodiment of a method for detecting data restoration of an image input interface according to the present invention.

Fig. 4 is a schematic diagram of an embodiment of a data restoration detection method for an image input interface according to the present invention, wherein the FIFO controller controls the input of data and the output of data.

FIG. 5 is a schematic diagram of a tracing unit added between a data input interface and a FIFO controller according to an embodiment of the data recovery detection method for the image input interface.

Fig. 6 is a schematic diagram of the bt.1120 interface in an embodiment of the data restoration detection method for the image input interface according to the present invention.

Fig. 7 is a schematic diagram of timing content in an embodiment of a data reduction detection method for an image input interface according to the present invention.

Detailed Description

Referring to fig. 1 to fig. 3, the method for detecting data restoration of an image input interface according to the present invention includes:

step S1, a tracing unit is arranged on the data input side of a Video Capture unit;

step S2, acquiring the Clock signal, adjusting the delay value of the Clock signal by using a Block delay unit, generating a Clock CLKP and/or a Clock CLKN, and inputting the Clock CLKP and/or the Clock CLKN to a Training _ ctrl unit;

s3, controlling the delay series of the Block delay unit by using a tracking _ ctrl unit, adjusting the delay series to meet the ctrl and data signals input by Clock signal sampling by adopting an adjusting strategy, and recording a delay setting interval meeting the requirement;

s4, using control information of an RGB interface protocol as a basis for judging correct sampling data of the Clock signal;

and step S5, after the Training _ ctrl unit acquires the effective adjustment value, directly transmitting the effective adjustment value to the processing module to complete data restoration of the image input interface.

In this embodiment, the tracking unit includes a Block delay unit for adjusting a clock delay of an input clock, an inverter for outputting an inverted clock CLKN, and a tracking _ ctrl unit for controlling a delay series of the Block delay unit.

In the above step S1, the Video Capture unit mainly comprises a FIFO controller, which controls the input of data and the output of data, as shown in fig. 4. The tracing implementation method added in this embodiment is equivalent to adding a tracing unit between the input interface and the FIFO interface, and is responsible for transferring the data input interface after completing the correction to the next FIFO unit, as shown in fig. 5.

Specifically, a drawing structure diagram of a tracing added to the Video Capture unit in this embodiment is shown in fig. 2: the incoming Clock signal passes through a Block delay unit, generates Clock CLKP and/or CLKN (if in double edge ddr mode), and then passes through a tracking ctrl unit. The Block delay unit is a unit for adjusting the delay value of the Clock signal, and the number of stages can be planned according to design requirements; the tracing ctrl unit is used for controlling the delay series of the Block delay unit, adopting a certain detection strategy, adjusting the input ctrl and data signals to be correctly sampled by the clock signal, and recording the delay setting interval meeting the requirement. In addition, the control information of the RGB interface protocol is used as the judgment basis for correctly sampling data by the clock. Therefore, the design can effectively solve the problem of alignment of clock and multi-bit data physical timing skew, and can avoid sampling to an unstable area or a metastable state of data, so that the data can be correctly restored.

In the step S2, the Clock CLKP is directly output from the Block delay unit for the Clock signal after passing through the Block delay unit, the reverse Clock CLKN is obtained from the Clock signal after passing through the Block delay unit through the inverter, and if the image input interface is in the DDR protocol mode, the clocks CLKN and CLKP are used as the data sampling Clock edge at the same time.

In this embodiment, assuming that the designed Block delay unit is n-level, the configuration of the adjustment strategy of the Block delay unit using the tracking _ ctrl unit includes:

and starting incremental adjustment from the level 0 until the correctly sampled data is acquired to obtain the minimum effective delay value, then starting incremental adjustment from the level n-1 until the correctly sampled data is acquired to obtain the maximum effective delay value, and then taking the intermediate number of the minimum effective delay value and the maximum effective delay value as the final result.

In this embodiment, assuming that the designed Block delay unit is n-level, configuring the adjustment strategy of the Block delay unit using a tracking _ ctrl unit includes:

starting from the 0 level to perform incremental adjustment, recording the configuration of all wrong sampling data, and selecting the configuration which is farthest away from all wrong configurations as the optimal configuration;

setting a threshold value m, starting from level 0, and gradually increasing, and if detecting that all the delays of the m continuous configurations have correct samples, selecting the median value of the m continuous configurations with correct samples as a final result.

In this embodiment, for the protocol with the SAV/EAV key words in bt.656/bt.1120, the correctness is determined by determining whether the acquired continuous data satisfies the SAV/EAV key words.

In this embodiment, for the bt.601 or RGB interface, since the interface has control signals and satisfies the timing protocol, 1 or more conditions are configured and detected as the effective judgment basis, or a condition continuously satisfied by a single condition is configured and detected as the effective judgment basis.

In this embodiment, after the Training _ ctrl unit obtains the valid adjustment value, the interrupt status notification system is output to complete the correction and the corresponding status.

In practical application, the technical scheme of the invention is mainly applied to an application scene as shown in fig. 1, video data passes through a Video Capture unit, or the Video data is written back to a memory, or the data is acquired, and image data is output to a next-stage image processing unit (Video post process) according to a standard time sequence.

The invention mainly solves the data recovery problem of the input interface of BT.656/BT.601/BT.1120/RGB video, which comprises the following steps:

A. the bt.656 interface and the bt.1120 interface have no control signal, only have data signal, but the data signal has header signal of SEV/EAV fixed code word to represent timing content, such as BT.1120 shown in FIG. 6.

B. The BT.601 and RGB video interfaces have control signals and data signals, and the timing content is shown in FIG. 7.

The method provided by the invention is to add a tracing logic in the Video Capture unit, can ensure that correct data is correctly sampled, can avoid the problems of unstable areas or metastable states of different core ICs and multi-bit data bus sampling, and has the following specific implementation scheme:

1. the method comprises the steps of designing a Block delay unit which meets the design requirement series, wherein the Block delay unit has the function of adjusting the clock delay of an input clock, the value of the clock delay of each stage can be planned in advance according to the application requirement, the adjustable series range is also planned according to the design requirement, for example, 32 stages or 64 stages are designed, and the adjustable range of the clock delay can preferably cover one cycle or half cycle of the input frequency.

2. The clock after the Block delay unit goes through an inverter to obtain an inverted clock CLKN, and if the image input interface is in the DDR protocol mode, both the inverted clock CLKN and the clock CLKP are used as data sampling clock edges.

3. The functions to be realized by the Training _ ctrl unit include:

A. the configurable adjustment strategy of the Block delay unit, taking the adjustment of the Block delay unit of 32 stages as an example, can configure various adjustment strategies, such as: (1) Starting incremental adjustment from the level 0 until the judgment that the data can be correctly sampled is obtained, obtaining the minimum effective delay value, starting incremental adjustment from the level 31 until the judgment that the data can be correctly sampled is obtained, obtaining the maximum effective delay value, and selecting the intermediate number of the two values as the final result; (2) Starting from the level 0 to perform incremental adjustment, recording the configuration of all wrong sampling data, and selecting the configuration which is farthest away from all wrong configurations as the optimal configuration; (3) Setting a threshold value m, starting from level 0 and increasing the adjustment, and if detecting that all the delays of the continuous m times of configurations have correct samples, selecting the median value of the continuous m times of correct sample configurations as the final result.

B. For protocols similar to bt.656/bt.1120 with SAV/EAV key codewords, it is needless to say that continuous detection can be configured for multiple times as effective judgment by judging whether collected continuous data have key codewords meeting SAV/EAV as judgment basis.

C. For bt.601 or RGB interface, since the interface has control signals of DE/VSYNC/HSYNC, etc., and they satisfy some common timing protocols, for example, the effective clock count value of each line DE is to be equal, the effective pulse width of HSYNC is to be equal, or the clock count value between HSYNC pulses is to be equal, the pulse width of VSYNC is to be an integer number of clock count values between HSYNC pulses, or the clock count value between VSYNC pulses is to be equal, etc., 1 or more conditions can be configured to be detected as the effective judgment basis, or the continuous satisfaction condition of a single condition can be flexibly configured as the effective judgment basis.

D. And finally, after the tracing correction is finished and an effective adjusting value is obtained, an interrupt state is output to inform the system that the tracing is finished and the corresponding state is obtained.

E. Whether only the image data after tracing is finished is output can be configured by the system.

Therefore, the invention adds a tracing logic in the Video Capture unit to ensure that correct data can be sampled, thereby avoiding the problems of unstable areas or metastable states of different kernel ICs and multi-bit data bus sampling.

In one embodiment, an electronic device is provided, which may be a server. The computer device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the electronic device is used for storing data. The network interface of the electronic device is used for connecting and communicating with an external terminal through a network. The computer program is executed by a processor to implement a method of data restoration detection for an image input interface.

It will be understood by those skilled in the art that the electronic device structure shown in the present embodiment is only a partial structure related to the present application, and does not constitute a limitation to the electronic device to which the present application is applied, and a specific electronic device may include more or less components than those shown in the present embodiment, or combine some components, or have different component arrangements.

In an embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when being executed by a processor, carries out the steps of the above-mentioned method embodiments.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above may be implemented by hardware instructions of a computer program, which may be stored in a non-volatile computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include at least one of non-volatile and volatile memory. Non-volatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical storage, or the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others.

In addition, the logic instructions in the memory may be implemented in the form of software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

It can be seen that the present invention provides an electronic device and a storage medium for a data reduction detection method of an image input interface, comprising: one or more memories, and one or more processors. The memory is used for storing the program codes and intermediate data generated in the program running process, storing the model output result and storing the model and the model parameters; the processor is used for processor resources occupied by code running and a plurality of processor resources occupied when the model is trained.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.

Claims

1. A data restoration detection method for an image input interface is characterized by comprising the following steps:

a tracing unit is arranged on the data input side of the Video Capture unit;

acquiring a Clock signal, adjusting the delay value of the Clock signal by using a Block delay unit, generating a Clock CLKP and/or a Clock CLKN, and inputting the Clock CLKP and/or the Clock CLKN to a tracking _ ctrl unit;

controlling the delay series of the Block delay unit by using a tracking _ ctrl unit, adjusting to meet the ctrl and data signals input by Clock signal sampling by adopting an adjusting strategy, and recording a delay setting interval meeting the requirement;

using the control information of the RGB interface protocol as a basis for judging the correct sampling data of the Clock signal;

and after the Training _ ctrl unit acquires the effective adjustment value, directly transmitting the effective adjustment value to the processing module to complete data restoration of the image input interface.

2. The method of claim 1, wherein:

the tracking unit comprises a Block delay unit, an inverter and a tracking _ ctrl unit, wherein the Block delay unit is used for adjusting clock delay of an input clock, the inverter is used for outputting an inverted clock CLKN, and the tracking _ ctrl unit is used for controlling the delay series of the Block delay unit.

3. The method of claim 1, wherein:

the Clock CLKP is directly output by the Block delay unit after the Clock signal passes through the Block delay unit, the reverse Clock CLKN is obtained by the Clock CLKN after the Clock signal passes through the Block delay unit through the inverter, and if the image input interface is in a DDR protocol mode, the Clock CLKN and the CLKP are simultaneously used as data sampling Clock edges.

4. The method of claim 1, wherein:

assuming that the designed Block delay unit is n-level, the adjusting strategy of the Block delay unit is configured by using a tracking _ ctrl unit, and the adjusting strategy comprises the following steps:

5. The method of claim 1, wherein:

starting with level 0 incremental adjustments, the configuration of all erroneous sample data is recorded and the configuration furthest from all erroneous configurations is then selected as the optimal configuration.

6. The method of claim 1, wherein:

7. The method according to any one of claims 1 to 6, wherein:

for the protocol with the SAV/EAV key code words contained in BT.656/BT.1120, whether the acquired continuous data meet the SAV/EAV key code words is used as the basis for judging the correctness or not.

8. The method according to any one of claims 1 to 6, wherein:

for the BT.601 or RGB interface, because the interface carries control signals and meets timing protocol, 1 or more conditions are configured and detected as effective judgment basis, or the continuously met conditions of a single condition are configured as effective judgment basis.

9. An electronic device, comprising:

a memory storing computer executable instructions;

a processor configured to execute the computer-executable instructions,

wherein the computer executable instructions, when executed by the processor, implement the steps of the data restoration detection method of the image input interface according to any one of claims 1 to 8.

10. A storage medium, characterized in that the storage medium has stored thereon a computer program for implementing the steps of the data restoration detection method of the image input interface according to any one of claims 1 to 8 when the computer program is executed by a processor.