CN115775967A - Antenna impedance matching circuit, method, vehicle, storage medium, and chip - Google Patents
Antenna impedance matching circuit, method, vehicle, storage medium, and chip Download PDFInfo
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Abstract
The disclosure relates to an antenna impedance matching circuit, a method, a vehicle, a storage medium and a chip, and relates to the technical field of radio. Specifically, the antenna impedance matching circuit comprises a control chip, a regulating circuit and an antenna, wherein the regulating circuit is respectively connected with the control chip and the antenna; the antenna is configured to receive a target signal, and the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value to match the impedance of the antenna. Therefore, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Description
Technical Field
The present disclosure relates to the field of radio technologies, and in particular, to an antenna impedance matching circuit, an antenna impedance matching method, a vehicle, a storage medium, and a chip.
Background
With the development of radio technology, NFC (Near Field Communication; chinese: near Field Communication) antenna Communication technology is applied to a vehicle, and a user can enter the vehicle keyless through an NFC device (such as a mobile terminal or an NFC card) having a Communication function with the vehicle. The NFC circuit is generally installed in a B-pillar, a rear view mirror, a door handle, and the like of a vehicle. Before the vehicle leaves the factory, impedance matching can be carried out on the whole NFC circuit, so that components in the NFC circuit are determined, and the NFC antenna can work at the maximum transmitting power.
In a practical scenario, due to external environmental interference, NFC antenna parameters may be detuned, which will cause NFC circuit impedance mismatch. However, after the vehicle leaves the factory, the components in the whole NFC circuit are determined, and the impedance value of the whole NFC circuit cannot be changed.
Disclosure of Invention
To overcome the problems in the related art, the present disclosure provides an antenna impedance matching circuit, a method, a vehicle, a storage medium, and a chip.
According to a first aspect of the embodiments of the present disclosure, there is provided an antenna impedance matching circuit, including a control chip, a regulating circuit and an antenna, where the regulating circuit is connected to the control chip and the antenna respectively; the antenna is configured to receive a target signal, and the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value to match the impedance of the antenna.
Optionally, the control chip is configured to determine a power and a phase of the target signal, and determine a target capacitance value of the adjusting circuit according to the power and the phase.
Optionally, the control chip is configured to determine the target capacitance value according to the power and the phase through a preset capacitance correspondence; the preset capacitor corresponding relation comprises corresponding relations among power, phase and capacitor.
Optionally, the adjusting circuit includes a first tuning circuit and a first matching circuit, the first matching circuit is connected to the control chip and the antenna, and the first tuning circuit is connected to the control chip and the first matching circuit.
Optionally, the first tuning circuit includes a plurality of first capacitors, and each first capacitor is connected to an IO port of the control chip; the control chip is configured to determine a first target capacitance from the plurality of first capacitances of the first tuning circuit according to the target capacitance value, and disconnect branches where other capacitances except the first target capacitance are located from the plurality of first capacitances of the first tuning circuit through an IO port of the control chip.
Optionally, the adjusting circuit includes a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, the first matching circuit is connected to the control chip and the antenna, the second matching circuit is connected to the control chip and the antenna, the first tuning circuit is connected to the control chip and the first matching circuit, and the second tuning circuit is connected to the control chip and the second matching circuit.
Optionally, the first tuning circuit includes a plurality of first capacitors, and each first capacitor is connected to an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value; and disconnecting the branch circuits where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located and disconnecting the branch circuits where the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
According to a second aspect of the embodiments of the present disclosure, there is provided an antenna impedance matching method applied to an antenna impedance matching circuit, where the antenna impedance matching circuit includes a control chip, a regulating circuit and an antenna, and the regulating circuit is connected to the control chip and the antenna respectively; the method comprises the following steps: receiving a target signal through the antenna, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; determining a target capacitance value of the regulating circuit according to the target signal; adjusting a capacitance value of the adjusting circuit to match an impedance of the antenna according to the target capacitance value.
Optionally, the determining a target capacitance value of the adjusting circuit according to the target signal includes: determining the power and phase of the target signal; determining a target capacitance value of the regulating circuit based on the power and the phase.
Optionally, the determining a target capacitance value of the adjusting circuit according to the power and the phase comprises: determining the target capacitance value according to the power and the phase through a preset capacitance corresponding relation; the preset capacitance corresponding relation comprises the corresponding relation among power, phase and capacitance.
Optionally, the adjusting circuit includes a first tuning circuit and a first matching circuit, the first matching circuit is connected to the control chip and the antenna, and the first tuning circuit is connected to the control chip and the first matching circuit; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises: determining a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value; and disconnecting the branch circuit where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located through the IO port of the control chip.
Optionally, the adjusting circuit includes a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, the first matching circuit is connected to the control chip and the antenna, the second matching circuit is connected to the control chip and the antenna, the first tuning circuit is connected to the control chip and the first matching circuit, and the second tuning circuit is connected to the control chip and the second matching circuit; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises: determining a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit, in accordance with the target capacitance value; and disconnecting the branch circuits of the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit and disconnecting the branch circuits of the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit through the IO port of the control chip.
According to a third aspect of the embodiments of the present disclosure, there is provided a vehicle including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the steps of the antenna impedance matching method provided by the second aspect of the present disclosure when invoking executable instructions stored on the memory.
According to a fourth aspect of embodiments of the present disclosure, there is provided a computer-readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the steps of the antenna impedance matching method provided by the second aspect of the present disclosure.
According to a fifth aspect of embodiments of the present disclosure, there is provided a chip comprising a processor and an interface; the processor is configured to read instructions to perform the steps of the antenna impedance matching method provided by the second aspect of the present disclosure.
The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:
the antenna impedance matching circuit comprises a control chip, a regulating circuit and an antenna, wherein the regulating circuit is respectively connected with the control chip and the antenna; the antenna is configured to receive a target signal, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna; the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value to match the impedance of the antenna. Through the circuit, the target capacitance value of the adjusting circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the adjusting circuit is adjusted according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a block diagram of an antenna impedance matching circuit shown in accordance with an exemplary embodiment;
fig. 2 is a block diagram illustrating another antenna impedance matching circuit in accordance with an exemplary embodiment;
fig. 3 is a block diagram illustrating another antenna impedance matching circuit in accordance with an exemplary embodiment;
fig. 4 is a flow chart illustrating a method of antenna impedance matching in accordance with an exemplary embodiment;
FIG. 5 is a flow diagram illustrating another method of antenna impedance matching in accordance with an exemplary embodiment;
FIG. 6 is a flow diagram illustrating another antenna impedance matching method in accordance with an exemplary embodiment;
fig. 7 is a flow chart illustrating another antenna impedance matching method in accordance with an exemplary embodiment;
FIG. 8 is a schematic diagram illustrating a functional block diagram of a vehicle according to an exemplary embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. In addition, in the description with reference to the drawings, the same reference numerals in different drawings denote the same elements.
Before introducing the antenna impedance matching circuit, the antenna impedance matching method, the vehicle, the storage medium, and the chip provided by the present disclosure, an application scenario related to various embodiments of the present disclosure will be described first. With the continuous development of radio technology, NFC antenna communication technology is applied to a vehicle, and a user can enter the vehicle without a key through an NFC device (such as a mobile terminal or an NFC card) having a communication function with the vehicle. The NFC circuit is generally installed in a B-pillar, a rear view mirror, a door handle, and the like of a vehicle. Before the vehicle leaves a factory, impedance matching can be carried out on the whole NFC circuit, and therefore components in the NFC circuit are determined. Specifically, the impedance value of the whole NFC circuit can be adjusted by setting a matching circuit in the NFC circuit, so that the NFC antenna can operate with the maximum transmission power.
However, in an actual scenario, since a large number of metal devices are arranged in the vehicle, if the NFC antenna is too close to the metal devices due to assembly tolerance, electromagnetic interference may be generated on the NFC antenna by a metal environment, and then parameters of the NFC antenna may be detuned. Moreover, the change of the environmental temperature also causes the change of the parameters of the components, for example, the precision of the components (such as capacitance, inductance, resistance) will be affected in the high temperature environment. In addition, the aging of the components themselves also affects the accuracy of the components. In the above scenario, the matching circuit in the NFC circuit may be detuned, which further causes impedance mismatch of the entire NFC circuit. However, after the vehicle leaves the factory, the components in the whole NFC circuit are determined, and the impedance value of the whole NFC circuit cannot be changed. If the NFC antenna parameters are in the detuned state, the transmission power of the NFC antenna will be affected, thereby causing attenuation of the communication distance.
In order to solve the above technical problem, the present invention provides an antenna impedance matching circuit, a method, a vehicle, a storage medium, and a chip, which can determine a target capacitance value of an adjusting circuit in a current antenna impedance matching circuit according to a target signal, and then adjust the capacitance value of the adjusting circuit according to the target capacitance value, so as to match the impedance of the antenna. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
The following detailed description of embodiments of the invention refers to the accompanying drawings.
Fig. 1 is a block diagram illustrating an antenna impedance matching circuit according to an exemplary embodiment, and as shown in fig. 1, the antenna impedance matching circuit 100 includes a control chip 101, a regulating circuit 102, and an antenna 103, and the regulating circuit 102 is connected to the control chip 101 and the antenna 103, respectively.
The antenna 103 is configured to receive a target signal.
The target signal is a signal fed back by the target object after the antenna 103 transmits a radio frequency signal to the target object. In this way, it can be further determined whether the current impedance of the antenna 103 is matched, that is, whether the antenna 103 can operate at the maximum power, by the target signal.
Illustratively, the antenna may be, for example, an NFC antenna. In a practical scenario, NFC communication is mainly divided into active communication and passive communication. Accordingly, in the active communication scenario, after the antenna 103 transmits the rf signal to the target object, the rf field of the antenna 103 is turned off. Meanwhile, the target object will generate its own rf field and feed the target signal back to the antenna 103 according to the rf signal. In a passive communication scenario, after the antenna 103 transmits a radio frequency signal to a target object, the target object does not need to generate a radio frequency field, but obtains energy from the radio frequency field of the antenna 103, and feeds the target signal back to the antenna 103 in a load modulation manner.
The control chip 101 is configured to determine a target capacitance value of the adjusting circuit 102 according to the target signal, and adjust the capacitance value of the adjusting circuit 102 according to the target capacitance value to match the impedance of the antenna 103.
Thus, by adjusting the capacitance value of the adjusting circuit 102, the impedance value of the entire antenna impedance matching circuit 100 is adjusted to match the impedance of the antenna 103, so that the antenna 103 can operate at maximum power.
The control chip 101 may be, for example, an NFC control chip, such as but not limited to an NFC transceiver chip ST25R3914.
In a possible implementation manner, the adjusting circuit 102 may include a plurality of third capacitors, each third capacitor is connected to an IO port of the control chip 101, a branch where each third capacitor is located may be selectively opened or closed through the IO port, and then a plurality of capacitance values may be formed by selecting different third capacitors. For example, a third target capacitor may be determined from the plurality of third capacitors according to the target capacitance value, and the IO port of each control chip 101 disconnects the branch of the third capacitors except the third target capacitor.
In another possible implementation, the adjusting circuit 102 may include a first tuning circuit and a first matching circuit in consideration of the stability of the antenna impedance matching circuit 100. The first tuning circuit includes a plurality of first capacitors, each of the first capacitors is connected to an IO port of the control chip 101, and a branch where each of the first capacitors is located may be selectively turned on or turned off through the IO port. The first matching circuit is a circuit of a fixed impedance value, which may be determined in advance according to the antenna impedance matching circuit 100. In other words, in an ideal state, the impedance value of the first matching circuit enables the antenna impedance matching circuit 100 to be impedance-matched, and the antenna 103 can operate at maximum power. Thus, in practical applications, if it is determined that the antenna 103 can operate at the maximum power according to the target signal, it is not necessary to turn on the branch where the plurality of first capacitors are located in the first tuning circuit, so that the stability of the entire antenna impedance matching circuit 100 is increased. Meanwhile, if it is determined that the antenna 103 cannot operate at the maximum power according to the target signal, the impedance value of the antenna impedance matching circuit 100 may be adjusted by turning on or off a branch where one or more first capacitors in the first tuning circuit are located according to the target capacitance value, so that the antenna impedance matching circuit 100 performs impedance matching, and the antenna 103 is ensured to operate at the maximum power. In this way, it is equivalent to connect a capacitor (i.e., a first tuning circuit) with a capacitance value adjustable within a certain range in parallel to the first matching circuit, and the impedance value of the antenna impedance matching circuit 100 can be adjusted by the adjusting circuit 102 according to the target capacitance value.
By adopting the circuit, the target capacitance value of the adjusting circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the adjusting circuit is adjusted according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Optionally, the control chip 101 is configured to determine a power and a phase of the target signal, and determine a target capacitance value of the adjusting circuit according to the power and the phase.
For example, the target capacitance value may be determined by presetting a capacitance correspondence relationship according to the power and the phase. The preset capacitance corresponding relation comprises the corresponding relation among power, phase and capacitance. That is, a capacitance corresponding to the power and the phase may be determined from a preset capacitance correspondence relationship according to the power and the phase of the target signal, and a target capacitance value may be determined according to the capacitance, for example, the capacitance may be taken as the target capacitance value.
In a possible implementation manner, if the rf signal is a single-ended signal, as shown in fig. 2, the adjusting circuit 102 includes a first tuning circuit 1021 and a first matching circuit 1022, the first matching circuit 1022 is respectively connected to the control chip 101 and the antenna 103, and the first tuning circuit 1021 is respectively connected to the control chip 101 and the first matching circuit 1022.
Optionally, the first tuning circuit 1021 includes a plurality of first capacitors, and each of the first capacitors is connected to an IO port of the control chip 101. Each first capacitor is equivalently connected with the control chip 101 through a soft switch, and the control chip 101 can turn on or turn off one or more branches where the first capacitors are located through the IO port. Wherein, each first capacitor can be connected in parallel.
The control chip 101 is configured to determine a first target capacitance from the plurality of first capacitances of the first tuning circuit 1021 according to the target capacitance value, and disconnect a branch where other capacitances except the first target capacitance are located in the plurality of first capacitances of the first tuning circuit 1021 through an IO port of the control chip.
In this embodiment, a first target capacitance may be determined from a plurality of first capacitances of the first tuning circuit 1021 according to a target capacitance value. And the branches of the plurality of first capacitors of the first tuning circuit 1021 except the first target capacitor are disconnected through the IO port of the control chip, so as to adjust the capacitance value of the first tuning circuit 1021, and further adjust the resonant frequency of the antenna 103, so that the antenna 103 can operate at the maximum power.
It should be noted that, if there are multiple combinations of the plurality of first capacitors to achieve the target capacitance value, the first capacitor in the combination with the smallest number of first capacitors in the multiple combinations may be used as the first target capacitor. Thus, errors caused by aging of components can be reduced as much as possible.
In another possible implementation manner, if the radio frequency signal is a differential signal, as shown in fig. 3, the adjusting circuit 102 includes a first tuning circuit 1021, a second tuning circuit 1023, a first matching circuit 1022, and a second matching circuit 1024, where the first matching circuit 1022 is connected to the control chip 101 and the antenna 103 respectively, the second matching circuit 1024 is connected to the control chip 101 and the antenna 103 respectively, the first tuning circuit 1021 is connected to the control chip 101 and the first matching circuit 1022 respectively, and the second tuning circuit 1023 is connected to the control chip 101 and the second matching circuit 1024 respectively.
Optionally, the first tuning circuit 1021 includes a plurality of first capacitors, and each of the first capacitors is connected to an IO port of the control chip 101; the second tuning circuit 1024 includes a plurality of second capacitors, and each of the second capacitors is connected to an IO port of the control chip. That is, each first capacitor and each second capacitor are connected to the control chip 101 through the soft switch, and the control chip 101 may turn on or turn off the branch where one or more first capacitors are located through the IO port, or turn on or turn off the branch where one or more second capacitors are located through the IO port. Each first capacitor may be connected in parallel, and each second capacitor may also be connected in parallel. Due to the characteristics of the differential circuit, the structures and parameters of the two branches are consistent. Therefore, in the present embodiment, the impedance values of the first matching circuit 1022 and the second matching circuit 1024 may be set to be the same.
The control chip 101 is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit 1021 and a second target capacitance from a plurality of second capacitances of the second tuning circuit 1023 according to the target capacitance value; and through the IO port of the control chip, the branch circuits of the first capacitors of the first tuning circuit 1021 except the first target capacitor are disconnected, and the branch circuits of the second capacitors of the second tuning circuit 1023 except the second target capacitor are disconnected.
Similarly, since the structures and parameters of the two branches of the differential circuit are identical, the adjustment modes of the second tuning circuit 1023 and the first tuning circuit 1021 are identical, and the adjusted capacitance values are also identical.
In this way, no matter the antenna impedance matching circuit 100 is detuned due to environmental changes or aging of the components, the capacitance value of the adjusting circuit 102 can be adjusted in real time according to the target signal, so that the whole antenna impedance matching circuit 100 can always maintain high stability, and the antenna 103 can operate at maximum power.
By adopting the circuit, the target capacitance value of the adjusting circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the adjusting circuit is adjusted according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
Fig. 4 illustrates an antenna impedance matching method applied to an antenna impedance matching circuit including a control chip, a regulating circuit and an antenna, the regulating circuit being connected to the control chip and the antenna, respectively, according to an exemplary embodiment; as shown in fig. 4, the method may include the steps of:
in step S201, a target signal is received through the antenna.
The target signal is a signal fed back by the target object after the antenna transmits a radio frequency signal to the target object.
In step S202, a target capacitance value of the adjusting circuit is determined according to the target signal.
In step S203, the capacitance of the adjusting circuit is adjusted to match the impedance of the antenna according to the target capacitance.
As shown in fig. 5, determining the target capacitance value of the adjusting circuit according to the target signal in step S202 may include the following steps:
in step S2021, the power and phase of the target signal are determined.
In step S2022, a target capacitance value of the adjusting circuit is determined based on the power and the phase.
For example, the target capacitance value may be determined by presetting a capacitance correspondence relationship according to the power and the phase. The preset capacitance corresponding relation comprises the corresponding relation among power, phase and capacitance.
In a possible implementation manner, if the radio frequency signal is a single-ended signal, the adjusting circuit may include a first tuning circuit and a first matching circuit, where the first matching circuit is connected to the control chip and the antenna, respectively, and the first tuning circuit is connected to the control chip and the first matching circuit, respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip. Accordingly, as shown in fig. 6, adjusting the capacitance value of the adjusting circuit according to the target capacitance value in step S203 may include the following steps:
in step S2031, a first target capacitance is determined from the plurality of first capacitances of the first tuning circuit based on the target capacitance value.
In step S2032, the branch of the plurality of first capacitors of the first tuning circuit except for the first target capacitor is disconnected through the IO port of the control chip.
In another possible implementation manner, if the radio frequency signal is a differential signal, the adjusting circuit may include a first tuning circuit, a second tuning circuit, a first matching circuit, and a second matching circuit, where the first matching circuit is connected to the control chip and the antenna, the second matching circuit is connected to the control chip and the antenna, the first tuning circuit is connected to the control chip and the first matching circuit, and the second tuning circuit is connected to the control chip and the second matching circuit; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with the IO port of the control chip. Accordingly, as shown in fig. 7, adjusting the capacitance value of the adjusting circuit according to the target capacitance value in step S203 may include the following steps:
in step S2033, a first target capacitance is determined from the plurality of first capacitances of the first tuning circuit and a second target capacitance is determined from the plurality of second capacitances of the second tuning circuit based on the target capacitance value.
In step S2034, the branch of the first capacitors of the first tuning circuit except the first target capacitor is disconnected, and the branch of the second capacitors of the second tuning circuit except the second target capacitor is disconnected.
By adopting the method, the target capacitance value of the adjusting circuit in the current antenna impedance matching circuit can be determined according to the target signal, and then the capacitance value of the adjusting circuit is adjusted according to the target capacitance value, so that the impedance of the antenna is matched. Therefore, under the condition of circuit impedance mismatch, the target capacitance value of the adjusting circuit can be determined according to the target signal, and the impedance value of the antenna impedance matching circuit can be adjusted in real time through the adjusting circuit, so that the impedance of the antenna is matched, and the impedance matching of the antenna impedance matching circuit is realized.
As for the method in the above embodiment, the specific manner in which each step performs the operation has been described in detail in the embodiments of the antenna impedance matching circuit 100 in fig. 1 to 3, and will not be described in detail here.
The present disclosure also provides a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the steps of the antenna impedance matching method provided by the present disclosure.
The present disclosure also provides a chip, which may be, for example, an NFC transceiver chip, comprising a processor and an interface; the processor is used for reading instructions to execute the steps of the antenna impedance matching method provided by the present disclosure.
FIG. 8 is a block diagram illustrating a vehicle 300 according to an exemplary embodiment. For example, the vehicle 300 may be a hybrid vehicle, a non-hybrid vehicle, an electric vehicle, a fuel cell vehicle, or other type of vehicle. The vehicle 300 may be an autonomous vehicle, a semi-autonomous vehicle, or a non-autonomous vehicle.
Referring to fig. 8, a vehicle 300 may include various subsystems such as an infotainment system 310, a perception system 320, a decision control system 330, a drive system 340, and a computing platform 350. The vehicle 300 may also include more or fewer subsystems, and each subsystem may include multiple components, among others. In addition, the interconnection between each subsystem and each component of the vehicle 300 may be achieved through wired or wireless means.
In some embodiments, infotainment system 310 may include a communication system, an entertainment system, a navigation system, and the like.
The sensing system 320 may include several sensors for sensing information about the environment surrounding the vehicle 300. For example, the sensing system 320 may include a global positioning system (the global positioning system may be a GPS system, a compass system, or other positioning system), an Inertial Measurement Unit (IMU), a laser radar, a millimeter-wave radar, an ultrasonic radar, and a camera.
The drive system 340 may include components that provide powered motion to the vehicle 300. In one embodiment, the drive system 340 may include an engine, an energy source, a transmission system, and wheels. The engine may be one or a combination of internal combustion engine, electric motor, air compression engine. The engine is capable of converting energy provided by the energy source into mechanical energy.
Some or all of the functions of the vehicle 300 are controlled by the computing platform 350. Computing platform 350 may include at least one processor 351 and memory 352, where processor 351 may execute instructions 353 stored in memory 352.
The processor 351 may be any conventional processor, such as a commercially available CPU. The processor may also include, for example, an image processor (GPU), a Field Programmable Gate Array (FPGA), a System On Chip (SOC), an Application Specific Integrated Circuit (ASIC), or a combination thereof.
The memory 352 may be implemented by any type or combination of volatile or non-volatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.
In addition to the instructions 353, the memory 352 may store data such as road maps, route information, vehicle position, direction, speed, etc. The data stored by memory 352 may be used by computing platform 350.
In the disclosed embodiment, the processor 351 may execute the instructions 353 to perform all or some of the steps of the antenna impedance matching method described above.
In another exemplary embodiment, a computer program product is also provided, which comprises a computer program executable by a programmable apparatus, the computer program having code portions for performing the above-mentioned antenna impedance matching method when executed by the programmable apparatus.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (15)
1. An antenna impedance matching circuit is characterized by comprising a control chip, a regulating circuit and an antenna, wherein the regulating circuit is respectively connected with the control chip and the antenna;
the antenna is configured to receive a target signal, and the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna;
the control chip is configured to determine a target capacitance value of the adjusting circuit according to the target signal, and adjust the capacitance value of the adjusting circuit according to the target capacitance value to match the impedance of the antenna.
2. The circuit of claim 1, wherein the control chip is configured to determine a power and a phase of the target signal, and determine a target capacitance value of the adjustment circuit based on the power and the phase.
3. The circuit of claim 2, wherein the control chip is configured to determine the target capacitance value according to the power and the phase through a preset capacitance correspondence; the preset capacitance corresponding relation comprises the corresponding relation among power, phase and capacitance.
4. The circuit of claim 1, wherein the adjusting circuit comprises a first tuning circuit and a first matching circuit, the first matching circuit is connected to the control chip and the antenna, and the first tuning circuit is connected to the control chip and the first matching circuit.
5. The circuit of claim 4, wherein the first tuning circuit comprises a plurality of first capacitors, each of the first capacitors being connected to an IO port of the control chip;
the control chip is configured to determine a first target capacitance from the plurality of first capacitances of the first tuning circuit according to the target capacitance value, and disconnect branches where other capacitances except the first target capacitance are located from the plurality of first capacitances of the first tuning circuit through an IO port of the control chip.
6. The circuit of claim 1, wherein the adjusting circuit comprises a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, the first matching circuit is connected with the control chip and the antenna respectively, the second matching circuit is connected with the control chip and the antenna respectively, the first tuning circuit is connected with the control chip and the first matching circuit respectively, and the second tuning circuit is connected with the control chip and the second matching circuit respectively.
7. The circuit of claim 6, wherein the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected to an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip;
the control chip is configured to determine a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit according to the target capacitance value; and disconnecting the branch circuits where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located and disconnecting the branch circuits where the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit are located through the IO port of the control chip.
8. The antenna impedance matching method is characterized by being applied to an antenna impedance matching circuit, wherein the antenna impedance matching circuit comprises a control chip, a regulating circuit and an antenna, and the regulating circuit is respectively connected with the control chip and the antenna; the method comprises the following steps:
receiving a target signal through the antenna, wherein the target signal is a signal fed back by a target object after a radio frequency signal is transmitted to the target object through the antenna;
determining a target capacitance value of the regulating circuit according to the target signal;
adjusting a capacitance value of the adjusting circuit to match an impedance of the antenna according to the target capacitance value.
9. The method of claim 8, wherein determining the target capacitance value of the conditioning circuit based on the target signal comprises:
determining the power and phase of the target signal;
determining a target capacitance value of the regulating circuit based on the power and the phase.
10. The method of claim 9, wherein determining a target capacitance value for the conditioning circuit based on the power and the phase comprises:
determining the target capacitance value according to the power and the phase through a preset capacitance corresponding relation;
the preset capacitance corresponding relation comprises the corresponding relation among power, phase and capacitance.
11. The method of claim 8, wherein the adjusting circuit comprises a first tuning circuit and a first matching circuit, the first matching circuit is connected with the control chip and the antenna, respectively, and the first tuning circuit is connected with the control chip and the first matching circuit, respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises:
determining a first target capacitance from a plurality of first capacitances of the first tuning circuit according to the target capacitance value;
and disconnecting the branch circuit where the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit are located through the IO port of the control chip.
12. The method of claim 8, wherein the adjusting circuit comprises a first tuning circuit, a second tuning circuit, a first matching circuit and a second matching circuit, the first matching circuit is connected with the control chip and the antenna, respectively, the second matching circuit is connected with the control chip and the antenna, respectively, the first tuning circuit is connected with the control chip and the first matching circuit, respectively, the second tuning circuit is connected with the control chip and the second matching circuit, respectively; the first tuning circuit comprises a plurality of first capacitors, and each first capacitor is connected with an IO port of the control chip; the second tuning circuit comprises a plurality of second capacitors, and each second capacitor is connected with an IO port of the control chip; the adjusting the capacitance value of the adjusting circuit according to the target capacitance value comprises:
determining a first target capacitance from a plurality of first capacitances of the first tuning circuit and a second target capacitance from a plurality of second capacitances of the second tuning circuit, in accordance with the target capacitance value;
and disconnecting the branch circuits of the other capacitors except the first target capacitor in the plurality of first capacitors of the first tuning circuit and disconnecting the branch circuits of the other capacitors except the second target capacitor in the plurality of second capacitors of the second tuning circuit through the IO port of the control chip.
13. A vehicle, characterized by comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to implement the steps of the method of any one of claims 8 to 12 when invoking executable instructions stored on the memory.
14. A computer-readable storage medium, on which computer program instructions are stored, which program instructions, when executed by a processor, carry out the steps of the method according to any one of claims 8 to 12.
15. A chip comprising a processor and an interface; the processor is configured to read instructions to perform the method of any one of claims 8 to 12.
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