CN115775022A - An optical pulse neural network processor device - Google Patents

An optical pulse neural network processor device Download PDF

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CN115775022A
CN115775022A CN202111041236.6A CN202111041236A CN115775022A CN 115775022 A CN115775022 A CN 115775022A CN 202111041236 A CN202111041236 A CN 202111041236A CN 115775022 A CN115775022 A CN 115775022A
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neural network
optical pulse
pulse neural
network chip
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项水英
高爽
张雅慧
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Xidian University
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Abstract

An optical pulse neural network processor device comprises a single-chip integrated and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photoelectric detector PD array, a transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array. The optical pulse neural network chip uses a semiconductor optical amplifier SOA as a photon synapse, and uses a distributed feedback semiconductor laser DFB-SA with a saturated absorption region as a photon neuron. The photon synapse and the photon neuron are both based on III/V materials, so the sub-photon pulse neural network chip can be monolithically integrated. The device ensures that the optical pulse neural network chip can be integrated on a single chip and the optical pulse neural network processor is flexibly configurable.

Description

一种光脉冲神经网络处理器的装置An optical pulse neural network processor device

技术领域technical field

一种光脉冲神经网络处理器的装置,属于光计算与光信号处理领域,具体涉及一种基于半导体光放大器与带饱和吸收区的分布式反馈激光器的光脉冲神经网络处理器的装置。特征在于,其光脉冲神经网络芯片是基于III/V族单片集成的。A device for an optical pulse neural network processor belongs to the field of optical calculation and optical signal processing, and specifically relates to a device for an optical pulse neural network processor based on a semiconductor optical amplifier and a distributed feedback laser with a saturated absorption region. It is characterized in that its optical pulse neural network chip is based on III/V group monolithic integration.

背景技术Background technique

与传统的冯·诺依曼计算系统相比,脉冲神经网络计算寻求从生物信息处理的抽象原则中获得灵感,设计可扩展和成本效益高的硬件系统。在涉及多传感器、多执行器系统的模式分析、决策、优化、学习和实时控制的任务中,神经形态架构比冯·诺伊曼架构在效率、容错性、适应性等方面具有强大的优势。Compared with traditional von Neumann computing systems, spiking neural network computing seeks to draw inspiration from the abstract principles of biological information processing to design scalable and cost-effective hardware systems. In tasks involving pattern analysis, decision-making, optimization, learning, and real-time control of multi-sensor, multi-actuator systems, neuromorphic architectures have powerful advantages over von Neumann architectures in terms of efficiency, fault tolerance, and adaptability.

光集成技术的蓬勃发展大力推动了高性能光计算再次成为世界前沿热点。片上光脉冲神经网络充分融合高速光通信、光互连、光集成与神经拟态计算的特点,具有超高速、大带宽、多维度等优势。在高性能计算、人工智能领域有广阔的应用前景。The vigorous development of optical integration technology has greatly promoted high-performance optical computing to become the world's frontier hot spot again. The on-chip optical pulse neural network fully integrates the characteristics of high-speed optical communication, optical interconnection, optical integration and neuromorphic computing, and has the advantages of ultra-high speed, large bandwidth, and multi-dimensionality. It has broad application prospects in the fields of high-performance computing and artificial intelligence.

光子脉冲神经网络的基本功能单元是光子脉冲神经元与光子突触。目前,基于分立器件光子脉冲神经元和光突触、或基于异质集成的光脉冲神经网络取得了一定进展。然而,面向单片集成的光脉冲神经网络尚处于前沿探索阶段。因此迫切需要研发单片集成的光脉冲神经网络芯片及基于此光脉冲神经网络芯片的处理器。The basic functional unit of photon spiking neural network is photon spiking neuron and photon synapse. At present, some progress has been made in photonic pulse neurons and optical synapses based on discrete devices, or optical pulse neural networks based on heterogeneous integration. However, the optical pulse neural network for monolithic integration is still in the cutting-edge exploration stage. Therefore, it is urgent to develop a monolithically integrated optical pulse neural network chip and a processor based on the optical pulse neural network chip.

发明内容Contents of the invention

鉴于以上陈述已有技术的不足,本发明旨在提供一种光脉冲神经网络处理器的装置。该装置中光脉冲神经网络芯片使用半导体光放大器SOA作为光子突触,使用带饱和吸收区的分布式反馈半导体激光器DFB-SA作为光子脉冲神经元。光子突触与光子脉冲神经元均基于III/V族材料,故此光子脉冲神经网络芯片可以单片集成。In view of the deficiencies of the prior art stated above, the present invention aims to provide an optical pulse neural network processor device. The optical pulse neural network chip in the device uses a semiconductor optical amplifier SOA as a photon synapse, and a distributed feedback semiconductor laser DFB-SA with a saturated absorption region as a photon pulse neuron. Both the photonic synapse and the photonic pulse neuron are based on III/V materials, so the photonic pulse neural network chip can be monolithically integrated.

本发明的目的是通过如下手段来实现的。The purpose of the present invention is achieved by the following means.

一种光脉冲神经网络处理器的装置,包括一个单片集成与封装的SOA与 DFB-SA阵列光脉冲神经网络芯片,一个多通道可调谐光源,一个调制器阵列,一个光电探测器PD阵列,一个跨阻放大器阵列,一个模数转换阵列,两个数模转换阵列,一个控制电路阵列和一个存储器阵列。关于一种光脉冲神经网络处理器的装置,其特征在于,其光脉冲神经网络芯片是基于III/V族单片集成的,多通道可调谐光源的输出端与调制器阵列的光输入端相连;调制器阵列的输出端分别与光脉冲神经网络芯片的输入端相连;控制器的两个输出端与两个数模转换阵列的输入端相连;两个数模转换阵列的输出端分别与调制器的射频端、光脉冲神经网络芯片电流控制端相连;光脉冲神经网络芯片的输出端与PD阵列的输入端相连;PD阵列的输出端与跨阻放大器阵列的输入端相连;跨阻放大器阵列的输出端与模数转换阵列的输入端相连;模数转换阵列的输出端与控制电路的输入端相连;控制电路与存储器相互连接进行数据的存储与读取。关于光脉冲神经网络芯片,其特征在于,调制器的输出端与片上分束器的输入端相连;分束器的输出端与阵列波导光栅的输入端相连;阵列波导光栅的输出端与SOA突触的输入端相连;SOA突触的输出端与第二个阵列波导光栅的输入端相连;第二个阵列波导光栅的输出端与DFB-SA神经元阵列相连;DFB-SA神经元阵列的输出作为光脉冲神经网络芯片的输出进行下一步变换与分析。A device for an optical pulse neural network processor, comprising a single-chip integrated and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photodetector PD array, A transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array. A device for an optical pulse neural network processor is characterized in that its optical pulse neural network chip is based on III/V monolithic integration, and the output end of the multi-channel tunable light source is connected to the optical input end of the modulator array ; The output ends of the modulator array are respectively connected to the input ends of the optical pulse neural network chip; the two output ends of the controller are connected to the input ends of the two digital-to-analog conversion arrays; The RF end of the device is connected to the current control end of the optical pulse neural network chip; the output end of the optical pulse neural network chip is connected to the input end of the PD array; the output end of the PD array is connected to the input end of the transimpedance amplifier array; the transimpedance amplifier array The output end of the analog-to-digital conversion array is connected to the input end of the analog-to-digital conversion array; the output end of the analog-to-digital conversion array is connected to the input end of the control circuit; the control circuit and the memory are connected to each other for data storage and reading. Regarding the optical pulse neural network chip, it is characterized in that the output end of the modulator is connected with the input end of the on-chip beam splitter; the output end of the beam splitter is connected with the input end of the arrayed waveguide grating; the output end of the arrayed waveguide grating is connected with the SOA connected to the input of the synapse; the output of the SOA synapse is connected to the input of the second arrayed waveguide grating; the output of the second arrayed waveguide grating is connected to the DFB-SA neuron array; the output of the DFB-SA neuron array As the output of the optical pulse neural network chip, it is transformed and analyzed in the next step.

经以上设计后,使用单通道SOA与DFB-SA等分立器件为实施例进行测试;光脉冲神经网络的注入脉冲由可调谐光源TL,偏振控制器PC,调制器,任意波形发射器AWG等器件产生;外部光注入经过SOA突触进行加权;随后通过可调光衰减器 VOA,三端口环形器CIR进入DFB-SA;DFB-SA作用后的信号经CIR、光耦合器OC 输出到光谱分析仪OSA与示波器OSC;通过调整SOA突触的电流,使SOA产生不同的权重,观察DFB-SA神经元的输出。After the above design, single-channel SOA and DFB-SA and other discrete devices are used as examples for testing; the injection pulse of the optical pulse neural network is composed of tunable light source TL, polarization controller PC, modulator, arbitrary waveform transmitter AWG and other devices Generated; the external light injection is weighted through the SOA synapse; then it enters the DFB-SA through the adjustable optical attenuator VOA and the three-port circulator CIR; the signal after the action of the DFB-SA is output to the spectrum analyzer through the CIR and the optical coupler OC OSA with oscilloscope OSC; the output of DFB-SA neurons was observed by adjusting the current of SOA synapses to make SOA produce different weights.

本发明提供一种光脉冲神经网络处理器的装置和已报道的光脉冲神经网络处理器装置相比有如下优点:光脉冲神经网络芯片可单片集成。Compared with the reported optical pulse neural network processor device, the device of the present invention provides an optical pulse neural network processor has the following advantages: the optical pulse neural network chip can be single-chip integrated.

附图说明Description of drawings

图1为本发明装置的系统框图;Fig. 1 is the system block diagram of device of the present invention;

图2为光脉冲神经网络芯片内部结构示意图;Fig. 2 is a schematic diagram of the internal structure of the optical pulse neural network chip;

图3为单通道SOA、DFB-SA光脉冲神经网络实验方案图;Figure 3 is a diagram of a single-channel SOA, DFB-SA optical pulse neural network experiment scheme;

图4为光脉冲神经网络对外部刺激的阈值特性Figure 4 shows the threshold characteristics of the optical pulse neural network to external stimuli

图5为光脉冲神经网络对外部刺激的累积响应。Figure 5 is the cumulative response of the light pulse neural network to external stimuli.

图6为光脉冲神经网络对外部刺激的不应期响应。Figure 6 shows the refractory period response of the light pulse neural network to external stimuli.

具体实施方式Detailed ways

下面结合附图对本发明的实施例作详细说明:本实施例在以本发明技术方案为前提下进行实施,给出了详细的实施方式和具体的操作流程,但本发明的保护范围不限于下属的实施例。Below in conjunction with accompanying drawing the embodiment of the present invention is described in detail: present embodiment is carried out under the premise of technical solution of the present invention, has provided detailed implementation mode and concrete operation process, but protection scope of the present invention is not limited to subordinates the embodiment.

如图3所示,本发明的实施例由一个可调谐光源TL,两个偏振控制器PC1, PC2,一个强度调制器,一个电放大器,一个AWG,两个双通道直流源,一个半导体光放大器SOA,两个可调光衰减器VOA1,VOA2,一个三端口光环形器CIR,一个光耦合器OC,一个DFB-SA,一个电流温度控制器,一个光电探测器PD,示波器OSC,光谱仪OSA组成。所述的SOA为光子突触;DFB-SA为光子脉冲神经元;SOA与 DFB-SA组成光子脉冲神经网络;通过调整SOA的电流,即光子脉冲神经网络中的突触权重,可观察到光子脉冲神经网络对刺激的不同响应。As shown in Figure 3, the embodiment of the present invention consists of a tunable light source TL, two polarization controllers PC1, PC2, an intensity modulator, an electrical amplifier, an AWG, two dual-channel DC sources, and a semiconductor optical amplifier SOA, two adjustable optical attenuators VOA1, VOA2, a three-port optical circulator CIR, an optical coupler OC, a DFB-SA, a current temperature controller, a photodetector PD, oscilloscope OSC, spectrometer OSA . The SOA is a photon synapse; DFB-SA is a photon pulse neuron; SOA and DFB-SA form a photon pulse neural network; by adjusting the current of SOA, that is, the synapse weight in the photon pulse neural network, photon pulses can be observed Differential responses of spiking neural networks to stimuli.

本实例中,方法的具体实施步骤是:In this example, the specific implementation steps of the method are:

步骤一:在图3所示的方案中,DFB-SA的波长为1550-1554nm的两段式半导体激光器。设置TL的波长为1552.3nm。Step 1: In the solution shown in Figure 3, the DFB-SA is a two-stage semiconductor laser with a wavelength of 1550-1554nm. Set the wavelength of TL to 1552.3nm.

步骤二:调节DFB-SA的增益区与饱和吸收区的电流与偏压分别为32mA与-2.8V。设置AWG,使一大一小的刺激脉冲进入光脉冲神经网络,刺激脉冲如图4(a)所示,调节SOA突触电流,观察DFB-SA的动力学响应,其结果如图4(b)所示。由图4(b)可得,在SOA的作用下,DFB-SA在小强度刺激下无脉冲响应,大强度刺激下有脉冲响应,实现了光脉冲神经网络的阈值特性。Step 2: Adjust the current and bias voltage of the gain region and the saturated absorption region of the DFB-SA to 32mA and -2.8V respectively. Set the AWG so that one large and one small stimulation pulse enters the optical pulse neural network. The stimulation pulse is shown in Figure 4(a) to adjust the SOA synaptic current and observe the dynamic response of DFB-SA. The result is shown in Figure 4(b) ) shown. It can be seen from Figure 4(b) that under the action of SOA, DFB-SA has no impulse response under small-intensity stimulation, but has an impulse response under high-intensity stimulation, realizing the threshold characteristic of the optical impulse neural network.

步骤三:设置AWG,使三个间隔很小的刺激脉冲进入光脉冲神经网络,刺激脉冲如图 5(a)所示。调节SOA突触电流,观察DFB-SA的动力学响应,其结果如图5(b)所示。由图5(b)可得,在SOA的作用下,DFB-SA光子脉冲神经元只在第三个刺激脉冲处产生一个尖峰脉冲,从而说明光脉冲神经网络可产生累积效应。Step 3: Set the AWG so that three stimulation pulses with small intervals enter the optical pulse neural network, and the stimulation pulses are shown in Figure 5(a). Adjust the SOA synaptic current and observe the dynamic response of DFB-SA, the results are shown in Figure 5(b). It can be seen from Figure 5(b) that under the action of SOA, the DFB-SA photon pulse neuron only produces a spike at the third stimulation pulse, which shows that the optical pulse neural network can produce a cumulative effect.

步骤四:再次调节SOA突触电流,观察DFB-SA的动力学响应,其结果如图6(b)所示.由图6(b)可得,在SOA的作用下,DFB-SA光子脉冲神经元只在第一个刺激脉冲和第三个刺激脉冲处产生尖峰脉冲,从而说明光脉冲神经网络可产生不应期现象。Step 4: Adjust the SOA synaptic current again and observe the dynamic response of DFB-SA. The neurons only produced spikes at the first and third stimulation pulses, indicating that the light-spiked neural network can produce refractory periods.

步骤五:增加光脉冲神经网络的SOA突触数量与DFB-SA神经元数量,通过集成形成多节点的光脉冲神经网络芯片,如图2所示。Step 5: Increase the number of SOA synapses and DFB-SA neurons of the optical pulse neural network, and form a multi-node optical pulse neural network chip through integration, as shown in Figure 2.

步骤六:在图2的基础上增加电光接口、光电接口、控制电路等,形成可配置的光脉冲神经网络处理器,如图1所示。Step 6: Add electro-optic interface, photoelectric interface, control circuit, etc. on the basis of Figure 2 to form a configurable optical pulse neural network processor, as shown in Figure 1.

综合以上陈述,本发明具有如下特征:1).利用半导体光放大器阵列作为突触阵列,带饱和吸收区的分布式反馈半导体激光器阵列作为神经元阵列,形成单片集成的光脉冲神经网络芯片;2).基于光脉冲神经网络芯片、电光/光电接口、控制电路等模块,形成可配置的光脉冲神经网络处理器。Based on the above statements, the present invention has the following characteristics: 1). Utilize a semiconductor optical amplifier array as a synapse array, and a distributed feedback semiconductor laser array with a saturated absorption zone as a neuron array to form a monolithically integrated optical pulse neural network chip; 2). Based on the optical pulse neural network chip, electro-optical/optical interface, control circuit and other modules, a configurable optical pulse neural network processor is formed.

总之,以上所述实施方案仅为本发明的实施例而已,并非仅用于限定本发明的保护范围,应当指出,对于本技术领域的普通技术人员来说,在本发明公开的内容上,还可以做出若干等同的变形和替换(比如适当改变工作电流的大小,改变频率失谐,改变注入脉冲功率的大小,扩展光脉冲神经网络的规模)也应包含在本发明的保护范围以内。In a word, the embodiments described above are only examples of the present invention, and are not only used to limit the protection scope of the present invention. Several equivalent deformations and replacements (such as appropriately changing the size of the operating current, changing the frequency detuning, changing the size of the injected pulse power, and expanding the scale of the optical pulse neural network) should also be included within the protection scope of the present invention.

Claims (4)

1. An optical pulse neural network processor device comprises a monolithic integration and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photoelectric detector PD array, a transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array, and is characterized in that the optical pulse neural network chip is based on III/V family monolithic integration, and the output end of the multi-channel tunable light source is connected with the optical input end of the modulator array; the output end of the modulator array is respectively connected with the input end of the optical pulse neural network chip; two output ends of the controller are connected with input ends of the two digital-to-analog conversion arrays; the output ends of the two digital-to-analog conversion arrays are respectively connected with the radio frequency end of the modulator and the current control end of the optical pulse neural network chip; the output end of the optical pulse neural network chip is connected with the input end of the PD array; the output end of the PD array is connected with the input end of the transimpedance amplifier array; the output end of the transimpedance amplifier array is connected with the input end of the analog-to-digital conversion array; the output end of the analog-to-digital conversion array is connected with the input end of the control circuit; the control circuit is connected with the memory to store and read data. The optical pulse neural network chip is characterized in that the output end of the modulator is connected with the input end of the on-chip beam splitter; the output end of the beam splitter is connected with the input end of the array waveguide grating; the output end of the array waveguide grating is connected with the input end of the SOA synapse; the output end of the SOA synapse is connected with the input end of the second arrayed waveguide grating; the output end of the second arrayed waveguide grating is connected with the DFB-SA neuron array; and the output of the DFB-SA neuron array is used as the output of the optical pulse neural network chip for further transformation and analysis.
2. The optical pulse neural network processor device as claimed in claim 1, wherein a Semiconductor Optical Amplifier (SOA) is used as a photonic synapse, and a feedback semiconductor laser (DFB-SA) with a saturated absorption region is used as a photonic neuron; the photonic synapses and the photonic neurons are based on III/V materials, and the optical pulse neural network chip can be monolithically integrated.
3. The apparatus of claim 1, wherein the optical pulse neural network processor is flexibly configurable via connection of an optoelectronic/optoelectronic interface, a control circuit, and the like.
4. The apparatus of claim 1, wherein the number of nodes of the optical pulse neural network chip is expandable to n x n.
CN202111041236.6A 2021-09-07 2021-09-07 An optical pulse neural network processor device Pending CN115775022A (en)

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