CN115775022A

CN115775022A - Device of optical pulse neural network processor

Info

Publication number: CN115775022A
Application number: CN202111041236.6A
Authority: CN
Inventors: 项水英; 高爽; 张雅慧
Original assignee: Xidian University
Current assignee: Xidian University
Priority date: 2021-09-07
Filing date: 2021-09-07
Publication date: 2023-03-10

Abstract

An optical pulse neural network processor device comprises a single-chip integrated and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photoelectric detector PD array, a transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array. The optical pulse neural network chip uses a semiconductor optical amplifier SOA as a photon synapse, and uses a distributed feedback semiconductor laser DFB-SA with a saturated absorption region as a photon neuron. The photon synapse and the photon neuron are both based on III/V materials, so the sub-photon pulse neural network chip can be monolithically integrated. The device ensures that the optical pulse neural network chip can be integrated on a single chip and the optical pulse neural network processor is flexibly configurable.

Description

Device of optical pulse neural network processor

Technical Field

A device of an optical pulse neural network processor belongs to the field of optical calculation and optical signal processing, and particularly relates to a device of an optical pulse neural network processor based on a semiconductor optical amplifier and a distributed feedback laser with a saturated absorption area. Characterized in that the optical pulse neural network chip is based on III/V family monolithic integration.

Background

Compared to traditional von Neumann computing systems, impulse neural network computing seeks to gain inspiration from the abstract principles of bioinformatic processing, designing scalable and cost-effective hardware systems. The neuromorphic architecture has a strong advantage over von neumann architecture in terms of efficiency, fault tolerance, adaptability, etc., in tasks involving pattern analysis, decision making, optimization, learning, and real-time control of multi-sensor, multi-actuator systems.

The vigorous development of optical integration technology has greatly promoted high-performance optical computing to become a hot spot at the world edge again. The on-chip optical pulse neural network fully integrates the characteristics of high-speed optical communication, optical interconnection, optical integration and neural mimicry calculation, and has the advantages of super high speed, large bandwidth, multiple dimensions and the like. Has wide application prospect in the fields of high-performance calculation and artificial intelligence.

The basic functional unit of a photon-pulsing neural network is the synapse of a photon-pulsing neuron with a photon. At present, the development of photonic pulse neurons and optical synapses based on discrete devices, or optical pulse neural networks based on heterogeneous integration, has been achieved. However, the optical pulse neural network oriented to monolithic integration is still in the leading edge exploration stage. Therefore, the development of a monolithically integrated optical pulse neural network chip and a processor based on the optical pulse neural network chip are urgently needed.

Disclosure of Invention

In view of the above-stated deficiencies of the prior art, the present invention is directed to an apparatus for an optical pulse neural network processor. In the device, an optical pulse neural network chip uses a semiconductor optical amplifier SOA as a photon synapse, and uses a distributed feedback semiconductor laser DFB-SA with a saturated absorption region as a photon pulse neuron. The photon synapse and the photon pulse neuron are based on III/V material, so the photon pulse neural network chip can be integrated in a single chip.

The object of the present invention is achieved by the following means.

An optical pulse neural network processor device comprises a single-chip integrated and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photoelectric detector PD array, a transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array. The device of the optical pulse neural network processor is characterized in that an optical pulse neural network chip is based on III/V family monolithic integration, and the output end of a multi-channel tunable light source is connected with the optical input end of a modulator array; the output end of the modulator array is respectively connected with the input end of the optical pulse neural network chip; two output ends of the controller are connected with input ends of the two digital-to-analog conversion arrays; the output ends of the two digital-to-analog conversion arrays are respectively connected with the radio frequency end of the modulator and the current control end of the optical pulse neural network chip; the output end of the optical pulse neural network chip is connected with the input end of the PD array; the output end of the PD array is connected with the input end of the transimpedance amplifier array; the output end of the transimpedance amplifier array is connected with the input end of the analog-to-digital conversion array; the output end of the analog-to-digital conversion array is connected with the input end of the control circuit; the control circuit is connected with the memory to store and read data. The optical pulse neural network chip is characterized in that the output end of the modulator is connected with the input end of the on-chip beam splitter; the output end of the beam splitter is connected with the input end of the array waveguide grating; the output end of the array waveguide grating is connected with the input end of the SOA synapse; the output end of the SOA synapse is connected with the input end of the second arrayed waveguide grating; the output end of the second arrayed waveguide grating is connected with the DFB-SA neuron array; and the output of the DFB-SA neuron array is used as the output of the optical pulse neural network chip for further transformation and analysis.

After the design, discrete devices such as a single-channel SOA and a DFB-SA are used as an embodiment for testing; the injection pulse of the optical pulse neural network is generated by devices such as a tunable light source TL, a polarization controller PC, a modulator, an arbitrary waveform emitter AWG and the like; external light injection is weighted through SOA synapses; then, through the adjustable optical attenuator VOA, the CIR of the three-port circulator enters the DFB-SA; the signal after DFB-SA action is output to an optical spectrum analyzer OSA and an oscilloscope OSC through a CIR and an optical coupler OC; the output of the DFB-SA neuron is observed by adjusting the current of the synapse of the SOA to make the SOA generate different weights.

Compared with the reported optical pulse neural network processor device, the optical pulse neural network processor device provided by the invention has the following advantages: the optical pulse neural network chip can be monolithically integrated.

Drawings

FIG. 1 is a system block diagram of the apparatus of the present invention;

FIG. 2 is a schematic diagram of the internal structure of an optical pulse neural network chip;

FIG. 3 is a diagram of a single-channel SOA and DFB-SA optical pulse neural network experimental scheme;

FIG. 4 is a graph of threshold characteristics of an optical pulse neural network to external stimuli

Fig. 5 is a cumulative response of an optical pulse neural network to an external stimulus.

Fig. 6 is a refractory period response of an optical pulse neural network to an external stimulus.

Detailed Description

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings: the present embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation flow are given, but the scope of the present invention is not limited to the following embodiments.

As shown in fig. 3, the embodiment of the present invention is composed of a tunable light source TL, two polarization controllers PC1, PC2, an intensity modulator, an electrical amplifier, an AWG, two dual-channel dc sources, a semiconductor optical amplifier SOA, two adjustable optical attenuators VOA1, VOA2, a three-port optical circulator CIR, an optical coupler OC, a DFB-SA, a current temperature controller, a photodetector PD, an oscilloscope OSC, and a spectrometer OSA. The SOA is a photon synapse; DFB-SA is photon pulse neuron; the SOA and the DFB-SA form a photon pulse neural network; by adjusting the current of the SOA, i.e., the synaptic weights in the photonic pulsed neural network, different responses of the photonic pulsed neural network to stimuli can be observed.

In this example, the method comprises the following steps:

the method comprises the following steps: in the scheme shown in FIG. 3, the wavelength of DFB-SA is 1550-1554 nm. The wavelength of TL is set to 1552.3nm.

Step two: the current and bias voltage of the gain region and the saturable absorption region of the DFB-SA are adjusted to be 32mA and-2.8V respectively. The AWG is set to allow a large and small stimulation pulse to enter the optical pulse neural network, the stimulation pulse is shown in figure 4 (a), SOA synaptic current is adjusted, and the dynamic response of DFB-SA is observed, and the result is shown in figure 4 (b). As can be seen from fig. 4 (b), under the action of the SOA, the DFB-SA has no impulse response under the small-intensity stimulus and has an impulse response under the large-intensity stimulus, thereby realizing the threshold characteristic of the optical pulse neural network.

Step three: the AWG is set to have three closely spaced stimulation pulses into the optical pulse neural network, the stimulation pulses being shown in fig. 5 (a). The SOA synaptic current was regulated and the kinetic response of DFB-SA was observed, with the results shown in FIG. 5 (b). From fig. 5 (b), under the action of SOA, the DFB-SA photon pulse neuron generates only one spike at the third stimulation pulse, thus demonstrating that the optical pulse neural network can generate cumulative effect.

Step four: from FIG. 6 (b), it can be seen that under the action of the SOA, the DFB-SA photonic pulse neuron spikes only at the first and third stimulation pulses, thus demonstrating that the optical pulse neural network can generate the refractory period phenomenon.

Step five: and increasing the number of SOA synapses and the number of DFB-SA neurons of the optical pulse neural network, and forming a multi-node optical pulse neural network chip by integration, as shown in FIG. 2.

Step six: an electro-optical interface, a control circuit and the like are added on the basis of the optical pulse neural network processor, and the configurable optical pulse neural network processor is formed, and is shown in fig. 1.

In summary of the above statements, the present invention has the following features: 1) Forming a monolithic integrated optical pulse neural network chip by using a semiconductor optical amplifier array as a synapse array and a distributed feedback semiconductor laser array with a saturated absorption region as a neuron array; 2) And forming a configurable optical pulse neural network processor based on modules such as an optical pulse neural network chip, an electro-optical/electro-optical interface, a control circuit and the like.

In summary, the above-mentioned embodiments are only examples of the present invention, and are not intended to limit the scope of the present invention, and it should be noted that, for those skilled in the art, it should be understood that equivalent modifications and substitutions (such as appropriately changing the magnitude of the operating current, changing the frequency detuning, changing the magnitude of the injected pulse power, and expanding the scale of the optical pulse neural network) can be made within the scope of the present invention.

Claims

1. An optical pulse neural network processor device comprises a monolithic integration and packaged SOA and DFB-SA array optical pulse neural network chip, a multi-channel tunable light source, a modulator array, a photoelectric detector PD array, a transimpedance amplifier array, an analog-to-digital conversion array, two digital-to-analog conversion arrays, a control circuit array and a memory array, and is characterized in that the optical pulse neural network chip is based on III/V family monolithic integration, and the output end of the multi-channel tunable light source is connected with the optical input end of the modulator array; the output end of the modulator array is respectively connected with the input end of the optical pulse neural network chip; two output ends of the controller are connected with input ends of the two digital-to-analog conversion arrays; the output ends of the two digital-to-analog conversion arrays are respectively connected with the radio frequency end of the modulator and the current control end of the optical pulse neural network chip; the output end of the optical pulse neural network chip is connected with the input end of the PD array; the output end of the PD array is connected with the input end of the transimpedance amplifier array; the output end of the transimpedance amplifier array is connected with the input end of the analog-to-digital conversion array; the output end of the analog-to-digital conversion array is connected with the input end of the control circuit; the control circuit is connected with the memory to store and read data. The optical pulse neural network chip is characterized in that the output end of the modulator is connected with the input end of the on-chip beam splitter; the output end of the beam splitter is connected with the input end of the array waveguide grating; the output end of the array waveguide grating is connected with the input end of the SOA synapse; the output end of the SOA synapse is connected with the input end of the second arrayed waveguide grating; the output end of the second arrayed waveguide grating is connected with the DFB-SA neuron array; and the output of the DFB-SA neuron array is used as the output of the optical pulse neural network chip for further transformation and analysis.

2. The optical pulse neural network processor device as claimed in claim 1, wherein a Semiconductor Optical Amplifier (SOA) is used as a photonic synapse, and a feedback semiconductor laser (DFB-SA) with a saturated absorption region is used as a photonic neuron; the photonic synapses and the photonic neurons are based on III/V materials, and the optical pulse neural network chip can be monolithically integrated.

3. The apparatus of claim 1, wherein the optical pulse neural network processor is flexibly configurable via connection of an optoelectronic/optoelectronic interface, a control circuit, and the like.

4. The apparatus of claim 1, wherein the number of nodes of the optical pulse neural network chip is expandable to n x n.