CN115774658A - Simulation system step size distribution method and system - Google Patents
Simulation system step size distribution method and system Download PDFInfo
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Abstract
The invention discloses a simulation system step size distribution method and a simulation system step size distribution system, wherein the simulation system comprises a plurality of serial systems, test data are input into each serial system, the calculation delay coefficient, the transmission delay coefficient and the data sensitivity of each serial system are further determined, and the simulation comprehensive performance index of each serial system is obtained by quantitatively analyzing the indexes of the calculation speed, the data sensitivity, the data transmission delay and the like of each serial system in the simulation system, so that the optimal step size value of each serial system is determined, the step size combination scheme of all the serial systems is obtained, and the simulation speed of the simulation system is maximally improved on the premise of not sacrificing the precision of the whole simulation system.
Description
Technical Field
The application relates to the technical field of digital simulation, in particular to a method and a system for allocating step length of a simulation system.
Background
The digital simulation system is characterized in that the simulation step size is set by the system before the simulation of each step. In a normal case, each subsystem in the system is simulated by using the same simulation step size. However, in some cases, some subsystems may use different simulation step sizes.
In the prior art, selection of simulation step sizes of different subsystems under a simulation platform is generally set by an empirical method, for example, manually judging which sub-modules have larger calculation amount of data, which sub-modules have lower requirement on operation precision, and which sub-modules have lower data access speed, so that the sub-modules are set with larger simulation step sizes. The technical scheme is flexible, but has strong subjectivity, too many setting parameters, and can not meet the automation requirement and achieve the optimal simulation efficiency of the system.
Disclosure of Invention
The embodiment of the invention provides a simulation system step size distribution method and system, and a step size combination scheme of a subsystem simulation platform is obtained by carrying out quantitative analysis on indexes of each subsystem in the simulation system, such as calculation speed, data sensitivity, data transmission delay and the like.
In order to solve the technical problem, the application provides the following technical scheme:
in a first aspect, the present application provides a method for allocating a step size of a simulation system, where the simulation system is composed of a plurality of serial systems, and the method for allocating a step size of a simulation system includes:
inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
and step length distribution is carried out on the simulation system according to each serial system sub-step length value so as to assist the simulation system to simulate the entity to be simulated.
Preferably, the inputting test data into each serial system to obtain a calculated delay coefficient of each serial system includes:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain the calculation delay of each parallel system;
and obtaining the calculation delay coefficient corresponding to the serial system according to the calculation delay of the parallel system.
Preferably, the inputting test data to each serial system to obtain a transmission delay coefficient of each serial system includes:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain the transmission delay of each parallel system;
and obtaining the transmission delay coefficient of each serial system according to the transmission delay of each parallel system.
Preferably, the inputting test data into each serial system to obtain a sensitivity index of each serial system data includes:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain output data of each parallel system;
and obtaining the data sensitivity index of each serial system according to the input test data and the output data of each parallel system.
Preferably, the obtaining of the computation delay coefficient of the serial system corresponding to the computation delay of the parallel system according to the computation delay of the parallel system includes:
aiming at each serial system, selecting a maximum value of the calculated delay in all the parallel systems corresponding to the serial system;
and obtaining the calculated delay coefficient of each serial system according to the maximum calculated delay of each serial system.
Preferably, the obtaining of the transmission delay coefficient of each serial system according to the transmission delay of each parallel system includes:
calculating the sum of the transmission delays of all the parallel systems corresponding to each serial system;
and obtaining the transmission delay coefficient of each serial system according to the sum of the transmission delays of each serial system.
Preferably, the obtaining the sensitivity index of each serial system data according to the input test data and the output data of each parallel system includes:
within a set time length, calculating the difference value of input test data and the difference value of output data of the parallel system at all moments in all the parallel systems corresponding to each serial system;
and obtaining the data sensitivity index of each serial system according to the difference value of the input test data, the difference value of the output data and the set time length of each parallel system.
Preferably, the obtaining of the sub-step value of each serial system according to the calculated delay coefficient, the transmission delay coefficient, the data sensitivity index, and the overall step value of the simulation system of each serial system includes:
obtaining a step length coefficient of each serial system and a total step length coefficient of the serial system according to the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system;
obtaining a step length distribution value of each serial system according to each serial system coefficient and the serial system total coefficient;
and obtaining the sub-step value of each serial system according to the step size distribution value of each serial system and the whole step size value of the simulation system.
In a second aspect, the present application provides a simulation system step size distribution system, where the simulation system is composed of a plurality of serial systems, and the simulation system step size distribution system includes:
a coefficient calculation module: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
a sub-step calculation module: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
a step size distribution module: and optimizing the simulation system according to each serial system sub-step value.
Meanwhile, the invention also provides computer equipment which comprises a memory, a processor and a computer program which is stored on the memory and can run on the processor, wherein the processor realizes the method when executing the computer program.
Meanwhile, the invention also provides a computer readable storage medium, and a computer program for executing the method is stored in the computer readable storage medium.
According to the technical scheme, the simulation system comprises a plurality of serial systems, test data are input into each serial system, the calculation delay coefficient, the transmission delay coefficient and the data sensitivity of each serial system are further determined, the simulation comprehensive performance indexes of each serial system are obtained by carrying out quantitative analysis on the indexes of the calculation speed, the data sensitivity, the data transmission delay and the like of each serial system in the simulation system, then the optimal step value of each serial system is determined, the step size combination schemes of all the serial systems are obtained, and the simulation speed of the simulation system is improved to the maximum extent on the premise that the precision of the whole simulation system is not sacrificed.
In order to make the aforementioned and other objects, features and advantages of the invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic process diagram of a simulation system step size allocation method in an embodiment of the present application.
Fig. 2 is a schematic flowchart of a process of calculating a serial system calculation delay factor in a simulation system step size distribution method in this embodiment.
Fig. 3 is a schematic structural diagram of a serial system and a parallel system in a simulation system step size distribution method in the embodiment of the present application.
Fig. 4 is a schematic flowchart of a process for calculating a serial system transmission delay coefficient in a simulation system step size distribution system in this embodiment.
Fig. 5 is a schematic flowchart of a process of calculating a serial system calculation data sensitivity index in a simulation system step size distribution system in the embodiment of the present application.
Fig. 6 is a schematic flowchart illustrating a process of calculating a serial system sub-step value in a simulation system step size distribution system according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of a simulation system step size distribution system in an embodiment of the present application.
Fig. 8 is an input/output schematic diagram of a simulation system step size distribution system in an embodiment of the present application.
Fig. 9 is a schematic structural diagram of an electronic device in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In consideration of the flexible step length selection of the current simulation system, the selection has strong subjectivity, the set parameters are too many, the automation requirements cannot be met, and the optimal simulation efficiency of the system cannot be achieved.
Based on the above, the present application further provides a simulation system step size distribution device for implementing the simulation system step size distribution method provided in one or more embodiments of the present application, where the simulation system step size distribution device may be in communication connection with a plurality of user client devices, and the simulation system step size distribution device may specifically access the client terminal devices through an application server.
The simulation system step size distribution device can receive a simulation system step size distribution instruction from client terminal equipment and acquire input test data of a simulation system from the simulation system step size distribution instruction, the simulation system step size distribution device inputs the input test data of the simulation system into the simulation system according to the simulation system step size distribution, the simulation system step size distribution device outputs the optimal step size value of each serial system and a system step size combination scheme, and then the simulation system step size distribution device can send the system step size combination scheme to the client terminal equipment for displaying, so that a user can acquire the system step size combination scheme according to the client terminal equipment and optimize the simulation system.
It will be appreciated that the client devices may include smart phones, tablet electronic devices, portable computers, desktop computers, personal Digital Assistants (PDAs), and the like.
In another practical application scenario, the step size distribution part of the simulation system may be performed in the classification processing center as described above, or all operations may be performed in the client device. The selection may be specifically performed according to the processing capability of the client device, the limitation of the user usage scenario, and the like. This is not a limitation of the present application. If all the operations are completed in the client device, the client device may further include a processor for performing specific processing of step size allocation of the simulation system.
The client device may have a communication module (i.e., a communication unit), and may be communicatively connected to a remote server to implement data transmission with the server. For example, the communication unit may transmit the simulation system step size allocation instruction to a server of the classification processing center, so that the server performs the simulation system step size allocation processing according to the simulation system step size allocation instruction. The communication unit may also receive a step size combination scheme returned by the server. The server may include a server on the task scheduling center side, and in other implementation scenarios, the server may also include a server on an intermediate platform, for example, a server on a third-party server platform that has a communication link with the task scheduling center server. The server may include a single computer device, or may include a server cluster formed by a plurality of servers, or a server structure of a distributed apparatus.
The server and the client device may communicate using any suitable network protocol, including network protocols not yet developed at the filing date of this application. The network protocol may include, for example, a TCP/IP protocol, a UDP/IP protocol, an HTTP protocol, an HTTPS protocol, or the like. Of course, the network Protocol may also include, for example, an RPC Protocol (Remote Procedure Call Protocol), a REST Protocol (Representational State Transfer Protocol), and the like used above the above Protocol.
According to the simulation system step size distribution method, the simulation system step size distribution system, the electronic equipment and the computer readable storage medium, the simulation system comprises a plurality of serial systems, test data are input into each serial system, the calculation delay coefficient, the transmission delay coefficient and the data sensitivity of each serial system are further determined, the simulation comprehensive performance indexes of each serial system are obtained by quantitatively analyzing the indexes of the calculation speed, the data sensitivity, the data transmission delay and the like of each serial system in the simulation system, the optimal step size value of each serial system is determined, the step size combination scheme of all the serial systems is obtained, and the simulation speed of the simulation system is maximally improved on the premise that the precision of the whole simulation system is not sacrificed.
The following embodiments and application examples are specifically and respectively described.
In order to solve the problems that the step size distribution of the current simulation system depends on manual judgment and the simulation speed is low, the application provides an embodiment of a simulation system step size distribution method, referring to fig. 1, the simulation system is composed of a plurality of serial systems, and the simulation system step size distribution method specifically comprises the following contents:
step 100: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
it can be understood that the simulation system includes a plurality of serial systems, different data are respectively input into each serial system, and a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system can be obtained according to data calculation time, data transmission time and output data of each serial system, so as to quantify the simulation performance of each serial system.
Step 200: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
it can be understood that, according to the calculated delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system, the calculated delay coefficient, the transmission delay coefficient and the data sensitivity index of the whole simulation system can be obtained, so that the contribution value of the simulation performance of each serial system in the whole simulation system can be obtained, and further, the sub-step value of each serial system can be obtained, for example, if the simulation performance of one serial system is 2, the simulation performance of the whole simulation system is 10, and the step value of the whole simulation system is a, then the serial system contributes 20% of the simulation performance to the whole simulation system, and then the sub-step value of the serial system is 20% a.
Step 300: and step length distribution is carried out on the simulation system according to each serial system sub-step length value so as to assist the simulation system to simulate the entity to be simulated. And combining all the serial system sub-step value combinations to form a step size combination scheme of the whole simulation system, and distributing the step size of the simulation system according to the step size combination scheme.
As can be seen from the above description, in the method for allocating step sizes of a simulation system provided in the embodiments of the present application, the simulation system includes multiple serial systems, and the simulation system further determines a calculation delay coefficient, a transmission delay coefficient, and a data sensitivity of each serial system by inputting test data to each serial system, and obtains a simulation comprehensive performance index of each serial system by performing quantitative analysis on indexes of the calculation speed, the data sensitivity, the data transmission delay, and the like of each serial system in the simulation system, so as to determine an optimal step value of each serial system, obtain step size combination schemes of all serial systems, and maximally improve the simulation speed of the simulation system on the premise of not sacrificing the accuracy of the entire simulation system.
In an embodiment of the method for allocating step sizes of a simulation system provided by the present application, a preferred manner for determining the serial system computation delay coefficients is provided, and referring to fig. 2, the inputting test data to each serial system to obtain each serial system computation delay coefficient includes:
step 111: dividing each serial system into a plurality of parallel systems;
step 112: inputting test data to each parallel system to obtain the computation delay of each parallel system;
step 113: and obtaining the calculation delay coefficient of the serial system corresponding to the parallel system according to the calculation delay of the parallel system.
In this embodiment, the calculation delay is a calculation time length from receiving of input test data to calculation of output data for each parallel system, referring to fig. 3, each serial system is divided into a plurality of parallel systems, different data is input to each parallel system, the calculation delay of each parallel system can be obtained according to operation experience, and the calculation delay coefficients of all serial systems can be obtained according to the calculation delays of all parallel systems.
As can be seen from the above description, in the step size allocation method for the simulation system provided in the embodiment of the present application, each serial system is divided into a plurality of parallel systems, the computation delay for each parallel system is obtained, and then the computation delay coefficient for each serial system is obtained, so that the computation performance of each serial system is quantized.
In an embodiment of the method for allocating step sizes of a simulation system provided by the present application, a preferred method for determining transmission delay coefficients of serial systems is provided, and referring to fig. 4, the inputting test data to each serial system to obtain the transmission delay coefficient of each serial system includes:
step 121: dividing each serial system into a plurality of parallel systems;
step 122: inputting test data to each parallel system to obtain the transmission delay of each parallel system;
step 123: and obtaining the transmission delay coefficient of each serial system according to the transmission delay of each parallel system.
In this embodiment, the transmission delay is a duration for each parallel system to transmit output data, different data is input to each parallel system, each parallel system obtains different output data, the transmission delay can be obtained according to operation experience, and transmission delay coefficients of all serial systems can be obtained according to the transmission delays of all parallel systems.
As can be seen from the above description, in the step size allocation method for the simulation system provided in the embodiment of the present application, each serial system is divided into a plurality of parallel systems, the transmission delay of each parallel system is obtained, and then the transmission delay coefficient of each serial system is obtained, so that the transmission performance of each serial system is quantized.
In an embodiment of the method for allocating step size to a simulation system provided in the present application, a preferred method for determining serial system data sensitivity indexes is provided, and referring to fig. 5, the inputting test data to each serial system to obtain each serial system data sensitivity index includes:
step 131: dividing each serial system into a plurality of parallel systems;
step 132: inputting test data to each parallel system to obtain output data of each parallel system;
step 133: and obtaining the data sensitivity index of each serial system according to the input test data and the output data of each parallel system.
In this embodiment, the data sensitivity is a data variation of output data of each parallel system relative to input test data, different data are respectively input to each parallel system, each parallel system obtains different output data, and a data sensitivity index of each serial system can be obtained according to all the output data and the corresponding output data.
As can be seen from the above description, in the step size allocation method for the simulation system provided in the embodiment of the present application, each serial system is divided into a plurality of parallel systems, different data is input to each parallel system, each parallel system obtains different output data, and then the data sensitivity index of each serial system is obtained.
In an embodiment of the method for allocating step sizes of a simulation system, the method for calculating a serial system calculation delay coefficient includes:
aiming at each serial system, selecting a maximum value of the calculated delay in all the parallel systems corresponding to the serial system;
and obtaining the calculation delay coefficient of each serial system according to the maximum calculation delay value of each serial system.
In this embodiment, a plurality of parallel systems corresponding to each serial system are grouped, the maximum value of the computation delay in each group of parallel systems is selected, and the computation delay coefficient of each serial system is obtained according to the maximum value of the computation delay.
In an embodiment of the method for allocating step sizes of a simulation system, the method for calculating transmission delay coefficients of serial systems includes:
calculating the sum of the transmission delays of all the parallel systems corresponding to each serial system;
and obtaining the transmission delay coefficient of each serial system according to the sum of the transmission delays of each serial system.
In this embodiment, a plurality of parallel systems corresponding to each serial system are in a group, the sum of all transmission delays in each group of parallel systems is calculated, and a transmission delay coefficient of each serial system is obtained according to the sum of the transmission delays.
In an embodiment of the method for allocating step sizes of a simulation system, the obtaining a transmission delay coefficient of each serial system according to the transmission delay of each parallel system includes:
calculating the difference value of input test data and the difference value of output data of the parallel system at all times in all the parallel systems corresponding to each serial system within a set time length;
and obtaining the data sensitivity index of each serial system according to the difference value of the input test data, the difference value of the output data and the set time length of each parallel system.
In this embodiment, the data sensitivity index reflects the sensitivity of the entire serial system to the fluctuation of the input test data by summing the ratio of the input data value to the output data value and the absolute value thereof. By utilizing the sensitivity of the quick calculation, the resource requirement of the serial subsystem on the current data calculation can be accurately estimated, so that an important reference index is provided for the distribution of the subsystem step length. The method comprises the steps that a plurality of parallel systems corresponding to each serial system form a group, output data and input test data of each parallel system at all times are obtained in a set time length aiming at each group of parallel systems, the ratio of the absolute value of the difference between the output data and the absolute value of the difference between the input test data is calculated, the sum of the ratios of all the parallel systems in each serial system is calculated, and the data sensitivity index of each serial system is obtained according to the ratio of the sum of the ratios and the set time length.
The following specifically describes a process of a simulation system step size allocation method provided in the embodiment of the present application with reference to fig. 8:
in one specific scenario, the simulated system step size distribution system contains 4 inputs and 1 output. Input 1 is the overall step value of the simulation system; inputting 2 computing delay of each parallel system; inputting the data transmission delay of each subsystem with 3 bits; input 4 bits each subsystem inputs and outputs all data at each previous computation time. The output is the step size combination scheme of the simulation system, and the step size value of each serial system is included.
1) The simulation system is divided into n serial subsystems in the manner shown in fig. 1. For the ith subsystem in 1-n, numbering the mi subsystem in the ith subsystem as i-mi
Therefore, it has in common
And (5) a subsystem.
2) The calculation delay of each subsystem is input from the outside, the calculation delay of the ith serial subsystem is Tcali, the calculation delay coefficient of the ith serial subsystem is STcali, and the calculation is as follows:
Tcali＝max{Tcali-1,Tcali-2,...,Tcali-mi}
STcali＝e Tcali
wherein Tcali-1 is the computation delay of the 1 st parallel subsystem in the ith serial subsystem, tcali-2 is the computation delay of the 2 nd parallel subsystem in the ith serial subsystem, and Tcali-mi is the computation delay of the mi th parallel subsystem in the ith serial subsystem.
3) The transmission delay input from the outside into each subsystem (including only the time consumed for data output), the transmission delay of the ith serial subsystem is ttranging, the calculated delay coefficient of the ith serial subsystem is STtransi, and the calculation is as follows:
STtransi＝e Ttransi
wherein, ttrans-j is the transmission delay of the jth parallel subsystem in the ith serial subsystem.
4) The current time is t0, and the previous time is 1 to (t 0-1). The input test data and the output data of each series subsystem at each moment before are input from the outside. (if the serial system includes a plurality of parallel systems, the input test data and the output data of the parallel systems are respectively combined to be used as the input test data and the output data of the serial system). In the method, it should be noted that the input test data or the output data are column vectors.
In this way, input test data xit of the ith serial subsystem at time t (t is an integer value between 1 and (t 0-1)) is obtained, and output data yit is obtained. Then, the data sensitivity index of the ith serial subsystem is
5) The step value of the whole simulation platform input from the outside is R0. The step size of the ith serial subsystem (including all parallel subsystems therein) is
And the step values of all serial systems are the result of the step combination scheme of the whole simulation system. And finishing the calculation.
In an embodiment of a simulation system step size assignment method provided in the present application, a preferred manner of calculating serial system sub-step size values is provided, and referring to fig. 6, the obtaining each serial system sub-step size value according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index, and the overall step size value of the simulation system of each serial system includes:
step 201: obtaining a step length coefficient of each serial system and a total step length coefficient of the serial system according to the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system;
step 202: obtaining a step length distribution value of each serial system according to each serial system coefficient and the serial system total coefficient;
step 203: and obtaining the sub-step value of each serial system according to the step size distribution value of each serial system and the whole step size value of the simulation system.
In this embodiment, the coefficient of each serial system is obtained by calculating the product of the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system, the total coefficient of the entire simulation system is obtained by calculating the product of the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of all serial systems, the total coefficient is the sum of the products of the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of all serial systems, the ratio of the coefficient of each serial system and the total coefficient of the entire simulation system is calculated to obtain the step size distribution value of each serial system, and the product of the step size distribution value of each serial system and the overall step size value of the simulation system is calculated to obtain the sub-step size value of each serial system.
From the above description, it can be seen that the simulation system includes a plurality of serial systems, the calculation delay coefficient, the transmission delay coefficient, and the data sensitivity of each serial system are determined by inputting different data to each serial system, and the simulation comprehensive performance index of each serial system is obtained by performing quantitative analysis on the calculation speed, the data sensitivity, the data transmission delay, and other indexes of each serial system in the simulation system, so as to determine the optimal step value of each serial system, obtain the step combination schemes of all serial systems, and maximally improve the simulation speed of the simulation system on the premise of not sacrificing the accuracy of the whole simulation system.
In a second aspect, in order to solve the problem that the step size selection of the current simulation system is flexible, but has strong subjectivity, excessive setting parameters, and low automation, the present application provides an embodiment of a step size distribution system of a simulation system, and referring to fig. 7, the simulation system is composed of a plurality of serial systems, and the step size distribution system of the simulation system specifically includes the following contents:
coefficient calculation module 01: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
the sub-step calculation module 02: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
step size allocation module 03: and optimizing the simulation system according to each serial system sub-step value.
In this embodiment, the simulation system includes a plurality of serial systems, the coefficient calculation module 01 inputs different data into each serial system, and according to the data calculation time, the data transmission time, and the output data of each serial system, the calculation delay coefficient, the transmission delay coefficient, and the data sensitivity index of each serial system can be obtained, and the calculation delay coefficient, the transmission delay coefficient, and the data sensitivity index of each serial system are input to the sub-step calculation module 02.
The sub-step calculation module 02 may obtain the calculated delay coefficient, the transmission delay coefficient, and the data sensitivity index of the entire simulation system according to the calculated delay coefficient, the transmission delay coefficient, and the data sensitivity index of each serial system, and thus, the sub-step calculation module 02 may obtain a contribution value of the simulation performance of each serial system in the entire simulation system, and further obtain a sub-step value of each serial system, and input the sub-step value of each serial system to the step allocation module 03, for example, one of the serial system simulation performance is 2, the simulation performance of the entire simulation system is 10, the step value of the entire simulation system is a, and then the serial system contributes 20% of the simulation performance to the entire simulation system, and then the sub-step value of the serial system is 20%. A.
The step length allocation module 03 combines all the serial system sub-step length values to form a step length combination scheme of the whole simulation system, and allocates the step length of the simulation system according to the step length combination scheme.
As can be seen from the above description, according to the step size distribution system for a simulation system provided in the embodiment of the present application, the simulation system includes multiple serial systems, and test data is input into each serial system, so as to determine a calculation delay coefficient, a transmission delay coefficient, and a data sensitivity of each serial system, and quantitative analysis is performed on indexes of the calculation speed, the data sensitivity, the data transmission delay, and the like of each serial system in the simulation system, so as to obtain an index of comprehensive simulation performance of each serial system, thereby determining an optimal step size of each serial system, obtaining a step size combination scheme of all serial systems, and maximally improving a simulation speed of the simulation system on the premise of not sacrificing accuracy of the whole simulation system.
In some other embodiments, the step size allocating module 03 may also perform a partial sub-step size calculating function, the sub-step size calculating module 02 may perform a contribution value of simulation performance of the whole simulation system according to simulation performance of each serial system, where the contribution value is a step size allocation value of each serial system, the sub-step size calculating module 02 inputs the step size allocation value of each serial system to the step size allocating module 03, and the step size allocating module 03 obtains a sub-step size value of each serial system according to the step size allocation value of each serial system and the step size value of the whole simulation system, and performs step size allocation according to the sub-step size value of each serial system.
The following specifically describes a simulation system step size allocation method and a system process provided in the embodiment of the present application with reference to fig. 8:
the step size distribution system of the simulation system comprises 4 inputs and 1 output. Input 1 is the overall step value of the simulation system; inputting 2 computing delay of each parallel system; inputting the data transmission delay of each 3-bit subsystem; input 4 bits each subsystem inputs and outputs all data at each previous computation time. The output is the step size combination scheme of the simulation system, and the step size value of each serial system is included.
1) The simulation system is divided into n serial subsystems in the manner shown in fig. 1. For the ith subsystem from 1 to n, numbering the mi subsystem as i-mi
Therefore, it shares
And (5) a subsystem.
2) The calculation delay of each subsystem is input from the outside, the calculation delay of the ith serial subsystem is Tcali, the calculation delay coefficient of the ith serial subsystem is STcali, and the calculation is as follows:
Tcali＝max{Tcali-1,Tcali-2,...,Tcali-mi}
STcali＝e Tcali
wherein Tcali-1 is the computation delay of the 1 st parallel subsystem in the ith serial subsystem, tcali-2 is the computation delay of the 2 nd parallel subsystem in the ith serial subsystem, and Tcali-mi is the computation delay of the mi th parallel subsystem in the ith serial subsystem.
3) The transmission delay (only including the time consumed for outputting data) of each subsystem is input from the outside, the transmission delay of the ith serial subsystem is ttrange, the calculated delay coefficient of the ith serial subsystem is STtransi, and the calculation is as follows:
STtransi＝e Ttransi
wherein, ttrans-j is the transmission delay of the jth parallel subsystem in the ith serial subsystem.
4) The current time is t0, and the previous time is 1 to (t 0-1). The input test data and the output data of each series subsystem at each moment before are input from the outside. (if the serial system includes a plurality of parallel systems, the input test data and the output data of the parallel systems are respectively combined to be used as the input test data and the output data of the serial system). In the method, it should be noted that the input test data or the output data are column vectors.
Thus, input test data xit of the ith serial subsystem at time t (t is an integer value between 1 and (t 0-1)) is obtained, and output data yit is obtained. Then, the data sensitivity index of the ith serial subsystem is
5) The step value of the whole simulation platform input from the outside is R0. The step size of the ith serial subsystem (including all parallel subsystems therein) is
And the step values of all serial systems are the result of the step combination scheme of the whole simulation system. And finishing the calculation.
In terms of hardware, in order to solve the problems that the step size selection of the current simulation system is flexible, but has strong subjectivity, excessive setting parameters and low automation, the present application provides an embodiment of an electronic device of all or part of contents in the step size allocation method of the simulation system, where the electronic device specifically includes the following contents:
fig. 9 is a schematic block diagram of a system configuration of an electronic device 9600 according to an embodiment of the present application. As shown in fig. 9, the electronic device 9600 can include a central processor 9100 and a memory 9140; the memory 9140 is coupled to the central processor 9100. It is noted that this fig. 9 is exemplary; other types of structures may also be used in addition to or in place of the structure to implement telecommunications or other functions.
In one embodiment, the simulation system step size assignment function may be integrated into a central processor. Wherein the central processor may be configured to control:
step 100: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
it can be understood that the simulation system includes a plurality of serial systems, different data are respectively input into each serial system, and a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system can be obtained according to data calculation time, data transmission time and output data of each serial system, so as to quantify the simulation performance of each serial system.
Step 200: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
it can be understood that the calculated delay coefficient, the transmission delay coefficient, and the data sensitivity index of the entire simulation system can be obtained according to the calculated delay coefficient, the transmission delay coefficient, and the data sensitivity index of each serial system, so that a contribution value of the simulation performance of each serial system in the entire simulation system can be obtained, and further a sub-step value of each serial system can be obtained, for example, if one serial system simulation performance is 2, the simulation performance of the entire simulation system is 10, and the step value of the entire simulation system is a, then the serial system contributes 20% of the simulation performance to the entire simulation system, and then the sub-step value of the serial system is 20%. A.
Step 300: and step length distribution is carried out on the simulation system according to each serial system sub-step length value so as to assist the simulation system to simulate the entity to be simulated. All the serial system sub-step value combinations are combined to form a step size combination scheme of the whole simulation system, and the step size of the simulation system is distributed according to the step size combination scheme.
As can be seen from the above description, in the electronic device provided in the embodiment of the present application, the calculation delay coefficient, the transmission delay coefficient, and the data sensitivity of each serial system are determined by inputting the test data to each serial system, and the simulation comprehensive performance index of each serial system is obtained by performing quantitative analysis on the indexes of the calculation speed, the data sensitivity, the data transmission delay, and the like of each serial system in the simulation system, so as to determine the optimal step value of each serial system, obtain the step combination scheme of all serial systems, and maximally improve the simulation speed of the simulation system on the premise of not sacrificing the accuracy of the whole simulation system.
In another embodiment, the simulation system step size allocating device may be configured separately from the central processor 9100, for example, the simulation system step size allocating device may be configured as a chip connected to the central processor 9100, and the simulation system step size allocating function is realized by the control of the central processor.
As shown in fig. 9, the electronic device 9600 may further include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is noted that the electronic device 9600 also does not necessarily include all of the components shown in fig. 9; in addition, the electronic device 9600 may further include components not shown in fig. 9, which may be referred to in the prior art.
As shown in fig. 9, a central processor 9100, sometimes referred to as a controller or operational control, can include a microprocessor or other processor device and/or logic device, which central processor 9100 receives input and controls the operation of the various components of the electronic device 9600.
The memory 9140 can be, for example, one or more of a buffer, a flash memory, a hard drive, a removable media, a volatile memory, a non-volatile memory, or other suitable device. The information relating to the failure may be stored, and a program for executing the information may be stored. And the central processing unit 9100 can execute the program stored in the memory 9140 to realize information storage or processing, or the like.
The input unit 9120 provides input to the central processor 9100. The input unit 9120 is, for example, a key or a touch input device. Power supply 9170 is used to provide power to electronic device 9600. The display 9160 is used for displaying display objects such as images and characters. The display may be, for example, an LCD display, but is not limited thereto.
The memory 9140 can be a solid state memory, e.g., read Only Memory (ROM), random Access Memory (RAM), a SIM card, or the like. There may also be a memory that holds information even when power is off, can be selectively erased, and is provided with more data, an example of which is sometimes called an EPROM or the like. The memory 9140 could also be some other type of device. Memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application/function storage part 9142, the application/function storage part 9142 being used to store application programs and function programs or a flow for executing the operation of the electronic device 9600 by the central processing unit 9100.
The memory 9140 can also include a data store 9143, the data store 9143 being used to store data, such as contacts, digital data, pictures, sounds, and/or any other data used by an electronic device. The driver storage portion 9144 of the memory 9140 may include various drivers of the electronic device for communication functions and/or for performing other functions of the electronic device (e.g., messaging applications, contact book applications, etc.).
The communication module 9110 is a transmitter/receiver 9110 that transmits and receives signals via an antenna 9111. The communication module (transmitter/receiver) 9110 is coupled to the central processor 9100 to provide input signals and receive output signals, which may be the same as in the case of a conventional mobile communication terminal.
Based on different communication technologies, a plurality of communication modules 9110, such as a cellular network module, a bluetooth module, and/or a wireless local area network module, may be provided in the same electronic device. The communication module (transmitter/receiver) 9110 is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide audio output via the speaker 9131 and receive audio input from the microphone 9132, thereby implementing ordinary telecommunications functions. The audio processor 9130 may include any suitable buffers, decoders, amplifiers and so forth. In addition, the audio processor 9130 is also coupled to the central processor 9100, thereby enabling recording locally through the microphone 9132 and enabling locally stored sounds to be played through the speaker 9131.
Embodiments of the present application further provide a computer-readable storage medium capable of implementing all steps in the simulation system step size allocation method in the foregoing embodiments, where the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements all steps of the simulation system step size allocation method in which an execution subject is a server or a client, for example, when the processor executes the computer program, the processor implements the following steps:
step 100: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
it can be understood that the simulation system includes a plurality of serial systems, different data are respectively input into each serial system, and according to the data calculation time, the data transmission time and the output data of each serial system, the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system can be obtained, so as to quantify the simulation performance of each serial system.
Step 200: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
it can be understood that, according to the calculated delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system, the calculated delay coefficient, the transmission delay coefficient and the data sensitivity index of the whole simulation system can be obtained, so that the contribution value of the simulation performance of each serial system in the whole simulation system can be obtained, and further, the sub-step value of each serial system can be obtained, for example, if the simulation performance of one serial system is 2, the simulation performance of the whole simulation system is 10, and the step value of the whole simulation system is a, then the serial system contributes 20% of the simulation performance to the whole simulation system, and then the sub-step value of the serial system is 20% a.
Step 300: and step length distribution is carried out on the simulation system according to each serial system sub-step length value so as to assist the simulation system to simulate the entity to be simulated. And combining all the serial system sub-step value combinations to form a step size combination scheme of the whole simulation system, and distributing the step size of the simulation system according to the step size combination scheme.
As can be seen from the above description, in the computer-readable storage medium provided in this embodiment of the present application, the simulation system includes a plurality of serial systems, the test data is input into each serial system, and then the calculation delay coefficient, the transmission delay coefficient, and the data sensitivity of each serial system are determined, and the simulation comprehensive performance index of each serial system is obtained by performing quantitative analysis on the calculation speed, the data sensitivity, the data transmission delay, and other indexes of each serial system in the simulation system, so as to determine the optimal step value of each serial system, obtain the step combination schemes of all serial systems, and maximize the simulation speed of the simulation system on the premise of not sacrificing the accuracy of the entire simulation system.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The principle and the implementation mode of the invention are explained by applying specific embodiments in the invention, and the description of the embodiments is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (11)
1. A simulation system step size distribution method is characterized in that the simulation system is composed of a plurality of serial systems, and the simulation system step size distribution method comprises the following steps:
inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
and step length distribution is carried out on the simulation system according to the sub-step length value of each serial system so as to assist the simulation system to simulate the entity to be simulated.
2. The method for allocating simulation system steps according to claim 1, wherein said inputting test data to each of said serial systems to obtain a calculated delay factor for each of said serial systems comprises:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain the computation delay of each parallel system;
and obtaining the calculation delay coefficient corresponding to the serial system according to the calculation delay of the parallel system.
3. The method for assigning step sizes to simulation systems according to claim 1, wherein said inputting test data to each of said serial systems to obtain a transmission delay factor of each of said serial systems comprises:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain the transmission delay of each parallel system;
and obtaining the transmission delay coefficient of each serial system according to the transmission delay of each parallel system.
4. The method for assigning step sizes to simulation systems according to claim 1, wherein said inputting test data to each of said serial systems to obtain a sensitivity index of each of said serial systems comprises:
dividing each serial system into a plurality of parallel systems;
inputting test data to each parallel system to obtain output data of each parallel system;
and obtaining the data sensitivity index of each serial system according to the input test data and the output data of each parallel system.
5. The method for allocating simulation system step size according to claim 2, wherein said obtaining the computation delay coefficient corresponding to the serial system according to the computation delay of the parallel system comprises:
aiming at each serial system, selecting a maximum value of the calculated delay in all the parallel systems corresponding to the serial system;
and obtaining the calculated delay coefficient of each serial system according to the maximum calculated delay of each serial system.
6. The simulation system step size distribution method according to claim 3, wherein said obtaining a transmission delay coefficient of each of the serial systems according to the transmission delay of each of the parallel systems comprises:
calculating the sum of the transmission delays of all the parallel systems corresponding to each serial system;
and obtaining the transmission delay coefficient of each serial system according to the sum of the transmission delays of each serial system.
7. The method for assigning step sizes in a simulation system according to claim 4, wherein said obtaining sensitivity indicators for each of said serial system data according to said input test data and said output data of each of said parallel systems comprises:
within a set time length, calculating the difference value of input test data and the difference value of output data of the parallel system at all moments in all the parallel systems corresponding to each serial system;
and obtaining the data sensitivity index of each serial system according to the difference value of the input test data, the difference value of the output data and the set time length of each parallel system.
8. The simulation system step size distribution method according to claim 1, wherein said obtaining each of said serial system sub-step values according to said calculation delay coefficient, said transmission delay coefficient, said data sensitivity index and said simulation system overall step size value of each of said serial systems comprises:
obtaining a step length coefficient of each serial system and a total step length coefficient of the serial system according to the calculation delay coefficient, the transmission delay coefficient and the data sensitivity index of each serial system;
obtaining a step length distribution value of each serial system according to each serial system coefficient and the serial system total coefficient;
and obtaining the sub-step value of each serial system according to the step size distribution value of each serial system and the whole step size value of the simulation system.
9. A simulation system step size distribution system is characterized in that the simulation system is composed of a plurality of serial systems, and the simulation system step size distribution system comprises:
a coefficient calculation module: inputting test data to each serial system to obtain a calculation delay coefficient, a transmission delay coefficient and a data sensitivity index of each serial system;
a sub-step calculation module: obtaining a sub-step value of each serial system according to the calculation delay coefficient, the transmission delay coefficient, the data sensitivity index and the overall step value of the simulation system of each serial system;
a step size distribution module: and optimizing the simulation system according to each serial system sub-step value.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the simulation system step size allocation method of any of claims 1 to 8 when executing the program.
11. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the simulation system step size allocation method of any one of claims 1 to 8.
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