CN115765688B - Signal processing method for demodulation signal in capacitance sampling circuit and related device - Google Patents
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Abstract
The embodiment of the application discloses a signal processing method and a related device for a demodulation signal in a capacitance sampling circuit. The method comprises the steps of updating a current sampling frequency to a first sampling frequency under the condition that noise of the current sampling frequency exceeds a preset noise threshold, obtaining a first original signal and a second original signal of a capacitance sampling circuit, respectively determining an edge position of the first original signal and an edge position of the second original signal, setting the level of the edge position of the first original signal to be a first level, enabling the first original signal to be positively correlated with the duty ratio of the first original signal, and setting the level of the edge position of the second original signal to be the first level, enabling the second original signal to be positively correlated with the duty ratio of the second original signal. By the adoption of the method and the device, the demodulation signal after the frequency change can be accurately estimated when the sampling frequency of the capacitance sampling circuit jumps.
Description
Technical Field
The present invention relates to the general data processing technology field of the internet industry, and in particular, to a signal processing method and related apparatus for a demodulation signal in a capacitive sampling circuit.
Background
When the sampling frequency of the capacitance sampling circuit changes, the duty ratio of the pulse signal changes due to the change of the frequency, and if the change amplitude of the duty ratio is too large, the demodulation signal finally output by the capacitance sampling circuit also changes greatly, so that the problem that the demodulation signal after the frequency change cannot be estimated is caused.
Disclosure of Invention
The embodiment of the application provides a signal processing method and a related device for a demodulation signal in a capacitance sampling circuit, which are beneficial to relatively accurately predicting the demodulation signal after frequency change when the sampling frequency of the capacitance sampling circuit jumps.
In a first aspect, an embodiment of the present application provides a method for processing a demodulated signal in a capacitive sampling circuit, where the method includes:
determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value;
under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, updating the current sampling frequency to a first sampling frequency, wherein the first sampling frequency is a frequency with the noise lower than the preset noise threshold;
acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal under the current sampling frequency, and the second original signal is a pulse signal under the first sampling frequency;
respectively determining the edge position of the first original signal and the edge position of the second original signal;
setting the level of the edge position of the first original signal as a first level, so that the duty ratio of the set first original signal is positively correlated with the duty ratio of the set first original signal;
setting the level of the edge position of the second original signal to the first level, so that the duty ratio of the set second original signal is positively correlated with the duty ratio of the set second original signal;
processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is a demodulation signal of the set second original signal.
The implementation of the first aspect of the embodiments of the present application has the following beneficial effects:
the method includes the steps that whether noise of a current sampling frequency of a capacitance sampling circuit exceeds a preset noise threshold value or not can be determined, under the condition that the noise of the current sampling frequency exceeds the preset noise threshold value, the current sampling frequency is updated to be a first sampling frequency, the first sampling frequency is the frequency with the lowest noise, a first original signal and a second original signal of the capacitance sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is the pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be a first level, the set first original signal is positively correlated with the duty ratio of the set first original signal, the level of the edge position of the second original signal is set to be a first level, the set second original signal is positively correlated with the duty ratio of the set second original signal, the set first original signal is processed to obtain a first demodulated signal, the first original signal is the set first original signal, the second original signal is demodulated according to the set duty ratio of the first original signal, the second original signal and the set duty ratio of the second original signal, the second original signal is demodulated; in this way, by changing the levels of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the first original signal is positively correlated, and the duty ratio of the second original signal and the second original signal is positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
In a second aspect, an embodiment of the present application provides a signal processing apparatus for a demodulated signal in a capacitive sampling circuit, where the apparatus includes:
the noise determining unit is used for determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value;
the frequency updating unit is used for updating the current sampling frequency to a first sampling frequency under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, wherein the first sampling frequency is a frequency with the noise lower than the preset noise threshold;
the acquisition unit is used for acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal under the current sampling frequency, and the second original signal is a pulse signal under the first sampling frequency;
a determining unit, configured to determine an edge position of the first original signal and an edge position of the second original signal, respectively;
the level adjusting unit is used for setting the level of the edge position of the first original signal to be a first level so that the duty ratio of the set first original signal is positively correlated with the duty ratio of the set first original signal;
the level adjusting unit is further configured to set a level of an edge position of the second original signal to the first level, so that a duty ratio of the set second original signal is positively correlated with a duty ratio of the set second original signal;
a demodulation unit, configured to process the set first original signal to obtain a first demodulated signal, where the first demodulated signal is a demodulated signal of the set first original signal;
and a calculating unit, configured to calculate a second demodulated signal according to the first demodulated signal, the duty ratio of the set first original signal, and the duty ratio of the set second original signal, where the second demodulated signal is a demodulated signal of the set second original signal.
In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor, a memory, and a computer program or an instruction stored on the memory, where the processor executes the computer program or the instruction to implement the steps in the first aspect of the embodiment of the present application.
In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program causes a computer to execute some or all of the steps described in the first aspect of the embodiment of the present application.
In a fifth aspect, the present application provides a computer program product, where the computer program product includes a computer program operable to cause a computer to perform some or all of the steps as described in the first aspect of the present application.
The beneficial effects brought by the technical solutions of the second aspect to the fifth aspect can be referred to the technical effects brought by the technical solution of the first aspect, and are not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 2 is a schematic flowchart of a method for processing a demodulated signal in a capacitance sampling circuit according to an embodiment of the present disclosure;
fig. 3A is a schematic diagram of a partial circuit architecture of a capacitance sampling circuit according to an embodiment of the present disclosure;
FIG. 3B is a signal diagram according to an embodiment of the present application;
fig. 4 is a block diagram of functional units of a signal processing apparatus for demodulating signals in a capacitance sampling circuit according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of still another electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, result, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
1. Electronic equipment
The electronic device in the present application may include a smart Phone (such as an Android Phone, an iOS Phone, a Windows Phone, etc.), a tablet computer, a palm computer, a notebook computer, a Mobile Internet device MID (MID), a wearable device or a scanning device, and the electronic device may further include a terminal device and a server, which are not limited herein. The above mentioned electronic devices are only examples, not exhaustive, and include but not limited to the above mentioned electronic devices.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. The electronic device comprises a processor and a memory, etc.
Wherein the memory is connected with the processor. The Processor is a control center of the electronic device, connects various parts of the whole electronic device by using various interfaces and lines, executes various functions and processes data of the electronic device by running or executing software programs and/or modules stored in the memory and calling the data stored in the memory, thereby performing overall monitoring on the electronic device, and the Processor may be a Central Processing Unit (CPU), a Graphics Processing Unit (GPU) or a Network Processing Unit (NPU).
The memory is used for storing software programs and/or modules, and the processor executes various functional applications of the electronic device by running the software programs and/or modules stored in the memory. The memory may include a program including a flow execution function for executing the present scheme. The memory may further include a storage program area and a storage data area, wherein the storage program area may store an operating system, a software program required for at least one function, and the like; the storage data area may store data created according to use of the electronic device, and the like. Further, the memory may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device.
2. Signal processing method for demodulation signal in capacitance sampling circuit
1. Description of the invention
When the capacitance sampling circuit samples, noise detection can be started firstly, when the noise of the current sampling frequency is too large, the capacitance sampling circuit switches the sampling frequency to the sampling frequency with the lowest noise for sampling, and the data of the current sampling frequency is discarded.
When the sampling frequency of the capacitance sampling circuit changes, the duty ratio of the pulse signal changes due to the change of the frequency, and if the change amplitude of the duty ratio is too large, the demodulation signal finally output by the capacitance sampling circuit also changes greatly, so that the problem that the demodulation signal after the frequency change cannot be estimated is caused.
Referring to fig. 2, fig. 2 is a flowchart illustrating a signal processing method for a demodulation signal in a capacitance sampling circuit according to an embodiment of the present disclosure. The method includes but is not limited to the following steps:
step 201, determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold.
The preset noise threshold may be set comprehensively according to factors such as a use occasion of the capacitance sampling circuit and device parameters of the capacitance sampling circuit, and is not particularly limited. The capacitance sampling circuit is used in the fields of new energy automobiles, radars, wireless navigation, broadcasting equipment, television equipment, numerical control equipment, instrument wires and cables and the like. The device parameters of the capacitance sampling circuit are RC constant in the circuit, the number of sampling channels and the like.
It is understood that the above step 201 can be performed by a noise detection module in the capacitance sampling circuit. The noise detection module can be used for detecting the interference noise of the environment, so that the frequency hopping can be carried out to the frequency point with lower interference noise for sampling during normal work, the signal to noise ratio under interference is improved, and the quality of the collected signals is ensured.
It should be noted that if a plurality of available frequencies all meet the condition that the noise is lower than the preset noise threshold, the frequency closest to the current sampling frequency may be selected for sampling.
The first original signal is a signal at an output terminal of an Analog-to-digital converter (ADC) of the capacitive sampling circuit.
Step 204, respectively determining the edge position of the first original signal and the edge position of the second original signal.
The edge positions are positions of a rising edge and a falling edge of the pulse signal. It is understood that, at different sampling frequencies, the rising edge and the falling edge occur at different times and have different durations, and therefore, the edge positions of the first original signal are different from the edge positions of the second original signal.
Wherein the first level may be 0.
Understandably, from the fourier transform theory it follows that: any continuous signal f (T) with period T can be expressed as the sum of sine and cosine harmonic components with frequency being an integral multiple of the fundamental frequency, and the PWM square wave can be expressed as:
where a is the amplitude of the square wave, k is the duty cycle of the square wave, and f is the frequency of the square wave signal (i.e., the sampling frequency of the capacitance sampling circuit).
For an ideal square wave, after quadrature demodulation and low-pass filtering as shown in fig. 3A, the dc component can be obtained as:
. However, because of the influence of the charging and discharging rate of the circuit, the edge position of the actual signal is not as "straight up and down" as shown in fig. 3B of the ideal signal, especially under the condition that the RC constant of the circuit is relatively large, a rising edge and a falling edge will have an obvious gradual change process, in this case, because the signal is not an ideal square wave, the dc component is not only related to the duty ratio k, but also related to the frequency spectrum in the rising edge and the falling edge of the signal itself, in this case, if the frequency f of the square wave signal is changed, the original data corresponding to the dc component will be changed, and the change rule cannot be estimated.
Therefore, the embodiment of the present application sets the level of the edge position of the first original signal to the first level, and sets the level of the edge position of the second original signal to the first level (the adjusted signal is the "processed signal" in fig. 3B), so that the first original signal is positively correlated with the duty ratio of the first original signal, and the second original signal is positively correlated with the duty ratio of the second original signal. Therefore, the demodulation signal acquired at the output end of the capacitance sampling circuit is in positive correlation with the duty ratio, and even under the condition that the frequency hopping occurs in the capacitance sampling circuit, the signal after the frequency change can still be estimated according to the duty ratio.
And step 208, calculating a second demodulation signal according to the demodulation signal of the first original signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
Specifically, referring to fig. 3A again, a partial circuit architecture of the capacitance sampling circuit is shown in the figure, and in the embodiment of the present application, a first original signal and a second original signal at an output end of the ADC are obtained, a level of an edge position of the first original signal is adjusted, so that the adjusted first original signal is positively correlated with a duty ratio thereof, and a level of an edge position of the second original signal is adjusted, so that the adjusted second original signal is positively correlated with a duty ratio thereof. Therefore, the demodulation signal acquired at the output end of the capacitance sampling circuit is in positive correlation with the duty ratio, and even under the condition that the frequency hopping occurs in the capacitance sampling circuit, the signal after the frequency change can still be estimated according to the duty ratio.
The embodiment of the application has the following beneficial effects:
the method includes the steps that whether noise of a current sampling frequency of a capacitance sampling circuit exceeds a preset noise threshold value or not can be determined, under the condition that the noise of the current sampling frequency exceeds the preset noise threshold value, the current sampling frequency is updated to be a first sampling frequency, the first sampling frequency is the frequency with the lowest noise, a first original signal and a second original signal of the capacitance sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is the pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be a first level, the set first original signal is positively correlated with the duty ratio of the set first original signal, the level of the edge position of the second original signal is set to be a first level, the set second original signal is positively correlated with the duty ratio of the set second original signal, the set first original signal is processed to obtain a first demodulated signal, the first original signal is the set first original signal, the second original signal is demodulated according to the set duty ratio of the first original signal, the second original signal and the set duty ratio of the second original signal, the second original signal is demodulated; thus, the level of the edge positions of the first original signal and the second original signal is changed, so that the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, the duty ratio of the second original signal and the duty ratio of the second original signal are positively correlated, the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
2. Detailed description of the invention
The following specifically describes technical solutions, advantageous effects, and the like according to embodiments of the present application.
1) How to determine the edge position of a first original signal and the edge position of a second original signal
Some embodiments of how to determine the edge positions of the first original signal and the edge positions of the second original signal are explained in detail below.
In some possible embodiments, the step 204 of determining the edge positions of the first original signal and the second original signal respectively may include the following steps:
step 2041, determining edge time and edge width, where the edge time is the time when a rising edge and a falling edge of a pulse signal start to appear, the edge width is the time when the rising edge and the falling edge last, and the pulse signal includes a pulse signal corresponding to a first original signal and a pulse signal corresponding to a second original signal.
Step 2042, determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
Referring again to FIG. 3B, it will be appreciated that the edge position is shown as T edge The corresponding position. In a specific implementation, the edge position may be determined according to the time and duration of the start of the occurrence of the edge position of the pulse signal.
It can be seen that the edge time and the edge width can be determined in the embodiment of the present application, where the edge time is the time when the rising edge and the falling edge of the pulse signal start to appear, the edge width is the time when the rising edge and the falling edge last, the pulse signal includes the pulse signal corresponding to the first original signal and the pulse signal corresponding to the second original signal, and the edge position of the first original signal and the edge position of the second original signal are determined according to the edge time and the edge width; thus, the edge positions can be accurately identified, and accurate calculation of the duty ratios of the set first original signal and the set second original signal is ensured.
2) How to calculate the demodulated signal of the second original signal from the demodulated signal of the first original signal, the duty cycle of the first original signal and the duty cycle of the second original signal
Some embodiments of how to calculate the demodulated signal of the second original signal according to the demodulated signal of the first original signal, the duty ratio of the first original signal, and the duty ratio of the second original signal are described in detail below.
In some possible embodiments, the step 208 of calculating the second demodulated signal according to the demodulated signal of the first original signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal may include the following steps:
step 2081, determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal.
Step 2082, determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal.
Step 2083, calculating a second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relationship.
Referring to fig. 3B again, if the sampling period at the current sampling frequency is T sig Setting the edge position of the first original signal to be T edge The duty ratio of the first original signal after setting is
. Similarly, the duty ratio of the second original signal after setting can be obtained.
Further, in some possible embodiments, the preset corresponding relationship is:
。
wherein, rawdata1 is the first demodulation signal, rawdata2 is the second demodulation signal, k 1 For the set duty cycle, k, of the first original signal 2 Is the duty cycle of the set second original signal.
It can be understood that, after the level of the edge position is set to the first level, the first original signal is in positive correlation with the duty ratio thereof, the second original signal is in positive correlation with the duty ratio thereof, and the orthogonal demodulation and the low-pass filtering of the signals do not affect the duty ratio of the signals, so that the demodulated signal of the first original signal is still in positive correlation with the duty ratio of the first original signal, and the demodulated signal of the second original signal is still in positive correlation with the duty ratio of the second original signal. Therefore, the above correspondence relationship can be obtained for the dc component of the demodulated signal of the first original signal and the dc component of the demodulated signal of the second original signal.
It can be seen that in the embodiment of the present application, the duty ratio of the set first original signal can be determined according to the sampling period of the capacitive sampling circuit at the current sampling frequency and the edge position of the set first original signal, the duty ratio of the set second original signal can be determined according to the sampling period of the capacitive sampling circuit at the first sampling frequency and the edge position of the set second original signal, and the duty ratio of the set second original signal can be calculated according to the first demodulated signal, the duty ratio of the set first original signal, the duty ratio of the set second original signal and the preset corresponding relationship.
3) How to determine whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold
Some embodiments of how to determine whether the noise of the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold are described in detail below.
In some possible embodiments, the step 201 of determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold may include the following steps:
step 2011, detecting noise of a current sampling frequency of the capacitance sampling circuit;
step 2012, converting the detection result of the noise into a noise current signal or a noise voltage signal;
step 2013, determining that the noise of the current sampling frequency exceeds a preset noise threshold value under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
step 2014, determining that the noise of the current sampling frequency does not exceed the preset noise threshold value when the noise current signal is less than or equal to the preset noise current threshold value or the noise voltage signal is less than or equal to the preset noise voltage threshold value.
It can be seen that, in the embodiment of the present application, the noise at the current sampling frequency is detected through the noise current signal or the noise voltage signal, and whether the noise exceeds the preset noise threshold is determined, so that the noise at the current sampling frequency is favorably and accurately determined.
4) How to process the first original signal and the second original signal
Some embodiments of how the first raw signal and the second raw signal are processed are explained in detail below.
In some possible embodiments, the step 207 of processing the set first original signal to obtain the first demodulated signal may include the following steps:
step 2071, perform quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulated signal.
Therefore, the channel capacity of the capacitance sampling circuit is improved, and accurate transmission of signals is ensured.
3. Signal processing device for demodulation signal in capacitance sampling circuit
1) Description of the preferred embodiment
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It is understood that, in order to implement the above functions, the electronic device may include a corresponding hardware structure and/or software modules for performing the respective functions. Those of skill in the art would appreciate that the various illustrative methods, functions, modules, elements, or steps described in connection with the embodiments provided herein may be implemented as hardware or in combination with computer software. Whether a method, function, module, element, or step is performed in hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the technical solution. A person skilled in the art may use different methods to implement the described methods, functions, modules, units or steps for each specific application, but such implementation should not be considered as beyond the scope of the present application.
The embodiment of the present application may perform the division of the functional units/modules according to the above method examples. For example, each functional unit/module may be divided for each function, or two or more functions may be integrated into one functional unit/module. The integrated functional units/modules may be implemented in a hardware manner or a software program manner. It should be noted that, in the embodiment of the present application, the division of the functional units/modules is schematic, and only one logical function division is used, and there may be another division manner in actual implementation.
In the case of using an integrated unit, please refer to fig. 4, where fig. 4 is a block diagram of functional units of a signal processing apparatus for demodulation signals in a capacitance sampling circuit according to an embodiment of the present application. The signal processing apparatus 400 for a demodulated signal in a capacitive sampling circuit includes: noise determination section 401, frequency update section 402, acquisition section 403, determination section 404, level adjustment section 405, demodulation section 406, and calculation section 407.
In some possible implementations, the noise determination unit 401, the frequency updating unit 402, the obtaining unit 403, the determination unit 404, the level adjustment unit 405, the demodulation unit 406, and the calculation unit 407 may be separate units from each other, or may be integrated in the same unit.
For example, the noise determination unit 401, the frequency updating unit 402, the acquisition unit 403, the determination unit 404, the level adjustment unit 405, the demodulation unit 406, and the calculation unit 407 may be integrated in a processing unit.
It should be noted that the processing unit may be a processor or a controller, and for example, may be a Central Processing Unit (CPU), a general purpose processor, a Digital Signal Processor (DSP), an application-specific integrated circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. A processing unit may also be a combination that performs computing functions, e.g., a combination of one or more microprocessors, a DSP and a microprocessor, etc.
In some possible implementations, the signal processing apparatus 400 for the demodulated signal in the capacitance sampling circuit may further include a storage unit for storing a computer program or instructions executed by the signal processing apparatus 400 for the demodulated signal in the capacitance sampling circuit. The storage unit may be a memory.
In some possible designs, the signal processing apparatus 400 for demodulating the signal in the capacitive sampling circuit may be a chip/chip module/processor/device/operating system.
In a specific implementation, the noise determination unit 401, the frequency updating unit 402, the obtaining unit 403, the determination unit 404, the level adjustment unit 405, the demodulation unit 406, and the calculation unit 407 are configured to perform the steps described in the above method embodiments. The details will be described below.
A noise determination unit 401, configured to determine whether noise of a current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
a frequency updating unit 402, configured to update the current sampling frequency to a first sampling frequency when noise of the current sampling frequency exceeds a preset noise threshold, where the first sampling frequency is a frequency at which the noise is lower than the preset noise threshold;
an obtaining unit 403, configured to obtain a first original signal and a second original signal of the capacitance sampling circuit, where the first original signal is a pulse signal at a current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
a determining unit 404, configured to determine an edge position of the first original signal and an edge position of the second original signal respectively;
a level adjustment unit 405 configured to set a level of an edge position of the first original signal to a first level so that a duty ratio of the set first original signal is positively correlated with a duty ratio of the set first original signal;
the level adjusting unit 405 is further configured to set a level of an edge position of the second original signal to a first level, so that a duty ratio of the set second original signal is positively correlated with a duty ratio of the set second original signal;
a demodulating unit 406, configured to process the set first original signal to obtain a first demodulated signal, where the first demodulated signal is a demodulated signal of the set first original signal;
a calculating unit 407, configured to calculate a second demodulated signal according to the first demodulated signal, the duty ratio of the set first original signal, and the duty ratio of the set second original signal, where the second demodulated signal is a demodulated signal of the set second original signal.
It can be seen that in the embodiment of the present application, whether noise of a current sampling frequency of a capacitive sampling circuit exceeds a preset noise threshold value or not may be determined, when the noise of the current sampling frequency exceeds the preset noise threshold value, the current sampling frequency is updated to a first sampling frequency, the first sampling frequency is a frequency with the lowest noise, a first original signal and a second original signal of the capacitive sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is a pulse signal under the first sampling frequency, an edge position of the first original signal and an edge position of the second original signal are respectively determined, a level of the edge position of the first original signal is set to the first level, so that the set first original signal is positively correlated with a duty ratio of the set first original signal, a level of the edge position of the second original signal is set to the first level, so that the set second original signal is positively correlated with a duty ratio of the set second original signal, the set first original signal is processed to obtain the first original signal, the first original signal is a set first original signal, the first original signal is a demodulated, the second original signal is demodulated according to the set duty ratio of the second original signal, and the second original signal is demodulated; in this way, by changing the levels of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the first original signal is positively correlated, and the duty ratio of the second original signal and the second original signal is positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
It should be noted that, for specific implementation of each operation performed by the signal processing apparatus 400 for demodulating a signal in the capacitance sampling circuit, reference may be made to the corresponding description of the above method embodiment, and details are not described herein again.
2) Other possible implementations
Some of the related implementations are described below, and other irrelevant contents may be specifically described in the above description, which is not described again.
In some possible embodiments, in determining the edge position of the first original signal and the edge position of the second original signal respectively, the determining unit 404 is configured to:
determining edge time and edge width, wherein the edge time is the time when a rising edge and a falling edge of a pulse signal begin to appear, the edge width is the time when the rising edge and the falling edge last, and the pulse signal comprises a pulse signal corresponding to a first original signal and a pulse signal corresponding to a second original signal;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
In some possible embodiments, in calculating the second demodulated signal according to the demodulated signal of the first original signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal, the calculating unit 407 is configured to:
determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal;
and calculating a second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relation.
In some possible embodiments, in determining whether noise at a current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold, the noise determination unit 401 is configured to:
detecting noise of a current sampling frequency of the capacitance sampling circuit;
converting the detection result of the noise into a noise current signal or a noise voltage signal;
determining that the noise of the current sampling frequency exceeds a preset noise threshold value under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
and under the condition that the noise current signal is less than or equal to a preset noise current threshold value or the noise voltage signal is less than or equal to a preset noise voltage threshold value, determining that the noise of the current sampling frequency does not exceed the preset noise threshold value.
In some possible embodiments, in processing the set first original signal to obtain a first demodulated signal, the demodulating unit 406 is configured to:
and performing quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulation signal.
4. Electronic device
1) Description of the preferred embodiment
A schematic structural diagram of an electronic device according to an embodiment of the present application is described below, as shown in fig. 5. The electronic device 500 includes a processor 510, a memory 520, and at least one communication bus for connecting the processor 510 and the memory 520.
In some possible implementations, the processor 510 may be one or more central processing units CPU. In the case where the processor 510 is a CPU, the CPU may be a single core CPU or a multi-core CPU. The memory 520 includes, but is not limited to, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or a portable read-only memory (CD-ROM), and the memory 520 is used to store computer programs or instructions.
In some possible implementations, the electronic device 500 also includes a communication interface to receive and transmit data.
In some possible implementations, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the steps of:
determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value;
under the condition that the noise of the current sampling frequency exceeds a preset noise threshold, updating the current sampling frequency to a first sampling frequency, wherein the first sampling frequency is a frequency with the noise lower than the preset noise threshold;
acquiring a first original signal and a second original signal of a capacitance sampling circuit, wherein the first original signal is a pulse signal under the current sampling frequency, and the second original signal is a pulse signal under the first sampling frequency;
respectively determining the edge position of a first original signal and the edge position of a second original signal;
setting the level of the edge position of the first original signal as a first level, so that the duty ratio of the set first original signal is positively correlated with the duty ratio of the set first original signal;
setting the level of the edge position of the second original signal as a first level, so that the duty ratio of the set second original signal is positively correlated with the duty ratio of the set second original signal;
processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
It can be seen that, in the electronic device provided in the embodiment of the present application, it may be determined whether noise of a current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold, when the noise of the current sampling frequency exceeds the preset noise threshold, the current sampling frequency is updated to a first sampling frequency, the first sampling frequency is a frequency with the lowest noise, a first original signal and a second original signal of the capacitive sampling circuit are obtained, the first original signal is a pulse signal at the current sampling frequency, the second original signal is a pulse signal at the first sampling frequency, an edge position of the first original signal and an edge position of the second original signal are respectively determined, a level of the edge position of the first original signal is set to the first level, the set first original signal is positively correlated with a duty ratio of the set first original signal, a level of the second original signal is set to the first level, the set second original signal is positively correlated with the set duty ratio of the second original signal, the set first original signal is processed to obtain the first original signal, the first original signal is demodulated to a second original signal, the set second original signal is demodulated according to the set duty ratio of the first original signal, the demodulated by the set original signal, the second original signal is demodulated; thus, the level of the edge positions of the first original signal and the second original signal is changed, so that the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, the duty ratio of the second original signal and the duty ratio of the second original signal are positively correlated, the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
It should be noted that, for specific implementation of each operation performed by the electronic device 500, reference may be made to the corresponding description of the method embodiment shown above, and details are not described herein again.
2) Other possible implementations
In some possible embodiments, in determining the edge positions of the first original signal and the second original signal, respectively, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the following steps:
determining edge time and edge width, wherein the edge time is the time when a rising edge and a falling edge of a pulse signal begin to appear, the edge width is the time when the rising edge and the falling edge last, and the pulse signal comprises a pulse signal corresponding to a first original signal and a pulse signal corresponding to a second original signal;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
In some possible embodiments, in calculating the second demodulated signal from the first demodulated signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the following steps:
determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal;
and calculating the demodulation signal of the second original signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relation.
In some possible embodiments, in determining whether the noise at the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the steps of:
detecting noise of a current sampling frequency of the capacitance sampling circuit;
converting the detection result of the noise into a noise current signal or a noise voltage signal;
determining that the noise of the current sampling frequency exceeds a preset noise threshold value under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
and under the condition that the noise current signal is less than or equal to a preset noise current threshold value or the noise voltage signal is less than or equal to a preset noise voltage threshold value, determining that the noise of the current sampling frequency does not exceed the preset noise threshold value.
In some possible embodiments, in processing the set first original signal to obtain the first demodulated signal, the processor 510 in the electronic device 500 is configured to execute the computer program or the instructions 521 stored in the memory 520 to implement the following steps:
and performing quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulation signal.
5. Other exemplary description
Embodiments of the present application also provide a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any one of the methods as described in the above method embodiments.
Embodiments of the present application also provide a computer program product, which includes a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. A computer program product should be understood as a software product, the solution of which is mainly implemented by means of a computer program.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art will recognize that the embodiments described in this specification are preferred embodiments and that acts or modules referred to are not necessarily required for this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit may be implemented in the form of hardware, or may also be implemented in the form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps of the methods of the above embodiments may be implemented by a program, which is stored in a computer-readable memory, the memory including: flash Memory disks, read-Only memories (ROMs), random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (9)
1. A method for processing a demodulated signal in a capacitive sampling circuit, the method comprising:
determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value;
under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, updating the current sampling frequency to a first sampling frequency, wherein the first sampling frequency is a frequency with the noise lower than the preset noise threshold;
acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal under the current sampling frequency, and the second original signal is a pulse signal under the first sampling frequency;
respectively determining the edge position of the first original signal and the edge position of the second original signal, wherein the edge positions refer to positions where level slowly changes;
adjusting the level of the edge position of the first original signal to a first level, so that the duty ratio of the set first original signal and the set first original signal is in a direct proportion relation, wherein the set first original signal is a signal of the first original signal after level adjustment;
adjusting the level of the edge position of the second original signal to the first level, so that the duty ratio of the set second original signal and the set second original signal is in a direct proportional relationship, wherein the set second original signal is a signal of the second original signal after level adjustment;
processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal;
calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal, the duty ratio of the set second original signal and a preset corresponding relation, wherein the second demodulation signal is a demodulation signal of the set second original signal;
the preset corresponding relation is as follows:
wherein rawdata1 is the first demodulated signal, rawdata2 is the second demodulated signal, k 1 Is the duty ratio, k, of the set first original signal 2 And the set duty ratio of the second original signal is obtained.
2. The method of claim 1, wherein the determining the edge positions of the first original signal and the second original signal respectively comprises:
determining edge time and edge width, wherein the edge time is the time when a rising edge and a falling edge of a pulse signal start to appear, the edge width is the time when the rising edge and the falling edge last, and the pulse signal comprises a pulse signal corresponding to the first original signal and a pulse signal corresponding to the second original signal;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
3. The method of claim 1 or 2, wherein the determining whether the noise at the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold comprises:
detecting noise at the current sampling frequency of the capacitive sampling circuit;
converting the detection result of the noise of the current sampling frequency into a noise current signal or a noise voltage signal;
determining that the noise of the current sampling frequency exceeds a preset noise threshold value when the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
and under the condition that the noise current signal is less than or equal to the preset noise current threshold value or the noise voltage signal is less than or equal to the preset noise voltage threshold value, determining that the noise of the current sampling frequency does not exceed the preset noise threshold value.
4. The method of claim 1, wherein the processing the set first original signal to obtain a first demodulated signal comprises:
and performing quadrature demodulation and low-pass filtering on the set first original signal to obtain the first demodulated signal.
5. The method of claim 1, wherein the first sampling frequency is a frequency at which noise is below the preset noise threshold, and comprises:
the first sampling frequency is a sampling frequency which is closest to the current sampling frequency in a plurality of sampling frequencies with noise lower than the preset noise threshold.
6. The method of claim 1, wherein the first level is a low level.
7. A signal processing apparatus for a demodulated signal in a capacitive sampling circuit, the apparatus comprising:
the noise determining unit is used for determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value or not;
the frequency updating unit is used for updating the current sampling frequency to a first sampling frequency under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, wherein the first sampling frequency is a frequency with the noise lower than the preset noise threshold;
the acquisition unit is used for acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal under the current sampling frequency, and the second original signal is a pulse signal under the first sampling frequency;
a determining unit, configured to determine an edge position of the first original signal and an edge position of the second original signal, respectively, where the edge positions are positions where level ramping occurs;
the level adjusting unit is used for adjusting the level of the edge position of the first original signal to a first level, so that the duty ratio of the set first original signal and the set first original signal is in a direct proportion relation, and the set first original signal is a signal of the first original signal after level adjustment;
the level adjusting unit is further configured to adjust a level of an edge position of the second original signal to the first level, so that a duty ratio of the set second original signal and the set second original signal is in a direct proportional relationship, and the set second original signal is a signal of the second original signal after level adjustment;
a demodulation unit, configured to process the set first original signal to obtain a first demodulated signal, where the first demodulated signal is a demodulated signal of the set first original signal;
the calculation unit is used for determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal; the duty ratio of the set second original signal is determined according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal; the second demodulation module is used for calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal, the duty ratio of the set second original signal and a preset corresponding relation, wherein the second demodulation signal is a demodulation signal of the set second original signal;
the preset corresponding relation is as follows:
wherein, rawdata1 is the first demodulation signal, rawdata2 is the second demodulation signal, k 1 Is the duty ratio, k, of the set first original signal 2 And the set duty ratio of the second original signal is obtained.
8. An electronic device comprising a processor, a memory, and a computer program or instructions stored on the memory, wherein the processor executes the computer program or instructions to implement the steps of the method of any of claims 1-6.
9. A computer-readable storage medium, having stored thereon a computer program or instructions, which, when executed by a processor, carry out the steps of the method of any of claims 1-6.
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| EP0475188B1 (en) * | 1990-09-11 | 1995-11-08 | Stefan Brinkhaus | Method and apparatus for noise reduction in FM or PM receivers |
| US5227741A (en) * | 1992-01-22 | 1993-07-13 | Glenayre Electronics Ltd. | Variable speed asynchronous modem |
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