CN115764816A

CN115764816A - Electrostatic protection circuit, method, system, device and storage medium

Info

Publication number: CN115764816A
Application number: CN202211536706.0A
Authority: CN
Inventors: 谷欣明; 江哲维; 南帐镇; 姜心愿; 李春燕; 张炳城
Original assignee: Hefei Yisiwei Computing Technology Co ltd; Beijing Eswin Computing Technology Co Ltd
Current assignee: Hefei Yisiwei Computing Technology Co ltd; Beijing Eswin Computing Technology Co Ltd
Priority date: 2022-12-01
Filing date: 2022-12-01
Publication date: 2023-03-07

Abstract

The embodiment of the application discloses an electrostatic protection circuit, a method, a system, equipment and a storage medium, wherein the circuit comprises: the first end of the input module is connected with an input signal of a chip to be protected, and the second end of the input module is respectively connected with the first end of the current release module and the first end of the switch control module; the second end of the switch control module is connected with the first end of the switch module, the third end of the switch control module is connected with the second end of the switch module, and the fourth end of the switch control module is respectively connected with the third end of the switch module and the second end of the current release module; the switch control module is used for reducing the voltage of the electrostatic discharge signal under the condition that the input signal is the electrostatic discharge signal and providing the reduced voltage to the switch module; a switch module for entering a conducting state based on the reduced voltage; and the current release module is used for entering a conducting state and releasing the current of the electrostatic discharge signal under the condition that the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold value.

Description

Electrostatic protection circuit, method, system, device and storage medium

Technical Field

The present application relates to, but not limited to, the field of display technologies, and in particular, to a circuit, a method, a system, a device, and a storage medium for electrostatic protection.

Background

Electrostatic Discharge (ESD) has been a problem to be solved in electronic devices, circuits and systems. Various fields of consumption, industry, aerospace, military and medical treatment are affected by this problem. ESD protection is increasingly important in display chips, power management chips, driver chips and automotive chips, but in the related art, when an ESD event occurs, ESD Voltage and current enter the chip, so that a snapback (snapback) breakdown of a High Voltage n-channel Metal-Oxide-Semiconductor Field-Effect Transistor (HVNMOS) occurs under the ESD High Voltage condition.

Disclosure of Invention

Embodiments of the present disclosure provide at least one esd protection circuit, method, system, device and storage medium.

The technical scheme of the embodiment of the application is realized as follows:

in one aspect, an embodiment of the present application provides an electrostatic discharge protection circuit, including:

the device comprises an input module, a current release module, a switch module and a switch control module;

the first end of the input module is connected with an input signal of a chip to be protected, and the second end of the input module is respectively connected with the first end of the current release module and the first end of the switch control module; the second end of the switch control module is connected with the first end of the switch module, the third end of the switch control module is connected with the second end of the switch module, and the fourth end of the switch control module is respectively connected with the third end of the switch module and the second end of the current release module;

the switch control module is used for reducing the voltage of the electrostatic discharge signal and providing the reduced voltage to the switch module under the condition that the input signal is the electrostatic discharge signal;

the switch module is used for conducting a conducting state based on the reduced voltage;

the current releasing module is used for entering a conducting state and releasing the current of the electrostatic discharge signal under the condition that the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold value.

In another aspect, an embodiment of the present application provides an electrostatic discharge protection method applied to the above electrostatic discharge protection circuit, where the method includes:

receiving an input signal of a chip to be protected by adopting an input module in the electrostatic protection circuit;

under the condition that the input signal is the electrostatic discharge signal, reducing the voltage of the electrostatic discharge signal by using a switch control module in the electrostatic protection circuit to obtain a reduced voltage;

turning on a switch module in the electrostatic protection circuit based on the reduced voltage;

and under the condition that the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold, switching on a current discharge module in the electrostatic protection circuit, and discharging the current of the electrostatic discharge signal by adopting the current discharge module.

In another aspect, an embodiment of the present application provides an electrostatic protection apparatus, which includes a memory and a processor, where the memory stores a computer program that is executable on the processor, and the processor executes the computer program to implement some or all of the steps in the above method.

In yet another aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements some or all of the steps of the above method.

In yet another aspect, the present application provides a computer program, which includes computer readable code, when the computer readable code runs in a computer device, a processor in the computer device executes some or all of the steps for implementing the method.

In yet another aspect, the present application provides a computer program product, which includes a non-transitory computer readable storage medium storing a computer program, and when the computer program is read and executed by a computer, the computer program implements some or all of the steps of the above method.

The embodiment of the application provides an electrostatic protection circuit, this circuit includes: the device comprises an input module, a current release module, a switch module and a switch control module; the first end of the input module is connected with an input signal of the chip to be protected, and the second end of the input module is respectively connected with the first end of the current release module, the first end of the switch control module and the first end of the switch module; like this, the input module can be with input signal transmission to current release module, switch control module and switch module, and then can be through the break-make condition of this input signal's voltage and current control current release module, switch control module and switch module. The second end of the switch control module is connected with the second end of the switch module; the third end of the switch control module is respectively connected with the third end of the switch module and the second end of the current release module; therefore, the switch control module is connected with the switch module, so that the switch control module can control the on-off state of the switch module. The switch control module enters a conducting state under the condition that the input signal is the electrostatic discharge signal, and provides grounding voltage for the switch module; the switch module enters a closed state based on the ground voltage. Like this, when taking place the electrostatic discharge incident, the switch control module can in time switch on to access ground voltage, thereby draw down switch module's voltage to ground voltage, make switch module get into the off-state, and then can make switch module can not punctured by the electrostatic discharge signal. Under the condition that the voltage of the electrostatic discharge signal is greater than a preset voltage threshold, the current discharge module enters a conducting state and discharges the current of the electrostatic discharge signal; therefore, under the condition that the voltage of the electrostatic discharge signal is large, the current release module is conducted, so that the current of the electrostatic discharge signal flows through the current release module, the current of the electrostatic discharge signal can be released, the protection switch module is prevented from being broken down, and the electrostatic protection of the chip to be protected is realized.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the technical aspects of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the application.

Fig. 1 is a schematic structural diagram of an electrostatic discharge protection circuit according to an embodiment of the present disclosure;

fig. 2A is a schematic diagram of another structure of an esd protection circuit according to an embodiment of the present disclosure;

fig. 2B is a schematic diagram of another structure of an esd protection circuit according to an embodiment of the present disclosure;

FIG. 2C is a schematic diagram of another exemplary structure of an ESD protection circuit according to an embodiment of the present disclosure;

fig. 3 is a schematic flow chart illustrating an implementation of an electrostatic discharge protection method according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of an ESD protection circuit provided in the related art;

fig. 5 is a schematic diagram of another structure of an esd protection circuit according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of another structure of an esd protection circuit according to an embodiment of the present disclosure;

fig. 7 is a hardware entity diagram of a computer device according to an embodiment of the present disclosure.

Detailed Description

In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions of the present application are further elaborated with reference to the following drawings and embodiments, the described embodiments should not be construed as limiting the present application, and all other embodiments obtained by a person of ordinary skill in the art without making creative efforts fall within the protection scope of the present application.

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.

Reference to the terms "first/second/third" merely distinguishes similar objects and does not denote a particular ordering for the objects, and it is to be understood that "first/second/third" may, where permissible, be interchanged in a particular order or sequence so that embodiments of the present application described herein can be practiced otherwise than as specifically illustrated or described herein.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.

Before further detailed description of the embodiments of the present application, terms and expressions referred to in the embodiments of the present application will be described, and the terms and expressions referred to in the embodiments of the present application will be used for the following explanation.

1) Electrostatic discharge (ESD): when one charged conductor is close to another, electrostatic discharge may occur. A strong electric field is established between the two conductors to cause breakdown due to the electric field. Arcing occurs when the voltage between two conductors exceeds the breakdown voltage of the air and insulating medium between them. The arc current can reach several tens of amperes, sometimes in excess of 100 amperes (a), for a duration of 0.7 nanoseconds (ns) to 10 ns.

2) The Integrated Circuit (IC) industry continues to push the development of the smart phone industry, and Touch and Display Driver Integration (TDDI) brings a unified system architecture, which may cause some Display noise because the Display and Touch chips are separated from each other, and TDDI achieves unified control, thereby achieving better effect in noise management. TDDI adopts the mode of "timesharing scanning", divides 1 frame display time into two parts, and one part is used for touch-control scanning, and another part is used for the display scanning, mutual noninterference reduces the hidden danger of signal interference fundamentally.

According to the electrostatic protection circuit provided by the embodiment of the application, the input module, the current release module, the switch module and the switch control module are introduced into the electrostatic protection circuit, so that the switch control module can be switched on under the condition that the input signal is the electrostatic release signal, the switch module is switched off, and the switch module is protected from being broken down by the electrostatic release signal; and when the voltage of the electrostatic discharge signal is higher, the current release module is conducted, so that the current of the input signal is released through the current release module, and the chip to be protected is protected. The electrostatic protection circuit provided by the embodiment of the application may be implemented in a chip of an electronic device, where the electronic device may be various types of terminals such as a notebook computer, a tablet computer, a desktop computer, a set-top box, a mobile device (e.g., a mobile phone, a portable music player, a personal digital assistant, a dedicated messaging device, and a portable game device), and may also be implemented as a server. The server may be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, or a cloud server providing basic cloud computing services such as cloud service, a cloud database, cloud computing, a cloud function, cloud storage, network service, cloud communication, middleware service, domain name service, security service, content Delivery Network (CDN), big data, an artificial intelligence platform, and the like.

Fig. 1 is a schematic structural diagram of an electrostatic protection circuit according to an embodiment of the present application, and the following description is made with reference to fig. 1: the electrostatic protection circuit includes: an input module 101, a current release module 102, a switch module 103 and a switch control module 104;

the first end of the input module 101 is connected to an input signal of a chip to be protected, and the second end of the input module 101 is connected to the first end of the current release module 102 and the first end of the switch control module 104, respectively.

Here, the second terminal of the input module is connected to the first terminal of the switch control module 104, so that the input signal can be output to the switch control module through the first terminal of the switch control module 104, so that the switch control module controls the switch module to be turned off or turned on through the voltage and current of the input signal. The second terminal of the input module is connected to the first terminal of the current releasing module 102, so that when the voltage and current of the input signal are too large, the current releasing module 102 can be turned on to release a large current of the input signal through the current releasing module 102.

The input module 101 may be a constant input voltage interface, and may also be a constant input output voltage interface, that is, the input module 101 may have an input function, and may also have an input output function. The chip to be protected can be any type of chip in the electronic device, such as a display chip, a power management chip, a driving chip, an automobile chip and the like. The electrostatic protection circuit is internally arranged in the chip to be protected, for example, the first end of the input module is connected with an internal signal line of the chip to be protected so as to receive an input signal output by the chip to be protected. The electrostatic protection circuit can also be arranged outside the chip to be protected and connected with the chip to be protected through the pin of the chip to be protected so as to access the input signal of the chip to be protected.

A second end of the switch control module 104 is connected to the first end of the switch module 103, a third end of the switch control module 104 is connected to the second end of the switch module 103, and a fourth end of the switch control module 104 is connected to the third end of the switch module 103 and the second end of the current release module 102, respectively.

Here, the second terminal of the switch control module 104 is connected to the first terminal of the switch module 103, the third terminal of the switch control module 104 is connected to the second terminal of the switch module 103, and the fourth terminal of the switch control module 104 is connected to the third terminal of the switch module 103, so that the switch control module can control the switch module to be turned on or off based on the input signal.

A switch control module 104, configured to reduce a voltage of the electrostatic discharge signal and provide the reduced voltage to the switch module when the input signal is the electrostatic discharge signal.

Here, the switch control module 104 is formed by a resistor and a capacitor, and the voltage of the input signal transmitted by the input module is reduced by the resistor in the switch control module, so that the voltage transmitted by the switch control module to the switch module is not too high, thereby protecting the switch module from being damaged. In some possible implementations, if an electrostatic discharge event occurs in the chip to be protected, the input signal is an electrostatic discharge signal, that is, the input signal is generated by the electrostatic discharge event. For example, the human body touches the chip with electricity to release a signal generated by energy current. The switch control module 104 may be composed of a voltage dividing resistor and a capacitor, and when the electrostatic discharge signal input by the input module is received, the electrostatic discharge signal is a high-frequency signal, so that the capacitor in the switch control module is turned on, and the voltage at the second end of the switch module 103 is a high level, so that the switch module 104 enters a conducting state. Meanwhile, since the switch control module 104 can reduce the voltage of the electrostatic discharge signal in the on state, the voltage provided to the second end of the switch module is not too high, so that, when the input signal is the electrostatic discharge signal, the switch control module 104 reduces the voltage of the electrostatic discharge signal and then provides the reduced voltage to the switch module, and the switch module can be turned on and protected.

The switch module 103 is configured to enter a conducting state based on the reduced voltage.

Here, the switching module 104 may be formed by HVNMOS. The switch module enters a conducting state in response to a voltage supplied from the switch control module, but the voltage is a voltage after the voltage of the electrostatic discharge signal is lowered by the switch control module, so that the HVNMOS can be both made conducting and protected. Thus, the HVNMOS is turned into a conducting state by the reduced voltage, and is not damaged by the large voltage of the electrostatic discharge signal. In some possible implementations, the switch module may further include a fourth terminal, and the fourth terminal of the switch module is respectively connected to the third terminal of the switch module and the ground voltage terminal. For example, the switch module is an HVNMOS, and the fourth terminal of the switch module may be a Body (Body) terminal of the switch module, and the self-bias terminal is formed by connecting the fourth terminal of the switch module and the third terminal of the switch module.

The current releasing module 102 is configured to enter a conducting state and release a current of the electrostatic discharge signal when the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold.

Here, in the circuit design process, in order to protect the switch module when the current releasing module is turned on, the turn-on voltage of the current releasing module is set to be smaller than the sum of the breakdown voltage of the switch module and the voltage of the switch control module, so that each component in the current releasing module can be selected according to the sum of the breakdown voltage of the switch module and the voltage of the switch control module, and the sum of the turn-on voltages of the components in the current releasing module is smaller than the sum of the breakdown voltage of the switch module and the voltage of the switch control module. Namely, the preset voltage threshold is greater than or equal to the sum of the conduction voltages of all components in the current release module and is less than the sum of the breakdown voltage of the switch module and the voltage of the switch control module.

In some possible implementations, the current releasing module includes: and setting a preset voltage threshold according to the sum of the conduction voltages of the diode and the electrostatic protection device. For example, if the turn-on voltage of the diode is 0.5 volts (V) and the turn-on voltage of the esd protection device is 30V, the preset voltage threshold may be set to 30.5V. When the voltage of the esd signal is greater than or equal to 30.5V, the diode and the esd protection device are turned on, i.e. the current releasing module enters a conducting state, so that the current of the esd signal flows through the current releasing module 102 to release the current of the esd signal. Under the condition that the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold, the switch module, the switch control module and the current discharge module are all in a conducting state; therefore, after the current release module enters the conducting state, partial current in the electrostatic discharge signal can be released, so that the current flowing through the switch module and the switch control module is reduced, and the effect of protecting the switch module is further achieved.

In an embodiment of the present application, an electrostatic discharge protection circuit includes: the device comprises an input module, a current release module, a switch module and a switch control module; the first end of the input module is connected with an input signal of a chip to be protected, and the second end of the input module is respectively connected with the first end of the current release module and the first end of the switch control module; therefore, the input module can transmit the input signal to the current release module, the switch control module and the switch module, and then the on-off condition of the current release module, the switch control module and the switch module can be controlled through the voltage and the current of the input signal. The second end of the switch control module is connected with the second end of the switch module; the third end of the switch control module is respectively connected with the third end of the switch module and the second end of the current release module; therefore, the switch control module is connected with the switch module, so that the switch control module can control the on-off state of the switch module. Under the condition that the input signal is the electrostatic discharge signal, the switch control module enters a conducting state, reduces the voltage of the electrostatic discharge signal and provides the reduced voltage for the switch module; the switch module enters a conducting state based on the reduced voltage. Therefore, when an electrostatic discharge event occurs, the switch control module can be switched on in time to reduce the voltage of the electrostatic discharge signal, so that the reduced voltage is provided to the switch module, and the voltage at the second end of the switch module is at a high level, so that the switch module enters a conducting state; and the voltage value of the reduced voltage is smaller than that of the electrostatic discharge signal, so that the switch module is not damaged due to overhigh voltage, and the switch module can be protected. Under the condition that the voltage of the electrostatic discharge signal is greater than a preset voltage threshold, the current discharge module enters a conducting state and discharges the current of the electrostatic discharge signal; therefore, under the condition that the voltage of the electrostatic discharge signal is large, the current release module is conducted, so that the current of the electrostatic discharge signal flows through the current release module, the current of the electrostatic discharge signal can be released, the protection switch module is prevented from being broken down, and the electrostatic protection of the chip to be protected is realized.

In some embodiments, the fourth terminal of the switch control module 104 is connected to the fourth terminal of the switch module 103; and the on-off state of the switch module is controlled through the third end of the switch control module.

Here, the switching module may include at least one switching device, and an on/off state of the switching device may be controlled by the third terminal of the switching control module and the second terminal of the switching module. So, the third end of switch control module is connected with the second end of switch module to can provide voltage to switch module more accurately, with the switching on or the disconnection of control switch module.

In some embodiments, the switch control module is composed of a first voltage drop submodule and a second voltage drop submodule for dropping the voltage of the electrostatic discharge signal, and a high-frequency submodule which is conducted under the high-frequency signal, so that the conduction and the closing of the switch module can be controlled more safely. As shown in fig. 2A, the switch control module 104 includes: a first voltage drop submodule 201, a high frequency submodule 202 and a second voltage drop submodule 203;

a first end of the first droop sub-module 201 is connected to a second end of the input module 101, and a second end of the first droop sub-module 201 is respectively connected to a first end of the high-frequency sub-module 202 and a first end of the switch module 103; the second end of the high-frequency submodule 202 is connected to the second end of the switch module 103 and the first end of the second voltage drop submodule 203 respectively; the second end of the second voltage drop submodule 203 is connected to the third end of the switch module 103, the second end of the current release module 102 and the ground voltage end respectively;

here, the first voltage drop submodule may be implemented by a resistor, for example, a polysilicon resistor, and the resistance value may be set to 1 kilo-ohm. The first voltage drop submodule is connected between the input module and the high-frequency submodule, and one end of the first voltage drop submodule is connected with the second end of the input module, so that the input module can input an input signal to the first voltage drop submodule. The other end of the first voltage drop submodule is connected with the high-frequency submodule, so that the first voltage drop submodule transmits the electrostatic discharge signal to the high-frequency submodule under the condition that the input signal is the electrostatic discharge signal, and the high-frequency submodule enters a conducting state because the electrostatic discharge signal is the high-frequency signal. The electrostatic discharge signal passes through the first voltage drop submodule, so that voltage drops are formed at two ends of the first voltage drop submodule, the voltage transmitted to the first end of the switch module by the second end of the first voltage drop submodule is smaller than the voltage of the electrostatic discharge signal, and the first end of the switch module can be protected from being damaged by high voltage.

In some possible implementations, the switch module and the switch control module are both turned on when the electrostatic discharge signal is generated. If the voltage of the electrostatic discharge signal is larger than the preset voltage threshold value, the switch module, the switch control module and the current release module are all conducted, in order to enable the switch control module and the current release module to protect the switch module from being damaged by large current, components in the first voltage drop submodule and the current release module are selected according to the breakdown voltage of the switch module, and the sum of the conduction voltages of the components in the current release module minus the voltage of the first voltage drop submodule is smaller than the breakdown voltage of the switch module. For example, the first voltage drop submodule is a resistor, and the resistance value of the resistor may be selected according to the sum of the breakdown voltage of the switch module and the conduction voltage of the component in the current release module. Therefore, the voltage obtained by subtracting the voltage of the first voltage drop submodule from the conduction voltage of the current release module is smaller than the breakdown voltage of the switch module, so that under the condition that the switch module, the switch control module and the current release module are all conducted, the switch control module and the current release module can partially release the static release voltage, the switch module cannot break down, and the switch module is protected.

The second voltage drop submodule may also be implemented by a resistor, which may be the same or different from the resistor of the first voltage drop submodule. Connecting one end of the second voltage drop submodule with the high-frequency submodule, and connecting the other end of the second voltage drop submodule with the grounding voltage end; therefore, under the condition that the high-frequency sub-module is conducted, the second voltage drop sub-module and the first voltage drop sub-module which are connected to the two ends of the high-frequency sub-module form a series circuit, so that voltage drops exist at the two ends of the second voltage drop sub-module, namely one end of the second voltage drop sub-module is divided by the voltage after the second voltage drop sub-module is connected with the first voltage drop sub-module in series, and the other end of the second voltage drop sub-module is grounded. Therefore, the first end of the second voltage drop submodule is connected with the second end of the switch module, and the voltage of the first end of the second voltage drop submodule is the same as the voltage of the second end of the first voltage drop submodule, so that under the condition of generating the electrostatic discharge signal, the voltage input into the first voltage drop submodule is large, even if the voltage obtained after the voltage of the electrostatic discharge signal is reduced by the voltage of the first voltage drop submodule is still high level, the voltage of the high level can be provided for the switch module through the second voltage drop submodule, and the switch module is conducted.

The first voltage drop submodule is used for forming voltage drop at two ends of the first voltage drop submodule under the condition that the input signal is the electrostatic discharge signal, and transmitting the electrostatic discharge signal to the high-frequency submodule.

Here, the first terminal of the first voltage drop submodule is used as the first terminal of the switch control module, and as shown in fig. 5, the first voltage drop submodule may be a resistor R51 in fig. 5, and the second terminal of the first voltage drop submodule is used as the second terminal of the switch control module and is connected to the first terminal of the switch module. Under the condition that the input signal is the electrostatic discharge signal, the electrostatic discharge signal passes through the first voltage drop submodule, and because the first voltage drop submodule is a resistor, voltage drop is formed at two ends of the first voltage drop submodule; in this way, the voltage output at the second end of the first droop submodule is not too high. Meanwhile, the electrostatic discharge signal is transmitted to the high-frequency sub-module through the first voltage drop sub-module.

And the high-frequency sub-module is used for responding to the electrostatic discharge signal and entering a conducting state.

Here, the high-frequency sub-module 202 may be implemented by a capacitor, for example, by a capacitor CAP54 shown in fig. 5, and a second terminal of the high-frequency sub-module is connected to a second terminal of the switch module as a third terminal of the switch control module; therefore, under the condition that the high-frequency sub-modules are conducted, the first voltage drop sub-module and the second voltage drop sub-module form a series circuit so as to control the conduction and the closing of the switch module through the voltage after series connection.

In some possible implementations, if the input signal is an electrostatically generated signal, the input signal is a high frequency signal, thereby rendering the capacitance in the high frequency sub-module conductive; since the high-frequency sub-module is connected between the first voltage drop sub-module and the second voltage drop sub-module, the first voltage drop sub-module and the second voltage drop sub-module can form a series circuit under the condition that the high-frequency sub-module is conducted.

In some embodiments, the high-frequency sub-module is further configured to enter an off state if the input signal is an operating signal of the chip to be protected.

Here, the working signal of the chip to be protected is a signal sent by the chip to be protected in a normal working state. For example, the chip to be protected is a power management chip, and sends a signal for starting a power supply in a normal working state; or, the chip to be protected is a driving chip, and in a normal working state, a signal sent by any component in the chip, for example, a signal sent by an amplifier. When an input signal is sent out under the normal working state of a signal to be protected, the input signal is not a high-frequency signal and cannot conduct a high-frequency sub-module; therefore, the switch control module is in a disconnected state, and the switch module is not controlled to be closed, so that the working signal of the chip to be protected can act on the switch module.

The second voltage drop submodule 203 is configured to be connected in series with the first voltage drop submodule when the high-frequency submodule enters a conducting state.

The high-frequency submodule is arranged between the first voltage drop submodule and the second voltage drop submodule and is equivalent to a conducting wire under the condition that the high-frequency submodule is conducted, so that the first voltage drop submodule and the second voltage drop submodule are connected in series; thus, the second end of the first droop submodule and the first end of the second droop submodule collectively engage the second end of the switch module. For example, the second voltage drop submodule 203 can be the resistor RES57 in fig. 5.

The first voltage drop submodule 201 and the second voltage drop submodule 203, which are connected in series, are configured to divide a voltage of the electrostatic discharge signal, and provide the obtained reduced voltage to a second end of the switch module.

Here, when the input signal is the electrostatic discharge signal, the high-frequency sub-module is turned on, and the first voltage drop sub-module 201 and the second voltage drop sub-module 203 connected in series divide the voltage of the electrostatic discharge signal, so that the divided voltage, that is, the reduced voltage is smaller than the voltage of the electrostatic discharge signal. And providing the voltage of the electrostatic discharge signal to the switch module through the second terminal of the switch module so that the second terminal of the switch module is at a high level, and the switch module is turned on. The second end of the second voltage drop submodule is connected with the ground voltage end, so that the second voltage drop submodule is set to be a resistor, the first end of the second voltage drop submodule can have voltage, the second end of the switch module is not directly pulled down to the ground voltage, and the switch module is closed. Taking the first voltage drop submodule and the second voltage drop submodule as the example of the resistor with the same resistance value, if the voltage of the electrostatic discharge signal is 10V, the voltage of the two ends of the first voltage drop submodule and the second voltage drop submodule is 5V after the first voltage drop submodule and the second voltage drop submodule divide the voltage of 10V, and therefore the voltage provided for the switch module through the second end of the switch module is 5V.

In the embodiment of the application, the first voltage drop submodule and the second voltage drop submodule in the form of resistors and the high-frequency submodule conducted under a high-frequency signal are introduced into the switch control module, so that on one hand, the voltage of an electrostatic discharge signal can be reduced, and the switch module cannot be damaged due to overhigh voltage while the switch module is conducted; on the other hand, the resistor is arranged in the second voltage drop submodule, so that voltage can be provided at two ends of the second voltage drop submodule, a voltage value can be provided for the second end of the switch module, and the second end of the switch module is not directly grounded so that the switch module is turned off.

In some possible implementations, the first voltage drop submodule may be configured as a polysilicon resistor, and the second voltage drop submodule may be configured as a polysilicon resistor, and may also be configured as a transistor resistor, for example, a MOS resistor. The high-frequency sub-module can be set as a metal capacitor and can also be set as a transistor capacitor, such as a MOS capacitor. Therefore, the area of the electrostatic protection circuit is smaller due to the smaller areas of the MOS resistor and the MOS capacitor, and the area occupied by the electrostatic protection circuit in a chip can be reduced.

In some embodiments, the switch module may be implemented by a high-voltage n-channel transistor, and the gate terminal voltage of the high-voltage n-channel transistor is controlled by the switch control module to turn on and off the switch module. That is, under the condition that the switch module is a high-voltage n-channel transistor, the first end of the switch module is the drain end of the high-voltage n-channel transistor, the second end of the switch module is the gate end of the high-voltage n-channel transistor, and the third end of the switch module is the source end of the high-voltage n-channel transistor. In this way, under the condition that the input signal is the electrostatic discharge signal, the high-frequency submodule between the first voltage drop submodule and the second voltage drop submodule is conducted, so that the first voltage drop submodule and the second voltage drop submodule divide the voltage of the electrostatic discharge signal; under the condition that the high-frequency sub-module is conducted, the second end of the first voltage drop sub-module and the first end of the second voltage drop sub-module are connected to the grid end of the high-voltage n-channel transistor, so that a voltage division value can be provided for the grid end of the high-voltage n-channel transistor, the grid end of the high-voltage n-channel transistor is in a high level, and the high-voltage n-channel transistor is conducted. And the second end of the first voltage drop submodule is connected with the drain terminal of the high-voltage n-channel transistor, and after voltage drop is formed at the two ends of the first voltage drop submodule, the voltage transmitted into the drain terminal of the high-voltage n-channel transistor by the first voltage drop submodule is reduced, so that the drain terminal of the high-voltage n-channel transistor can be protected. Therefore, the high-voltage n-channel transistor is used as the switch module, the three ends of the high-voltage n-channel transistor are respectively connected with different sub-modules in the switch control module, the high-voltage n-channel transistor can be conducted in time, and the high-voltage n-channel transistor can be protected from being damaged by high voltage.

In some embodiments, at least one switch module and at least one switch control module may be included in the electrostatic protection circuit; the switch modules correspond to the switch control modules one to one, namely, a plurality of switch modules and the switch control module corresponding to each switch module can be arranged in the electrostatic protection circuit in a parallel connection mode; if 2B shows, take 3 switch modules as an example, the ESD protection circuit includes: the switch module 221 and a switch control module 231 corresponding to the switch module 221; the switch module 222 and the switch control module 232 corresponding to the switch module 222; switch module 223, switch control module 233 corresponding to switch module 223.

And the circuit modules formed by connecting each switch module and the corresponding switch control module are connected in parallel with the circuit modules formed by connecting other switch modules and the corresponding switch module. As shown in fig. 2B, the switch module 221 and the switch control module 231 form a circuit module, the switch module 222 and the switch control module 232 form a circuit module, and the switch module 223 and the switch control module 233 form a circuit module, and the three circuit modules are connected in parallel. In this way, since each circuit module is provided with a voltage-dividing resistor, when the three circuit modules are connected in parallel, the resistors in each circuit module are also connected in parallel, so that the total resistance of the resistors in the whole circuit can be reduced.

In some embodiments, the second end of the switch module enters the internal circuit of the chip to be protected, so that in the normal working state of the chip, the on-off state of the switch module is controlled by the logic circuit, which can be realized by the following processes:

the second terminal of the switch module 103 is connected to the internal logic circuit of the chip to be protected.

The internal logic circuit of the chip to be protected is used for outputting logic signals to the first switch module;

and the switch module 103 is configured to respond to the logic signal and enter an off state or an on state when the input signal is the working signal of the chip to be protected.

Here, the internal logic circuit of the chip to be protected may be any logic circuit in the chip, for example, an inverter in the chip, and the second terminal of the switch module is connected to the output terminal of the inverter, so that the inverter outputs a high-low level signal to control the on-off state of the switch module. Taking the switch module as HVNMOS as an example, the gate of the HVNMOS is connected to the internal logic circuit of the chip to be protected. If the logic signal is at high level, the grid of the HVNMOS is switched into high level, so that the HVNMOS is conducted; therefore, under the normal working state of the chip, the switch module can be controlled by the internal logic circuit, so that the switch module can process the signal generated by the chip.

In some embodiments, the current releasing module is formed by a releasing submodule in positive and negative directions and an electrostatic protection submodule to release current for an electrostatic releasing signal with a larger voltage, the structure of the current releasing module 102 is shown in fig. 2C, and the current releasing module 102 includes: a positive release sub-module 241, a negative release sub-module 242, and an electrostatic protection sub-module 243;

a first end of the positive release sub-module 241 is connected to a power supply voltage end and a first end of the electrostatic protection sub-module 243; the second end of the positive release sub-module 241 is connected to the second end of the input module 141, the first end of the switch control module 143, and the first end of the negative release sub-module 242, respectively;

a second terminal of the negative-going discharge sub-module 242 is connected to a ground voltage terminal and a second terminal of the electrostatic protection sub-module 243, respectively;

here, the forward release submodule 241 is turned on when the voltage of the input signal is a forward voltage. The forward release submodule may be implemented by a P-type diode, such that a first end of the forward release submodule may be a cathode of the P-type diode, and a second end of the forward release submodule may be an anode of the P-type diode. The conduction voltage of the esd submodule 243 is relatively large, and when the voltage of the input signal is greater than or equal to the preset voltage threshold, the esd submodule 243 is turned on. The electrostatic protection sub-module 243 may be implemented by an electrostatic protection device (Clamp). In this way, the second terminal of the forward releasing submodule 241 is connected to the second terminal of the input module as the first terminal of the current releasing module to switch in the input signal.

The negative-going release sub-module 242 is turned on when the voltage of the input signal is a negative-going voltage. The negative-going release sub-module 242 may be implemented by an N-type diode, such that a first terminal of the negative-going release sub-module 242 may be a negative terminal of the N-type diode and a second terminal of the negative-going release sub-module 242 may be a positive terminal of the N-type diode. In this way, the second terminal of the negative-going release sub-module 242 is used as the second terminal of the current release module, is connected to the third terminal of the switch control module and the third terminal of the switch module, and is connected to the ground voltage terminal, so that the negative-going release sub-module 242 can be grounded when it is turned on.

The forward releasing submodule is used for entering a conducting state under the condition that the voltage of the electrostatic releasing signal is a forward voltage and is greater than a preset voltage threshold value, and providing the voltage of the electrostatic releasing signal to the electrostatic protection submodule.

Here, the forward releasing submodule and the electrostatic protection submodule constitute a forward voltage protection mode, and when the input signal is an electrostatic releasing signal, and the voltage is a forward voltage and is greater than a preset voltage threshold, it is described that the input signal is generated by static electricity and the voltage current is large. If the voltage is a forward voltage and is greater than a preset voltage threshold, the voltage enables the forward release sub-module and the electrostatic protection sub-module to be conducted, current in an electrostatic release signal flows from the forward release sub-module to a forward voltage end firstly, then flows from the forward voltage end to the electrostatic protection sub-module, and finally, the current flows from the electrostatic protection sub-module to a ground voltage end so as to release large current in the electrostatic release signal and protect a switch module in the circuit.

The negative-direction releasing submodule is used for entering a conducting state and providing the voltage of the input signal to the electrostatic protection submodule under the condition that the voltage of the electrostatic releasing signal is a negative-direction voltage and the absolute value of the negative-direction voltage is larger than the preset voltage threshold.

Here, the negative-going discharge sub-module and the electrostatic protection sub-module constitute a negative-going voltage protection mode. Under the condition that the input signal is an electrostatic discharge signal, the voltage is a negative voltage and the absolute value is greater than the preset voltage threshold, the negative discharge sub-module and the electrostatic protection sub-module are conducted by the voltage, the current in the electrostatic discharge signal flows from the negative discharge sub-module to the ground voltage end, then flows from the ground voltage end to the electrostatic protection sub-module, and finally, the current flows from the electrostatic protection sub-module to the positive voltage end so as to discharge larger current in the electrostatic discharge signal and protect a switch module in the circuit.

And the electrostatic protection submodule is used for entering a conducting state and releasing the current of the electrostatic discharge signal based on the voltage of the electrostatic discharge signal.

Here, the electrostatic protection module is turned on when the input signal is the electrostatic discharge signal and the voltage value is greater than the preset voltage threshold, so that the large current of the input signal is released from the electrostatic protection module, and the input signal generated by the static electricity cannot damage the chip to be protected.

In the embodiment of the application, the positive release sub-module, the negative release sub-module and the electrostatic protection sub-module are introduced into the current release module, so that no matter whether the input signal is positive voltage or negative voltage, the electrostatic protection sub-module can be conducted under the condition of a large voltage value, large current in the input signal is released through the electrostatic protection sub-module, and then electrostatic protection of a switch module in a circuit and a chip to be protected can be realized.

The embodiment of the application provides an electrostatic protection method which can be executed by a processor of a computer device. Fig. 3 is a schematic flow chart illustrating an implementation of an electrostatic protection method according to an embodiment of the present application, as shown in fig. 3, the method includes the following steps S301 to S304:

step S301, an input module in the electrostatic protection circuit is adopted to receive an input signal of a chip to be protected.

Here, the esd protection circuit may be the esd protection circuit in the above embodiment, and an input module in the esd protection circuit receives an input signal of the chip to be protected, so as to transmit the input signal to other modules in the esd protection circuit through the input module.

Step S302, in a case that the input signal is the electrostatic discharge signal, reducing a voltage of the electrostatic discharge signal by using a switch control module in the electrostatic protection circuit, to obtain a reduced voltage.

Here, when the input signal is an electrostatic discharge signal generated by static electricity, a voltage drop is formed across a resistor provided in the switch control module, and the voltage of the electrostatic discharge signal is reduced to obtain a reduced voltage. The switch control module provides the reduced voltage to the switch module to turn on the switch module.

Step S303, turning on a switch module in the electrostatic protection circuit based on the reduced voltage.

Here, the second terminal of the switch module receives the reduced voltage, so that the second terminal of the switch module is at a high level, thereby turning on the switch module.

Step S304, when the voltage of the electrostatic discharge signal is greater than or equal to a preset voltage threshold, turning on a current discharge module in the electrostatic protection circuit, and discharging the current of the electrostatic discharge signal by using the current discharge module.

Here, if the voltage of the electrostatic discharge signal is too large, the current discharge module is turned on, so that a current flows through the current discharge module, and a large current generated by static electricity is discharged, thereby protecting the switch module.

In the embodiment of the application, when an electrostatic discharge event occurs, the switch control module is turned on, and the voltage of the input signal is reduced through the switch module control module, so that the switch module can be turned on, and the switch module cannot be damaged due to overhigh voltage.

The application of the ESD protection circuit provided in the embodiment of the present application in an actual scene is described below, taking an ESD protection circuit applied to an input/output constant voltage interface as an example.

In some embodiments, ESD has been a problem to be solved in electronic devices, circuits, and systems. Various fields of consumption, industry, aerospace, military and medical treatment are affected by this problem. ESD protection is increasingly important in display chips, power management chips, driver chips, and automotive chips, and plays an important role in everyday applications. However, in the high voltage process, the HVNMOS is easily broken down by the ESD voltage so that snapback occurs to damage the HVNMOS.

Therefore, the ESD protection structure of the constant input and output constant voltage interface is provided, and damage of an HVNMOS in an internal area of a chip when an ESD event occurs is effectively reduced.

Fig. 4 is a schematic structural diagram of an ESD protection circuit provided in the related art, as shown in fig. 4, the ESD protection circuit includes: constant input/output voltage interface PAD 41, P-type diode (Pdiode) 42, N-type diode (Ndiode) 43, electrostatic discharge protection device (Clamp) 44, HVNMOS 45, HVNMOS 46, HVNMOS 47, power supply voltage VDDA 48, and ground (VSSA) 49. In the ESD protection circuit, gate terminals of the

HVNMOS

45, 46, and 47 are connected to a wire to access the inside of the chip, and the on or off of the

HVNMOS

45, 46, and 47 is controlled by a signal inside the chip. Drain terminals (drain) of the HVNMOS 45, the HVNMOS 46 and the HVNMOS 47 are connected, and are connected to one end of the PAD 41; the source terminals of HVNMOS 45, HVNMOS 46 and HVNMOS 47 are connected to ground (VSSA) 49.

Pdiode 42 is an electrostatic protection device for protecting test modes of PD ESD (PD means that Pin applies positive voltage to power supply) and PS ESD (PS means that Pin applies positive voltage to VSS), ndiiode 43 is an electrostatic protection device for protecting test modes of ND (ND means that Pin applies negative voltage to power supply) ESD and NS ESD (NS means that Pin applies negative voltage to VSS); the Clamp 44 device is an electrostatic protection device between VDDA and VSSA. Pdiode, ndiode and Clamp are combined to form an ESD network of a PAD interface, however, due to the fact that the size of a chip is large and the starting voltage of a Clamp device is too high, the clamping voltage of the PAD interface is increased finally, ESD voltage and current enter the chip finally, and therefore the HVNMOS in the chip is subjected to snapback breakdown damage under the ESD high-voltage condition.

Accordingly, an embodiment of the present application provides an esd protection circuit, as shown in fig. 5, the esd protection circuit includes: PAD 41, P-type diode (Pdiode) 42, N-type diode (Ndiode) 43, electrostatic discharge protection device (Clamp) 44, HVNMOS 45, HVNMOS 46, HVNMOS 47, power supply voltage VDDA 48, ground terminal (VSSA) 49, and resistor R51, resistor R52, resistor R53, capacitor (CAP) 54, CAP 55, CAP 56, resistor RES57, resistor RES 58, and resistor RES 59. In the electrostatic protection circuit, if a plurality of modules consisting of the HVNMOS, the resistor RES, the capacitor CAP, and the resistor R are provided in the circuit, the modules are connected in parallel so that the total resistance of the parallel connection of the resistor R is smaller. For example, the three modules are connected in parallel, with the HVNMOS 45, the resistor RES57, the capacitor CAP54, and the resistor R51 as one module, the HVNMOS 46, the resistor RES 58, the capacitor CAP 55, and the resistor R52 as one module, and the HVNMOS 47, the resistor RES 59, the capacitor CAP 56, and the resistor R53 as one module.

A resistor R51, a resistor R52 and a resistor R53 are added between the PAD 41 and the drain terminals of the HVNMOS 45, the HVNMOS 46 and the HVNMOS 47 respectively. The resistors R51, R52, and R53 may be the same resistor. A capacitor is added between the gate terminal and drain terminal of each HVNMOS. For example, CAP54 is added between the gate terminal and drain terminal of HVNMOS 45; adding CAP 55 between the gate end and drain end of HVNMOS 46; CAP 56 is added between the gate terminal and drain terminal of the HVNMOS 47.

For each HVNMOS, adding a gate end of the HVNMOS to the VSSA 49 to form a resistor RES; for example, a resistor RES57 is added to VSSA 49 at the gate of HVNMOS 45; adding a resistor RES 58 to the VSSA 49 at a gate end of the HVNMOS 46; a resistor RES 59 is added to VSSA 49 at the gate terminal of HVNMOS 47.

When an ESD event occurs, the voltage and current of the ESD are fast, generally within 10 nanoseconds (ns), and the voltage of the gate terminal of the HVNMOS is triggered to turn on through the capacitor CAP and the resistor RES network, so that the channel of the HVNMOS conducts current. Taking HVNMOS 45 as an example, because CAP54 is a conducting wire when an ESD event occurs, the gate terminal of HVNMOS 45 is connected to the PAD terminal through resistor R51, and the PAD voltage is high, HVNMOS 45 is turned on. Likewise, HVNMOS 46 and HVNMOS 47 are also on. When the current of the PAD end flows through the resistor R, voltage drop is generated at two ends of the resistor R, so that the aim of protecting the drain end of the HVNMOS is fulfilled. The gate terminals of the

HVNMOS

45, 46 and 47 are connected to the internal wires of the chip, respectively, so that the electrical signals are transmitted to the HVNMOS through the internal wires of the chip under normal operation of the chip. By arranging the resistor RES in the electrostatic protection circuit, when the PAD end outputs high level or ESD event happens in normal operation of the chip, the HVNMOS is conducted, one end of the resistor RES is connected with the gate end of the HVNMOS, so that the gate end of the HVNMOS is high level instead of directly pulling the voltage of the gate end of the HVNMOS to the ground.

Since the resistor R and the HVNMOS are connected in series to the ground, a part of current also flows through the resistor R, and after the current flows through the resistor R, a voltage drop is formed across the resistor R, so that the HVNMOS cannot be subjected to snapback failure through voltage triggering. Therefore, a resistor is added between the PAD of the electrostatic protection circuit and the drain terminal of the HVNMOS, a capacitor is placed between the gate terminal of the HVNMOS and the drain terminal of the HVNMOS, and a resistor is added to the VSSA by the gate terminal of the HVNMOS, so that the HVNMOS is protected from being subjected to snapback damage due to overhigh voltage.

Assuming that the resistances of the resistors R51, R52, and R53 are all 1 kilo-ohm, the channels of the

HVNMOS

45, 46, and 47 conduct a current of 50 milliamperes (mA). The voltage difference across resistors R51, R52, and R53 is 50 volts (V), and if HVNMOS 45, HVNMOS 46, and HVNMOS 47 snap back (snapback) at 25V to cause damage, then the PAD interface location needs to be at 75V, and 75V is sufficient to allow ESD current to flow through Pdeiode and Clamp to bleed.

In some embodiments, the capacitor CAP may be replaced by a MOSCAP capacitor, and the resistor RES may be replaced by a resistor MOSRES. As shown in fig. 6, the capacitors CAP54, CAP 55, CAP 56 in fig. 5 are replaced by MOSCAP 61, MOSCAP 62, MOSCAP 63 in fig. 6; replacing the resistors RES57, RES 58, and RES 59 in fig. 5 with the resistors MOSRES 64, MOSRES 65, MOSRES 66 in fig. 6; therefore, the area of the capacitor CAP and the area of the capacitor RES are large, and the area of metal wiring is wasted by the metal capacitor, so that the space of a chip can be saved by adopting the MOSCAP capacitor with a small area and the MOS resistor with a small area.

In the embodiment of the application, an RC network consisting of a resistor RES and a capacitor CAP and a resistor R are added in an ESD protection circuit, so that the electrostatic level of a PAD interface is improved, and by adding the RC network, when an ESD event occurs, an HVNMOS is turned on, current flows through the resistor R, and voltage drop is generated at two ends of the resistor R, so that the drain terminal voltage of the HVNMOS can be protected from being damaged due to overhigh voltage.

Based on the foregoing embodiments, the present application provides an electrostatic protection apparatus, which includes units and modules included in the units, and can be implemented by a processor in a computer device; of course, the implementation can also be realized through a specific logic circuit; in the implementation process, the Processor may be a Central Processing Unit (CPU), a Microprocessor Unit (MPU), a Digital Signal Processor (DSP), a Field Programmable Gate Array (FPGA), or the like.

The above description of the apparatus embodiment is similar to the above description of the method embodiment, with similar beneficial effects as the method embodiment. In some embodiments, functions of or modules included in the apparatus provided in the embodiments of the present disclosure may be used to perform the methods described in the above method embodiments, and for technical details not disclosed in the embodiments of the apparatus of the present disclosure, please refer to the description of the embodiments of the method of the present disclosure for understanding.

It should be noted that, in the embodiment of the present application, if the backlight control method is implemented in the form of a software functional module and is sold or used as a standalone product, the backlight control method may also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application or portions thereof that contribute to the related art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read Only Memory (ROM), a magnetic disk, or an optical disk. Thus, embodiments of the present application are not limited to any particular hardware, software, or firmware, or any combination of hardware, software, and firmware.

The embodiment of the present application provides a computer device, which includes a memory and a processor, where the memory stores a computer program that can be executed on the processor, and the processor implements some or all of the steps of the above method when executing the program.

The embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements some or all of the steps of the above method. The computer readable storage medium may be transitory or non-transitory.

The present application provides a computer program, which includes a computer readable code, and in a case where the computer readable code runs in a computer device, a processor in the computer device executes a program for implementing some or all of the steps in the method.

Embodiments of the present application provide a computer program product, which includes a non-transitory computer readable storage medium storing a computer program, and when the computer program is read and executed by a computer, the computer program implements some or all of the steps of the above method. The computer program product may be embodied in hardware, software or a combination thereof. In some embodiments, the computer program product is embodied in a computer storage medium, and in other embodiments, the computer program product is embodied in a Software product, such as a Software Development Kit (SDK), or the like.

It is to be noted here that: the foregoing description of the various embodiments is intended to highlight various differences between the embodiments, which are the same or similar and all of which are referenced. The above description of the apparatus, storage medium, computer program and computer program product embodiments is similar to the description of the method embodiments above, with similar advantageous effects as the method embodiments. For technical details not disclosed in the embodiments of the apparatus, the storage medium, the computer program and the computer program product of the present application, reference is made to the description of the embodiments of the method of the present application for understanding.

It should be noted that fig. 7 is a schematic diagram of a hardware entity of a computer device in an embodiment of the present application, and as shown in fig. 7, the hardware entity of the computer device 700 includes: a processor 701, a communication interface 702, and a memory 703, wherein:

the processor 701 generally controls the overall operation of the computer device 700.

The communication interface 702 may enable the computer device to communicate with other terminals or servers via a network.

The Memory 703 is configured to store instructions and applications executable by the processor 701, and may also buffer data (e.g., image data, audio data, voice communication data, and video communication data) to be processed or already processed by the processor 701 and modules in the computer device 700, and may be implemented by a FLASH Memory (FLASH) or a Random Access Memory (RAM). Data may be transferred between the processor 701, the communication interface 702, and the memory 703 via the bus 704.

It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above steps/processes do not mean the execution sequence, and the execution sequence of each step/process should be determined by the function and the inherent logic thereof, and should not constitute any limitation to the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are merely for description, and do not represent the advantages and disadvantages of the embodiments.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one of 8230, and" comprising 8230does not exclude the presence of additional like elements in a process, method, article, or apparatus comprising the element.

In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the unit is only a logical functional division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units; can be located in one place or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be separately regarded as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.

Those of ordinary skill in the art will understand that: all or part of the steps of implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer-readable storage medium, and when executed, executes the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as a removable Memory device, a Read Only Memory (ROM), a magnetic disk, or an optical disk.

Alternatively, the integrated unit described above may be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. Based on such understanding, the technical solutions of the present application or portions thereof contributing to the related art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code.

The above description is only for the embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

Claims

1. An electrostatic discharge protection circuit, comprising: the device comprises an input module, a current release module, a switch module and a switch control module;

the switch control module is used for reducing the voltage of the electrostatic discharge signal under the condition that the input signal is the electrostatic discharge signal and providing the reduced voltage to the switch module;

2. The ESD protection circuit of claim 1, wherein the switch control module comprises: the first voltage drop submodule, the high-frequency submodule and the second voltage drop submodule;

the first end of the first voltage drop submodule is connected with the second end of the input module, and the second end of the first voltage drop submodule is respectively connected with the first end of the high-frequency submodule and the first end of the switch module; the second end of the high-frequency submodule is connected with the second end of the switch module and the first end of the second voltage drop submodule respectively; the second end of the second voltage drop submodule is respectively connected with the third end of the switch module, the second end of the current release module and the ground voltage end;

the first voltage drop submodule is used for forming voltage drop at two ends of the first voltage drop submodule under the condition that the input signal is the electrostatic discharge signal and transmitting the electrostatic discharge signal to the high-frequency submodule;

the high-frequency sub-module is used for responding to the electrostatic discharge signal and entering a conducting state;

the second voltage drop submodule is used for being connected with the first voltage drop submodule in series under the condition that the high-frequency submodule enters a conducting state;

the first voltage drop submodule and the second voltage drop submodule which are connected in series are used for dividing the voltage of the electrostatic discharge signal and providing the obtained reduced voltage to the second end of the switch module.

3. The ESD protection circuit of claim 2 wherein the high-frequency sub-module is further configured to enter an OFF state when the input signal is an operating signal of the chip to be protected.

4. The ESD protection circuit of claim 2, wherein the first voltage drop submodule comprises a polysilicon resistor;

the second pressure drop submodule includes one of: a polysilicon resistor and a transistor resistor;

the high frequency sub-module includes one of: metal capacitance and transistor capacitance.

5. The ESD protection circuit according to any one of claims 1-4, wherein in a case that the switch module is a high voltage n-channel transistor, the first terminal of the switch module is a drain terminal of the high voltage n-channel transistor, the second terminal of the switch module is a gate terminal of the high voltage n-channel transistor, and the third terminal of the switch module is a source terminal of the high voltage n-channel transistor.

6. The ESD protection circuit of claim 1, wherein the ESD protection circuit comprises at least one of the switch modules and at least one of the switch control modules; the switch modules correspond to the switch control modules one to one;

and the circuit modules formed by connecting each switch module and the corresponding switch control module are connected in parallel with the circuit modules formed by connecting other switch modules and the corresponding switch module.

7. The ESD protection circuit of claim 1, wherein the second terminal of the switch module is connected to the internal logic circuit of the chip to be protected;

the internal logic circuit of the chip to be protected is used for outputting logic signals to the second switch module;

and the switch module is used for responding to the logic signal and entering a closed state or a conducting state under the condition that the input signal is the working signal of the chip to be protected.

8. The ESD protection circuit of claim 1, wherein the current discharge module comprises: the positive releasing submodule, the negative releasing submodule and the electrostatic protection submodule are arranged in the circuit;

the first end of the forward release submodule is respectively connected with a power supply voltage end and the first end of the electrostatic protection submodule; the second end of the positive release submodule is respectively connected with the second end of the input module, the first end of the switch control module and the first end of the negative release submodule;

the second end of the negative-direction release sub-module is respectively connected with a ground voltage end and the second end of the electrostatic protection sub-module;

the forward releasing submodule is used for entering a conducting state under the condition that the voltage of the electrostatic releasing signal is a forward voltage and is greater than a preset voltage threshold value, and providing the voltage of the electrostatic releasing signal to the electrostatic protection submodule;

the negative-direction release sub-module is configured to enter a conducting state and provide the voltage of the input signal to the electrostatic protection sub-module when the voltage of the electrostatic release signal is a negative-direction voltage and an absolute value of the negative-direction voltage is greater than the preset voltage threshold;

9. An electrostatic protection method applied to the electrostatic protection circuit of any one of claims 1 to 8, the method comprising:

10. An electrostatic protection system, comprising: a chip to be protected and an electrostatic protection circuit as claimed in any one of the preceding claims 1 to 8.

11. An electrostatic protection apparatus comprising a memory and a processor, the memory storing a computer program operable on the processor, wherein the processor implements the steps of the method of claim 9 when executing the program.

12. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method as claimed in claim 9.