CN115757123B

CN115757123B - Test case generation method, device, equipment and medium

Info

Publication number: CN115757123B
Application number: CN202211435530.XA
Authority: CN
Inventors: 贺艺佳; 石川; 王孟; 孙秋景; 王博威; 孙瑞超
Original assignee: Dashangsuo Feitai Testing Technology Co ltd
Current assignee: Dashangsuo Feitai Testing Technology Co ltd
Priority date: 2022-11-16
Filing date: 2022-11-16
Publication date: 2023-09-22
Anticipated expiration: 2042-11-16
Also published as: CN115757123A

Abstract

The embodiment of the application provides a test case generation method, device, equipment and medium, which are used for solving the problems of low accuracy and low coverage range of a generated test case caused by low accuracy and low coverage range of a constraint relation among determined parameters in the prior art. The electronic equipment determines a first target node which is adjacent to and reachable by each node in the received functional logic diagram, determines a constraint relation between the node and a parameter corresponding to the first target node as a first constraint relation, determines a second target node which is unreachable between the node and the parameter corresponding to the second target node as a second constraint relation, so that the accuracy and coverage of determination of the constraint relation between the parameters can be improved, and the electronic equipment generates a corresponding test case according to the determined constraint relation between the parameters, so that the accuracy and coverage of the generated test case can be improved.

Description

Test case generation method, device, equipment and medium

Technical Field

The present application relates to the field of software testing technologies, and in particular, to a method, an apparatus, a device, and a medium for generating a test case.

Background

Software testing is an important component in the process of developing a software product, and is an important activity process for verifying and confirming the software product throughout the whole software development life cycle, and the purpose of the software testing is to discover various problems existing in the software product as soon as possible. As software products become popular in life, the quality of the software is also becoming increasingly interesting to developers and users. How to find hidden defects in software products through software testing can quickly and efficiently design high-coverage and low-redundancy test cases, and becomes a main research subject of testers. In the prior art, a tester usually designs test cases based on test requirements, the tester designs the test cases depending on the experience of the tester, no methodology instruction exists, and the completeness of the test cases cannot be guaranteed, so that the designed test cases are low in accuracy and coverage range.

In the prior art, a constraint relation among different parameters is determined by a tester, corresponding test cases are generated by equipment according to the constraint relation, specifically, tools or systems such as a pair independent combination test tool (Pairwise Independent Combinatorial Testing tool, PICT), an orthogonal table test case automatic generation tool (AllPairs) and the like are adopted, a high-coupling pair combination method is adopted, and the corresponding test cases are automatically generated based on the constraint relation among parameters of a tested scene, so that the problems of standardization and standardization of test design are solved. However, because the constraint relation among the parameters is determined by the testers, the constraint relation among the parameters determined by the testers depends on the experience of the testers, the completeness of analysis cannot be guaranteed without methodology guidance, and hidden constraint relation among certain parameters possibly exists, so that the testers are easy to miss the constraint relation among certain parameters, the accuracy of the determined constraint relation among the parameters is low, the coverage is not wide, and the accuracy of the generated test case is low, and the coverage is not wide.

Disclosure of Invention

The embodiment of the application provides a test case generation method, device, equipment and medium, which are used for solving the problems of low accuracy and low coverage range of a generated test case caused by low accuracy and low coverage range of a constraint relation among determined parameters in the prior art.

In a first aspect, an embodiment of the present application provides a test case generating method, where the method includes:

receiving a functional logic diagram, wherein corresponding parameters are recorded in nodes in the functional logic diagram;

for each node in the functional logic diagram, determining a node which is adjacent to and reachable by the node as a first target node, determining a constraint relation between the node and parameters corresponding to the first target node as a first constraint relation, determining a node which is not reachable between the node as a second target node, and determining a constraint relation between the node and parameters corresponding to the second target node as a second constraint relation;

and generating a corresponding test case according to the first constraint relation and the second constraint relation among the determined parameters.

Further, the determining that the constraint relation between the node and the parameter corresponding to the first target node is a first constraint relation includes:

Acquiring each edge on an reachable path of the node and the first target node, and acquiring a first target parameter value recorded on an edge connected with the node in each edge;

and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is not any value.

Further, when the determining that the parameter corresponding to the first constraint relation is the first target parameter value, the parameter corresponding to the first target node is not any value includes:

acquiring a first candidate parameter value recorded on each edge pointing to other nodes in each edge connected with the first target node;

and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is any one of the obtained first candidate parameter values.

Further, the method further comprises:

acquiring parameter values recorded on each edge pointing to other nodes in each edge connected with the node, and determining second target parameter values except the first target parameter value in each acquired parameter value;

And when the first constraint relation is determined that the parameter value corresponding to the node is the second target parameter value, the parameter value corresponding to the first target node is any value.

Further, the determining that the constraint relation between the node and the parameter corresponding to the second target node is a second constraint relation includes:

and when the second constraint relation is determined that the parameter corresponding to the node is not an arbitrary value, the parameter corresponding to the second target node is an arbitrary value.

acquiring second candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the node; obtaining third candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the second target node; the second candidate parameter value is an optional parameter value of the parameter corresponding to the node, and the third candidate parameter value is an optional parameter value of the parameter corresponding to the second target node;

and when the second constraint relation is that the parameter corresponding to the node is any one of the acquired second candidate parameter values, the parameter value corresponding to the second target node is not any one of the third candidate parameter values.

Further, the receiving function logic diagram includes:

receiving a functional logic diagram and a test guarantee level corresponding to a current test scene;

the generating the corresponding test case according to the first constraint relation and the second constraint relation among the determined parameters comprises the following steps:

acquiring test combination strength stored for the test security level; and processing the first constraint relation and the second constraint relation between the test combination strength and the determined parameters by adopting a test case generation algorithm to generate a corresponding test case.

In a second aspect, an embodiment of the present application further provides a test case generating device, where the device includes:

the receiving module is used for receiving the functional logic diagram, wherein corresponding parameters are recorded in nodes in the functional logic diagram;

the processing module is used for determining adjacent and reachable nodes of each node in the functional logic diagram as a first target node, determining a constraint relation between the node and parameters corresponding to the first target node as a first constraint relation, determining unreachable nodes between the node as a second target node, and determining a constraint relation between the node and parameters corresponding to the second target node as a second constraint relation;

The generation module is used for generating corresponding test cases according to the first constraint relation and the second constraint relation among the determined parameters.

Further, the processing module is specifically configured to obtain each edge on the reachable path between the node and the first target node, and obtain a first target parameter value recorded on an edge connected to the node in each edge; and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is not any value.

Further, the processing module is specifically configured to obtain, in each edge connected to the first target node, a first candidate parameter value recorded on each edge pointing to another node; and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is any one of the obtained first candidate parameter values.

Further, the processing module is further configured to obtain, from each edge connected to the node, a parameter value recorded on each edge pointing to another node, and determine a second target parameter value other than the first target parameter value in each obtained parameter value; and when the first constraint relation is determined that the parameter value corresponding to the node is the second target parameter value, the parameter value corresponding to the first target node is any value.

Further, the processing module is specifically configured to determine that, when the second constraint relationship is that the parameter corresponding to the node is not an arbitrary value, the parameter corresponding to the second target node is an arbitrary value.

Further, the processing module is specifically configured to obtain, in each edge connected to the node, a second candidate parameter value recorded on each edge pointing to the other node; obtaining third candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the second target node; the second candidate parameter value is an optional parameter value of the parameter corresponding to the node, and the third candidate parameter value is an optional parameter value of the parameter corresponding to the second target node; and when the second constraint relation is that the parameter corresponding to the node is any one of the acquired second candidate parameter values, the parameter value corresponding to the second target node is not any one of the third candidate parameter values.

Further, the receiving module is specifically configured to receive a functional logic diagram and a test security level corresponding to a current test scenario;

the generation module is specifically configured to obtain a test combination strength stored for the test security level; and processing the first constraint relation and the second constraint relation between the test combination strength and the determined parameters by adopting a test case generation algorithm to generate a corresponding test case.

In a third aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes a processor, and the processor is configured to implement the steps of the test case generating method according to any one of the above when executing a computer program stored in a memory.

In a fourth aspect, embodiments of the present application also provide a computer-readable storage medium storing a computer program which, when executed by a processor, implements the steps of a test case generating method as described in any one of the above.

In the embodiment of the application, the electronic device receives a functional logic diagram, wherein corresponding parameters are recorded in nodes in the functional logic diagram, for each node in the functional logic diagram, a node which is adjacent to the node and is reachable is determined as a first target node, a constraint relation between the node and the parameters corresponding to the first target node is determined as a first constraint relation, a node which is unreachable between the node is determined as a second target node, a constraint relation between the node and the parameters corresponding to the second target node is determined as a second constraint relation, and a corresponding test case is generated according to the determined first constraint relation and the second constraint relation between the parameters. In the embodiment of the application, for each node in the received functional logic diagram, the electronic equipment determines the adjacent and reachable first target node of the node, determines the constraint relation between the node and the parameter corresponding to the first target node as the first constraint relation, determines the unreachable second target node between the node and the parameter corresponding to the second target node as the second constraint relation, thereby improving the accuracy and coverage of the constraint relation determination between the parameters.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a test case generation process according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a functional logic diagram according to an embodiment of the present application;

FIG. 3 is a schematic diagram illustrating a detailed process of test case generation according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a generated test case according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a test case generating device according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The present application will be described in further detail below with reference to the attached drawings, wherein it is apparent that the embodiments described are only some, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

In order to improve the accuracy and coverage of test case generation, the embodiment of the application provides a test case generation method, a device, equipment and a medium, wherein the test case generation method comprises the following steps: receiving a functional logic diagram, wherein corresponding parameters are recorded in nodes in the functional logic diagram, the electronic equipment determines adjacent and reachable nodes of each node in the functional logic diagram as a first target node, determines a constraint relation between the nodes and parameters corresponding to the first target node as a first constraint relation, determines unreachable nodes between the nodes as a second target node, determines a constraint relation between the nodes and parameters corresponding to the second target node as a second constraint relation, and generates corresponding test cases according to the determined first constraint relation and second constraint relation between the parameters, thereby improving the accuracy and coverage of the generated test cases.

Example 1:

fig. 1 is a schematic diagram of a test case generating process according to an embodiment of the present application, where the process includes the following steps:

s101: and receiving a functional logic diagram, wherein corresponding parameters are recorded in nodes in the functional logic diagram.

The test case generation method provided by the embodiment of the application is applied to the electronic equipment, and the electronic equipment can be intelligent equipment such as a PC or a server.

In the embodiment of the application, in order to accurately generate the test case, the electronic device may receive a functional logic diagram, where corresponding parameters are recorded in nodes in the functional logic diagram, and the functional logic diagram is a directed diagram, where the directed diagram refers to a diagram connecting directions of edges between the nodes.

In the embodiment of the application, the functional logic diagram is drawn by a tester based on the test requirement, and after the tester finishes drawing the functional logic diagram, the tester can operate a terminal or preset equipment used by the tester, the terminal or the preset equipment can acquire the functional logic diagram by identifying the operation of the tester, and the acquired functional logic diagram can be sent to the electronic equipment, so that the electronic equipment can receive the functional logic diagram. Specifically, the tester can select a path corresponding to the function logic diagram stored in the path on a preset page of the terminal or the preset device used by the tester, and click a preset button, for example, a "generate" button, so that the terminal or the preset device can acquire the function logic diagram stored in the path.

In the embodiment of the application, after receiving the functional logic diagram, the electronic device may store the functional logic diagram in the form of an adjacency matrix.

S102: and for each node in the functional logic diagram, determining the adjacent and reachable node of the node as a first target node, determining the constraint relation between the node and the parameters corresponding to the first target node as a first constraint relation, determining the unreachable node between the node as a second target node, and determining the constraint relation between the node and the parameters corresponding to the second target node as a second constraint relation.

In order to determine constraint relations between parameters, the electronic device determines, for each node in the functional logic diagram, a node adjacent to and reachable by the node as a first target node, where the node adjacent to the node refers to a node having a connected edge with the node, determines that the constraint relation between the node and the parameter corresponding to the first target node is a first constraint relation, determines a node not reachable between the node as a second target node, specifically, the node not reachable between the node refers to a node not reachable and not reachable by the node, and after determining the second target node corresponding to the node, the electronic device may determine that the constraint relation between the node and the parameter corresponding to the second target node is a second constraint relation.

Specifically, in the embodiment of the present application, the electronic device may generate the reachable matrix corresponding to the received functional logic diagram, where the reachable matrix refers to the degree that can be reached after a certain length of path passes between the nodes of the directed graph is described in a matrix form, and in the embodiment of the present application, how to generate the reachable matrix corresponding to the directed graph is in the prior art and is not described herein again. The electronic device may determine, for each node in the functional logic diagram, a node reachable by the node and a second target node unreachable with the node according to the reachability matrix corresponding to the functional logic diagram. In the embodiment of the present application, the functional logic diagram may be d= { S, R }, where S is a set of nodes in the functional logic diagram D, R is a set of edges in the functional logic diagram D, and if any path exists from Si to Sj for the nodes Si and Sj belonging to S in the diagram D, si may be determined to reach Sj, that is, sj may be determined to be a reachable node of Si.

By the method provided by the embodiment of the application, the electronic equipment can determine the first target node and the second target node corresponding to each node and determine the constraint relation between the corresponding parameters, so that the problem that the constraint relation between certain parameters is omitted can be avoided.

S103: and generating a corresponding test case according to the first constraint relation and the second constraint relation among the determined parameters.

In the embodiment of the present application, after determining the first constraint relationship and the second constraint relationship between the parameters, the electronic device may generate the corresponding test case according to the determined first constraint relationship and second constraint relationship between the parameters, and specifically how the electronic device generates the corresponding test case according to the constraint relationship between the parameters is the prior art and will not be described herein.

In the embodiment of the application, after the electronic device generates the test case, the electronic device can output the generated test case, and specifically, the test case can be sent to the terminal for sending the functional logic diagram or the preset device for sending the functional logic diagram.

The electronic equipment utilizes the functional logic diagram to adaptively generate constraint relations among parameters, and further generates corresponding test cases on the basis of generating the test cases in the prior art. According to the test case generation method provided by the embodiment of the application, the functional logic diagram is introduced, so that the constraint relation among the parameters is widened, even if the implicit constraint relation exists among the parameters, the hidden constraint relation can be obtained through the functional logic diagram, and the applicable scene for generating the test case is enlarged. The constraint relation among the acquired parameters is acquired by the electronic equipment according to the functional logic diagram, not only according to manual experience, so that the process of generating the test case is visual and easy to review, and meanwhile, the efficiency and completeness of generating the test case are greatly improved.

In the embodiment of the application, the functional logic diagram drawn by the tester based on the test requirement can be displayed in a graphical mode, the application scene of the original test case generation is expanded, the constraint relation among the parameters is determined by adopting the functional logic diagram, the problem that the constraint relation among the parameters is easy to be omitted due to the hidden constraint relation among some parameters is solved, and the efficiency and coverage range of the test case generation are improved. In the embodiment of the application, in the test stage, modeling is performed based on the functional logic diagram of the tested scene, so that the visualization and completeness of the generated test case are improved, the process of manually analyzing the constraint relation among parameters is omitted by selecting and drawing the functional logic diagram, and the efficiency of generating the test case can be greatly improved.

In the embodiment of the application, for each node in the received functional logic diagram, the electronic equipment determines the adjacent and reachable first target node of the node, determines the constraint relation between the node and the parameter corresponding to the first target node as the first constraint relation, determines the unreachable second target node between the node and the parameter corresponding to the second target node as the second constraint relation, thereby improving the accuracy and coverage of the constraint relation determination between the parameters.

Example 2:

in order to accurately generate the first constraint relation between the parameters, in the embodiment of the present application, determining that the constraint relation between the parameters corresponding to the node and the first target node is the first constraint relation includes:

In the embodiment of the application, for each node in a functional logic diagram, the electronic device acquires a first target node adjacent to and reachable by the node, acquires each edge on an reachable path between the node and the first target node after acquiring the first target node adjacent to and reachable by the node, and acquires a first target parameter value recorded on an edge connected with the node in each edge. In the embodiment of the application, when a tester draws a functional logic diagram, if a first parameter is a first parameter value and a second parameter is determined in a corresponding application scene, the tester draws a node corresponding to the first parameter, the node is called a first node for convenience of distinction, the node is called a second node for convenience of distinction, and the tester connects the first node and the second node, wherein an edge connecting the first node and the second node is an edge of which the first node points to the second node and the first parameter value is recorded on the edge.

After the electronic device obtains the first target parameter value, determining that the constraint relation between the node and the parameter corresponding to the first target node is that the parameter corresponding to the node is not any value when the parameter corresponding to the node is the first target parameter value.

In the embodiment of the application, the nodes in the functional logic diagram comprise the judging nodes and the test data nodes, wherein the parameter values of the parameters corresponding to the judging nodes influence the subsequent branches of the functional logic diagram, the parameter values of the parameters corresponding to the test data nodes do not influence the subsequent branches of the functional logic diagram, but the parameters are important parameters, and the parameters are required to be covered in the test process, so that a tester can record the parameter values of the parameters corresponding to the judging nodes on the edge of the judging nodes connected with other nodes when drawing the functional logic diagram, and can record the parameter values of the parameters corresponding to the test data nodes on the edge of the test data nodes connected with other nodes or on the test data nodes. Wherein the desired result for a leaf node may be recorded on the corresponding node. In the embodiment of the application, the edges connected with the judging nodes exist, and the edges connected with the judging nodes possibly pass through the test data nodes.

In the embodiment of the present application, the electronic device specifically determines, for each determination node, a first target node and a second target node corresponding to the determination node, and determines a constraint relationship between corresponding parameters, for example, if there is a certain determination node Si in the functional logic diagram, if there is an edge pointing from the node Si to the node Sk, and the parameter value recorded on the edge is a, which indicates that when the parameter value of the parameter corresponding to the node Si is a, the parameter value of the parameter corresponding to the Sk does not have any influence on the logic flow of the software, and when the parameter value of the parameter corresponding to the generated constraint condition is a, the parameter value of the parameter corresponding to the Sk is not any value, and specifically "if si=a then Sk <" "does not pay attention to" means that the constraint relationship, where "if" means then "< >" means not equal.

In the embodiment of the application, a tester can select a proper test case generation method according to the characteristics of a corresponding tested scene, and can specifically select whether to generate the corresponding test case according to a functional logic diagram or to generate the corresponding test case according to a method for manually determining constraint relations among parameters in the prior art. When the tested scene has an explicit logic sequence and an implicit constraint relation is more, a method for generating a corresponding test case based on a functional logic diagram is generally selected.

In the embodiment of the application, the functional logic diagram specifically identifies the test object based on the test requirement by the tester, and knows that the service logic of the test object is drawn, wherein the functional logic diagram can be called a tree diagram, the root node of the tree diagram is the starting point of the test case, the leaf node is the final expected result of the current corresponding branch logic path, and the trend of the functional logic circulation is limited by the directed edge.

In order to accurately generate the first constraint relation between the parameters, in the embodiments of the present application, when the determining that the parameter corresponding to the first constraint relation is the first target parameter value, the parameter corresponding to the first target node is not any value, including:

In the embodiment of the application, the electronic device may acquire each edge connected to the first target node, and acquire a first candidate parameter value recorded in each edge of each edge and directed to each edge of other nodes, where each acquired first candidate parameter value is a parameter value possibly selected by a parameter corresponding to the first target node. That is to say, the electronic device obtains the parameter value of the parameter corresponding to the first target node. The parameter value of the parameter corresponding to the first target node being an arbitrary value means that the parameter value of the parameter corresponding to the first target node is an arbitrary value other than the obtained first candidate parameter values.

The electronic device may determine a first constraint relationship, that is, the constraint relationship between the node and the parameter corresponding to the first target node is that, when the parameter corresponding to the node is a first target parameter value, the parameter corresponding to the first target node is any one of the obtained candidate parameter values.

In the embodiment of the present application, if the parameter value of the parameter corresponding to the first target node is recorded in the node, the electronic device may acquire the first candidate parameter value recorded in the first target node.

In order to accurately determine the second constraint relation between parameters corresponding to the nodes, on the basis of the above embodiments, in the embodiments of the present application, the method further includes:

In the embodiment of the present application, for each node in the functional logic diagram, after the electronic device obtains a first target node adjacent to and reachable by the node and a first target parameter value corresponding to the node, the electronic device may obtain parameter values recorded on each edge of other nodes in each edge connected with the node, determine a second target parameter value other than the first target parameter value in each obtained parameter value, where the parameter value of the parameter corresponding to the node does not affect the first target node when the parameter value of the parameter corresponding to the node is the second target parameter value, so that it may be determined that the constraint relationship corresponding to the node and the first target node is that the parameter value corresponding to the first target node is any value when the parameter value corresponding to the node is the second target parameter value.

Example 3:

in order to accurately determine the second constraint relation between the parameters corresponding to the node, in the embodiments of the present application, determining that the constraint relation between the node and the parameters corresponding to the second target node is the second constraint relation includes:

In the embodiment of the application, for each node in the functional logic diagram, the electronic device acquires a second target node which is not reachable between the nodes, after acquiring the second target node which is not reachable between the nodes, the electronic device determines that the parameters corresponding to the nodes and the parameters corresponding to the second target node cannot affect each other, so that the electronic device can correspondingly generate a reverse constraint, and can specifically determine that the constraint relation between the parameters corresponding to the nodes and the second target node, namely, the second constraint relation is that the parameters corresponding to the nodes are not any values, and the parameters corresponding to the second target node are any values.

For example, the node Si and the node Sj in the functional logic diagram are mutually unreachable, that is, the node Si and the node Sj have no path therebetween in the logic diagram, and the electronic device may determine that the constraint relationship between the parameters corresponding to the node Si and the node Sj is that, when the parameter corresponding to the node Si is not an arbitrary value, the parameter corresponding to the node Sj is an arbitrary value, and specifically may use "if Si < > 'not paying attention to' the n sj= 'not paying attention to' to indicate the constraint relationship.

For example, if the node Si and the node Sj and the node Sk in the functional logic diagram are not reachable, it may be determined that the constraint relation between the parameters corresponding to the node Si and the node Sj is that the parameter corresponding to the node Si is not an arbitrary value, and if the constraint relation between the parameters corresponding to the node Si and the node Sk is that the parameter corresponding to the node Si is not an arbitrary value, the constraint relation may be represented by "if Si < > 'not paying attention to' the n sj= 'not paying attention to' and sk= 'not paying attention to'.

It is worth to say that, in the prior art, constraint relations among parameters are mainly expressed through sentences such as "=, in, not in, if, then, and, < >", when the constraint relations are complex, due to the fact that the sentence expression modes are more, correctness of the constraint relations is not easy to review, and in the embodiment of the application, the constraint relations can be accurately expressed through the sentences such as "=, if, the fact, < >, and".

In the embodiment of the application, for each node in the functional logic diagram, after obtaining a second target node unreachable to the node, the electronic device may obtain a second candidate parameter value recorded on each edge of the node connection and pointing to other nodes, where the second candidate parameter value is an optional parameter value of a parameter corresponding to the node, and obtain a third candidate parameter value recorded on each edge of the second target node connection and pointing to other nodes, where the third candidate parameter value is an optional parameter value of a parameter corresponding to the second target node. The parameter value of the parameter corresponding to the node is an arbitrary value, which means that the parameter value corresponding to the node is an arbitrary value other than the obtained second candidate parameter values, and the parameter value corresponding to the second target node is an arbitrary value, which means that the parameter value corresponding to the second target node is an arbitrary value other than the obtained third candidate parameter values.

The electronic device may determine that the constraint relationship between the node and the second target node, that is, the second constraint relationship, is that when the parameter corresponding to the node is any one of the obtained second candidate parameter values, the parameter corresponding to the second target node is not any one of the third candidate parameter values.

For example, if the node Si and the node Sj in the functional logic diagram are mutually unreachable, and the second candidate parameter value a recorded on each edge of the other node is pointed to in each edge connected with the node Si, the electronic device may determine that the constraint relationship between the parameters corresponding to the node Si and the node Sj is that, when the parameter value of the parameter corresponding to the node Si is a, the parameter corresponding to the node Sj is an arbitrary value. Specifically, the constraint relationship may be expressed by "if si=a then sk= ' don't care '".

Fig. 2 is a schematic structural diagram of a functional logic diagram according to an embodiment of the present application.

For convenience of description, in the embodiment of the present application, a node corresponding to the parameter a is referred to as a node a, and nodes corresponding to other parameters are referred to as nodes according to this manner.

As can be seen from fig. 2, the node a is connected with the node C, the edge connected with the node a and the node C points to the node C for the node a, and the parameter value a2 is recorded on the edge connected with the node a and the node C; the node A is connected with the node B, the edge connected with the node A points to the node B, the parameter value a1 is recorded on the edge connected with the node A and the node B, the edge connected with the node A and the node B passes through the node M, the node M is a test data node, and the parameter values M1, M2 and M3 are recorded in the node M; the node C is connected with the node R4, the edge connected with the node R4 points to the node R4 for the node C, the parameter value C1 is recorded on the edge connected with the node C and the node R4, and the corresponding parameter value exp4 is recorded in the node R4; the node M is connected with the node B, and the edge connected with the node M and the node B points to the node C for the node A; the node B is connected with the node D, the edge connected with the node D is the node B pointing to the node D, the parameter value B1 is recorded on the edge connected with the node B, the edge connected with the node D passes through the node N ', the node N ' is a test data node, and the parameter values N1 and N3 are recorded in the node N '; the node B is connected with the node E, the node B points to the node E on the edge connected with the node E, the parameter value B2 is recorded on the edge connected with the node B, the node N is a test data node on the edge connected with the node E, and the parameter values N1 and N2 are recorded in the node N; the node D is connected with the node R1, the edge connected with the node D and the node R1 points to the node R1 for the node D, a parameter value D1 is recorded on the edge connected with the node D and the node R1, and a corresponding parameter value exp 1 is recorded in the node R1; the node E is connected with the node F, the edge connected with the node E and the node F points to the node F, and a parameter value E1 is recorded on the edge connected with the node E and the node F; the node E is connected with the node G, the edge connected with the node G is that the node E points to the node G, and the edge connected with the node E and the node G is recorded with a parameter value E2; the node F is connected with the node R2, the edge connected with the node R2 points to the node R2 for the node F, the parameter value F1 is recorded on the edge connected with the node F and the node R2, and the corresponding parameter value exp2 is recorded in the node R2; the node G is connected with the node R3, the edge connected with the node G and the node R3 points to the node R3 for the node G, the parameter value G1 is recorded on the edge connected with the node G and the node R3, and the corresponding parameter value exp3 is recorded in the node R3.

Taking the functional logic diagram as an example of fig. 2 for illustration, based on the functional logic diagram shown in fig. 2, the electronic device may obtain, specifically, according to the functional logic diagram, parameters and corresponding parameter values of all the parameters affecting the functional points in the measured scene, where the parameters affecting the functional points include parameters corresponding to a node A, B, C, D, E, F, G, M, N, N', the parameter values of the parameters corresponding to a node a are a1 or a2, the parameter values of the parameters corresponding to a node B are B1, B2 or not, where not focusing on any value other than B1 or B2, that is, any value described in the above embodiment, the parameter values of the parameters corresponding to a node C are C1 or not focusing on, the parameter values of the parameters corresponding to a node D are D1 or not focusing on, the parameter values of the parameters corresponding to a node E are E1 or not focusing on, the parameter values of the parameters corresponding to a node F are F1 or not focusing on, the parameter values of the parameters corresponding to a node G are G1 or not focusing on, the parameter values of the parameters corresponding to a node M2 are M1, M2 or not focusing on M3 or not focusing on, the parameter values corresponding to an exn 1 or not focusing on a node N2, the parameter values corresponding to an exn 2 or not focusing on a node p1 or not focusing on a parameter p2, and the parameter values corresponding to a parameter p1 or not focusing on a parameter p 2.

The electronic device may automatically generate constraint relationships between parameters according to the reachability between nodes in the functional logic diagram shown in fig. 2. Wherein, the liquid crystal display device comprises a liquid crystal display device, the constraint relation between the produced parameters is "if a= 'a1' then B < > 'not concerned with' and M < > 'not concerned with' and c= 'not concerned with' and r4= 'not concerned with'", "if a=" a2"then b= 'not concerned with' and M <" > 'not concerned with' and C < > 'not concerned with' and n= 'not concerned with' and N '=' not concerned with 'and D < ">' not concerned with 'and e=' not concerned with 'and f=' not concerned with 'and g=' not concerned with 'and r1=' not concerned with 'and r2=' not concerned with 'and r3=' not concerned with '", not concerned with' and n= 'not concerned with' and D < "> 'not concerned with' and d= '>' not concerned with 'and f=' > 'not concerned with' and r2= '. If c=" C1"then b=" don't care 'and m=' don't care' and R4< > "don't care' and n= 'don't care 'and N' = 'don't care 'and d=' don't care' and e= 'don't care 'and f=' don't care' g= 'don't care 'and R1=' don't care' and R2= 'don't care 'and R3=' don't care'". "if b= 'B1' then N '< >' not concerned with 'and D' < > 'not concerned with' and n= 'not concerned with' and e= 'not concerned with' and f= 'not concerned with' and g= 'not concerned with' and R2= 'not concerned with' and R3= 'not concerned with'", "if b= 'B2' then N '=' not concerned with 'and d=' not concerned with 'and D' < > 'not concerned with' and E < 'not concerned with' and E < '>' not concerned with 'and R1=' not concerned with '", not concerned with' and R2 = 'not concerned with' "if d= 'D1' then R1< 'not paying attention to'", "if e= 'E1' then F < 'not paying attention to' and g= 'not paying attention to' and r3= 'not paying attention to'", "if e= 'E2' then f= 'not paying attention to' and G < 'not paying attention to' and r2= 'not paying attention to'", "if f= 'F1' then R2< 'not paying attention to'", "if g= 'G1' then R3< 'not paying attention to'".

In the embodiment of the application, the electronic device can adaptively generate the constraint relation between the parameters according to the functional logic diagram, and according to the method described in the above embodiment, the electronic device can automatically convert the functional logic diagram input by the tester into the form of the parameters, the values and the constraints between the parameters.

It should be noted that, in the method for designing test cases in the prior art, the correlation between the analysis of the test requirement and the design of the test cases is weaker, which is not beneficial to tracking the test requirement and to adjusting and multiplexing the test cases when the test requirement is changed.

Example 4:

in order to accurately generate test cases, on the basis of the above embodiments, in an embodiment of the present application, the receiving functional logic diagram includes:

In the practical application scene, the quality requirements of the tested objects may be different, and the corresponding test security levels are also different, so that the number and the quality of the test cases generated by the corresponding requirements are also different, for example, related systems in the financial and aerospace fields generally require higher test security levels, and the security level of office systems is generally lower. Therefore, in the embodiment of the application, the electronic equipment can generate the corresponding test case according to the test guarantee level corresponding to the currently tested object.

Specifically, in the embodiment of the application, when the electronic device receives the functional logic diagram, the electronic device also receives the test security level corresponding to the current test scene, a specific tester can select the corresponding test security level and a path for storing the functional logic diagram on a preset page of the terminal or the preset device used by the tester, and click a preset button, the terminal or the preset device can acquire the test security level and the functional logic diagram, and send the acquired test security level and the functional logic diagram to the electronic device, and the electronic device can receive the test security level and the functional logic diagram. The corresponding relation between the test guarantee level and the test combination strength is pre-stored in the electronic equipment, and the electronic equipment can acquire the test combination strength stored for the test guarantee level. And adopting a test case generation algorithm to process the first constraint relation and the second constraint relation between the acquired test combination strength and parameters to generate corresponding test cases, and specifically, in the embodiment of the present application, how to process the constraint relation between the test combination strength and the parameters by using the test cases to generate the corresponding test cases is the prior art, and will not be repeated here. Corresponding treatment methods are described in the patent of the specific application No. 2017109363305.

In the embodiment of the application, the number of the corresponding generated test cases is different according to the different test combination intensities, and when the test combination intensity is higher, the number of the corresponding generated test cases is more, and the coverage area is wider. In the embodiment of the present application, the combination strength of 2 represents that, for all parameters involved in the functional logic diagram, a cartesian product combination coverage is performed at least once between any two parameters. And 3, combining intensity, wherein the Cartesian product combination coverage is carried out at least once among any three parameters for all parameters involved in the functional logic diagram.

In the embodiment of the application, the electronic equipment can generate the constraint relation among the parameters according to the functional logic diagram, namely, the relation corresponding to the parameters, the values and the constraints can be generated, and the test cases can be automatically generated based on the constraint relation among the parameters and the test case coverage level selected by the user, so that the test cases can be generated according to different test guarantee levels, and the automatic generation of the cases under the requirements of different test levels of the same service is realized.

The test case generation method provided by the embodiment of the application can automatically generate constraint conditions among parameters based on the test requirement analysis result in the test design stage, intelligently generate the test case according to the test coverage level, greatly improve the relevance between the test requirement analysis and the test design, and realize the hierarchical adaptation of the test case.

FIG. 3 is a schematic diagram of a detailed process for generating test cases according to an embodiment of the present application, where the process includes the following steps:

s301: receiving a functional logic diagram and a test guarantee level corresponding to a current test scene;

s302: and for each node in the functional logic diagram, determining the adjacent and reachable node of the node as a first target node, determining the constraint relation between the node and the parameters corresponding to the first target node as a first constraint relation, determining the unreachable node between the node as a second target node, and determining the constraint relation between the node and the parameters corresponding to the second target node as a second constraint relation.

S303: and acquiring the test combination strength stored for the received test security level.

S304: and processing the first constraint relation and the second constraint relation between the test combination strength and the determined parameters by adopting a test case generation algorithm to generate a corresponding test case.

S305: and outputting the generated test case.

FIG. 4 is a schematic diagram of a generated test case according to an embodiment of the present application.

FIG. 4 is a functional logic diagram of FIG. 2, and when the combined strength of the test is 1, 5 test cases can be generated when the combined strength of the test is 1, corresponding parameters are recorded in the first row in FIG. 4, each column in FIG. 4 refers to parameter values of the same parameter in different test cases, the second row to the sixth row in FIG. 4 are respectively generated different test cases, and the non-attention in FIG. 4 refers to any value described in the embodiment of the present application, and as can be seen from FIG. 4, the 5 test cases are respectively "a1, b2, non-attention, e2, non-attention, g1, m3, non-attention, n2, non-attention, exp3, non-attention"; "a1, b1, not paying attention to, d1, not paying attention to, m1, n1, not paying attention to, exp1, not paying attention to"; "a2, not paying attention, c1, not paying attention not paying attention, exp4"; "a1, b1, not paying attention to, d1, not paying attention to, m2, n3, not paying attention to, exp1, not paying attention to"; "a1, b2, not paying attention, e1, f1, not paying attention, m2, not paying attention, n1, not paying attention, exp2, not paying attention".

Example 5:

fig. 5 is a schematic structural diagram of a test case generating device according to an embodiment of the present application, where the device includes:

a receiving module 501, configured to receive a functional logic diagram, where corresponding parameters are recorded in nodes in the functional logic diagram;

the processing module 502 is configured to determine, for each node in the functional logic diagram, a node that is adjacent to and reachable by the node as a first target node, and determine a constraint relationship between parameters corresponding to the node and the first target node as a first constraint relationship, determine a node that is not reachable between the node as a second target node, and determine a constraint relationship between parameters corresponding to the node and the second target node as a second constraint relationship;

the generating module 503 is configured to generate a corresponding test case according to the first constraint relationship and the second constraint relationship between the determined parameters.

Further, the processing module 502 is specifically configured to obtain each edge on the reachable path between the node and the first target node, and obtain a first target parameter value recorded on an edge connected to the node in each edge; and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is not any value.

Further, the processing module 502 is specifically configured to obtain, in each edge connected to the first target node, a first candidate parameter value recorded on each edge pointing to another node; and when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is any one of the obtained first candidate parameter values.

Further, the processing module 502 is further configured to obtain, from each edge connected to the node, a parameter value recorded on each edge pointing to another node, and determine a second target parameter value other than the first target parameter value in each obtained parameter value; and when the first constraint relation is determined that the parameter value corresponding to the node is the second target parameter value, the parameter value corresponding to the first target node is any value.

Further, the processing module 502 is specifically configured to determine that, when the second constraint relationship is that the parameter corresponding to the node is not an arbitrary value, the parameter corresponding to the second target node is an arbitrary value.

Further, the processing module 502 is specifically configured to obtain, in each edge connected to the node, a second candidate parameter value recorded on each edge pointing to the other node; obtaining third candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the second target node; the second candidate parameter value is an optional parameter value of the parameter corresponding to the node, and the third candidate parameter value is an optional parameter value of the parameter corresponding to the second target node; and when the second constraint relation is that the parameter corresponding to the node is any one of the acquired second candidate parameter values, the parameter value corresponding to the second target node is not any one of the third candidate parameter values.

Further, the receiving module 501 is specifically configured to receive a functional logic diagram and a test security level corresponding to a current test scenario;

the generating module 503 is specifically configured to obtain a test combination strength stored for the test security level; and processing the first constraint relation and the second constraint relation between the test combination strength and the determined parameters by adopting a test case generation algorithm to generate a corresponding test case.

Example 6:

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application, and on the basis of the foregoing embodiments, the embodiment of the present application further provides an electronic device, as shown in fig. 6, including: processor 601, communication interface 602, memory 603 and communication bus 604, wherein processor 601, communication interface 602, memory 603 complete the communication each other through communication bus 604;

the memory 603 has stored therein a computer program which, when executed by the processor 601, causes the processor 601 to perform the steps of:

Further, the processor 601 is specifically configured to obtain each edge on the reachable path of the node and the first target node, and obtain a first target parameter value recorded on an edge connected to the node in each edge;

Further, the processor 601 is specifically configured to obtain, from each edge connected to the first target node, a first candidate parameter value recorded on each edge pointing to another node;

Further, the processor 601 is further configured to obtain, from each edge connected to the node, a parameter value recorded on each edge pointing to another node, and determine a second target parameter value other than the first target parameter value in each obtained parameter value;

Further, the processor 601 is specifically configured to determine that, when the second constraint relationship is that the parameter corresponding to the node is not an arbitrary value, the parameter corresponding to the second target node is an arbitrary value.

Further, the processor 601 is specifically configured to obtain, from each edge to which the node is connected, a second candidate parameter value recorded on each edge pointing to another node; obtaining third candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the second target node; the second candidate parameter value is an optional parameter value of the parameter corresponding to the node, and the third candidate parameter value is an optional parameter value of the parameter corresponding to the second target node;

Further, the processor 601 is specifically configured to receive a functional logic diagram and a test security level corresponding to a current test scenario;

The method is particularly used for acquiring the test combination strength stored for the test guarantee level; and processing the first constraint relation and the second constraint relation between the test combination strength and the determined parameters by adopting a test case generation algorithm to generate a corresponding test case.

The communication bus mentioned by the server may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc. The communication bus may be classified as an address bus, a data bus, a control bus, or the like. For ease of illustration, the figures are shown with only one bold line, but not with only one bus or one type of bus.

The communication interface is used for communication between the electronic device and other devices.

The Memory may include random access Memory (Random Access Memory, RAM) or may include Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor.

The processor may be a general-purpose processor, including a central processing unit, a network processor (Network Processor, NP), etc.; but also digital instruction processors (Digital Signal Processing, DSP), application specific integrated circuits, field programmable gate arrays or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

Example 7:

on the basis of the above embodiments, the embodiments of the present application further provide a computer readable storage medium having stored therein a computer program executable by an electronic device, which when run on the electronic device, causes the electronic device to perform the steps of:

the memory has stored therein a computer program which, when executed by the processor, causes the processor to perform the steps of:

In one possible implementation manner, the determining that the constraint relation between the parameters corresponding to the node and the first target node is a first constraint relation includes:

In one possible implementation manner, when the determining that the parameter corresponding to the first constraint relation is the first target parameter value, the parameter corresponding to the first target node is not any value includes:

In one possible embodiment, the method further comprises:

In one possible implementation manner, the determining that the constraint relation between the parameters corresponding to the node and the second target node is a second constraint relation includes:

In one possible implementation, the receiving functional logic diagram includes:

It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. A method for generating test cases, the method comprising:

Generating a corresponding test case according to the first constraint relation and the second constraint relation among the determined parameters;

the determining that the constraint relation between the node and the parameter corresponding to the first target node is a first constraint relation includes:

when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is not an arbitrary value;

the determining that the constraint relation between the node and the parameter corresponding to the second target node is a second constraint relation includes:

2. The method of claim 1, wherein when the determining that the parameter corresponding to the first constraint relation is the first target parameter value, the parameter corresponding to the first target node is not an arbitrary value comprises:

3. The method according to claim 1 or 2, characterized in that the method further comprises:

4. The method of claim 1, wherein determining that the constraint relationship between the node and the parameter corresponding to the second target node is a second constraint relationship comprises:

5. The method of claim 1, wherein the receiving a functional logic diagram comprises:

6. A test case generating device, the device comprising:

the generation module is used for generating a corresponding test case according to the first constraint relation and the second constraint relation among the determined parameters;

the processing module is specifically configured to obtain each edge on the reachable path between the node and the first target node, and obtain a first target parameter value recorded on an edge connected to the node in each edge; when the first constraint relation is that the parameter corresponding to the node is the first target parameter value, the parameter corresponding to the first target node is not an arbitrary value;

the processing module is specifically configured to obtain, from each edge connected to the node, a second candidate parameter value recorded on each edge pointing to another node; obtaining third candidate parameter values recorded on each edge pointing to other nodes in each edge connected with the second target node; the second candidate parameter value is an optional parameter value of the parameter corresponding to the node, and the third candidate parameter value is an optional parameter value of the parameter corresponding to the second target node; and when the second constraint relation is that the parameter corresponding to the node is any one of the acquired second candidate parameter values, the parameter value corresponding to the second target node is not any one of the third candidate parameter values.

7. An electronic device comprising a processor for implementing the steps of the test case generating method according to any of claims 1-5 when executing a computer program stored in a memory.

8. A computer-readable storage medium, characterized in that it stores a computer program which, when executed by a processor, implements the steps of the test case generating method according to any of claims 1-5.