CN115756997A - Method for improving data transmission rate of SoC or ASIC hybrid verification - Google Patents
Method for improving data transmission rate of SoC or ASIC hybrid verification Download PDFInfo
- Publication number
- CN115756997A CN115756997A CN202211652498.0A CN202211652498A CN115756997A CN 115756997 A CN115756997 A CN 115756997A CN 202211652498 A CN202211652498 A CN 202211652498A CN 115756997 A CN115756997 A CN 115756997A
- Authority
- CN
- China
- Prior art keywords
- rpc
- client
- simulator
- soc
- qemu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000012795 verification Methods 0.000 title claims abstract description 33
- 230000005540 biological transmission Effects 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 title claims abstract description 19
- 230000006399 behavior Effects 0.000 claims description 11
- 238000012546 transfer Methods 0.000 claims description 4
- 238000000275 quality assurance Methods 0.000 claims description 3
- 238000004891 communication Methods 0.000 description 4
- 238000004088 simulation Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The invention relates to the technical field of integrated circuit verification, in particular to a method for improving data transmission rate of SoC or ASIC hybrid verification, which comprises a Qemu simulator and a simulator, wherein the Qemu simulator comprises a Qemu interface, a Qemu interface and a Qemu interface; the Qemu simulator is used for simulating an embedded SoC hardware platform to provide an operating environment for the client; the client provides the hybrid authentication service for the user; the method comprises the steps that virtual equipment simulates the virtual equipment by using a QAPI application programming interface provided by a Qemu simulator, and an OPS (operation platform server) of the virtual equipment registers a first RPC client and a first RPC server based on a protobuf-c-RPC framework; the simulator runs on a host, and the host registers a second RPC client and a second RPC server based on a protobuf-c-RPC framework; the I/O behavior of the virtual equipment is interacted with a second RPC server through a first RPC client; the active behavior of the simulator is informed to the first RPC server side by the second RPC client side, and the protobuf-c-RPC framework is an RPC framework based on a protobuf language and a protobuf-c language. The invention has high verification efficiency, strong expandability, strong transportability and high compatibility.
Description
Technical Field
The invention relates to the technical field of integrated circuit verification, in particular to a method for improving data transmission rate of SoC or ASIC hybrid verification.
Background
With the continuous development of integrated circuit technology, soC and ASIC are increasingly applied to various fields. Based on the complexity of the SoC and the ASIC, the verification of the SoC and the ASIC is also necessary. In the SoC, ASIC verification strategy, besides the traditional verification strategy, a hybrid verification scheme has also been proposed and implemented. The main realization method of the mixed verification is as follows: the SoC and the ASIC are verified by an analog processor and a hardware simulator, and the mainstream scheme at present is that qemu (analog processor written by fabry bera and distributing source codes by GPL license) is verified by combining the simulator, specifically: verifying the embedded software through a qemu virtual target class CPU; the hardware design of RTL-based (RTL: register Transfer Level) was verified by the simulator. However, this solution has the following problems:
in the hybrid verification, communication between qemu and emulator needs to transmit commands and data according to a certain sequence and structure; if the protocol is defined by itself, the generality is poor, so an RPC (Remote Procedure Call) framework is generally used for communication, but qemu and emulator do not have the RPC framework themselves, and most RPC frameworks have the following disadvantages:
1. the communication efficiency is poor, and the data transmission rate is slow;
2. the programming language is not supported enough, because qemu uses C language writing, in order to improve efficiency and speed, the RPC framework is required to support the C language, but most of the existing RPC frameworks do not support.
Disclosure of Invention
Aiming at the problems in the prior art, the invention aims to provide a method for improving the transmission rate of SoC/ASIC hybrid verification data, which can improve the data transmission rate between qemu and emulator to the full-speed state of a physical interface for transmitting data under the condition of only paying attention to the data transmission rate and not paying attention to data generation and application, thereby solving the problems of poor communication efficiency and slow data transmission.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a method for improving data transmission rate of SoC or ASIC mixed verification comprises a Qemu simulator and a simulator;
the Qemu simulator is used for simulating an embedded SoC hardware platform to provide an operating environment for a client and providing a QAPI application programming interface for virtual equipment; the client uses an embedded SoC hardware platform simulated by a Qemu simulator, a system is operated on the embedded SoC hardware platform, and a hybrid verification service is provided for a user through the operated system; simulating the virtual equipment by using a QAPI (quality assurance and privacy infrastructure) application programming interface provided by a Qemu simulator by the virtual equipment, wherein an OPS (operation control server) of the virtual equipment registers a first RPC client and a first RPC server based on a protobuf-c-RPC framework;
the simulator runs on a host, and the host registers a second RPC client and a second RPC server based on a protobuf-c-RPC framework;
the first RPC client, the first RPC server, the second RPC client and the second RPC server are used for receiving and sending data, and the I/O behavior of the virtual equipment is interacted with the second RPC server through the first RPC client; the active behavior of the simulator is informed to the first RPC server by the second RPC client;
the protobuf-C-RPC framework is an RPC framework based on a protobuf language and a protobuf-C language, and the protobuf-C language is a C language version of protobuf.
Further, the Qemu simulator simulates an embedded SoC hardware platform based on a memory to provide an operating environment for the client.
Specifically, the Qemu simulator is in system mode.
Further, the client provides the hybrid authentication service for the user at least comprises programming and running scenes of an embedded application program and a kernel driver for the user.
Further, the operating environment of Qemu is a windows system, a linux system or a unix system.
Further, the embedded SoC hardware platform provides one or more of a vexpress-a9 ARM single board, a RSIC-V single board and an MIPS single board.
Furthermore, the first RPC client, the first RPC server, the second RPC client and the second RPC server receive and send data based on the socket.
Furthermore, a TCP long connection mode is adopted when the socket sockets are connected.
From the above description, it can be seen that the present invention has the following advantages:
1. supporting a virtualized experimental environment;
2. supporting various architecture embedded SoC hardware platforms;
3. supporting data transmission of various types of simulation equipment;
4. the data transmission of various interrupt, abnormal and dislocation behaviors of the simulator is supported, and the data transmission of the behaviors of SoC platform registers, DDR and other devices is supported;
5. the implementation is convenient, the expandability is strong, and the transportability is strong;
6. supports a plurality of platforms such as windows, linux, unix and the like, and has good compatibility;
7. the verification efficiency of the SoC or the ASIC is obviously improved.
Drawings
FIG. 1 is a schematic diagram of the architecture of the present invention.
Detailed Description
With reference to fig. 1, a specific embodiment of the present invention is described in detail, but the present invention is not limited in any way by the claims.
As shown in fig. 1, a method for improving data transmission rate of SoC or ASIC hybrid verification includes a Qemu simulator and an emulator, and the specific architecture scheme is as follows;
on the Qemu simulator side:
the Qemu simulator is set or selected to be in a system mode sys mode, provides an operating environment for Guest OS based on a memory simulation embedded SoC hardware platform, provides a QAPI application programming interface for Virtual device visual device, the operating environment of the Qemu simulator can be a windows system, a linux system or a Unix system, and the embedded SoC hardware platform provides a single board with various architectures such as vexpress-a9 ARM, RSIC-V, MIPS and the like.
The Guest OS of the client uses an embedded SoC hardware platform simulated by a Qemu simulator, a system is operated on the embedded SoC hardware platform, and a mixed verification service is provided for a user through the operated system, wherein the mixed verification service comprises programming and operation scenes of an embedded application program and a kernel driver program which are provided for the user.
The Virtual device simulates the Virtual device by using a QAPI (quality assurance infrastructure) application programming interface provided by a Qemu simulator, and the OPS (i.e. operations, including common I/0 behaviors such as read, write and access) of the Virtual device registers a first RPC Client (RPC Client 1) and a first RPC Server (RPC Server 1) based on an RPC framework.
At the emulator end:
the emulator is run on the Host for the hybrid verification, and the Host registers a second RPC Client (RPC Client 2) and a second RPC Server (RPC Server 2) based on the RPC framework.
When in work:
the first RPC client, the first RPC server, the second RPC client and the second RPC server receive and send data based on socket sockets, and a long connection mode of TCP is adopted during socket connection.
And the I/O behavior of the Virtual device interacts with a second RPC server through the first RPC client.
And the second RPC client informs the first RPC server of active behaviors of the simulator, such as interruption, exception, error and the like.
The RPC framework mentioned above is a protobuf-C-RPC framework which is based on the RPC framework of the protobuf language and the protobuf-C language, wherein the protobuf-C language is the C language version of protobuf.
According to the invention, the interaction between the Qemu simulator and the simulator is carried out based on the protobuf-C-rpc framework, and the C language version of protobuf is used, so that the data transmission rate can be improved compared with other language versions; compared with the short connection mode, the long connection mode of the TCP is adopted during socket connection, so that the problem of low speed caused by frequent connection is solved, the data transmission speed is further improved, the data transmission speed of hybrid verification is obviously improved on the whole, and the verification efficiency is improved.
The embedded SoC hardware platform simultaneously provides boards with various architectures such as a vexpress-a9 ARM board, an RSIC-V board, an MIPS board and the like, so that a customer can conveniently select the board, the convenience of verification is improved, and the verification efficiency is further improved.
In the implementation of the present invention, the Qemu simulator can run on the host computer (local PC) where the simulator emulator is located, and can also run on the remote host computer (remote PC), supporting both local and remote modes.
From the above description, it can be seen that the present invention has the following advantages:
1. supporting a virtualized experimental environment;
2. supporting various architecture embedded SoC hardware platforms;
3. supporting data transmission of various types of simulation equipment;
4. the data transmission of various interrupt, abnormal and dislocation behaviors of the simulator and the like is supported, and the data transmission of the behaviors of various registers of the SoC platform, DDR and other devices is supported;
5. the implementation is convenient, the expandability is strong, and the transportability is strong;
6. supports a plurality of platforms such as windows, linux, unix and the like, and has good compatibility;
7. the verification efficiency of the SoC or the ASIC is obviously improved.
It should be understood that the detailed description of the invention is merely illustrative of the invention and is not intended to limit the invention to the specific embodiments described. It will be appreciated by those skilled in the art that the present invention may be modified or substituted equally as well to achieve the same technical result; as long as the use requirements are met, the method is within the protection scope of the invention.
Claims (8)
1. A method for improving data transmission rate of SoC or ASIC mixed verification is characterized in that: the device comprises a Qemu simulator and a simulator;
the Qemu simulator is used for simulating an embedded SoC hardware platform to provide a running environment for a client and providing a QAPI application programming interface for virtual equipment; the client uses an embedded SoC hardware platform simulated by a Qemu simulator, a system is operated on the embedded SoC hardware platform, and a mixed verification service is provided for a user through the operated system; simulating the virtual equipment by using a QAPI (quality assurance and privacy infrastructure) application programming interface provided by a Qemu simulator by the virtual equipment, wherein an OPS (operation control server) of the virtual equipment registers a first RPC client and a first RPC server based on a protobuf-c-RPC framework;
the simulator runs on a host, and the host registers a second RPC client and a second RPC server based on a protobuf-c-RPC framework;
the first RPC client, the first RPC server, the second RPC client and the second RPC server are used for receiving and sending data, and the I/O behavior of the virtual equipment is interacted with the second RPC server through the first RPC client; the active behavior of the simulator is informed to the first RPC server by the second RPC client;
the protobuf-C-RPC framework is an RPC framework based on a protobuf language and a protobuf-C language, and the protobuf-C language is a C language version of protobuf.
2. The method for increasing data transfer rate of SoC or ASIC hybrid authentication according to claim 1, wherein: the Qemu simulator simulates an embedded SoC hardware platform based on the memory to provide a running environment for the client.
3. The method for increasing data transmission rate of hybrid verification of SoC or ASIC according to claim 1, wherein: the Qemu simulator is in system mode.
4. The method for increasing data transmission rate of hybrid verification of SoC or ASIC according to claim 1, wherein: the client provides the hybrid verification service for the user at least comprises programming and running scenes of an embedded application program and a kernel driver program for the user.
5. The method for increasing data transmission rate of hybrid verification of SoC or ASIC according to claim 1, wherein: the operating environment of Qemu is a windows system, a linux system or an unix system.
6. The method for increasing data transfer rate of SoC or ASIC hybrid authentication according to claim 1, wherein: the embedded SoC hardware platform provides one or more of a vexpress-a9 ARM single board, a RSIC-V single board and an MIPS single board.
7. The method for increasing data transfer rate of SoC or ASIC hybrid authentication according to claim 1, wherein: the first RPC client, the first RPC server, the second RPC client and the second RPC server receive and send data based on socket sockets.
8. The method for increasing data transmission rate of hybrid verification of SoC or ASIC according to claim 7, wherein: and the socket sockets are connected in a TCP long connection mode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211652498.0A CN115756997A (en) | 2022-12-22 | 2022-12-22 | Method for improving data transmission rate of SoC or ASIC hybrid verification |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211652498.0A CN115756997A (en) | 2022-12-22 | 2022-12-22 | Method for improving data transmission rate of SoC or ASIC hybrid verification |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115756997A true CN115756997A (en) | 2023-03-07 |
Family
ID=85347108
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202211652498.0A Withdrawn CN115756997A (en) | 2022-12-22 | 2022-12-22 | Method for improving data transmission rate of SoC or ASIC hybrid verification |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN115756997A (en) |
-
2022
- 2022-12-22 CN CN202211652498.0A patent/CN115756997A/en not_active Withdrawn
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Talebi et al. | Charm: Facilitating dynamic analysis of device drivers of mobile systems | |
US8830228B2 (en) | Techniques for enabling remote management of servers configured with graphics processors | |
US9292412B2 (en) | Enabling remote debugging of virtual machines running in a cloud environment | |
US20070174033A1 (en) | Remote control device and method for accessing peripheral device remotely | |
US20080077711A1 (en) | System ROM with an embedded disk image | |
KR19990044828A (en) | Dual Instruction Set Architecture | |
US7472052B2 (en) | Method, apparatus and computer program product for simulating a storage configuration for a computer system | |
CN113657069B (en) | SOC simulation verification method and device, verification server and storage medium | |
US7334120B2 (en) | Firmware emulation environment for developing, debugging, and testing firmware components including option ROMs | |
CN111459606A (en) | Method for quickly creating virtual machine under virtualization and server | |
CN110968392A (en) | Method and device for upgrading virtualization simulator | |
CN113868174B (en) | Verification platform building method and device and storage medium | |
CN113282439B (en) | eMMC test method and device, readable storage medium and electronic equipment | |
CN114519316A (en) | SoC hybrid verification method | |
WO2014000299A1 (en) | Serial port redirection processing method, device, and system | |
CN115756997A (en) | Method for improving data transmission rate of SoC or ASIC hybrid verification | |
CN116112412A (en) | Virtual network card binding redundancy function test method, system, device and medium | |
CN115623058B (en) | Remote control method, device, equipment and storage medium | |
JP2001318805A (en) | Test method for built-in system and test system | |
JPH1083318A (en) | Electronic circuit analyzing device | |
CN117370093B (en) | Chip debugging method, device, equipment and storage medium | |
CN112052132B (en) | Method, device, equipment and medium for debugging plug-in chip through SDIO interface | |
KR101412576B1 (en) | Virtual board platform, SOC simulating device, method of simulating SOC and method of verifying SOC | |
US20240176632A1 (en) | Method for generating and verifying automotive embedded software based on autosar | |
US20230205671A1 (en) | Multipath diagnostics for kernel crash analysis via smart network interface controller |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WW01 | Invention patent application withdrawn after publication |
Application publication date: 20230307 |
|
WW01 | Invention patent application withdrawn after publication |