CN115733778A - Universal serial port testing method, system and device - Google Patents

Universal serial port testing method, system and device Download PDF

Info

Publication number
CN115733778A
CN115733778A CN202211090535.3A CN202211090535A CN115733778A CN 115733778 A CN115733778 A CN 115733778A CN 202211090535 A CN202211090535 A CN 202211090535A CN 115733778 A CN115733778 A CN 115733778A
Authority
CN
China
Prior art keywords
test
serial port
data
sending
file
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211090535.3A
Other languages
Chinese (zh)
Inventor
毛磊明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Leitai Electronic Technology Co ltd
Original Assignee
Suzhou Leitai Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Leitai Electronic Technology Co ltd filed Critical Suzhou Leitai Electronic Technology Co ltd
Priority to CN202211090535.3A priority Critical patent/CN115733778A/en
Publication of CN115733778A publication Critical patent/CN115733778A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

The invention provides a universal serial port testing method, which comprises the following steps: connecting a test host to a control mainboard to be tested, and determining communication options; compiling a test flow and compiling a check rule; saving the written test file; opening and calling the test file; determining the number of test cycles; and starting the test, sending test contents, automatically judging whether the received contents are correct or not according to preset judgment conditions, and stopping the test until the test verification times are not less than the test cycle times determined in the step S5. When the test device is used, the control mainboard to be tested is connected to the test host, so that the automation completion of the serial port test can be realized, a test device does not need to be additionally manufactured, and the hardware cost and the labor cost are reduced.

Description

Universal serial port testing method, system and device
Technical Field
The invention relates to the technical field of serial interface testing, in particular to a universal serial port testing method, a universal serial port testing system and a universal serial port testing device.
Background
The serial port is used for data communication, which is a necessary requirement of industrial control industry, the current industrial computer generally has a plurality of serial ports, the serial ports are divided into three modes of RS232, RS422 and RS485, and industrial computer manufacturers must perform strict tests to ensure that the serial ports of the computer can be normally used.
There are three main ways currently on the market:
1. the method is purely manual, and in the production test process of the circuit board, whether the welding of the serial port on the mainboard is normal needs to be manually detected; the mode increases the number of times of serial port tests, consumes more and more time, increases the labor cost and has low working efficiency;
2. hardware, a circuit board is placed at a test position by using a special serial port data test device, and if the test is passed, the device feeds back a light; the method needs to additionally manufacture a testing device, so that the cost is relatively high;
3. software testing, wherein a testing command is sent manually, and the checking assistant judges whether the returned receiving command is correct or not; the mode still relies on certain manual work, and efficiency is slightly improved than pure manual work, but still has efficiency improvement space.
Therefore, a method for completing the full-automatic serial port test by using software is needed.
Disclosure of Invention
In view of the above disadvantages of the prior art, an object of the present invention is to provide a method, a system, and a device for testing a universal serial port, which are used to solve the problems of low manual testing efficiency and high hardware testing cost in the prior art.
In order to achieve the above objects and other related objects, the present invention provides a universal serial port testing method, comprising the following steps:
step S1, connecting a test host to a control mainboard to be tested, and determining communication options;
s2, compiling a test flow and compiling a check rule;
s3, storing the test file, and storing the test file compiled in the S2;
s4, opening and calling the test file;
s5, determining the number of test cycles;
and S6, starting testing, sending test contents, automatically judging whether the received contents are correct according to preset judgment conditions, repeating the testing until the testing verification times are not less than the testing cycle times determined in the S5, and stopping the testing.
By adopting the technical scheme, the stability, the repeatability and the reproducibility of the communication can be tested by increasing the test cycle times in the step S5; the control mainboard to be tested is connected to the computer, so that the automation completion of the serial port test can be realized, a test device does not need to be additionally manufactured, and the hardware cost and the labor cost are reduced.
In an embodiment of the present invention, the step S1 includes:
step S11, serial port communication parameters are set, before serial port connection, serial port numbers, baud rates, check bits, data bits and stop bits of the serial ports are selected, and the serial port areas are controlled to be opened and closed;
s12, setting a sending communication option, controlling and setting a sending area in the serial port transmission area, adjusting the data of the sending area in the serial port transmission to be hexadecimal, controlling the sending data to be automatically sent, and selecting a corresponding automatic sending period;
and S13, receiving the communication option setting, controlling and setting a receiving area in the serial port transmission area, and determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal.
In an embodiment of the present invention, in the step S11, the baud rate is adjusted to 9600bit/S, the check bit is NONE, that is, no check is performed, the data bit is 8, the stop bit is 1, and the serial port is opened.
In an embodiment of the invention, the step S2 includes:
step S21, determining corresponding items to be verified;
step S22, determining the delay time before execution;
step S23, compiling sending data of a question-answer communication mode;
step S24, determining a starting point and an end point of a check position and a starting and stopping position of the check position;
and step S25, writing the corresponding judgment condition of the received data by matching the check bit start/stop bit determined in the step S24.
By adopting the technical scheme, the test file is stored for subsequent calling after being preset, the test file does not need to be independently compiled for each test, and the working efficiency of serial port testing is improved.
In an embodiment of the invention, in the step S2, the delay time before execution is set to be greater than or equal to 1000ms.
By adopting the technical scheme, because serial port communication comprises full duplex and half duplex, the sequence and the stability of data can be ensured by executing time delay.
In an embodiment of the present invention, in the step S6, the content of the test data is sent, and whether each check bit satisfies the determination condition corresponding to each check bit in the step S2 is determined according to the received data content, if yes, the received data of the check bit is recorded, and if not, the next check bit is determined until there is no next received data, and the single test execution is ended.
The invention also provides a universal serial port test system, which comprises:
the universal connecting unit is used for connecting the control mainboard to be tested and determining communication options;
a test file writing unit comprising: the test file compiling module is used for compiling a test flow and a test rule, the test file storage module is used for storing a compiled test file, and the test file calling interface is used for providing a test file calling function;
the full-automatic testing unit is used for calling the universal connecting unit to connect the control mainboard to be tested and importing communication options, calling the test file which is written in the test file writing unit to automatically test, automatically sending test contents, judging whether the received contents are correct, and repeating the test until the test verification times are not less than the preset test cycle times; the full-automatic test unit comprises: the test file compiling unit comprises a test file dispatching module, an automatic test module and a test result confirming module, wherein the test file dispatching module is connected with the test file dispatching interface and used for dispatching the compiled test files in the test file compiling unit, the automatic test module is used for determining the test cycle times and executing the cycle test, and the test result confirming module is used for judging the received data.
The universal connection unit includes:
the communication serial port setting module is used for selecting a serial port number, a baud rate, a check bit, a data bit and a stop bit of the serial port and controlling the opening and closing of the serial port area before the serial port is connected;
the transmission control module is used for controlling and setting a transmission area in the serial port transmission area, adjusting the data of the transmission area in the serial port transmission to be hexadecimal, controlling the transmission data to be automatically transmitted and selecting a corresponding automatic transmission period;
and the receiving control module is used for controlling and setting a receiving area in the serial port transmission area, determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal, and automatically clearing the receiving area when the receiving data exceeds a set threshold value.
The invention also provides a computer device, which comprises a memory and a processor, wherein the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, enable the processor to execute the steps of the universal serial port testing method in the technical scheme.
As described above, the method, system and device for testing a universal serial port of the present invention have the following advantages:
1. the control mainboard to be tested can be connected to a computer, so that the automation completion of the serial port test can be realized, a test device does not need to be additionally manufactured, and the hardware cost and the labor cost are reduced;
2. the test file is stored for subsequent calling after being preset, the test file does not need to be independently compiled for each test, and the working efficiency of serial port testing is improved;
3. because serial port communication comprises full duplex and half duplex, the sequence and the stability of data can be ensured by executing time delay;
4. and in the automatic test process, the test is repeated and cycled for many times, so that the stability, repeatability and reproducibility of communication can be tested.
Drawings
Fig. 1 is a flowchart illustrating a universal serial port testing method according to an embodiment of the present invention.
Fig. 2 shows a test logic diagram of a universal serial port test method disclosed in the first embodiment of the present invention.
Fig. 3 is a test logic diagram of a universal serial port testing method disclosed in the second embodiment of the present invention.
Fig. 4 is a structural diagram of a universal serial port test system disclosed in the fourth embodiment of the present invention.
Fig. 5 shows a structure diagram of a universal serial port test system disclosed in the fifth embodiment of the present invention.
Fig. 6 shows a structure diagram of a universal serial port test system disclosed in the sixth embodiment of the present invention.
FIG. 7 is a structural diagram of a universal serial port test system according to an embodiment of the present invention
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will become apparent to those skilled in the art from the present disclosure.
Please refer to fig. 1 to 7. It should be understood that the structures, ratios, sizes, etc. shown in the drawings and attached to the description are only for understanding and reading the disclosure of the present invention, and are not intended to limit the practical conditions of the present invention, so that the present invention has no technical significance, and any modifications of the structures, changes of the ratio relationships, or adjustments of the sizes, should still fall within the scope of the technical contents of the present invention without affecting the efficacy and the achievable purpose of the present invention. In addition, the terms "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for clarity of description, and are not intended to limit the scope of the present invention, and the relative relationship between the terms and the terms is not to be construed as a scope of the present invention.
Example one
Referring to fig. 1-2, the present invention provides a universal serial port testing method, which includes the following steps:
step S1, connecting a test host to a control mainboard to be tested, and determining communication options, wherein the step S comprises the following steps:
step S11, serial port communication parameters are set, before serial ports are connected, serial port numbers, baud rates, check bits, data bits and stop bits of the serial ports are selected, opening and closing of the serial port areas are controlled, the baud rates are adjusted to be 9600bit/S, check bits are NONE, namely, checking is not carried out, the data bits are 8, the stop bits are 1, and the serial ports are opened;
s12, setting a sending communication option, controlling and setting a sending area in the serial port transmission area, adjusting the data of the sending area in the serial port transmission to be hexadecimal, controlling the sending data to be automatically sent, and selecting a corresponding automatic sending period;
and S13, receiving the communication option setting, controlling and setting a receiving area in the serial port transmission area, and determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal.
S2, compiling a test flow and compiling a check rule, wherein the test flow comprises the following steps:
step S21, determining corresponding items to be verified;
step S22, determining the delay time before execution, and setting the delay time before execution to be more than or equal to 1000ms; because serial port communication comprises full duplex and half duplex, the sequence and the stability of data can be ensured by executing time delay.
Step S23, compiling sending data of a question-answer communication mode;
step S24, determining a starting point and an end point of a check position and a start and stop position of the check position;
step S25, combining the check position start and stop positions determined in the step S24, and compiling corresponding judgment conditions of the received data;
s3, storing the test file, and storing the test file compiled in the S2;
s4, opening and calling the test file;
s5, determining the test cycle number, and testing the stability, repeatability and reproducibility of communication by increasing the test cycle number;
s6, starting testing, sending test contents, automatically judging whether the received contents are correct according to preset judgment conditions, repeating the testing until the testing verification times are not less than the testing cycle times determined in the S5, and stopping the testing; in step S6, test data content is sent, and whether each check bit satisfies the determination condition corresponding to each check bit in step S2 is determined according to the received data content, if yes, the received data of the check bit is recorded, and if not, the next check bit is determined until the next received data does not exist, and the single test execution is finished.
The control mainboard to be tested is connected to the computer, so that the automation completion of serial port test can be realized, a test device does not need to be additionally manufactured, and the hardware cost and the labor cost are reduced.
Example two
Referring to fig. 3, the difference between the present embodiment and the first embodiment is: the automatic judgment of the received content is replaced by manual judgment of manual comparison, so that semi-automatic test is formed, and the use scene requirement of manual comparison is met.
EXAMPLE III
The difference between this embodiment and the first embodiment is: when a sending command is compiled, sending data is manually compiled and sent according to serial port data setting by a worker, and after the sending command is manually received, comparison and verification are manually carried out to form a manual test, so that the use scene requirement of pure manual test is met.
Example four
Referring to fig. 4 and 7, the present invention provides a universal serial port testing system, including:
the universal connecting unit is used for connecting the control mainboard to be tested and determining communication options, and comprises: the communication serial port setting module is used for selecting a serial port number, a baud rate, a check bit, a data bit and a stop bit of the serial port and controlling the opening and closing of the serial port area before the serial port is connected; the sending control module is used for controlling and setting a sending area in the serial port transmission area, adjusting data of the sending area in the serial port transmission to be hexadecimal, controlling the sending data to be automatically sent and selecting a corresponding automatic sending period; the receiving control module is used for controlling and setting a receiving area in the serial port transmission area, determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal, and automatically clearing the receiving area when the receiving data exceeds a set threshold value;
a test file writing unit comprising: the test file compiling module is used for compiling a test flow and compiling a check rule, the test file storing module is used for storing a compiled test file, and the test file calling interface is used for providing a test file calling function;
the full-automatic testing unit is used for calling the universal connecting unit to connect the control mainboard to be tested and importing communication options, calling the test file which is written in the test file writing unit to automatically test, automatically sending test contents, judging whether the received contents are correct, and repeating the test until the test verification times are not less than the preset test cycle times; the full-automatic test unit includes: the test file compiling unit comprises a test file dispatching module, an automatic test module and a test result confirming module, wherein the test file dispatching module is connected with the test file dispatching interface and used for dispatching the compiled test files in the test file compiling unit, the automatic test module is used for determining the test cycle times and executing the cycle test, and the test result confirming module is used for judging the received data.
EXAMPLE five
Referring to fig. 5 and fig. 7, the difference between the present embodiment and the fourth embodiment is: replacing a full-automatic test unit with a semi-automatic test unit, wherein the semi-automatic test unit is used for calling a general connecting unit to connect a control panel to be tested and leading in communication options, calling a test file which is written in a test file writing unit to carry out automatic test, automatically sending test contents, and manually carrying out comparison and verification; the semi-automatic test unit comprises: the test file writing unit is connected with the test file calling interface and used for writing test files in the test file writing unit; the requirements of manual comparison on the use scene are met.
EXAMPLE six
Referring to fig. 6 and 7, the difference between the present embodiment and the fourth embodiment is: replacing a full-automatic test unit with a manual test unit, wherein the manual test unit is used for manually writing and manually sending data according to serial port data setting when writing a sending command, and manually comparing and checking after manually receiving; the manual test unit includes: the device comprises a sending module used for sending data and a receiving module used for receiving data; the requirements of the pure manual test on the use scene are met.
EXAMPLE seven
The invention also provides a computer device, which comprises a memory and a processor, wherein the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, cause the processor to execute the steps of any one of the above-mentioned embodiments of the universal serial port testing method.
In conclusion, the control mainboard to be tested can be connected to the computer, so that the automation completion of the serial port test can be realized, a test device does not need to be additionally manufactured, and the hardware cost and the labor cost are reduced; the semi-automatic test mode and the manual test mode of the serial port test can be selected according to actual use requirements, so that the adaptability to different use scenes of the serial port test is improved; and in the automatic test process, the test is repeated and cycled for many times, so that the stability, repeatability and reproducibility of communication can be tested. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (8)

1. A universal serial port test method is characterized by comprising the following steps:
step S1, connecting a test host to a control mainboard to be tested, and determining communication options;
s2, compiling a test flow and compiling a check rule;
s3, storing the test file, and storing the test file compiled in the S2;
s4, opening and calling the test file;
s5, determining the number of test cycles;
and S6, starting testing, sending test contents, automatically judging whether the received contents are correct or not according to preset judgment conditions, and stopping testing until the test verification times are not less than the test cycle times determined in the S5.
2. The universal serial port testing method according to claim 1, characterized in that: the step S1 includes:
step S11, serial port communication parameters are set, before serial port connection, serial port numbers, baud rates, check bits, data bits and stop bits of the serial ports are selected, and the serial port areas are controlled to be opened and closed;
s12, setting a sending communication option, controlling and setting a sending area in the serial port transmission area, adjusting the data of the sending area in the serial port transmission to be hexadecimal, controlling the sending data to be automatically sent, and selecting a corresponding automatic sending period;
and S13, receiving communication option setting, controlling and setting a receiving area in the serial port transmission area, determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal, and automatically clearing the receiving area when the receiving data exceeds a set threshold value.
3. The universal serial port testing method according to claim 1, characterized in that: the step S2 includes:
step S21, determining a corresponding item to be verified;
step S22, determining the delay time before execution;
step S23, compiling sending data of a question-answer communication mode;
step S24, determining a starting point and an end point of a check position and a start and stop position of the check position;
and step S25, combining the check position start and stop positions determined in the step S24, and compiling corresponding judgment conditions of the received data.
4. The universal serial port testing method according to claim 3, characterized in that: in step S2, the delay time before execution is set to be greater than or equal to 1000ms.
5. The universal serial port testing method according to claim 3, characterized in that: in step S6, test data content is sent, and whether each check bit satisfies the determination condition corresponding to each check bit in step S2 is determined according to the received data content, if yes, the received data of the check bit is recorded, and if not, the next check bit is determined until the next received data does not exist, and the single test execution is finished.
6. A universal serial port test system is characterized by comprising:
the universal connecting unit is used for connecting the control mainboard to be tested and determining communication options;
a test file writing unit comprising: the test file compiling module is used for compiling a test flow and a test rule, the test file storage module is used for storing a compiled test file, and the test file calling interface is used for providing a test file calling function;
the full-automatic testing unit is used for calling the universal connecting unit to connect the control mainboard to be tested and leading in communication options, calling the test file which is written in the test file writing unit for automatic testing, automatically sending test contents, judging whether the received contents are correct or not, and repeating the testing until the test verification times are not less than the preset test cycle times; the full-automatic test unit comprises: the test file compiling unit comprises a test file dispatching module, an automatic test module and a test result confirming module, wherein the test file dispatching module is connected with the test file dispatching interface and used for dispatching the compiled test files in the test file compiling unit, the automatic test module is used for determining the test cycle times and executing the cycle test, and the test result confirming module is used for judging the received data.
7. The universal serial port test system according to claim 6, wherein: the universal connection unit includes:
the communication serial port setting module is used for selecting a serial port number, a baud rate, a check bit, a data bit and a stop bit of the serial port and controlling the opening and closing of the serial port area before the serial port is connected;
the sending control module is used for controlling and setting a sending area in the serial port transmission area, adjusting data of the sending area in the serial port transmission to be hexadecimal, controlling the sending data to be automatically sent and selecting a corresponding automatic sending period;
and the receiving control module is used for controlling and setting a receiving area in the serial port transmission area, determining that the data of the receiving area in the serial port transmission is adjusted to be hexadecimal, and automatically clearing the receiving area when the receiving data exceeds a set threshold value.
8. A computer apparatus comprising a memory and a processor, the memory having stored therein computer readable instructions which, when executed by the processor, cause the processor to perform the steps of the universal serial port test method of any one of claims 1 to 6.
CN202211090535.3A 2022-09-07 2022-09-07 Universal serial port testing method, system and device Pending CN115733778A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211090535.3A CN115733778A (en) 2022-09-07 2022-09-07 Universal serial port testing method, system and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211090535.3A CN115733778A (en) 2022-09-07 2022-09-07 Universal serial port testing method, system and device

Publications (1)

Publication Number Publication Date
CN115733778A true CN115733778A (en) 2023-03-03

Family

ID=85293175

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211090535.3A Pending CN115733778A (en) 2022-09-07 2022-09-07 Universal serial port testing method, system and device

Country Status (1)

Country Link
CN (1) CN115733778A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116257398A (en) * 2023-05-11 2023-06-13 中星联华科技(北京)有限公司 Serial port testing method and system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104461814A (en) * 2013-09-16 2015-03-25 研祥智能科技股份有限公司 Serial port testing method and system of computer
CN104750588A (en) * 2015-03-04 2015-07-01 广东好帮手电子科技股份有限公司 Serial port communication based pressure testing method
CN111459727A (en) * 2019-12-25 2020-07-28 山东有人信息技术有限公司 Intelligent automatic test system and test method for maximum error-free tolerance range of serial port baud rate
CN112491653A (en) * 2020-11-18 2021-03-12 马鞍山因特莱信息科技有限公司 Automatic test system and test method for communication equipment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104461814A (en) * 2013-09-16 2015-03-25 研祥智能科技股份有限公司 Serial port testing method and system of computer
CN104750588A (en) * 2015-03-04 2015-07-01 广东好帮手电子科技股份有限公司 Serial port communication based pressure testing method
CN111459727A (en) * 2019-12-25 2020-07-28 山东有人信息技术有限公司 Intelligent automatic test system and test method for maximum error-free tolerance range of serial port baud rate
CN112491653A (en) * 2020-11-18 2021-03-12 马鞍山因特莱信息科技有限公司 Automatic test system and test method for communication equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116257398A (en) * 2023-05-11 2023-06-13 中星联华科技(北京)有限公司 Serial port testing method and system
CN116257398B (en) * 2023-05-11 2023-10-03 中星联华科技(北京)有限公司 Serial port testing method and system

Similar Documents

Publication Publication Date Title
CN103149526B (en) PCBA board test macro and method
CN100383737C (en) SCM online loading and updating method and system
CN106528203B (en) A kind of automated procedures programming method of multi-DSP chip
CN115733778A (en) Universal serial port testing method, system and device
CN105572563A (en) Functional circuit test (FCT) method and system
CN101685432A (en) Device for realizing USB interface switching and system for realizing USB interface testing
TWI592798B (en) Inspection system adjusting the sequence of testing items in diagnostic program through log file and method thereof
CN105867295A (en) Communication method and upper computer
US9529536B2 (en) Semiconductor memory device, memory system including the same, and operating method thereof
CN110134557A (en) A kind of verification method and its system read Flash interface data and infuse mistake at random
CN113960391A (en) Abnormal power failure testing device and method for storage medium
CN112799887B (en) Chip FT test system and test method
US20120221825A1 (en) Nonvolatile memory system and feature information setting method
CN111737065B (en) Interface test method and system of demand model based on server interface test
CN113051115A (en) Integrated testing method and system for FT and EQC of chip
CN214376405U (en) Dual-channel automatic software updating system
CN109032986A (en) A kind of drive system and driving debugging system of PCIE link
CN113671924A (en) DCS real-time value setting method and system, equipment and storage medium
CN221668278U (en) General detection device of core machine
CN1684036A (en) Device and method for loading cell phone with software
CN103164360A (en) Test resource management method for supporting parallel test
CN117667554A (en) Method and system for intelligently switching same physical serial port of communication module
CN109391328A (en) A kind of switching method and system
US7457986B2 (en) Apparatus and method for using variable end state delay to optimize JTAG transactions
CN114384856B (en) Multi-request processing method for Modbus serial port communication of programmable controller

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination