CN115732396B - Method for forming trench isolation structure and semiconductor processing chamber - Google Patents
Method for forming trench isolation structure and semiconductor processing chamber Download PDFInfo
- Publication number
- CN115732396B CN115732396B CN202211501572.9A CN202211501572A CN115732396B CN 115732396 B CN115732396 B CN 115732396B CN 202211501572 A CN202211501572 A CN 202211501572A CN 115732396 B CN115732396 B CN 115732396B
- Authority
- CN
- China
- Prior art keywords
- sublimation
- isotropic etching
- etching step
- isolation layer
- trench
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002955 isolation Methods 0.000 title claims abstract description 224
- 238000000034 method Methods 0.000 title claims abstract description 117
- 238000012545 processing Methods 0.000 title claims abstract description 35
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000005530 etching Methods 0.000 claims abstract description 317
- 238000000859 sublimation Methods 0.000 claims abstract description 170
- 230000008022 sublimation Effects 0.000 claims abstract description 170
- 239000007787 solid Substances 0.000 claims abstract description 146
- 239000006227 byproduct Substances 0.000 claims abstract description 138
- 239000000758 substrate Substances 0.000 claims abstract description 102
- 238000000151 deposition Methods 0.000 claims abstract description 18
- 230000008569 process Effects 0.000 claims description 51
- 238000010438 heat treatment Methods 0.000 claims description 34
- 238000006243 chemical reaction Methods 0.000 claims description 14
- 230000007246 mechanism Effects 0.000 claims description 11
- 230000004888 barrier function Effects 0.000 claims description 5
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims 1
- 239000011800 void material Substances 0.000 abstract description 33
- 238000012423 maintenance Methods 0.000 abstract description 10
- 230000000737 periodic effect Effects 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 221
- 239000007789 gas Substances 0.000 description 87
- 238000011049 filling Methods 0.000 description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 229910052581 Si3N4 Inorganic materials 0.000 description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 13
- 238000010586 diagram Methods 0.000 description 11
- 230000001276 controlling effect Effects 0.000 description 9
- 230000008021 deposition Effects 0.000 description 9
- 239000002245 particle Substances 0.000 description 9
- 230000002035 prolonged effect Effects 0.000 description 9
- 230000006870 function Effects 0.000 description 8
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 7
- 229910052731 fluorine Inorganic materials 0.000 description 7
- 239000011737 fluorine Substances 0.000 description 7
- 238000001020 plasma etching Methods 0.000 description 7
- 239000012495 reaction gas Substances 0.000 description 7
- 239000000377 silicon dioxide Substances 0.000 description 7
- 235000012239 silicon dioxide Nutrition 0.000 description 7
- 238000012876 topography Methods 0.000 description 7
- 238000001312 dry etching Methods 0.000 description 6
- 239000010408 film Substances 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 229910017855 NH 4 F Inorganic materials 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- 125000004122 cyclic group Chemical group 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 230000003197 catalytic effect Effects 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000011065 in-situ storage Methods 0.000 description 4
- 238000002156 mixing Methods 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000010790 dilution Methods 0.000 description 3
- 239000012895 dilution Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- KVBCYCWRDBDGBG-UHFFFAOYSA-N azane;dihydrofluoride Chemical compound [NH4+].F.[F-] KVBCYCWRDBDGBG-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000007865 diluting Methods 0.000 description 2
- 238000005485 electric heating Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000005086 pumping Methods 0.000 description 2
- 239000000376 reactant Substances 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- IRPGOXJVTQTAAN-UHFFFAOYSA-N 2,2,3,3,3-pentafluoropropanal Chemical compound FC(F)(F)C(F)(F)C=O IRPGOXJVTQTAAN-UHFFFAOYSA-N 0.000 description 1
- KLZUFWVZNOTSEM-UHFFFAOYSA-K Aluminum fluoride Inorganic materials F[Al](F)F KLZUFWVZNOTSEM-UHFFFAOYSA-K 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- 150000001298 alcohols Chemical class 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005429 filling process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000013618 particulate matter Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 150000004760 silicates Chemical class 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
The invention provides a method for forming a trench isolation structure and a semiconductor processing chamber, wherein the method comprises the steps of providing a substrate with a trench structure; depositing an isolation layer over the trench structure of the substrate; an isotropic etching step is carried out on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, and the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure; performing a sublimation step on the generated solid by-product; the isotropic etching step and the sublimation step are cyclically performed at least once so that the thickness of the isolation layer at the upper portion of the trench structure is smaller than the thickness of the isolation layer at the lower portion of the trench structure. The method for forming the trench isolation structure and the semiconductor processing chamber provided by the invention can effectively prolong the service life of hardware, reduce the consumable cost of equipment, prolong the periodic maintenance time of the equipment, improve the productivity and avoid holes (Void) in the trench.
Description
Technical Field
The present invention relates to the field of semiconductor fabrication, and in particular, to a method of forming a trench isolation structure and a semiconductor processing chamber.
Background
In recent years, with the continuous reduction of feature sizes in integrated circuit manufacturing processes, process complexity is rapidly increasing, and the miniaturization of line width dimensions requires the development of more accurate and efficient thin film dry etching processes. Taking an example of an interlayer dielectric gap-fill (ILDgap-fill) process for a 28nm logic circuit, the process comprises the following steps: first, as shown in fig. 1 (a), a stress silicon nitride layer (StressSiN) 103 is grown by a plasma enhanced chemical vapor deposition method (PlasmaEnhancedChemicalVaporDeposition, PECVD); then, as shown in fig. 1 (b), the stress silicon nitride layer 103 is etched to thin the stress silicon nitride layer, and a thinned stress silicon nitride layer 103' is obtained; finally, as shown in fig. 1 (c), a high aspect ratio process (HighAspectRatioProcess, HARP) is performed to deposit an interlayer dielectric layer 104 in the gap to be filled (which may be a gate spacer, a contact hole, a via hole, or the like).
In the prior art, a Remote Plasma (RPS) -assisted dry etching method is used to etch the stress silicon nitride layer 103, so that in order to avoid plasma corrosion, a coating process is required to be performed on a corresponding component (such as an air inlet structural member) in the chamber, but this not only increases the processing complexity and cost, but also causes the coating to fail after long-term use, and a new component needs to be replaced, thereby increasing the equipment consumption cost. In addition, as the number of substrates being processed increases, under the long-time etching action of active particles with certain energy in the plasma, the surface roughness of corresponding components (such as a uniform flow plate, a gas guide plate, a chamber liner and the like) in the chamber gradually increases, which can cause the particles to exceed the standard, thereby shortening the PM cycle maintenance time and affecting the productivity.
In addition, in the step of depositing the interlayer dielectric layer 104 in the gap to be filled, a hole (Void) may appear in the trench, as shown in fig. 2, which cannot meet the process requirement.
Disclosure of Invention
The invention aims at solving at least one of the technical problems in the prior art, and provides a method for forming a trench isolation structure and a semiconductor processing chamber, which can effectively prolong the service life of hardware, reduce the consumable cost of equipment, prolong the periodic maintenance time of the equipment, improve the productivity and avoid holes (Void) in a trench.
To achieve the object of the present invention, a method for forming a trench isolation structure is provided, which comprises
The method comprises the following steps:
providing a substrate with a groove structure;
depositing an isolation layer over the trench structure of the substrate;
performing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, and the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure;
performing a sublimation step on the solid by-product produced;
And performing the isotropic etching step and the sublimation step at least once in a circulating manner so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that at the lower part of the groove structure.
Optionally, the first isotropic etching step causes the solid by-product generated at the upper portion of the trench structure to close the upper opening of the trench structure.
Optionally, the etching time length of the first isotropic etching step is longer than the etching time length of the subsequent isotropic etching step.
Optionally, the etching time length of the first isotropic etching step is 2 times and less than 5 times longer than the etching time length of the subsequent isotropic etching step.
Optionally, each of the sublimation steps completely removes the solid by-product generated by the isotropic etching step.
Optionally, each previous sublimation step partially removes the solid byproducts generated by the isotropic etching step, so that the solid byproducts that are not removed act as a barrier for the next isotropic etching step;
the last sublimation step completely removes the solid by-product.
Optionally, the etching duration of each isotropic etching step is the same.
Optionally, the sublimation temperatures adopted in each sublimation step are the same, and the sublimation duration of each previous sublimation step is smaller than the sublimation duration of the last sublimation step.
Optionally, the sublimation time of each preceding sublimation step is greater than or equal to 5 seconds and less than or equal to 180 seconds, and the sublimation temperature is greater than or equal to 90 ℃ and less than or equal to 150 ℃.
Optionally, the process temperature of heating the substrate in the isotropic etching step is greater than or equal to 0 ℃ and less than or equal to 90 ℃.
Optionally, each of the isotropic etching step and the sublimation step is performed in the same chamber.
Optionally, the substrate is located on a susceptor within the chamber while the isotropic etching step is performed;
when the sublimation step is performed, a thimble mechanism within the susceptor causes the substrate to rise up to near the gas guide above the chamber.
As another aspect, the present invention also provides a semiconductor processing chamber comprising
The substrate is provided with a groove structure, and an isolation layer is formed in the groove structure;
The thimble mechanism is arranged in the base and used for jacking the substrate from the base or placing the substrate on the base;
the air guide device is positioned above the base and provided with a heating element for heating the substrate when the substrate is jacked up from the base;
a control device for controlling the execution of the following steps:
performing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, and the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure;
performing a sublimation step on the solid by-product produced;
the above-mentioned isotropic etching step and the sublimation step are cyclically performed at least once so that the thickness of the isolation layer at the upper portion of the trench structure is smaller than the thickness of the isolation layer at the lower portion of the trench structure.
As another aspect, the present invention further provides a method for forming a trench isolation structure, the method including:
providing a substrate with a groove structure;
Depositing an isolation layer in the trench structure of the substrate;
and heating the substrate, and simultaneously performing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate a solid byproduct attached in the groove structure, and the generated solid byproduct is converted into a gaseous substance by heating the substrate, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that of the isolation layer at the lower part of the groove structure.
Optionally, the process temperature of heating the substrate is greater than or equal to 90 ℃ and less than or equal to 150 ℃.
As another aspect, the present invention also provides a semiconductor processing chamber comprising
The substrate is provided with a groove structure, and an isolation layer is formed in the groove structure;
the thimble mechanism is arranged in the base and used for jacking the substrate from the base or placing the substrate on the base;
a control device for controlling the execution of the following steps:
and heating the substrate, and simultaneously performing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate a solid byproduct attached in the groove structure, and the generated solid byproduct is converted into a gaseous substance by heating the substrate, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that of the isolation layer at the lower part of the groove structure.
The invention has the following beneficial effects:
according to the method for forming the trench isolation structure, the isolation layer on the trench structure of the substrate is etched by adopting the non-plasma etching method in the isotropic etching step, so that the problems of processing complexity and cost increase, excessive particles and the like caused by plasma corrosion of corresponding components (such as a uniform flow plate, a gas guide plate, a chamber liner and the like) in the chamber can be avoided, the service life of hardware can be effectively prolonged, the consumable cost of equipment is reduced, the periodic maintenance time of the equipment is prolonged, and the productivity is improved. In addition, the above-mentioned isotropic etching step is used for adjusting the etching morphology of the trench structure to avoid occurrence of holes (Void) in the trench structure, in particular, the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the trench structure, and the solid byproducts generated at the upper part of the trench structure (such as the top of the trench sidewall) are more than the solid byproducts generated at the lower part of the trench structure (such as the middle and lower parts of the trench sidewall), i.e., the isotropic etching step can differentially control the generation amount of the solid byproducts at the upper and lower parts of the trench structure; the sublimation step is used to heat the substrate to convert the solid by-product produced into a gaseous material to remove at least a portion of the solid by-product. By performing the isotropic etching step and the sublimation step at least once in a cyclic manner, the thickness of the isolation layer at the upper portion of the trench structure can be made smaller than the thickness of the isolation layer at the lower portion of the trench structure, so that occurrence of voids (Void) in the trench structure can be avoided.
The invention also provides a method for forming the trench isolation structure, which can heat the substrate and simultaneously perform isotropic etching steps on the isolation layer, so that solid byproducts generated by etching are gasified immediately, namely the removal of the solid byproducts is realized, and the thickness of the isolation layer at the upper part of the trench structure is smaller than that of the isolation layer at the lower part of the trench structure, thereby avoiding holes (Void) in the trench structure.
The semiconductor processing chamber provided by the invention can effectively prolong the service life of hardware, reduce the consumable cost of equipment, prolong the periodic maintenance time of the equipment, improve the productivity and avoid holes (Void) in the groove structure by adopting the method for forming the groove isolation structure.
Drawings
FIG. 1 is a schematic illustration of an interlayer dielectric gap filling process;
FIG. 2 is a schematic diagram showing the occurrence of holes in a trench structure during the step of depositing an interlayer dielectric layer;
fig. 3 is a flow chart of a method for forming a trench isolation structure according to an embodiment of the present invention;
FIG. 4A is an electron microscope scan of an etched feature after isolation layer deposition and prior to performing an isotropic etching step;
FIG. 4B is an electron microscope scan of the etched feature after performing an isotropic etching step;
FIG. 5A is a block diagram of a semiconductor processing chamber employed in a related art remote plasma etching method during an isotropic etching step;
FIG. 5B is a block diagram of a semiconductor processing chamber employed in a related art remote plasma etching method during a sublimation step;
FIG. 6A is a block diagram of a semiconductor processing chamber used in a method of forming a trench isolation structure according to an embodiment of the present invention during an isotropic etching step;
FIG. 6B is a block diagram of a semiconductor processing chamber used in a method of forming a trench isolation structure according to an embodiment of the present invention during a sublimation step;
FIG. 7A is a block diagram of another semiconductor processing chamber used in the method of forming a trench isolation structure according to an embodiment of the present invention during an isotropic etching step;
FIG. 7B is a block diagram of another semiconductor processing chamber used in the method of forming a trench isolation structure according to an embodiment of the present invention during a sublimation step;
FIG. 8 is a block diagram of a sublimation chamber employed in a method of forming a trench isolation structure according to an embodiment of the present invention;
FIG. 9 is an electron microscope scan of an etch profile obtained for three different etch durations employed in the isotropic etching step when the isotropic etching step and the sublimation step were previously performed once;
FIG. 10 is a schematic view of the etching profile at different stages of the isotropic etching step when the isotropic etching step and the sublimation step are performed once before and after each other;
FIG. 11 is a schematic diagram of the change in etch profile when the isotropic etching step and the sublimation step are performed twice in a cycle;
FIG. 12 is an electron microscope scan of the finally obtained etch profile when the isotropic etching step and the sublimation step are performed twice in a cycle;
FIG. 13 is a schematic diagram of the change in etch profile when the isotropic etching step and the sublimation step are performed three times in a cycle;
FIG. 14 is an electron microscope scan of an etch profile obtained for different sublimation durations with the process parameters of the isotropic etching step and other parameters of the sublimation step unchanged;
FIG. 15 is an electron microscope scan of the etched features obtained after three sublimation steps, respectively, when the isotropic etching step and the sublimation step are cyclically performed three times;
fig. 16 is a block flow diagram of another method for forming a trench isolation structure according to an embodiment of the present invention;
Fig. 17 is an electron microscope scan of the resulting etched features using the method of forming the trench isolation structure of fig. 16.
Detailed Description
In order to better understand the technical solution of the present invention, the method for forming the trench isolation structure and the semiconductor processing chamber provided by the present invention are described in detail below with reference to the accompanying drawings.
Referring to fig. 3, a method for forming a trench isolation structure according to an embodiment of the present invention includes:
s1, providing a substrate with a groove structure;
s2, depositing an isolation layer on the groove structure of the substrate;
for example, as shown in fig. 1 (a), the substrate 101 is made of Si, for example. A substrate 101 is provided with a plurality of gates 102, and stress silicon nitride layers (stress Si) are grown on the top and side surfaces of the gates 102 and the bottom surface of the gate interval 3 N 4 ) 103, the stress silicon nitride layer 103 is the isolation layer, the sidewall of the stress silicon nitride layer 103 and the sidewall of the gate 102The space has a hollow 102a. The gate interval is the trench structure.
In step S2, taking the isolation layer as the stress silicon nitride layer 103 as an example, the preparation method includes, for example, alternately performing a plurality of deposition steps and a plurality of light irradiation steps, so that the H content in the film layer can be adjusted to avoid cracking of the formed stress silicon nitride layer, wherein the deposition step is, for example, to deposit the stress silicon nitride layer 103 by a plasma enhanced chemical vapor deposition method (PlasmaEnhancedChemicalVaporDeposition, PECVD). Of course, in practical applications, the isolation layer on the substrate is not limited to the stress silicon nitride layer 103, but may be any other film material, such as silicon dioxide (SiO) 2 ) Layers, silicon oxynitride (SiON) layers and the like,
the isolation layer to be etched in the isotropic etching step may be one layer or a stack of a plurality of layers made of different materials, and the structure of the layers on the substrate is not limited to the gate electrode, but may be other structures. The embodiment of the present invention is not particularly limited thereto.
S3, executing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, and the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure;
s4, performing a sublimation step on the generated solid byproducts;
the above steps S3 and S4 are performed at least once in a loop, i.e., the above isotropic etching step and sublimation step are performed at least once in a loop such that the thickness of the isolation layer at the upper portion of the trench structure is smaller than the thickness of the isolation layer at the lower portion of the trench structure. The "cycle" herein refers to the number of times of alternately performing the above-described isotropic etching step and sublimation step, and if the number of times is one, the above-described steps S3 and S4 are performed only one time in succession; if the number of times is a plurality of times, the above steps S3 and S4 are alternately performed a plurality of times.
In practical applications, the above steps S3 and S4 are performed once, and may be also suitable for applications where the removal of the overhang structure (overhung) on the isolation layer is not serious or the overhang structure is not serious.
After the cycling process is completed, it is generally necessary to deposit a fill layer in the trench structure. For example, as shown in fig. 1 (c), the deposition process of the filling layer (i.e., the interlayer dielectric layer 104) is performed, for example, by a high aspect ratio process (HighAspectRatioProcess, HARP), and the trench structure is, for example, a gate interval, a contact hole, a via hole, or the like. The HARP process has very good gap filling capability, is capable of well filling high aspect ratio gaps (i.e., trench structures), and is well compatible with previously formed films.
In step S2, the above-mentioned isolation layer is typically formed by alternately performing a plurality of deposition steps and light irradiation steps, which results in a lower portion of the trench structure (middle portion of the sidewall, lower portion of the sidewall) having a lower isolation layer compactness than an upper portion of the trench structure (upper portion of the sidewall), and the upper portion of the trench structure having a thickness thicker than the lower portion of the trench structure, as shown in fig. 4A, after the above-mentioned isolation layer 201 is formed, the sidewall topography of the trench structure exhibits a overhang topography (cross-over), i.e., the thickness of the isolation layer in the upper portion of the trench structure (the region of the sidewall of the above-mentioned isolation layer 201 above the broken line a in fig. 4A) is greater than the thickness of the lower portion of the trench structure (the region of the sidewall of the above-mentioned isolation layer 201 below the broken line a in fig. 4A), in which case, if the above-mentioned filling layer is directly deposited after the step S2 is completed, the above-mentioned step S3 and step S4 are not circularly performed at least once, and the etched topography of the above-mentioned isolation layer 201 is only shown, and the hole (Void) is schematically shown, but the hole is not shown. It should be noted that, in practical application, the upper portion and the lower portion of the trench structure may be divided according to the distribution of the thickness of the isolation layer of the trench structure, that is, the position of the broken line a may be determined.
The inventors have found that: before depositing the filling layer, when the existing etching method (for example, conventional gas phase chemical etching) is used to etch the isolation layer 201, because the compactness of the isolation layer 201 at the lower part of the trench structure is worse, the etching amount of the isolation layer at the lower part of the trench structure is larger than that at the upper part of the trench structure, as shown in fig. 4B, which results in that holes (Void) appear in the filling layer deposited in the trench during the subsequent deposition of the filling layer, which cannot meet the process requirement.
As a comparative example of the present application, the above-mentioned isolation layer is etched by using a Remote Plasma (RPS) -assisted dry etching method, as shown in fig. 5A and 5B, a semiconductor processing chamber is used, which includes a process chamber 4, a remote plasma device 5 disposed above the process chamber 4, and a gas transmission line 8 for introducing a reaction gas into the remote plasma device 5, wherein a liftable susceptor 2 is disposed in the process chamber 4, for carrying a substrate 1 when the isolation layer is subjected to an etching step, and the position of the substrate 1 is shown in fig. 5A; above the susceptor 2 is arranged a gas guide plate 3 which, on the basis of the gas guiding action for the reaction gas entering the process chamber 4, also has a heating function for heating the substrate 1 when the susceptor 2 is in the sublimated position, i.e. the position as shown in fig. 5B. At least three pins 6 are further provided on the susceptor 2 for lifting up the substrate 1 and raising it to the sublimation position. In addition, the process chamber 4 is further provided with a vacuum-pumping pipeline 7 for evacuating the process chamber 4 so as to exhaust the gas in the process chamber 4.
To adopt NH 3 Gas and NF 3 Gas etching of SiO 2 For example, the etching method includes: first, NH is applied by a remote plasma generating device 3 Gas and NF 3 Conversion of gas excitation to ammonium fluoride (NH) 4 F) And ammonia difluoride (NH) 4 F·hf), the specific equation is:
NF 3 +NH 3 —>NH 4 F+NH 4 F·HF
then, under low temperature conditions (about 30 ℃ C.), ammonium fluoride (NH) 4 F) And ammonia difluoride (NH) 4 F.HF) can be combined with SiO 2 Reacting to obtain solid hexafluoro-silamine ((NH) 4 ) 2 SiF 6 ) Such silicate will prevent further progress of the etching reaction. The specific equation is:
NH 4 f (or NH) 4 F·HF)+SiO 2 —>(NH 4 ) 2 SiF 6 (solid)+H 2 O
Then, the etching step is stopped and an in-situ sublimation (also called annealing) step is performed to remove solid byproducts, i.e., (NH) 4 ) 2 SiF 6 . In the step of performing in situ sublimation, solid byproducts, i.e., (NH), are formed at elevated temperature 4 ) 2 SiF 6 SiF decomposed into gaseous state 4 、NH 3 And HF, and is exhausted from the process chamber with the air exhaust device, the specific equation is:
(NH 4 ) 2 SiF 6 (solid)—>SiF 4 +NH 3 +HF
similarly, NF is employed with etching gas 3 And H 2 For example, the auxiliary gas is Ar, he (for dilution, heat conduction, etc.), etc., siN is etched, firstly NF is etched by remote plasma device 3 And H 2 The formation of the plasma radicals is given by:
NF 3 +H 2 —>NH 4 F+NH 4 F.HF (plasma radical)
Then, under the condition of low temperature (about 30 ℃), the plasma group reacts with SiN to generate solid (NH) 4 ) 2 SiF 6 This silicate will prevent further progress of the etching reaction, as specified by:
NH 4 f (or NH) 4 F.HF) (plasma radical) +SiN->(NH 4 ) 2 SiF 6 (solid)+H 2 O
Then, the etching step is stopped and an in-situ sublimation (also called annealing) step is performed to remove solid byproducts, i.e., (NH) 4 ) 2 SiF 6 . In the step of performing in situ sublimation, solid by-products, i.e., (NH), are produced under high temperature conditions (around 180deg.C) 4 ) 2 SiF 6 SiF decomposed into gaseous state 4 、NH 3 And HF, and is exhausted from the process chamber with the pumping device, the specific equation is:
(NH 4 ) 2 SiF 6 (solid)—>SiF 4 +NH 3 +HF
the Remote Plasma (RPS) -assisted dry etching method adopts the following technological parameters:
the etching step comprises the following steps: the temperature of the base for heating the substrate is 30-50 ℃; the process pressure is 2 Torr-5 Torr; NF (NF) 3 The gas flow rate of the gas is 80 sccm-120 sccm; h 2 The gas flow rate of (2) is 700 sccm-1200 sccm; the excitation power is 30W-50W; the process time is 5 s-8 s;
the sublimation step comprises the following steps: the heating temperature of the air guide plate is 180 ℃; the process pressure is 1Torr to 4Torr; h 2 The gas flow rate of (2) is 3000 sccm-8000 sccm; the distance between the substrate and the air guide plate is 2 mm-5 mm; the process time is 45 s-60 s.
It should be noted that, since the solid by-product can prevent the etching reaction from proceeding further, the whole etching process needs to be completed by adopting a mode of multiple cycles of the etching step and the sublimation step, and usually needs to be circulated three times, so that the solid by-product is removed in time.
The isolation layer is etched by the Remote Plasma (RPS) assisted dry etching method, which inevitably has the following problems in practical application:
firstly, the air inlet structural member adopted by the method is firstly contacted with RPS plasma, the plasma density at the position is relatively high, and the inner surface of the air inlet structural member is required to be subjected to plating treatment (usually Ni) so as to reduce the etching consumption of the plasma on the air inlet structural member, thus not only increasing the processing complexity and cost, but also ensuring that the plating film is invalid after long-time use, and further increasing the equipment consumption cost by replacing new components.
Secondly, due to the existence of the plasma, as the number of processed substrates increases (8000 PCS), under the long-time etching action of active particles with certain energy in the plasma, the surface roughness of corresponding components (such as a uniform flow plate, a gas guide plate, a chamber liner and the like) in the chamber is gradually increased, so that particles exceed the standard, the PM cycle maintenance time is shortened, and the productivity is influenced.
Third, although the above method is completed by adopting a mode of multiple circulation of etching steps and sublimation steps, in order to remove solid byproducts in time, the etching morphology of the trench cannot be adjusted either, so that the etching amount of the isolation layer at the upper part of the trench structure and the etching amount of the isolation layer at the lower part of the trench structure cannot be adjusted differently, and the problem that the thickness of the upper part of the trench structure of the isolation layer is larger than that of the lower part still exists, so that holes (Void) in the trench cannot be avoided.
In order to solve the above problems, compared with the above Remote Plasma (RPS) -assisted dry etching method, the method for forming a trench isolation structure provided by the embodiment of the present invention uses a non-plasma etching method to etch an isolation layer on a trench structure of a substrate in an isotropic etching step, so that the effect of adjusting the etching morphology of the trench structure can be achieved on the basis of etching the isolation layer to avoid holes (Void) in the trench, specifically, the isotropic etching step (i.e., step S3) is used for reacting with the isolation layer to generate solid byproducts attached in the trench structure, and the solid byproducts generated at the upper part of the trench structure are more than the solid byproducts generated at the lower part of the trench structure; the sublimation step (i.e., step S4) is used to heat the substrate to convert the generated solid byproducts to gaseous species to remove at least a portion of the solid byproducts. The thickness of the isolation layer at the upper part of the groove structure can be smaller than that at the lower part of the groove structure by circularly executing the isotropic etching step and the sublimation step at least once, so that holes (Void) in the groove structure can be avoided, and the process requirement can be further met.
In addition, compared with the prior art that a non-plasma etching method is adopted for etching the isolation layer on the groove structure of the substrate, the method for forming the groove isolation structure provided by the embodiment of the invention has the advantages that the problem that the corresponding parts (such as a uniform flow plate, a gas guide plate, a chamber liner and the like) in the chamber are required to be subjected to film plating treatment due to plasma corrosion and also are required to be replaced regularly, so that the problems of processing complexity and cost increase, excessive particles and the like are caused, the service life of hardware is effectively prolonged, the consumable cost of equipment is reduced, the periodic maintenance time of the equipment is prolonged, and the productivity is improved.
The method for forming the trench isolation structure provided by the embodiment of the invention can be used for executing the isotropic etching step and the sublimation step in the same chamber, or respectively executing the isotropic etching step and the sublimation step in different chambers. As shown in fig. 6A and 6B, the semiconductor processing chamber 11 includes a chamber body, a susceptor 12 disposed in the chamber body, and a gas guide device 13 disposed above the susceptor 12, wherein the gas guide device 13 is, for example, a gas guide plate, and has at least two gas guide channels isolated from each other, for separately introducing different reaction gases into the chamber body; the gas guide 13 also has a heating element for heating the substrate when it is in the sublimation position. Alternatively, to employ two different reactant gases (e.g., HF and NH 3 ) For example, the gas guide device adopts a double-layer gas guide plate (dualshawhead) structure, which is provided with two gas guide channels (131, 132) isolated from each other and used for independently introducing two reaction gases into the cavity. The susceptor 12 has a temperature control function for carrying and heating the substrate when the isotropic etching step is performed, and the substrate is at the position shown in fig. 6A; in addition, the semiconductor processing chamber 11 further includes a thimble mechanism disposed in the susceptor 12 for lifting the substrate from the susceptor 12 or placing the substrate on the susceptor 12; specifically, the ejector mechanism includes at least three liftable ejector pins 14. As shown in fig. 6B, the sublimation step may be performed when the ejector pin mechanism ejects the substrate to the sublimation position, and the substrate may be heated by the heating element when the sublimation step is performed.
Optionally, the cavity of the semiconductor processing chamber 11 may also have a heating function, for example, an electric heating element is provided for controlling the temperature of the cavity, for example, in a range of 50 ℃ to 150 ℃, preferably 60 ℃ to 80 ℃; the base 12 is provided with a temperature control function by a temperature controller, and the temperature control range is, for example, 0 to 90 ℃, preferably 25 to 80 ℃. The heating element controls the temperature of the air guide 13, for example, in the range of 100 ℃ to 250 ℃, preferably 160 ℃ to 200 ℃, and more preferably 180 ℃.
The gas guide device 13 can avoid the generation of solid particles such as HF and NH by mixing different reaction gases and then reacting by adopting at least two gas guide channels which are isolated from each other 3 NH is generated under the condition of insufficient temperature after mixing 4 And F, causing particles to exceed the standard and affecting the process stability. In performing the isotropic etching step, as shown in fig. 6A, the substrate is placed on the susceptor 12, the substrate temperature is kept consistent with the susceptor temperature, and precise temperature control is achieved between the susceptor 12 and the substrate by means of a temperature controller. After the isotropic etching step is finished, the substrate is switched to a sublimation step, as shown in fig. 6B, at this time, the substrate is lifted up to a sublimation position near the air guide device 13 by at least three ejector pins 14, i.e., a position as shown in fig. 6B, for example, a distance between the position and the air guide device 13 is 0 mm-15 mm, preferably 2 mm-5 mm, and the surface temperature of the substrate is gradually increased to more than 100 ℃, preferably more than 120 ℃ under the heat conduction and heat radiation action of the air guide device 13, so as to remove solid byproducts, after the sublimation step is finished, the ejector pins are lowered, and the substrate returns to the base 12 again to wait to be transferred. In the sublimation step, a constant flow rate (for example, 0 to 5000sccm, preferably 1000 to 3000 sccm) of N is introduced into the chamber 2 And the gas is used for conducting heat and carrying solid byproducts out of the chamber. Alternatively, in the sublimation step, the chamber pressure is 0Torr to 10Torr, preferably 1Torr to 5Torr, and the process time period is 30s to 300s, preferably 45s to 180s.
In another alternative embodiment, the gas guiding device may be provided with only one gas guiding channel, specifically, as shown in fig. 7A and 7B, the gas guiding device 13' has a gas mixing cavity 133, and different reaction gases (e.g. HF and NH 3 ) In this mixing chamber 133, the temperature of the gas guide 13' is high, and the particulate matter (e.g., NH 4 F) Sublimation will occur and no particle problem will occur.
When the above-described isotropic etching step and sublimation step are performed in different chambers, respectively, the semiconductor chamber in which the isotropic etching step is performed is identical to the chamber structure shown in one of fig. 6A to 7B, except that the gas guide means is provided when the isotropic etching step is performedIt may be heated to a temperature in a range (for example, 50 to 100 ℃ C.) without heating or heating. In the sublimation step, the substrate is transferred to a sublimation chamber (an chamber) for performing the sublimation step, as shown in fig. 8. The cavity of the sublimation chamber 15 may also have a heating function, for example, provided with an electric heating element for controlling the temperature of the cavity, for example, in the range 50-100 ℃, preferably 60-80 ℃; the base 16 may be fixed and not liftable, and the base 16 performs a temperature control function by a temperature controller, and the temperature control range is, for example, 100 ℃ to 250 ℃, preferably 120 ℃ to 180 ℃, and more preferably 180 ℃. In the sublimation step, a constant flow rate (for example, 0to 5000sccm, preferably 1000 to 3000 sccm) of N is introduced into the chamber 2 A gas for conducting heat and carrying solid byproducts out of the chamber while maintaining the pressure of the sublimation chamber 15 constant in the pressure range of 1Torr to 5Torr by an Automatic Pressure Controller (APC). Alternatively, in the sublimation step, the chamber pressure is 0to 10Torr, preferably 1Torr to 5Torr, and the process time period is 30s to 300s, preferably 45s to 180s.
In some alternative embodiments, where the reactant gases include a fluorine-containing gas and a catalytic gas, the components of the semiconductor processing chamber that are in contact with the fluorine-containing gas are all fabricated from aluminum (Al). The component in contact with the fluorine-containing gas is, for example, a susceptor, a gas guide, a liner, or the like. After fluorine-containing gas (such as HF) contacts with Al, a layer of compact aluminum fluoride protective film is generated on the surface of the Al, which can prevent the reaction from further proceeding, namely, the bare aluminum component is resistant to HF gas corrosion, so that the service life of the chamber component can be prolonged, and experiments show that the semiconductor processing chamber is prepared by adopting aluminum as the component which is contacted with the fluorine-containing gas, after about 30000 substrates are produced, cavity opening cleaning is needed, compared with 8000 substrates produced by a remote plasma etching method, cavity opening cleaning is needed, and PM periodic maintenance time is improved by about 4 times, so that productivity can be effectively improved.
The non-plasma etching method specifically comprises the following steps: the step S3 and the step S4 are circularly executed at least once, namely, the isotropy etching step and the sublimation step are circularly executed at least once, the isotropy etching step is used for generating solid byproducts attached in the groove structure through the reaction of the isolation layer, and particularly, the reaction gas adopted in the isotropy etching step can react with the isolation layer to generate the solid byproducts, so that the isolation layer is etched; the sublimation step is used to heat the substrate to convert the solid by-products produced into gaseous species.
The isolation layer is silicon nitride (Si 3 N 4 ) Layer, silicon dioxide (SiO) 2 ) For example, the layer or silicon oxynitride (SiON) layer may be formed by a reaction gas comprising a fluorine-containing gas and a catalytic gas that directly react with the isolation layer to achieve isotropic etching of the isolation layer. Optionally, the fluorine-containing gas comprises HF; the catalytic gas comprising NH 3 . Of course, in practical applications, alcohols (e.g. methanol) may be used as the catalytic gas, which is not particularly limited in the embodiments of the present invention.
Using HF gas and NH as reaction gases 3 The isolating layer is silicon dioxide (SiO) 2 ) In the isotropic etching step, for example, the substrate is placed on a susceptor (the susceptor heats the substrate at a temperature of, for example, 0 ℃ to 80 ℃, preferably 25 ℃ to 50 ℃) at a process pressure of 0 or more and 10Torr or less; HF gas and NH 3 The gas is mixed with silicon dioxide (SiO 2 ) The layer reaction produces solid by-products ((NH) 4 ) 2 SiF 6 ) The specific equation is:
HF+NH 3 +SiO 2 —>(NH 4 ) 2 SiF 6 (solid)+H 2 O
in the sublimation step, the susceptor heats the substrate, for example, at a temperature of from 100 ℃ to 250 ℃, preferably from 100 ℃ to 130 ℃, so that solid byproducts ((NH) are in solid form 4 ) 2 SiF 6 ) SiF decomposed into gaseous state 4 And NH 3 Etc. and is discharged out of the chamber, the specific equation is:
(NH 4 ) 2 SiF 6 (solid)—>SiF 4 +NH 3
the isotropic etchingSolid by-products ((NH) from the etching step 4 ) 2 SiF 6 ) After sublimation and decomposition by high temperature heating in the sublimation step, siF can be generated 4 And NH 3 Introducing a certain amount of inert gas into the process chamber during heating to perform the functions of uniform heating and exhausting so as to generate SiF 4 And NH 3 The gas of the like may exit the chamber with the inert gas.
The inventors have found that: using HF gas and NH 3 The process of etching the isolation layer by the gas belongs to isotropic etching, and the etching speed in the process is closely related to the characteristic difference of the isolation layer. In general, the more porous the isolation layer, the more impurities and defects, the higher the etch rate, and the lower portion of the trench structure (in the sidewall of the isolation layer, lower portion) is more porous than the upper portion of the trench structure (at the top of the sidewall of the isolation layer), so that there is a difference in the etch rates of the upper and lower portions of the trench structure. After the step S2 is performed and before the step S3 is performed, the trench structure morphology of the isolation layer has the following two characteristics:
Firstly, the thickness of the isolation layer at the upper part of the groove structure is larger, and the thickness of the isolation layer at the lower part of the groove structure is smaller, so that a suspension appearance (covering) is formed, and if the appearance is directly deposited with the filling layer, holes (Void) can appear in the filling layer deposited in the groove;
secondly, the isolation layer is usually manufactured by alternately executing a plurality of deposition steps and light irradiation steps, the compactness of the isolation layer at the lower part of the groove structure is poorer than that of the isolation layer at the upper part of the groove structure, the lower part of the side wall of the isolation layer is loose, and the etching speed is higher. In this case, the etched topography is more prone to the overhang topography described above.
Furthermore, the inventors found during the test that: as shown in fig. 9, the isotropic etching step and the sublimation step are alternately performed for a single time (i.e., only one isotropic etching step and one sublimation step are performed), and on the premise that the respective process parameters of the sublimation step are unchanged, the etching time period adopted by the isotropic etching step is different, and the finally obtained etching morphology is also different, specifically, the etching time period is 0s, i.e., the isotropic etching step is not performed, the thickness of the isolation layer at the upper portion (the top portion of the sidewall of the isolation layer 301) of the trench structure is larger, the thickness of the isolation layer at the lower portion (the middle and lower portions of the sidewall of the isolation layer 301) is smaller, in which case, holes (Void) will appear in the filling layer deposited in the trench structure later, fig. 9 only shows the trench etching morphology of the isolation layer 301, and schematically shows the holes (Void), but the filling layer is not shown. When the etching duration adopted in the isotropic etching step is 15s, the finally obtained etching morphology is larger in the difference between the thickness of the isolation layer at the upper part of the groove structure and the thickness of the isolation layer at the lower part of the groove structure compared with the difference between the thickness of the isolation layer at the lower part of the groove structure before the isotropic etching step is carried out, and holes (Void) can appear in a filling layer deposited in the groove structure later, but the holes are reduced; when the etching duration adopted in the isotropic etching step is 25s, the finally obtained etching morphology, compared with the difference between the thickness of the isolation layer at the upper part of the groove structure and the thickness of the isolation layer at the lower part of the groove structure, is smaller, holes (Void) can appear in a filling layer deposited in the groove structure later, but the holes almost disappear; when the etching duration adopted in the isotropic etching step is 35s, the etching morphology is finally obtained, the thickness of the isolation layer at the upper part of the groove structure is obviously reduced compared with that of the isolation layer at the upper part of the groove structure when the etching duration is 15s, the thickness of the isolation layer at the lower part is not greatly changed, and no hole (Void) is formed in a filling layer deposited in the groove structure later. The formation of the etching morphology obtained when the etching duration is 35s is mainly influenced by solid byproducts. The specific influencing process is as follows:
As shown in fig. 10, after step S2 is completed and before the isotropic etching step is performed, the thickness of the isolation layer 301 at the upper portion of the trench structure is greater than the thickness of the isolation layer 301 at the lower portion, resulting in a narrower opening size at the upper portion of the trench structure and a wider opening size at the lower portion of the trench structure. In the early stage of performing the isotropic etching step, the sidewalls of the isolation layer 301 are etched by a small amount at various positions while the thickness of the solid by-product 302 generated at the upper portion of the sidewalls is greater than that of the lower portion because the upper portion contacts more reaction gas and thus the solid by-product 302 is generated more. In the middle stage of performing the isotropic etching step, as the etching time advances, the solid by-product 302 generated at the upper part of the sidewall of the isolation layer 301 gradually increases, and the upper opening is blocked by the solid by-product 302; at the later stage of the isotropic etching step, as the etching time advances further, only a small amount of the reaction gas may penetrate the solid by-product 302 to continue etching the isolation layer 301, but it is difficult to access the lower portion of the trench structure.
Based on the above findings, when the topography of the isolation layer exhibits a overhang topography (capping), if the deposition of the above-described filling layer is directly performed, voids (Void) may occur in the filling layer deposited in the trench. Even though the shape of the isolation layer is not the overhang shape, the thickness of the upper part and the thickness of the lower part of the isolation layer are consistent, when the compactness of the isolation layer is different, the etching rate of the upper part of the groove structure is lower than that of the lower part, the overhang structure can appear, and the subsequent deposition of the filling layer can also appear holes (void). In order to solve the problem, the embodiment of the invention can realize that the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure by utilizing the solid byproducts generated in the isotropic etching step and differentially controlling the generation amount of the solid byproducts at the upper part and the lower part of the groove structure, and the thickness of the isolation layer at the upper part of the groove structure can be smaller than the thickness of the isolation layer at the lower part of the groove structure by circularly executing the isotropic etching step and the sublimation step at least once. Further, since the amounts of solid by-products generated at the upper and lower parts of the trench structure are different in the isotropic etching step, the reduction speed of the thickness of the isolation layer at the upper and lower parts of the trench structure can be controlled differently, even if the reduction speed of the thickness of the isolation layer at the upper part of the trench structure is faster and the reduction speed of the thickness of the isolation layer at the lower part of the trench structure is slower, an etching morphology is finally obtained, wherein the thickness of the isolation layer at the upper part of the trench structure is smaller than that of the isolation layer at the lower part of the trench structure, and the etching morphology does not generate holes (Void) in the subsequently deposited filling layer. For example, when the etching duration adopted in the isotropic etching step in fig. 9 is 35s, the etching morphology finally obtained has a significantly reduced thickness of the isolation layer at the upper part of the trench structure compared with the thickness of the isolation layer at the upper part of the trench structure when the etching duration is 15s, and the thickness of the isolation layer at the lower part is not greatly changed, so that no hole (Void) appears in the filling layer deposited in the trench structure later.
In an alternative embodiment, as shown in fig. 11, the first isotropic etching step (i.e., etch 1) causes solid by-products 302 generated at the upper portion of the trench structure (i.e., the upper region of the sidewall of the isolation layer 301) to close the upper opening of the trench structure. Since the upper portion of the trench structure is in contact with more reactive gas than the lower portion, more solid by-products 302 are generated at the upper portion of the trench structure, and as the etching time of the first isotropic etching step increases, the amount of generated solid by-products 302 gradually increases, and finally the upper opening is closed. By closing the upper opening, etching gas is not easy to contact the lower part of the groove structure during subsequent etching, so that the lower part etching is stopped, and the upper etching can be slowly performed, thereby effectively reducing the etching amount of the isolation layer at the lower part of the groove structure, and being beneficial to realizing that the thickness of the isolation layer at the upper part of the groove structure is smaller than that of the isolation layer at the lower part of the groove structure.
In some alternative embodiments, when the isotropic etching step is multiple times, the etching duration of the first isotropic etching step is longer than the etching duration of the subsequent isotropic etching step. Therefore, the first isotropic etching step can have enough etching duration to remove the overhang structure of the side wall of the isolation layer groove, and the etching amount of the isotropic etching step on the upper part of the groove structure can be increased, so that the thickness of the isolation layer on the upper part of the groove structure is smaller than that of the isolation layer on the lower part of the groove structure. Optionally, the etching time of the first isotropic etching step is 2 times and less than 5 times, preferably 2 to 2.5 times, greater than the etching time of the subsequent isotropic etching step. It should be noted that, if the isotropic etching step has three or more times, the etching duration of the isotropic etching step of the first time is 2 times to less than 5 times, preferably 2 to 2.5 times, the etching duration of each isotropic etching step after the second time, and optionally, the etching duration of the isotropic etching step after the second time may be the same or gradually decreasing, and the ratio of the etching duration of the isotropic etching step of the first time to the etching duration of the isotropic etching step of the third time may be 2.5, taking three isotropic etching steps as an example: 1:1 or 2.5:1:0.5.
Taking the case where the isotropic etching step and the sublimation step are alternately performed twice as shown in fig. 11, before the first isotropic etching step (i.e., etching 1) is performed, the sidewall of the isolation layer 301 of the trench structure is a overhang structure, i.e., the upper portion of the sidewall of the isolation layer 301 protrudes with respect to the lower portion, and this protruding portion 301a is referred to as "burner". After performing the first isotropic etching step (i.e., etch 1), the overhang structure (i.e., the protruding portion 301 a) of the trench sidewall of the isolation layer 301 is removed and the solid by-product 302 generated at the upper portion of the trench structure is caused to close the upper opening of the trench structure. Then, a first sublimation step (i.e., sublimation 1) is performed to completely remove the solid by-product 302; then, the isolation layer 301 is continuously etched by using a second isotropic etching step (i.e., etching 2), which can etch all positions of the sidewall of the isolation layer 301, so as to ensure that the etching amount of the lower portion of the trench structure meets the process requirement, and then performing a second sublimation step (i.e., sublimation 2) to completely remove the solid byproducts. In the above process, by closing the upper opening by the first isotropic etching step (i.e., etching 1), the etching amount of the isolation layer at the lower portion of the trench structure can be effectively reduced. On the basis, the etching time of the first isotropic etching step is longer than that of the second isotropic etching step, so that the etching amount of the isolation layer on the upper part of the groove structure in the isotropic etching step is increased, and finally the shape of the side wall of the upper part of the groove structure, which is smaller than that of the lower part, can be obtained, as shown in fig. 12.
In some alternative embodiments, each sublimation step completely removes solid byproducts generated by the isotropic etching step. Therefore, each position of the side wall of the isolation layer can be etched in the following isotropic etching step, and the etching amount of the lower part of the groove structure is ensured to meet the process requirement.
It should be noted that, in practical application, at least one of the following two ways may be selected according to the specific situation: the first isotropic etching step (i.e., etch 1) causes the solid by-product 302 generated at the upper portion of the trench structure to close the upper opening of the trench structure, and the etching time period of the first isotropic etching step is longer than that of the subsequent isotropic etching step, so long as the thickness of the isolation layer at the upper portion of the trench structure can be made smaller than that at the lower portion of the trench structure. Of course, the two modes are combined to better effect.
It should be further noted that, in this embodiment, the isotropic etching step and the sublimation step are alternately performed twice, where the first isotropic etching step (i.e., etching 1) is used to remove the overhang structure of the trench sidewall of the isolation layer 301, and the second isotropic etching step (i.e., etching 2) is used to ensure that the etching amount of the lower portion of the trench structure meets the process requirement, but the embodiment of the present invention is not limited thereto, and in practical application, the isotropic etching step and the sublimation step may be performed sequentially, so long as the thickness of the isolation layer at the upper portion of the trench structure can be finally made smaller than the thickness of the isolation layer at the lower portion of the trench structure.
In other alternative embodiments, the number of cycles of the isotropic etching step and the sublimation step may be more than three, and the etching duration of the isotropic etching step may be gradually reduced with the increase of the number of cycles, which may also increase the etching amount of the isolation layer on the upper portion of the trench structure by the isotropic etching step, so as to achieve that the thickness of the isolation layer on the upper portion of the trench structure is smaller than that of the isolation layer on the lower portion of the trench structure.
In a specific embodiment, the process parameters of the first isotropic etching step are: the chamber pressure is 0.05Torr to 10Torr, preferably 1.2Torr; the flow rate of the HF gas is 5sccm to 200sccm, preferably 20sccm; NH (NH) 3 The flow rate of the gas is 5sccm to 200sccm, preferably 12sccm; the flow rate of the HF gas is 50sccm to 3000sccm, preferably 650sccm; NH (NH) 3 The flow rate of the diluting gas of the gas is 50sccm to 3000sccm, preferably 150sccm; the distance between the substrate and the air guide device is 10mm-50 mm, preferably 35mm; the etching time is 5s to 30s, preferably 25s. The technological parameters of the second isotropic etching step are as follows: the chamber pressure was 1.2Torr; the flow rate of the HF gas is 20sccm; NH (NH) 3 The flow rate of the gas is 12sccm; the flow rate of the dilution gas of the HF gas was 650sccm; NH (NH) 3 The flow rate of the dilution gas of the gas is 150sccm; the interval between the substrate and the air guide device is 35mm; the etching duration was 10s. It should be noted that the process parameters of the second isotropic etching step may also be applied to the above process parameters.
On this basis, the etching duration of the second isotropic etching step is preferably 10s. The process parameters of the first sublimation step and the second sublimation step may be the same, specifically: the chamber pressure is 0Torr to 10Torr, preferably 2Torr; n (N) 2 The flow rate of the gas is 0sccm to 5000sccm, preferably 1050sccm; the sublimation temperature is 100-250 ℃, preferably 180 ℃; the sublimation time is 30s to 300s, preferably 120s.
In some alternative embodiments, when the isotropic etching step and the sublimation step described above are performed in the same chamber, the spacing between the substrate and the gas guide (e.g., a gas guide plate) in each sublimation step should not be too great, e.g., in the range of 0mm to 15mm, preferably 2mm to 5mm, to ensure complete removal of solid byproducts. In addition, the sublimation period is not too short, for example greater than 30s, preferably greater than 60s, and most preferably 120s, to ensure complete removal of solid byproducts.
It should be noted that, in the above embodiment, each sublimation step completely removes the solid byproducts generated in the isotropic etching step, but embodiments of the present invention are not limited thereto, and in other alternative embodiments, the sublimation step is performed multiple times, and each previous sublimation step partially removes the solid byproducts generated in the isotropic etching step, so that the solid byproducts that are not removed are used as a barrier layer in the next isotropic etching step, so as to weaken etching of the isolation layer in the lower portion of the trench structure by the reaction gas, prevent the etching rate in the lower portion of the trench structure from being too fast, generate overhang morphology (overhang), and finally realize that the thickness of the isolation layer in the upper portion of the trench structure is smaller than that in the lower portion of the trench structure. The last sublimation step completely removes solid byproducts so as to ensure the normal operation of the subsequent filling layer deposition step. On the basis, optionally, in order to avoid the etching stop of the lower part of the groove structure caused by the blocking of the upper opening by the solid byproducts, the method can be switched to the sublimation step before the blocking of the upper opening by the solid byproducts, the solid byproducts are partially removed, then the isotropic etching step is switched back to continue the etching, and the steps are circularly repeated in such a way that the isotropic etching step and the sublimation step are circularly performed at least twice, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than the thickness of the isolation layer at the lower part of the groove structure, and the etching amount of the isolation layer at the lower part of the groove structure can be ensured to meet the technological requirement.
By partially removing the solid by-product generated in the isotropic etching step in each preceding sublimation step so that the solid by-product which is not removed serves as a barrier layer in the next isotropic etching step, it is possible to achieve a state in which the etching rate of the upper portion and the etching rate of the lower portion of the trench structure are differentially adjusted, and when the sublimation step is performed, the volatilization rate of the by-product of the upper portion of the trench structure is higher than that of the lower portion, and by partially removing the solid by-product generated in the isotropic etching step in each preceding sublimation step, it is possible to form a thin upper portion, a thick lower portion, even a state in which the upper portion is free of the solid by-product, and the lower portion has a small amount of the solid by-product, which can maintain a state in which the etching amount of the isolation layer of the upper portion is large and the etching amount of the isolation layer of the lower portion is small in the subsequent isotropic etching step, so that it is possible to achieve a state in which the isolation layer thickness of the upper portion of the trench structure is smaller than the isolation layer thickness of the lower portion of the trench structure. The thicker the solid by-product is, the stronger the blocking effect is, so that the etching rate of the upper part and the lower part of the groove structure can be regulated differently, namely, the etching rate of the lower part of the groove structure is reduced, the thickness of the isolation layer on the upper part of the groove structure is smaller than that of the isolation layer on the lower part of the groove structure, holes (Void) in the groove can be avoided, and the process requirement is met.
In some alternative embodiments, in order to more easily control the sublimation time period of each sublimation step, so as to be able to precisely remove a portion of the solid by-product, the etching time period of each isotropic etching step is the same. However, the embodiment of the present invention is not limited thereto, and in practical applications, the etching duration of each isotropic etching step may be different. For example, the etching time of the first isotropic etching step is longer than 2 times and less than 5 times, preferably 2 to 2.5 times, the etching time of the subsequent isotropic etching step.
In some alternative embodiments, to achieve partial removal of solid byproducts while ensuring accuracy of removal, each sublimation step employs the same sublimation temperature, and the sublimation duration of each preceding sublimation step is less than the sublimation duration of the last sublimation step. The sublimation time of each previous sublimation step is shorter, so that partial removal of solid byproducts can be realized, and the sublimation time of the last sublimation step is longer, so that the solid byproducts can be completely removed. On the basis that sublimation temperatures adopted in each sublimation step are the same, a mode of independently adjusting sublimation time length is simpler, so that a control process can be simplified, and control difficulty is reduced. Of course, in practical application, the sublimation temperature and the sublimation time used in each sublimation step may also be adjusted simultaneously.
In some alternative embodiments, in order to achieve partial removal of the solid by-products while ensuring the accuracy of the removal, the sublimation time of each preceding sublimation step is greater than or equal to 5s (seconds) and less than or equal to 180s, preferably 75s; the sublimation temperature is 90 ℃ or higher and 150 ℃ or lower, preferably 120 ℃. Alternatively, the last sublimation step employs a sublimation time period of 120s to completely remove solid byproducts.
Taking three times of circulation execution of the isotropic etching step and the sublimation step as an example, the change of the etching morphology is shown in fig. 13, and before the step of etching 1 in fig. 13 is executed, larger holes (Void) appear if the filling layer is deposited in the current trench structure; after completing 1 cycle of etching (i.e., steps of etching 1 and sublimation 1 in fig. 13), holes (Void) occur if a filling layer is deposited in the current trench structure, but the holes almost disappear; after completing 2 times of cyclic etching (i.e., steps of etching 2 and sublimation 2 in fig. 13), 3 times of cyclic etching (i.e., steps of etching 3 and sublimation 3 in fig. 13), no holes (Void) occur if the filling layer is deposited in the current trench structure; moreover, after the 3 times of cyclic etching is completed, the thickness of the isolation layer at the upper part of the trench structure can be made smaller than that at the lower part.
In a specific embodiment, taking three times of cyclic execution of the isotropic etching step and the sublimation step as an example, the process parameters of the isotropic etching step are as follows: the chamber pressure is 0.05Torr to 10Torr, preferably 1.2Torr; the flow rate of the HF gas is 5sccm to 200sccm, preferably 20sccm; NH (NH) 3 The flow rate of the gas is 5sccm to 200sccm, preferably 12sccm; the flow rate of the HF gas is 50sccm to 3000sccm, preferably 650sccm; NH (NH) 3 The flow rate of the diluting gas of the gas is 50sccm to 3000sccm, preferably 150sccm; the distance between the substrate and the air guide device is 10 mm-50 mm, preferably 35mm; the etching time is 5 s-30 s, preferably 12s. The same technological parameters of the three sublimation steps are as follows: the chamber pressure is 0Torr to 10Torr, preferably 2Torr; n (N) 2 The flow rate of the gas is 0sccm to 5000sccm, preferably 1050sccm; the sublimation temperatures were 120 ℃.
Under the condition that the technological parameters of the isotropic etching step and other parameters of the sublimation step are unchanged, the sublimation time is respectively and sequentially 30s, 45s, 60s, 75s, 90s and 105s, the obtained etching morphology is shown in figure 14, and when the sublimation time is shorter (such as 30 s), the removal amount of solid byproducts is smaller, so that the etching rate is reduced when the isotropic etching step is carried out, and the final etching amount is lower; with the prolonged sublimation time (such as 45s and 60 s), the removal amount of the solid byproducts at the upper part of the groove structure is increased, and the finally formed etching morphology is that the thickness of the isolation layer at the upper part of the groove structure is smaller than or equal to that of the isolation layer at the lower part. When the sublimation time reaches a certain optimal time point (such as 75 s), the shape of the groove structure is an inverted trapezoid structure, and Void cannot be generated in the shape. However, when the sublimation time is further prolonged, the solid byproducts on the groove structure are excessively removed, even completely removed, the protection effect of the solid byproducts on the side wall of the groove structure is insufficient, even lost, and the middle position of the groove structure is recessed, so that Void is easy to appear. From the above, by controlling the sublimation time, a proper removal amount of the solid byproducts can be obtained, so that the protection effect on the side wall of the groove structure is not insufficient or even lost due to the excessive removal amount; or the etching amount of the side wall is insufficient due to the too small removal amount.
In some alternative embodiments, in the sublimation step, the sublimation temperature may be controlled by controlling a spacing between the substrate and the gas guide, the larger the spacing, the higher the sublimation temperature; conversely, the smaller the spacing, the lower the sublimation temperature. Preferably, the spacing is in the range of 5 mm-10 mm, and the numerical range can avoid excessive removal of solid byproducts caused by too small spacing, which results in excessive etching of the side wall of the isolation layer in the isotropic etching step, and can also avoid insufficient removal of solid byproducts caused by excessive spacing. After the sublimation step is completed, the substrate needs to be lowered onto the base as soon as possible to cool down, so that excessive volatilization of the solid byproducts is prevented, and the removal amount of the solid byproducts is excessive.
In some alternative embodiments, the process temperature at which the substrate is heated in the isotropic etching step is greater than or equal to 0 ℃ and less than or equal to 90 ℃. In this way, direct sublimation of solid by-products generated during the isotropic etching step due to excessive temperatures can be avoided.
As another technical solution, an embodiment of the present invention further provides a semiconductor processing chamber, which may be applied to the method for forming a trench isolation structure provided in the foregoing embodiment, to implement performing the isotropic etching step (i.e., performing the step S3) and the sublimation step (i.e., performing the step S4) in the same chamber. Taking the semiconductor processing chamber 11 as shown in fig. 6A and 6B as an example, it includes:
A susceptor 12 for carrying a substrate, the substrate being formed with a trench structure having an isolation layer formed therein;
the thimble mechanism is arranged in the base 12 and is used for jacking the substrate from the base 12 or placing the substrate on the base 12; the thimble mechanism comprises at least three thimble 14 which can be lifted;
an air guide 13 above the susceptor 12 and having a heating element for heating the substrate when the substrate is lifted from the susceptor 12;
control means for controlling the execution of the steps of:
performing an isotropic etching step (i.e., performing the above step S3) on the isolation layer, the isotropic etching step being for reacting with the isolation layer to generate solid byproducts adhering within the trench structure, and the trench structure generating more solid byproducts than the trench structure generating at the upper portion thereof;
performing a sublimation step (i.e., performing step S4 described above) on the solid by-product generated;
the isotropic etching step and the sublimation step are cyclically performed at least once so that the thickness of the isolation layer at the upper portion of the trench structure is smaller than the thickness of the isolation layer at the lower portion of the trench structure.
The specific structure and function of the semiconductor processing chamber 11 are described in detail above, and will not be described here.
By adopting the method for forming the groove isolation structure provided by the embodiment of the invention, the semiconductor processing chamber provided by the embodiment of the invention can not only effectively prolong the service life of hardware and reduce the consumable cost of equipment, but also prolong the periodic maintenance time of the equipment and improve the productivity, and can also avoid holes (Void) in the groove structure.
As another aspect, referring to fig. 16, an embodiment of the present invention further provides a method for forming a trench isolation structure, including:
s1', providing a substrate with a groove structure;
s2', depositing an isolation layer in the groove structure of the substrate;
s3', heating the substrate, and simultaneously executing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate a solid byproduct attached in the groove structure, and the substrate is heated to enable the generated solid byproduct to be converted into a gaseous substance, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that of the isolation layer at the lower part of the groove structure.
The step S1 'and the step S2' are the same as the step S1 and the step S2 in the method for forming a trench isolation structure provided in the foregoing embodiment, and are not described herein again.
The step S3' heats the substrate and simultaneously performs isotropic etching on the isolation layer, so that solid byproducts generated by etching are gasified immediately, and the removal of the solid byproducts is realized. This also makes it possible to make the thickness of the isolation layer at the upper portion of the trench structure smaller than that at the lower portion of the trench structure, compared with the method of forming the trench isolation structure provided in the above-described embodiment, so that occurrence of voids (Void) in the trench structure can be avoided.
Experiments show that under the condition of high temperature (such as more than or equal to 90 ℃ and less than or equal to 150 ℃, preferably more than or equal to 110 ℃ and less than or equal to 150 ℃), the substrate is heated, and the isotropic etching step is simultaneously carried out on the isolation layer, so that the generation amount of solid byproducts on the upper part and the lower part of the groove structure can be controlled differently, more solid byproducts are generated on the upper part of the groove structure than solid byproducts generated on the lower part of the groove structure, the thickness of the isolation layer on the upper part of the groove structure can be made to be smaller than that of the isolation layer on the lower part of the groove structure, and holes (Void) can be avoided from being generated in a subsequently deposited filling layer.
By adopting the method for forming the trench isolation structure provided by the embodiment of the invention, the finally obtained etching morphology is as shown in fig. 17, and the solid byproducts generated at the upper part of the trench structure are more than the solid byproducts generated at the lower part of the trench structure, so that the occurrence of holes (Void) in the trench can be avoided.
As another aspect, an embodiment of the present invention further provides a semiconductor processing chamber, which may be applied to the method for forming a trench isolation structure provided in the above embodiment, for heating a substrate and simultaneously performing an isotropic etching step (i.e., performing the step S3') on an isolation layer, and in particular, the semiconductor processing chamber includes
The susceptor is used for bearing the substrate and heating the substrate. The substrate is provided with a groove structure, and an isolation layer is formed in the groove structure;
the thimble mechanism is arranged in the base and is used for jacking the substrate from the base or placing the substrate on the base so as to realize the picking and placing operation of the substrate;
control means for controlling the execution of the following steps (i.e., the execution of the above step S3'):
and heating the substrate, and simultaneously performing an isotropic etching step on the isolation layer, wherein the isotropic etching step is used for reacting with the isolation layer to generate a solid byproduct attached in the groove structure, and the substrate is heated to convert the generated solid byproduct into a gaseous substance, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that of the isolation layer at the lower part of the groove structure.
In addition, the semiconductor processing chamber should meet the process temperature requirements for heating the substrate (e.g., 90 ℃ or higher to 150 ℃ or lower, preferably 110 ℃ or higher to 150 ℃).
The semiconductor processing chamber provided by the embodiments of the present invention, by adopting the method for forming the trench isolation structure provided by the embodiments of the present invention, not only can the service life of hardware be effectively prolonged, the consumable cost of equipment be reduced, but also the periodic maintenance time of equipment can be prolonged, the productivity can be improved, and in addition, holes (Void) in the trench can be avoided.
It is to be understood that the above embodiments are merely illustrative of the application of the principles of the present invention, but not in limitation thereof. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the invention, and are also considered to be within the scope of the invention.
Claims (12)
1. A method of forming a trench isolation structure, the method comprising:
providing a substrate with a groove structure;
depositing an isolation layer over the trench structure of the substrate;
An isotropic etching step is carried out on the isolation layer, the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure, and the solid byproducts can prevent the etching reaction from further proceeding;
performing a sublimation step on the solid by-product produced;
performing the isotropic etching step and the sublimation step at least twice in a circulating manner so that the thickness of the isolation layer at the upper part of the trench structure is smaller than the thickness of the isolation layer at the lower part of the trench structure;
the etching time length of the first isotropic etching step is longer than the etching time length of the subsequent isotropic etching step, so that the etching amount of the isotropic etching step to the upper part of the groove structure is increased; or,
the sublimation step is performed in each previous step to partially remove the solid byproducts generated in the isotropic etching step, so that the solid byproducts which are not removed are used as a barrier layer of the isotropic etching step in the next step, and the solid byproducts are completely removed in the sublimation step in the last step.
2. The method of forming a trench isolation structure of claim 1 wherein the first isotropic etching step causes the solid by-product generated at the upper portion of the trench structure to close the upper opening of the trench structure.
3. The method of forming a trench isolation structure of claim 1 wherein the etch time of the first isotropic etch step is greater than 2 times and less than 5 times the etch time of the subsequent isotropic etch step.
4. A method of forming a trench isolation structure as claimed in claim 1 or claim 2 wherein each of said sublimation steps completely removes said solid by-product generated by said isotropic etching step if the etching time period of said first isotropic etching step is longer than the etching time period of said subsequent isotropic etching step.
5. The method of forming a trench isolation structure of claim 1 wherein the duration of each isotropic etching step is the same if the solid by-product generated by the isotropic etching step was partially removed each time before the sublimation step.
6. The method of forming a trench isolation structure of claim 1 wherein each of said sublimation steps employs the same sublimation temperature, and wherein the duration of sublimation in each of said preceding sublimation steps is less than the duration of sublimation in the last of said sublimation steps.
7. The method of forming a trench isolation structure of claim 6 wherein each of said sublimation steps has a sublimation time period of 5 seconds or more and 180 seconds or less and a sublimation temperature of 90 ℃ or more and 150 ℃ or less.
8. The method of forming a trench isolation structure of claim 1 wherein a process temperature of heating the substrate in the isotropic etching step is greater than or equal to 0 ℃ and less than or equal to 90 ℃.
9. A method of forming a trench isolation structure as claimed in any of claims 1 to 3 or 5 to 8 wherein each of said isotropic etching step and said sublimation step is performed in the same chamber.
10. The method of forming a trench isolation structure of claim 4 wherein each of said isotropic etching step and said sublimation step are performed in the same chamber.
11. The method of forming a trench isolation structure of claim 9 wherein the substrate is located on a pedestal within the chamber while performing the isotropic etching step;
when the sublimation step is performed, a thimble mechanism within the susceptor causes the substrate to rise up to near the gas guide above the chamber.
12. A semiconductor processing chamber, comprising:
the substrate is provided with a groove structure, and an isolation layer is formed in the groove structure;
the thimble mechanism is arranged in the base and used for jacking the substrate from the base or placing the substrate on the base;
the air guide device is positioned above the base and provided with a heating element for heating the substrate when the substrate is jacked up from the base;
a control device for controlling the execution of the following steps:
an isotropic etching step is carried out on the isolation layer, the isotropic etching step is used for reacting with the isolation layer to generate solid byproducts attached in the groove structure, the solid byproducts generated at the upper part of the groove structure are more than the solid byproducts generated at the lower part of the groove structure, and the solid byproducts can prevent the etching reaction from further proceeding;
Performing a sublimation step on the solid by-product produced;
performing the isotropic etching step and the sublimation step at least twice in a circulating manner, so that the thickness of the isolation layer at the upper part of the groove structure is smaller than that at the lower part of the groove structure;
the etching time length of the first isotropic etching step is longer than the etching time length of the subsequent isotropic etching step, so that the etching amount of the isotropic etching step to the upper part of the groove structure is increased; or,
the sublimation step is performed in each previous step to partially remove the solid byproducts generated in the isotropic etching step, so that the solid byproducts which are not removed are used as a barrier layer of the isotropic etching step in the next step, and the solid byproducts are completely removed in the sublimation step in the last step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211501572.9A CN115732396B (en) | 2022-11-28 | 2022-11-28 | Method for forming trench isolation structure and semiconductor processing chamber |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202211501572.9A CN115732396B (en) | 2022-11-28 | 2022-11-28 | Method for forming trench isolation structure and semiconductor processing chamber |
Publications (2)
Publication Number | Publication Date |
---|---|
CN115732396A CN115732396A (en) | 2023-03-03 |
CN115732396B true CN115732396B (en) | 2024-03-12 |
Family
ID=85298631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202211501572.9A Active CN115732396B (en) | 2022-11-28 | 2022-11-28 | Method for forming trench isolation structure and semiconductor processing chamber |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN115732396B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101236902A (en) * | 2007-01-31 | 2008-08-06 | 三星电子株式会社 | Method of removing an oxide and method of filling a trench using the same |
US7981763B1 (en) * | 2008-08-15 | 2011-07-19 | Novellus Systems, Inc. | Atomic layer removal for high aspect ratio gapfill |
US8748322B1 (en) * | 2013-04-16 | 2014-06-10 | Applied Materials, Inc. | Silicon oxide recess etch |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6867086B1 (en) * | 2003-03-13 | 2005-03-15 | Novellus Systems, Inc. | Multi-step deposition and etch back gap fill process |
US20090127648A1 (en) * | 2007-11-15 | 2009-05-21 | Neng-Kuo Chen | Hybrid Gap-fill Approach for STI Formation |
US20150064921A1 (en) * | 2013-08-30 | 2015-03-05 | Applied Materials, Inc. | Low temperature plasma anneal process for sublimative etch processes |
JP6615153B2 (en) * | 2017-06-16 | 2019-12-04 | 東京エレクトロン株式会社 | Substrate processing apparatus, substrate mounting mechanism, and substrate processing method |
FR3113770A1 (en) * | 2020-08-31 | 2022-03-04 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Process for manufacturing micro-electronic components |
-
2022
- 2022-11-28 CN CN202211501572.9A patent/CN115732396B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101236902A (en) * | 2007-01-31 | 2008-08-06 | 三星电子株式会社 | Method of removing an oxide and method of filling a trench using the same |
US7981763B1 (en) * | 2008-08-15 | 2011-07-19 | Novellus Systems, Inc. | Atomic layer removal for high aspect ratio gapfill |
US8748322B1 (en) * | 2013-04-16 | 2014-06-10 | Applied Materials, Inc. | Silicon oxide recess etch |
Also Published As
Publication number | Publication date |
---|---|
CN115732396A (en) | 2023-03-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI835295B (en) | Method of post-deposition treatment for silicon oxide film | |
TWI713834B (en) | Method of depositing thin film, and method of manufacturing semiconductor device | |
TWI396253B (en) | Gapfill improvement with low etch rate dielectric liners | |
CN110431661B (en) | Two-step process for gap filling high aspect ratio trenches with amorphous silicon films | |
KR100660890B1 (en) | Method for forming silicon dioxide film using atomic layer deposition | |
US7097886B2 (en) | Deposition process for high aspect ratio trenches | |
US7217659B2 (en) | Process for producing materials for electronic device | |
TWI450338B (en) | Method for fabricating a gate dielectric of a field effect transistor | |
US20130260564A1 (en) | Insensitive dry removal process for semiconductor integration | |
CN113841225A (en) | Carbon-based deposition for critical dimension control and protective layer formation during high aspect ratio feature etching | |
JP5823160B2 (en) | Deposit removal method | |
TW201527576A (en) | Cyclic deposition method for thin film formation, semiconductor manufacturing method, and semiconductor device | |
CN109326553B (en) | Forming method of trench isolation structure and chemical vapor deposition process | |
JP7374308B2 (en) | Method and apparatus for depositing dielectric materials | |
JP2023536422A (en) | Multilayer deposition and processing of silicon nitride films | |
CN115732396B (en) | Method for forming trench isolation structure and semiconductor processing chamber | |
CN107564800B (en) | Preparation method of silicon nitride layer | |
EP2819150B1 (en) | Deposit removing method | |
JP2022550057A (en) | Mask encapsulation to prevent degradation during fabrication of high aspect ratio features | |
CN118291946B (en) | Thin film deposition method capable of improving deep hole filling uniformity | |
US11538677B2 (en) | Systems and methods for depositing high density and high tensile stress films | |
KR101576639B1 (en) | Method for depositing insulating film | |
KR100993170B1 (en) | Method for forming high dielectric constant layer and method for fabricating semiconductor capacitor using the same | |
KR100558040B1 (en) | Method for manufacturing semiconductor device for removal of moat | |
JP2023065305A (en) | Deposition method and deposition system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |