CN115720251A

CN115720251A - VSYNC signal processing device and method for regional dimming and electronic equipment

Info

Publication number: CN115720251A
Application number: CN202211447578.2A
Authority: CN
Inventors: 伍浩然; 李东明
Original assignee: Shenzhen Konka Electronic Technology Co Ltd
Current assignee: Shenzhen Konka Electronic Technology Co Ltd
Priority date: 2022-11-18
Filing date: 2022-11-18
Publication date: 2023-02-28

Abstract

The present disclosure provides a VSYNC signal processing apparatus and method for local dimming, and an electronic device, wherein the apparatus includes: the device comprises a first timer, a second timer and a control unit, wherein the VSYNC input signal is captured by a first input channel on the rising edge of the VSYNC input signal, and a first interrupt task is triggered; the second input channel captures the falling edge of a VSYNC input signal and triggers a second interrupt task; the single chip microcomputer is connected with the first timer, and is used for pulling up a first GPIO (general purpose input/output) of the VSYNC output signal when processing the first interrupt task, controlling the first timer to reset counting, and calculating the duty ratio and frequency of the VSYNC input signal when meeting a preset condition; and the singlechip pulls down the first GPIO when processing the second interrupt task. Through this openly, solved and can't measure calculation VSYNC signal frequency and duty cycle with hardware, can't deal with the problem of the condition of system VSYNC signal loss, this openly uses hardware timer to realize measuring VSYNC signal parameter and can follow in real time again, and the response is fast, the good reliability.

Description

VSYNC signal processing device and method for regional dimming and electronic equipment

Technical Field

The present invention relates to the field of local dimming technologies, and in particular, to a VSYNC signal processing apparatus and method for local dimming, and an electronic device.

Background

A Vertical Synchronization (VSYNC) signal, also called a field synchronization signal, is given by SOC or TCON in a local dimming backlight application for synchronously updating the backlight brightness at the time of one frame picture switching. The backlight flicker can be caused by unstable VSYNC signals or non-real-time response of a receiving end, and the picture impression is influenced.

The prior art mainly uses the following method to process the received system VSYNC signal:

1. and the receiving end MCU only enables the rising and falling edges of the GPIO to trigger, and outputs a following signal through the other path of GPIO.

2. The method comprises the steps of testing a received VSYNC signal when the MCU is electrified and initialized, calculating the duty ratio and the frequency, and setting a timer according to fixed parameters to independently output a VSYNC signal to a driving chip.

The prior art has the following problems:

1. the frequency and the duty ratio of the VSYNC signal can not be measured and calculated by hardware, and the condition that the VSYNC signal of the system is lost can not be dealt with.

2. With the accumulation of time, the VSYNC signal independently given to the driving chip and the system VSYNC signal lose synchronism, and the responsiveness is poor in time when the system VSYNC signal changes.

At present, no effective solution is provided for the problem that the frequency and duty ratio of a VSYNC signal cannot be measured and calculated by hardware in the related art, and the condition of system VSYNC signal loss cannot be solved.

Disclosure of Invention

The present disclosure is directed to overcoming the deficiencies in the prior art and providing a VSYNC signal processing apparatus, a method, an electronic device, and a computer-readable storage medium for local dimming, so as to solve at least the problems of the related art that the VSYNC signal frequency and the duty ratio cannot be calculated by hardware measurement, and the system VSYNC signal loss cannot be handled.

According to an aspect of the present disclosure, there is provided a VSYNC signal processing apparatus for local dimming, including:

a first timer comprising a first input channel and a second input channel, wherein a VSYNC input signal is captured by the first input channel on a rising edge of the VSYNC input signal and triggers a first interrupt task; the VSYNC input signal is captured by the second input channel at the falling edge of the VSYNC input signal, and a second interrupt task is triggered;

the single chip microcomputer is connected with the first timer, and the single chip microcomputer is used for pulling up a first GPIO (general purpose input/output) of a VSYNC (vertical synchronous rectification) output signal when processing the first interrupt task, controlling the first timer to reset counting, and calculating the duty ratio and frequency of the VSYNC input signal when a preset condition is met; and the single chip microcomputer pulls down the first GPIO when processing the second interrupt task.

According to another aspect of the present disclosure, there is provided a VSYNC signal processing method for local dimming, including:

judging whether a VSYNC input signal is detected;

if the VSYNC input signal is detected, controlling a first timer to reset counting when a first interrupt task triggered by the rising edge of the VSYNC input signal is detected, judging whether a preset condition is met, if so, calculating the duty ratio and frequency of the VSYNC input signal, and raising the GPIO for outputting the VSYNC output signal; if the preset condition is not met, directly pulling up GPIO for outputting the VSYNC output signal;

and when a second interrupt task triggered by the falling edge of the VSYNC input signal is detected, pulling down a GPIO for outputting the VSYNC output signal.

According to another aspect of the present disclosure, there is provided an electronic device including:

a processor; and

a memory for storing a program, wherein the program is stored in the memory,

wherein the program comprises instructions that when executed by the processor cause the processor to perform the VSYNC signal processing method for local dimming in the present disclosure.

According to another aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the VSYNC signal processing method for local dimming in the present disclosure.

According to one or more technical solutions provided in the embodiments of the present disclosure, by using a first timer, a VSYNC input signal is captured by a rising edge of a first input channel of the first timer, and a first interrupt task is triggered; the VSYNC input signal is captured by the second input channel at the falling edge, a second interrupt task is triggered, then a first GPIO for outputting a VSYNC output signal is pulled up when the first interrupt task is processed by the single chip microcomputer, a first timer is controlled to reset counting, and the duty ratio and the frequency of the VSYNC input signal are calculated when preset conditions are met; the first GPIO is pulled down when the second interrupt task is processed, the problems that in the related technology, the VSYNC signal frequency and the duty ratio cannot be measured and calculated through hardware, and the condition that the VSYNC signal is lost cannot be solved can be solved, the VSYNC signal parameter measured through a hardware timer can be followed in real time, and the effects of quick response and good reliability are achieved.

Drawings

Further details, features and advantages of the disclosure are disclosed in the following description of exemplary embodiments, taken in conjunction with the accompanying drawings, in which:

fig. 1 shows a schematic diagram of a VSYNC signal processing device for local dimming according to an exemplary embodiment of the present disclosure;

fig. 2 shows a flowchart of a VSYNC signal processing method for local dimming according to an exemplary embodiment of the present disclosure;

fig. 3 shows a flow diagram of a VSYNC signal processing method for local dimming according to a preferred embodiment of the present disclosure;

FIG. 4 illustrates a block diagram of an exemplary electronic device that can be used to implement embodiments of the present disclosure.

Detailed Description

Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more complete and thorough understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure.

It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order, and/or performed in parallel. Moreover, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.

The term "include" and variations thereof as used herein are open-ended, i.e., "including but not limited to". The term "based on" is "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions for other terms will be given in the following description. It should be noted that the terms "first", "second", and the like in the present disclosure are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence relationship of the functions performed by the devices, modules or units.

It is noted that references to "a", "an", and "the" modifications in this disclosure are intended to be illustrative rather than limiting, and that those skilled in the art will recognize that "one or more" may be used unless the context clearly dictates otherwise.

The names of messages or information exchanged between devices in the embodiments of the present disclosure are for illustrative purposes only, and are not intended to limit the scope of the messages or information.

Aspects of the present disclosure are described below with reference to the accompanying drawings.

The disclosed exemplary embodiments provide a VSYNC signal processing apparatus for local dimming.

Fig. 1 shows a schematic diagram of a VSYNC signal processing apparatus for local dimming according to an exemplary embodiment of the present disclosure, which, as shown in fig. 1, may include:

a first timer (i.e. the timer 1 shown In fig. 1) comprising a first input channel (i.e. the input channel 1 shown In fig. 1) and a second input channel (i.e. the input channel 2 shown In fig. 1), wherein a VSYNC input signal output by the system on chip SOC is captured by the first input channel at a rising edge of the VSYNC input signal through GPIO In, and triggers a first interrupt task; the VSYNC input signal is captured by the second input channel at the falling edge of the VSYNC input signal and triggers a second interrupt task.

The single chip microcomputer (namely, an MCU CORE shown in fig. 1) is connected with the first timer, and when the single chip microcomputer processes the first interrupt task, the single chip microcomputer raises a first GPIO (namely, a GPIO Out shown in fig. 1) of a VSYNC output signal, controls the first timer to reset counting, and calculates the duty ratio and the frequency of the VSYNC input signal when a preset condition is met; and the singlechip pulls down the first GPIO when processing the second interrupt task.

And a second timer (i.e., the timer 2 shown in fig. 1) connected to the single chip, wherein when the VSYNC input signal is not detected for more than a preset time, the first timer triggers an overflow interrupt task, and the single chip processes the overflow interrupt task to control the second timer to perform pulse width modulation on the VSYNC output signal at a duty ratio and a frequency of the last time.

As shown in fig. 1, a first GPIO (i.e., GPIO Out shown in fig. 1) of the VSYNC signal processing device for local dimming is connected to a driving chip, and is configured to output the VSYNC output signal; the second GPIO, GPIO In shown In fig. 1), is connected to the system-on-chip for receiving the VSYNC input signal.

The exemplary embodiment of the present disclosure provides a VSYNC signal processing method for local dimming. Fig. 2 shows a flowchart of a VSYNC signal processing method for local dimming according to an exemplary embodiment of the present disclosure, which includes the steps of:

step S201, judging whether a VSYNC input signal is detected;

step S202, if the VSYNC input signal is detected, when a first interrupt task triggered by the rising edge of the VSYNC input signal is detected, controlling a first timer to reset counting, judging whether a preset condition is met, if the preset condition is met, calculating the duty ratio and frequency of the VSYNC input signal, and increasing the GPIO of the output VSYNC output signal; if the preset condition is not met, directly pulling up GPIO for outputting the VSYNC output signal;

step S203, when detecting a second interrupt task triggered by a falling edge of the VSYNC input signal, pulling down a GPIO that outputs the VSYNC output signal.

Through the steps, the hardware timer is used, active software intervention is not needed after configuration is completed, the VSYNC parameters can be measured and followed in real time, response is fast, and reliability is good. The problem of in the correlation technique unable with hardware measurement calculation VSYNC signal frequency and duty cycle, unable the condition of coping with system VSYNC signal loss is solved.

In some embodiments, the determining whether the preset condition is met includes:

judging whether the first interrupt task triggered by the rising edge of the VSYNC input signal is detected for the first time;

if the first interrupt task triggered by the rising edge of the VSYNC input signal is detected for the first time, determining that the preset condition is met;

if the first interrupt task triggered by the rising edge of the VSYNC input signal is not detected for the first time, judging whether a difference value between a current parameter of the VSYNC input signal and a historical parameter of the VSYNC input signal recorded last time exceeds a target threshold value;

if the difference value between the current parameter of the VSYNC input signal and the historical parameter of the VSYNC input signal recorded last time exceeds the target threshold value, determining that the preset condition is met;

and if the difference value between the current parameter of the VSYNC input signal and the historical parameter of the VSYNC input signal recorded last time does not exceed the target threshold value, determining that the preset condition is not met.

It should be noted that, first, the system VSYNC input signal is captured by the first input channel and the second input channel of the two input channels of the first timer respectively at the rising edge and the falling edge of the signal, and the capture event interrupt is triggered. The first timer is set to the Restart mode count and the count is reset on the next rising edge.

When the single chip microcomputer processes a first interrupt task of a first input channel (rising edge), the GPIO corresponding to a VSYNC output signal of the driving chip is firstly pulled up, and meanwhile, the first timer resets counting. And the first input channel and second input channel associated registers will retain the captured VSYNC input signal high and low time for calculating the frequency and duty cycle of the system VSYNC input signal.

The second interrupt task of the second input channel (falling edge) of the first timer is simple, and the single chip microcomputer only pulls down the GPIO corresponding to the VSYNC output signal of the driving chip, so that parameter calculation and real-time following of the VSYNC signal are completed once.

Considering the performance of the MCU of the single chip microcomputer, the duty ratio and the frequency of the VSYNC input signal are not required to be calculated every time, only one time of complete measurement and recording are needed during power-on initialization, only when the difference between the real-time current data recorded by the MCU timer and the historical data reserved by the MCU exceeds a threshold value in the subsequent stage, recalculation is needed, otherwise, only the GPIO is required to be simply pulled high and pulled low to follow the VSYNC input signal of the system. The threshold value is selected, and whether the backlight flickers or not needs to be judged according to subjective evaluation to adjust when the system SOC changes gradually.

In some embodiments, after determining whether the VSYNC input signal is detected, the method may further include:

and when the VSYNC input signal is not detected after the preset time, controlling a second timer to perform pulse width modulation on the VSYNC output signal at the duty ratio and the frequency of the last time.

It should be noted that, the first timer also starts update (overflow) interrupt at the same time, and the MCU adjusts the automatic reload value of the first timer in time and reasonably by measuring the frequency of the system VSYNC input signal, specifically: after the frequency of the VSYNC input signal is updated, a new frequency calculation period of the VSYNC input signal is calculated, then a new automatic reloading value is converted by the clock frequency of the first timer, the time required for the first timer to count to reach the automatic reloading value is slightly longer than the period of the new VSYNC input signal by 10% -20%, misjudgment overtime is avoided, therefore, the first timer can be triggered to overflow and interrupt after the VSYNC input signal of the system does not rise or fall, the VSYNC input signal of the system can quickly respond after overtime or loss of one frame of information, the PWM output function of the second timer is started, and PWM is output according to the frequency and duty ratio of the VSYNC input signal of the previous system. And closing the second timer after the first timer detects the system VSYNC input signal again, thereby ensuring the stability of backlight and preventing flicker.

In some embodiments, after detecting the VSYNC input signal, the method further comprises:

judging whether an initialization VSYNC signal provided during initialization is effective;

if the initialization VSYNC signal is valid, judging whether the overflow interruption of the first timer is started or not after the initialization VSYNC signal is closed; if the initialization VSYNC signal is invalid, directly judging whether the overflow interruption of the first timer is started or not;

if the overflow interruption of the first timer is not started, judging whether the first interruption task triggered by the rising edge of the VSYNC input signal is detected or not after the overflow interruption of the first timer is started;

and if the overflow interrupt of the first timer is started, directly judging whether the first interrupt task triggered by the rising edge of the VSYNC input signal is detected.

The embodiments of the present application are described and illustrated below by way of preferred embodiments.

Fig. 3 shows a flowchart of a VSYNC signal processing method for local dimming according to a preferred embodiment of the present disclosure, which includes the following steps, as shown in fig. 3:

step S301, during initialization, the MCU provides an initial VSYNC signal; the MCU is a singlechip, and the initial VSYNC signal is a VSYNC input signal;

step S302, judging whether a VSYNC signal is captured or not when the system VSYNC is input normally; if yes, executing step S303, otherwise executing step S317;

step S303, judging whether VSYNC provided by the MCU is still effective; if yes, go to step S304; if not, executing step S305;

step S304, closing the self-provided VSYNC;

step S305, determining whether an overflow interrupt of the timer 1 (i.e., the first timer in the embodiment of the present disclosure) is started; if not, executing step S306; if yes, go to step S307;

step S306, enabling timer 1 to overflow and interrupt;

step S307, judging whether capturing rising edge trigger; if not, executing step S308; if yes, go to step S309;

step S308, the GPIO of VSYNC output is pulled down, and then a trigger event is waited for;

step S309, resetting the timer 1;

step S310, judging whether the capture event is triggered for the first time; if yes, go to step S311; if not, executing step S313;

step S311, calculating the frequency and duty ratio of the VSYNC of the system, and keeping a backup in the MCU;

step S312, reloading the count value of the timer 1;

step 313, judging whether the difference from the old data exceeds a threshold value; if yes, go to step S311; if not, executing step S314;

step S314, the GPIO of the VSYNC signal output by the MCU is pulled up, and then a trigger event is waited.

When the system VSYNC is lost, step S315 is executed to determine whether the timer 1 counts overflow; if yes, go to step S316; enabling the MCU timer 2 (i.e., the second timer in the embodiment of the present disclosure) to output VSYNC with the same parameters, turning off the timer 1 overflow interrupt, then executing step S317, reserving the VSYNC that was last set, and then waiting for a trigger event.

The embodiment of the disclosure measures the frequency and duty ratio of the VSYNC signal in the local dimming or multi-partition dynamic backlight application through the MCU hardware timer, can simultaneously follow the output VSYNC in real time, has the function of guaranteeing the backlight stability by providing the VSYNC signal with the same parameters after timeout, and has the function of restoring, following and measuring after the system VSYNC is recovered.

It should be noted that the steps illustrated in the above-described flow diagrams or in the flow diagrams of the figures may be performed in a computer system, such as a set of computer-executable instructions, and that, although a logical order is illustrated in the flow diagrams, in some cases, the steps illustrated or described may be performed in an order different than here.

An exemplary embodiment of the present disclosure also provides an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor. The memory stores a computer program executable by the at least one processor, the computer program, when executed by the at least one processor, is for causing the electronic device to perform a method according to an embodiment of the disclosure.

The disclosed exemplary embodiments also provide a non-transitory computer readable storage medium storing a computer program, wherein the computer program, when executed by a processor of a computer, is adapted to cause the computer to perform a method according to an embodiment of the present disclosure.

The exemplary embodiments of the present disclosure also provide a computer program product comprising a computer program, wherein the computer program, when executed by a processor of a computer, is adapted to cause the computer to perform a method according to an embodiment of the present disclosure.

Referring to fig. 4, a block diagram of a structure of an electronic device 400, which may be a server or a client of the present disclosure, which is an example of a hardware device that may be applied to aspects of the present disclosure, will now be described. Electronic device is intended to represent various forms of digital electronic computer devices, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the disclosure described and/or claimed herein.

As shown in fig. 4, the electronic device 400 includes a computing unit 401 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 402 or a computer program loaded from a storage unit 408 into a Random Access Memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, ROM 402, and RAM 403 are connected to each other via a bus 404. An input/output (I/O) interface 405 is also connected to bus 404.

A number of components in the electronic device 400 are connected to the I/O interface 405, including: an input unit 406, an output unit 407, a storage unit 408, and a communication unit 409. The input unit 406 may be any type of device capable of inputting information to the electronic device 400, and the input unit 406 may receive input numeric or character information and generate key signal inputs related to user settings and/or function controls of the electronic device. Output unit 407 may be any type of device capable of presenting information and may include, but is not limited to, a display, speakers, a video/audio output terminal, a vibrator, and/or a printer. Storage unit 408 may include, but is not limited to, magnetic or optical disks. The communication unit 409 allows the electronic device 400 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunications networks, and may include, but is not limited to, modems, network cards, infrared communication devices, wireless communication transceivers, and/or chipsets, such as bluetooth devices, wiFi devices, wiMax devices, cellular communication devices, and/or the like.

Computing unit 401 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 401 executes the respective methods and processes described above. For example, in some embodiments, the VSYNC signal processing method for local dimming may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 400 via the ROM 402 and/or the communication unit 409. In some embodiments, the computing unit 401 may be configured to perform the VSYNC signal processing method for local dimming by any other suitable means (e.g., by means of firmware).

Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

As used in this disclosure, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and/or device (e.g., magnetic discs, optical disks, memory, programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal used to provide machine instructions and/or data to a programmable processor.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user may provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the Internet.

The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

Claims

1. A VSYNC signal processing device for local dimming is characterized by comprising:

2. The VSYNC signal processing device for local dimming according to claim 1, further comprising:

and the second timer is connected with the singlechip, wherein the first timer triggers an overflow interruption task when the VSYNC input signal is not detected after the preset time is exceeded, and the singlechip processes the overflow interruption task and controls the second timer to carry out pulse width modulation on the VSYNC output signal at the duty ratio and the frequency of the last time.

3. The VSYNC signal processing device for local dimming according to claim 1 or 2, further comprising:

the first GPIO is connected with a driving chip and used for outputting the VSYNC output signal;

and the second GPIO is connected with the system-on-chip and used for receiving the VSYNC input signal.

4. A VSYNC signal processing method for local dimming is characterized by comprising the following steps:

judging whether a VSYNC input signal is detected;

and when a second interrupt task triggered by the falling edge of the VSYNC input signal is detected, pulling down a GPIO (general purpose input/output) of the VSYNC output signal.

5. The VSYNC signal processing method for local dimming according to claim 4, wherein the determining whether the preset condition is satisfied comprises:

6. The VSYNC signal processing method for local dimming as set forth in claim 4, further comprising, after determining whether a VSYNC input signal is detected,:

7. The VSYNC signal processing method for local dimming as set forth in claim 4, further comprising, after detecting the VSYNC input signal:

judging whether the overflow interruption of the first timer is started or not;

8. The VSYNC signal processing method for local dimming of claim 7, further comprising, after detecting the VSYNC input signal:

judging whether an initialization VSYNC signal provided during initialization is valid:

if the initialization VSYNC signal is valid, closing the initialization VSYNC signal and then executing the step of judging whether the overflow interruption of the first timer is started or not;

and if the initialization VSYNC signal is invalid, directly executing the step of judging whether the overflow interrupt of the first timer is started or not.

9. An electronic device, comprising:

a processor; and

a memory for storing the program, wherein the program is stored in the memory,

wherein the program comprises instructions which, when executed by the processor, cause the processor to carry out the VSYNC signal processing method for local dimming according to any one of claims 4-8.

10. A non-transitory computer-readable storage medium storing computer instructions for causing a computer to execute the VSYNC signal processing method for local dimming according to any one of claims 4-8.