CN115700997A - Transimpedance amplifier (TIA) with tunable input resistance - Google Patents
Transimpedance amplifier (TIA) with tunable input resistance Download PDFInfo
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- CN115700997A CN115700997A CN202211136875.5A CN202211136875A CN115700997A CN 115700997 A CN115700997 A CN 115700997A CN 202211136875 A CN202211136875 A CN 202211136875A CN 115700997 A CN115700997 A CN 115700997A
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Abstract
The present disclosure relates to a transimpedance amplifier (TIA) with a tunable input resistance. An electronic device is disclosed that may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs a signal to a transimpedance amplifier. The mixer has an output impedance that varies according to the operating frequency. An adjustable resistor may be coupled to an input of the transimpedance amplifier. A control circuit may tune the adjustable resistance to compensate for changes in the output impedance of the mixer when the transceiver is operating over a wide frequency range.
Description
The application is a divisional application of Chinese patent application entitled "transimpedance amplifier (TIA) with tunable input resistance" with application number 202210637930.2, application number 2022, 7/6/2022.
This application claims priority from U.S. patent application No. 17/375,843, filed on 14/7/2021, which is hereby incorporated by reference in its entirety.
Technical Field
The present disclosure relates generally to electronic devices, and more particularly to electronic devices having wireless communication circuitry.
Background
Electronic devices often have wireless communication capabilities. An electronic device with wireless communication capabilities has wireless communication circuitry with one or more antennas. A wireless receiver circuit in the wireless communication circuit receives radio frequency signals using an antenna.
The signal received by the antenna is fed through a receiver, which typically includes a mixer coupled to a transimpedance amplifier. Designing a satisfactory receiver for an electronic device can be a challenge.
Disclosure of Invention
The electronic device may include wireless communication circuitry. The wireless communication circuitry may include: an antenna; a transceiver configured to receive a radio frequency signal from an antenna and generate a corresponding baseband signal; and a baseband processor configured to receive baseband signals from the transceiver.
One aspect of the present disclosure provides a wireless circuit capable of operating in multiple radio frequency bands and multiple radio frequency standards. The wireless circuit may include: an antenna configured to receive a radio frequency signal; a first amplifier having an input coupled to the antenna and having an output; an oscillator circuit; a mixer having a first input coupled to the output of the first amplifier, having a second input coupled to the oscillator circuit, and having an output with an output impedance; a second amplifier having an input coupled to the output of the mixer; and an adjustable resistor coupled to the input of the second amplifier and configured to compensate for variations in the output impedance of the mixer when the wireless circuit operates across the plurality of radio frequency bands. One or more shunt capacitors may be coupled to the input of the second amplifier. One or more feedback capacitors and feedback resistors may be coupled across the input and output of the second amplifier. The first amplifier may be a low noise amplifier and the second amplifier may be a broadband transimpedance amplifier. The tunable resistor may include a plurality of resistor strings, each having at least one resistor and at least one switch that are selectively enabled and disabled according to an operating frequency of the wireless circuit.
One aspect of the present disclosure provides a method of operating a wireless circuit in multiple radio frequency bands. The method can comprise the following steps: receiving a radio frequency signal using an antenna; receiving a signal from the antenna using a first amplifier; receiving a signal from the first amplifier and receiving a signal from an oscillator using a mixer, the mixer having an output impedance; receiving a signal from the mixer using a second amplifier; and tuning an adjustable resistor coupled to an input of the second amplifier to compensate for variations in the output impedance of the mixer when the wireless circuit operates across the plurality of radio frequency bands. The tunable resistor may be tuned to provide a first resistance value when the wireless circuitry operates in a first radio frequency band of the plurality of radio frequency bands, and may be tuned to provide a second resistance value greater than the first resistance value when the wireless circuitry operates in a second radio frequency band of the plurality of radio frequency bands that is greater than the first radio frequency band.
One aspect of the present disclosure provides an electronic device. The electronic device may include: an antenna configured to receive a radio frequency signal. A baseband processor configured to receive baseband signals generated based on the radio frequency signals; an oscillator; a mixer having a first input coupled to the antenna, having a second input coupled to the oscillator, and having an output; an amplifier having an input coupled to the output of the mixer; and an adjustable resistor coupled to the input of the amplifier. The electronic device may also include a control circuit configured to tune the tunable resistor according to an operating frequency of the amplifier. One or more parallel capacitors may be coupled to the input of the amplifier. One or more feedback capacitors and feedback resistors may be coupled across the input and output of the amplifier. The amplifier may be a broadband transimpedance amplifier.
Drawings
Fig. 1 is a diagram of an illustrative electronic device with wireless communication circuitry in accordance with some embodiments.
Fig. 2 is a diagram of an exemplary wireless communication circuit having transceiver circuitry in accordance with some embodiments.
Fig. 3 is a diagram of an exemplary multi-standard receiver circuit, in accordance with some embodiments.
Fig. 4 is a diagram of an exemplary feedback receiver circuit, according to some embodiments.
Fig. 5 is a diagram of an exemplary receiver circuit with an adjustable resistor coupled between a mixer and an amplifier, according to some embodiments.
Fig. 6 is a graph plotting mixer output impedance as a function of oscillator frequency, according to some embodiments.
Fig. 7 is a graph plotting the resistance of an adjustable resistor configured to compensate for changes in mixer output impedance as a function of oscillator frequency, in accordance with some embodiments.
Fig. 8 is a circuit diagram of an illustrative tunable resistor configured to compensate for changes in mixer output impedance when operating across different radio frequency bands, in accordance with some embodiments.
Fig. 9 is a circuit diagram illustrating another embodiment of an illustrative tunable resistor configured to compensate for changes in mixer output impedance when operating across different radio frequency bands.
Fig. 10 is a diagram illustrating different modes for operating a receiver circuit of the type shown in connection with fig. 1-9, according to some embodiments.
Detailed Description
The electronic device may be provided with a wireless receiver circuit. The wireless receiver circuit may include an antenna, a low noise amplifier configured to receive a radio frequency signal from the antenna, a mixer configured to receive a signal from the low noise amplifier and receive an oscillator signal, and a transimpedance amplifier configured to receive a signal from the mixer. The wireless receiver circuit may operate in multiple radio frequency bands across multiple standards. The mixer may have an output impedance that varies across different radio frequency bands. An adjustable resistor may be provided at the input of the transimpedance amplifier to compensate for variations in the mixer output impedance. Configuring and operating the receiver circuit in this manner allows the performance of the transimpedance amplifier to be maintained across different radio frequency bands.
Fig. 1 is an illustration of an electronic device, such as electronic device 10, that may be provided with such wireless receiver circuitry. The electronic device 10 may be: a computing device, such as a notebook computer, desktop computer, computer monitor including an embedded computer, tablet computer, cellular telephone, media player, or other handheld or portable electronic device; smaller devices such as wrist watch devices, wall-mounted devices, earphone or headphone devices, devices embedded in eyeglasses; or other equipment worn on the head of the user; or other wearable or miniature devices, televisions, computer displays that do not contain an embedded computer, gaming devices, navigation devices, embedded systems (such as systems in which electronic equipment with a display is installed in a kiosk or in a car), voice-controlled speakers connected to the wireless internet, home entertainment devices, remote control devices, game controllers, peripheral user input devices, wireless base stations or access points, equipment that implements the functionality of two or more of these devices; or other electronic equipment.
As shown in the schematic diagram of fig. 1, device 10 may include components located on or within an electronic device housing, such as housing 12. The housing 12 (which may sometimes be referred to as a shell) may be formed from plastic, glass, ceramic, fiber composite, metal (e.g., stainless steel, aluminum, metal alloys, etc.), other suitable materials, or a combination of these materials. In some cases, part or all of housing 12 may be formed from a dielectric or other low conductivity material (e.g., glass, ceramic, plastic, sapphire, etc.). In other cases, at least some of the housing 12 or the structures making up the housing 12 may be formed from metal elements.
The apparatus 10 may include a control circuit 14. Control circuitry 14 may include storage devices, such as storage circuitry 16. The storage circuitry 16 may include hard disk drive storage, non-volatile memory (e.g., flash memory or other electrically programmable read-only memory configured to form a solid state drive), volatile memory (e.g., static random access memory or dynamic random access memory), and so forth. Storage circuitry 16 may include storage devices and/or removable storage media integrated within device 10.
The device 10 may include input-output circuitry 20. The input-output circuitry 20 may include an input-output device 22. Input-output devices 22 may be used to allow data to be supplied to device 10 and to allow data to be provided from device 10 to external devices. The input-output devices 22 may include user interface devices, data port devices, and other input-output components. For example, input-output devices 22 may include touch sensors, displays, lighting components such as displays without touch sensor capability, buttons (mechanical, capacitive, optical, etc.), scroll wheels, touch pads, keypads, keyboards, microphones, cameras, buttons, speakers, status indicators, audio jacks, and other audio port components, digital data port devices, motion sensors (accelerometers, gyroscopes, and/or compasses to detect motion), capacitive sensors, proximity sensors, magnetic sensors, force sensors (e.g., force sensors coupled to a display to detect pressure applied to the display), and so forth. In some configurations, a keyboard, headphones, a display, a pointing device such as a trackpad, a mouse, an electronic pen (e.g., a stylus) and joystick, and other input-output devices may be coupled to device 10 using wired or wireless connections (e.g., some of input-output devices 22 may be peripheral devices coupled to a main processing unit or other portion of device 10 via wired or wireless links).
Input-output circuitry 24 may include wireless communication circuitry for wirelessly communicating radio frequency signals, such as wireless communication circuitry 34 (sometimes referred to herein as wireless circuitry 24). Although the control circuit 14 is shown separate from the wireless communication circuit 24 for clarity, the wireless communication circuit 24 may include a processing circuit that forms a portion of the processing circuit 18 and/or a memory circuit that forms a portion of the memory circuit 16 of the control circuit 14 (e.g., portions of the control circuit 14 may be implemented on the wireless communication circuit 24). For example, control circuitry 14 (e.g., processing circuitry 18) may include baseband processor circuitry or other control components that form part of wireless communication circuitry 24.
The radio circuitry 24 may include radio-frequency transceiver circuitry for handling the transmission and/or reception of radio-frequency signals in various radio-frequency communications bands. For example, the radio frequency transceiver circuitry may handle Wireless Local Area Network (WLAN) communication bands such as 2.4GHz and 5GHz
(IEEE 802.11) frequency band, wireless Personal Area Network (WPAN) communication frequency band such as 2.4GHz
Communication bands, cellular telephone communication bands such as cellular Low Band (LB) (e.g., 600MHz to 960 MHz), cellular low and intermediate band (LMB) (e.g., 1400MHz to 1550 MHz), cellular Medium Band (MB) (e.g., 1700MHz to 2200 MHz), cellular High Band (HB) (e.g., 2300MHz to 2700 MHz), cellular Ultra High Band (UHB) (e.g., 3300MHz to 5000 MHz), or other cellular communication bands between about 600MHz and about 5000MHz (e.g., 3G band, 4G LTE band, 5G new air frequency range 1 (FR 1) band below 10GHz, 5G new air frequency range 2 (FR 2) band at millimeter and centimeter wavelengths between 20 and 60GHz, etc.), near Field Communication (NFC) bands (e.g., 13.56 MHz), satellite navigation bands (e.g., L1 GPS band for 5 MHz), L5 GPS band for 1176MHz, satellite navigation band (GLONASS) band, BDS band, 802.5 GHz navigation band), satellite navigation band (e.g., UWB band), or other satellite navigation band(s) supported by other communication protocols, e.g., UWB band, satellite navigation band, or other satellite navigation band(s) and/UWB communication protocols. The frequency bands of communication handled by such radio-frequency transceiver circuitry may sometimes be referred to herein as frequency bands or simply "frequency bands," and may span corresponding frequency ranges. In general, the radio-frequency transceiver circuitry in the radio circuitry 24 may cover (process) any desired frequency band of interest.
Fig. 2 is a schematic diagram showing illustrative components within the radio circuit 24. As shown in fig. 2, the wireless circuitry 24 may include a baseband processor, such as baseband processor 26, radio Frequency (RF) transceiver circuitry, such as RF transceiver 28, radio frequency front end circuitry, such as radio frequency Front End Module (FEM) 40, and an antenna 42. The baseband processor 26 may be coupled to the transceiver 28 by a baseband path 34. The transceiver 28 may be coupled to an antenna 42 via a radio frequency transmission line path 36. An rf front end module 40 may be interposed on the rf transmission line path 36 between the transceiver 28 and the antenna 42.
In the example of fig. 2, the radio circuit 24 is shown for clarity as including only a single baseband processor 26, a single transceiver 28, a single front end module 40, and a single antenna 42. In general, the radio circuit 24 may include any desired number of baseband processors 26, any desired number of transceivers 36, any desired number of front-end modules 40, and any desired number of antennas 42. Each baseband processor 26 may be coupled to one or more transceivers 28 through a respective baseband path 34. Each transceiver 28 may include one or more transmitters configured to output uplink signals to antennas 42, may include one or more receivers configured to receive downlink signals from antennas 42, and may be coupled to one or more antennas 42 by respective radio frequency transmission line paths 36. Each rf transmission line path 36 may have a respective front end module 40 interposed thereon. If desired, two or more front-end modules 40 may be interposed on the same radio frequency transmission line path 36. One or more of the radio transmission line paths 36 in the radio circuit 24 may be implemented without any front end modules interposed thereon, if desired.
The rf transmission line path 36 may be coupled to an antenna feed on an antenna 42. The antenna feed may, for example, comprise a positive antenna feed terminal and a ground antenna feed terminal. The radio frequency transmission line path 36 may have a positive transmission line signal path coupled to a positive antenna feed terminal on the antenna 42. The radio frequency transmission line path 36 may have a ground transmission line signal path coupled to a ground antenna feed terminal on the antenna 42. This example is merely illustrative, and in general, the antenna 42 may be fed using any desired antenna feeding scheme. The antenna 42 may have multiple antenna feeds coupled to one or more of the rf transmission line paths 36, if desired.
The radio frequency transmission line path 36 may include a transmission line for routing radio frequency antenna signals within the device 10 (fig. 1). The transmission lines in device 10 may include coaxial cables, microstrip transmission lines, stripline transmission lines, edge-coupled microstrip transmission lines, edge-coupled stripline transmission lines, transmission lines formed from combinations of these types of transmission lines, and the like. Transmission lines in device 10, such as transmission lines in radio frequency transmission line path 36, may be integrated into rigid and/or flexible printed circuit boards.
In performing wireless transmissions, the baseband processor 26 may provide baseband signals to the transceiver 28 over a baseband path 34. The transceiver 28 may also include circuitry for converting baseband signals received from the baseband processor 26 to corresponding radio frequency signals. For example, transceiver circuitry 28 may include mixer circuitry 50 for upconverting (or modulating) a baseband signal to a radio frequency prior to transmission through antenna 42. Transceiver circuitry 28 may also include digital-to-analog converter (DAC) circuitry and/or analog-to-digital converter (ADC) circuitry for converting signals between the digital and analog domains. The transceiver 28 may include a transmitter component to transmit radio frequency signals through an antenna 42 via a radio frequency transmission line path 36 and a front end module 40. The antenna 42 may transmit radio frequency signals to external wireless equipment by radiating the radio frequency signals into free space.
In performing wireless reception, the antenna 42 may receive radio frequency signals from external wireless equipment. The received radio frequency signals may be communicated to the transceiver 28 via the radio frequency transmission line path 36 and the front end module 40. Transceiver 28 may include circuitry for converting received radio frequency signals to corresponding baseband signals. For example, the transceiver 28 may use the mixer circuit 50 to down-convert (or demodulate) the received radio frequency signal to a baseband frequency before passing the received signal to the baseband processor 26 over the baseband path 34. The mixer circuit 50 may include an oscillator circuit, such as a local oscillator 52. Local oscillator 52 may generate oscillator signals that are used by mixer circuit 50 to modulate transmission signals from a baseband frequency to a radio frequency and/or demodulate received signals from a radio frequency to a baseband or intermediate frequency. Transceiver 28 may also include an amplifier, such as amplifier 54 configured to filter the signal output from mixer circuit 50.
The front-end module (FEM) 40 may include rf front-end circuitry that operates on rf signals transmitted (transmitted and/or received) over the rf transmission line path 36. The front-end module may, for example, include front-end module (FEM) components such as filter circuits (e.g., low-pass filters, high-pass filters, notch filters, band-pass filters), radio-frequency coupling/switching circuits 44 (e.g., radio-frequency couplers, multiplexing circuits, duplexer circuits, diplexer circuits, triplexer circuits, one or more radio-frequency switches, etc.), radio-frequency amplifier circuits (such as one or more power amplifiers 46 and one or more low-noise amplifiers 48), impedance matching circuits (e.g., circuits that facilitate matching the impedance of the antenna 42 to the impedance of the radio-frequency transmission line 36), antenna tuning circuits (e.g., a network of capacitors, resistors, inductors, and/or switches that adjust the frequency response of the antenna 42), charge pump circuits, power management circuits, digital control and interface circuits, and/or any other desired circuits that operate on radio-frequency signals transmitted and/or received by the antenna 42. Each of the front end module components may be mounted to a common (shared) substrate, such as a rigid printed circuit board substrate or a flexible printed circuit substrate. The various front end module components may also be integrated into a single integrated circuit chip if desired.
Transceiver circuitry 28 may include circuitry to handle WLAN communications bands (e.g.,
(IEEE 802.11) or other WLAN communication bands) such as 2.4GHz WLAN bands (e.g., 2400MHz to 2480 MHz), 5GHz WLAN bands (e.g., 5180MHz to 5825 MHz),
6E band (e.g., 5925MHz to 7125 MHz) and/or others
Wireless local area network transceiver circuitry for a frequency band (e.g., 1875MHz to 5160 MHz); processing 2.4GHz
Wireless personal area network transceiver circuitry in a frequency band or other WPAN communication band; cellular telephone transceiver circuitry that processes cellular telephone frequency bands (e.g., frequency bands of about 600MHz to about 5GHz, 3G frequency bands, 4G LTE frequency bands, 5G new air interface frequency range 1 (FR 1) frequency bands below 10GHz, 5G new air interface frequency range 2 (FR 2) frequency bands between 20GHz and 60GHz, etc.); near Field Communication (NFC) transceiver circuitry that handles a near field communication band (e.g., 13.56 MHz); processing satellite navigation bands (e.g. 1565MHz to 1610MHz GPS band, global satellite systemSatellite navigation receiver circuits for the navigation system (GLONASS) band, the beidou satellite navigation system (BDS) band, etc.); an ultra-wideband (UWB) transceiver circuit that processes communications using the IEEE 802.15.4 protocol and/or other ultra-wideband communication protocols; and/or any other desired radio-frequency transceiver circuitry for covering any other desired communications band of interest.
The radio circuit 24 may include one or more antennas, such as antenna 42. The antenna 42 may be formed using any desired antenna structure. For example, antenna 42 may be an antenna having a resonating element formed from a loop antenna structure, a patch antenna structure, an inverted-F antenna structure, a slot antenna structure, a planar inverted-F antenna structure, a helical antenna structure, a monopole antenna, a dipole, a hybrid of these designs, or the like. The two or more antennas 42 may be arranged as one or more phased antenna arrays (e.g., for transmitting radio frequency signals at millimeter wave frequencies). Parasitic elements may be included in the antenna 42 to adjust antenna performance. Antenna 42 may be provided with a conductive cavity that supports an antenna resonating element of antenna 42 (e.g., antenna 42 may be a cavity-backed antenna, such as a cavity-backed slot antenna).
The radio circuit 24 may operate in multiple radio frequency bands. Fig. 3 is a diagram illustrating a wireless circuit 24 having multiple receiver blocks for processing (receiving) signals from various radio frequency bands. As shown in fig. 3, the radio circuit 24 may include a first receiver block RX1 configured to receive signals in a first radio frequency band group BG1 from the antenna 42, a second receiver block RX2 configured to receive signals in a second radio frequency band group BG2 from the antenna 42, and a third receiver block RX3 configured to receive signals in a third radio frequency band group BG3 from the antenna 42, and so on. Each radio frequency band group may typically include a plurality of radio frequency bands. During normal operation, only a selected one of the receiver blocks is enabled, depending on the desired radio frequency band of operation. As one example, BG1 may cover communications in the range of 0.6GHz to 1GHz, BG2 may cover communications in the range of 1GHz to 1.8GHz, and BG3 may cover communications in the range of 1.8GHz to 2.3 GHz. These ranges of radio frequency bands are merely illustrative. In general, each radio frequency band may cover 400MHz, less than 400MHz, greater than 400MHz, 500MHz, 600MHz, 700MHz, or other frequency ranges. Local oscillator 52 may be used to provide an oscillator signal to one or more receiver blocks. For example, the first local oscillator 52 may be used to cover band groups BG1 and BG2. The second local oscillator 52 may be used to cover only a single band group BG3 (as an example). The third local oscillator 52 may be used to cover three or more band groups.
The example of the radio circuit 24 of fig. 3 comprising three separate receiver blocks for processing different radio frequency bands is merely illustrative. This type of wireless receiver circuit is sometimes referred to as a multi-band or multi-standard receiver. The receiver circuit may include more or less than three separate receiver blocks, if desired. The amplifier 54 used within such multi-standard receivers is sometimes referred to herein as a "wideband" amplifier.
Each of the receiver blocks RX1, RX2, and RX3 may include a switching circuit such as a radio frequency switch 44 coupled to the antenna 42 (or to a radio frequency duplexer), a matching circuit such as a matching circuit 47, a radio frequency amplifier such as a low noise amplifier (LAN) 48 configured to receive signals from the switch 44, and a mixer circuit such as a radio frequency mixer 51 configured to receive amplified signals from the low noise amplifier 48 and oscillator signals from a local oscillator 52. The radio circuit 24 may include a single amplifier circuit, such as an amplifier 54 coupled to the mixer 51 in each of a plurality of receiver blocks. Amplifier 54 may be, for example, a transimpedance amplifier (TIA). Amplifier 54 may be a wideband amplifier capable of handling communications across all of the various radio frequency band groups (e.g., BG1, BG2, BG3, etc.). This type of amplifier 54 having a wide bandwidth while being capable of handling communications across multiple radio frequency bands (standards) is sometimes referred to as a multi-band (multi-standard) wideband amplifier.
The example of the radio circuit 24 of fig. 3 including multiple receiver blocks is merely illustrative. Fig. 4 shows another embodiment in which the radio circuit 24 is a feedback receiver capable of handling wireless communications in various radio frequency bands. The feedback receiver of fig. 4 may be used for power control and calibration of the transmission signal. As shown in fig. 4, the antenna 42 may be coupled to a transmission amplifier, such as a power amplifier 46, and may be coupled to the receiver block RX via a radio frequency coupler, such as a directional coupler 44. The receiver block RX may further include a radio frequency attenuation circuit such as an attenuator 45 connected to the coupler 44, a Low Noise Amplifier (LNA) 48 configured to receive signals from the coupler 44 via the attenuator 45, and a radio frequency mixer circuit such as a mixer 51 configured to receive signals from the low noise amplifier 48 and oscillator signals from a local oscillator 52. The mixer 51 may output the demodulated signal to the amplifier 54. Amplifier 54 may be a multi-band, wideband transimpedance amplifier (as one example).
The receiver block RX may be configured to handle a wide range of radio frequency bands. For example, the receiver block RX may operate in a first mode to process wireless communications in a first group of radio frequency bands from approximately 0.6GHz to 1GHz, may operate in a second mode to process wireless communications in a second group of radio frequency bands from approximately 1GHz to 1.8GHz, may operate in a third mode to process wireless communications in a third group of radio frequency bands from approximately 1.8GHz to 2.3GHz, may operate in a fourth mode to process wireless communications in a fourth group of radio frequency bands from approximately 2.3GHz to 2.9GHz, and so on until wireless communications in a group of radio frequency bands of 7GHz or greater are processed. These radio frequency bands are merely illustrative. The arrangement of fig. 4 in which a single receiver block RX is coupled to a transmission amplifier 46 via a directional coupler 44 is sometimes referred to as a feedback receiver architecture. The feedback receiver of fig. 4 typically exhibits a more relaxed noise sensitivity requirement compared to the multi-standard receiver of fig. 3.
Fig. 5 is a diagram showing additional details at an interface between a mixer 51 and a transimpedance amplifier 54, which are suitable for use in a multi-standard receiver of the type described in connection with fig. 3, a feedback receiver of the type described in connection with fig. 4, and/or other wireless receiver architectures utilizing a wideband amplifier. As shown in fig. 5, low noise amplifier 48, mixer 51, and transimpedance amplifier 54 may be a differential circuit having differential input terminals and differential output terminals.
A set of parallel capacitors Cmix may be coupled to the output of mixer 51, which is also coupled to the input of amplifier 54. For example, a first capacitor Cmix of the set of parallel capacitors has a first terminal coupled to a first input of amplifier 54 and has a second terminal coupled to a ground power supply line (sometimes referred to as ground or ground), while a second capacitor Cmix of the set of parallel capacitors has a first terminal coupled to a second input of amplifier 54 and has a second terminal coupled to ground.
A set of feedback capacitors Cf may also be coupled across the input and output terminals of amplifier 54. For example, a first feedback capacitor Cf of the set of feedback capacitors has a first terminal coupled to a first input of amplifier 54 and has a second terminal coupled to a first output of amplifier 54. A second feedback capacitor Cf of the set of feedback capacitors has a first terminal coupled to a second input of amplifier 54 and has a second terminal coupled to a second output of amplifier 54.
A set of feedback resistors Rf may also be coupled across the input and output terminals of amplifier 54. For example, a first feedback resistor Rf of the set of feedback resistors has a first terminal coupled to a first input of amplifier 54 and has a second terminal coupled to a first output of amplifier 54 (i.e., the first feedback resistor Rf may be coupled in parallel with the first feedback capacitor Cf). A second feedback resistor Rf of the set of feedback resistors has a first terminal coupled to a second input of amplifier 54 and has a second terminal coupled to a second output of amplifier 54 (i.e., the second feedback resistor Rf may be coupled in parallel with a second feedback capacitor Cf). Configured in this manner, the transimpedance amplifier 54 and associated components Cmix, cf and Rf may collectively function as a low pass filter circuit to provide a low pass filtering function, and may sometimes be referred to as a baseband filter or baseband active filter. Each of the capacitors Cmix and/or Cf shown in fig. 5 may include a set of switchable capacitors that are adjustable by the controller 64 to optionally tune the bandwidth of the baseband filter. Each of the feedback resistors Rf may also include a set of switchable resistors that may be adjusted by the controller 64 to optionally tune the gain of the baseband filter. The components Cmix, cf and Rf can be adjusted to control the bandwidth of the filter, while the resistor Rf can be adjusted to control the gain of the filter.
The mixer 51 may have an output impedance Rout. The mixer output impedance Rout may be related to Cpar and f LO Is inversely proportional, where Cpar represents the parasitic capacitance at the output of LNA 48, and where f LO Representing the frequency of the oscillator signal generated by local oscillator 52. FIG. 6 is a graph plotting mixer output impedance Rout against oscillator frequency f LO Illustration of the variations. As shown in fig. 6, the oscillator frequency f LO May vary across a wide frequency range (e.g., from 0.6GHz to 7.2 GHz) when supporting broadband operation. Due to the mixer output impedances Rout and f LO Is inversely proportional, therefore Rout varies with frequency f LO Is increased and decreased (as shown by curve 60). Curve 60 shows how Rout can vary greatly (e.g., from greater than 9k Ω to less than 3k Ω) over a wide operating frequency range of the oscillator. These Rout values are merely illustrative. The mixer Rout value may vary widely depending on the intended application and the actual design of the receiver.
The bandwidth and stability of amplifier 54 varies with mixer output impedance Rout. Thus, when the receiver operates in a different radio frequency band, a large variation in the mixer Rout may reduce the amplifier bandwidth. One way to maintain the target bandwidth of amplifier 54 when the mixer Rout changes is to tune the parallel capacitor Cmix. However, tuning Cmix and/or Cf to compensate for variations in mixer Rout may cause variations in the quality factor and phase margin of amplifier 54, which makes it challenging to design a receiver that meets performance criteria at all operating frequencies.
According to some embodiments, an adjustable resistance circuit, such as an adjustable resistor Rin, is coupled to the input of amplifier 54 to adjust the input impedance of amplifier 54 to help compensate for variations in the mixer output impedance Rout (see, e.g., fig. 5). The adjustable resistor Rin may have a first terminal coupled to a first input of amplifier 54 and a second terminal coupled to a second input of amplifier 54 (e.g., resistor Rin may be coupled across differential input terminals of amplifier 54). Connected in this manner, the adjustable resistor Rin is effectively coupled in parallel with the mixer output impedance Rout.
FIG. 7 is a graph plotting the resistance of the tunable resistor Rin against the oscillator frequency f LO Illustration of variations. As shown by curve 62 in fig. 7, with oscillator frequency f LO Increasing, the resistor Rin can be tuned to exhibit an increasing resistance (i.e., an increasing true resistance value). Resistor Rin should be tuned so that the total parallel resistance of Rout and Rin remains constant over all radio frequency bands of interest. Operating in this manner, the adjustable resistor Rin can be used to maintain the bandwidth of amplifier 54 by compensating for the variation of the mixer Rout across the entire operating frequency range (e.g., increasing Rin as the mixer Rout decreases and vice versa). Using an adjustable (tunable) resistor Rin to compensate for variations in mixer Rout avoids the need to tune the shunt capacitor Cmix when changing from one operating frequency band to another, which can help ensure that the Q factor and phase margin of amplifier 54 meet performance standards throughout the operating frequency range.
Fig. 8 shows one suitable implementation of the adjustable resistor Rin. As shown in fig. 8, resistor Rin may have multiple resistor strings coupled together in parallel between terminals 70 and 72. Terminal 70 may be coupled to a first input terminal of amplifier 54 and terminal 72 may be coupled to a second input terminal of amplifier 54.
The adjustable resistor Rin (sometimes referred to as an adjustable resistance, an adjustable resistor circuit, or an adjustable resistor circuit with a true impedance value) may include multiple resistor strings, such as a first resistor string having resistors R1a and R1b selectively enabled by switch S1 (e.g., switch S1 may be coupled in series between resistors R1a and R1 b), a second resistor string having resistors R2a and R2b selectively enabled by switch S2 (e.g., switch S2 may be coupled in series between resistors R2a and R2 b), a third resistor string having resistors R3a and R3b selectively enabled by switch S3 (e.g., switch S3 may be coupled in series between resistors R3a and R3 b), and so on. The switches S1-S6 may be controlled by a switch control circuit, such as the control circuit 64 of FIG. 5. The switch control circuit 64 may be part of the control circuit 14 (see, e.g., fig. 1).
The example of resistor Rin of fig. 8 with six switchable resistor strings is merely illustrative. In general, the resistor Rin can have any desired number of resistor strings. The various resistor strings in Rin may have the same resistance value or different resistance values. The on-resistance of each of the adjustable resistors Rin may be selected to provide a desired resistance range to compensate for variations in the mixer Rout (e.g., such that different switch configurations may provide corresponding compensation values for Rin as shown in curve 62 of fig. 7 depending on the operating frequency of the wireless receiver). For example, all Rin switches may be closed (deactivated) when operating in the highest radio frequency band. On the other hand, when operating in the lowest radio frequency band, all Rin switches can be open (enabled) to provide the lowest total resistance. Different subsets of switches may be selectively enabled for operating frequencies between the two extremes. The control circuit 64 (see fig. 5) may store a look-up table (as one example) that determines which switch set to enable based on the current operating frequency. The gain, bandwidth, linearity, noise and phase margin of amplifier 54 can be maintained for all resistance values of Rin.
The example of each resistor string in Rin of fig. 8 having two resistors and one switch is merely illustrative. Fig. 9 shows another suitable implementation of adjustable resistors Rin with resistor strings, each having a single resistor and two switches. As shown in fig. 9, the adjustable resistor Rin (sometimes referred to as a resistor circuit or a resistance circuit with a true resistance value) may include: a first resistor string having a resistor R1 selectively enabled by switches S1a and S1b (e.g., resistor R1 may be coupled in series between switches S1a and S1 b); a second resistor string having a resistor R2 selectively enabled by switches S2a and S2b (e.g., resistor R2 may be coupled in series between switches S2a and S2 b); a third resistor string having a third resistor string of resistors R3 selectively enabled by switches S3a and S2b (e.g., resistor R3 may be coupled in series between switches S3a and S3 b), and so on. These switches may be controlled by a switch control circuit, such as control circuit 64 of FIG. 5.
The example of resistor Rin of fig. 9 with six switchable resistor strings is merely illustrative. In general, the resistor Rin can have any desired number of resistor strings. The various resistor strings in Rin may have the same resistance value or different resistance values. The on-resistance of each of the adjustable resistors Rin may be selected to provide a desired resistance range to compensate for variations in the mixer Rout (e.g., such that different switch configurations may provide corresponding compensation values for Rin as shown in curve 62 of fig. 7 depending on the operating frequency of the wireless receiver). The gain, bandwidth, linearity, noise and phase margin of amplifier 54 can be maintained for all resistance values of Rin. Each resistor string may have only one resistor and one switch if desired (e.g., a first resistor string may have only resistors R1 coupled in series with S1a and omit S1b; a second resistor string may have only resistors T2 coupled in series with S2a and omit S2b; etc.).
Fig. 10 is a diagram illustrating different modes of operation in connection with a receiver circuit of the type shown in fig. 1-9. As shown in fig. 10, the receiver circuit may operate in a first mode, such as mode 80, during which the receiver receives signals in a first group BG1 of radio frequency bands; may operate in a second mode, such as mode 82, during which the receiver receives signals in a second group of radio frequency bands BG 2; may operate in a third mode, such as mode 84, during which the receiver receives signals in a third group BG3 of radio frequency bands, and so on.
During mode 80, when operating in BG1 (e.g., the lowest frequency operating band group), the adjustable resistor Rin may be set to its minimum value Rlow by enabling all or nearly all of its resistor strings. During mode 82, when operating in BG2 (e.g., the next active band group above BG 1), the adjustable resistor Rin may be adjusted to a different value to compensate for changes in the mixer Rout caused by switching from another mode to mode 82. During mode 84, when operating in BG3 (e.g., the next active band group above BG 2), the adjustable resistor Rin may be adjusted to a different value to compensate for the change in the mixer Rout caused by switching from another mode to mode 84. In general, the receiver circuit may operate in n different operating modes, where n may be equal to 5 or greater, 6-10, 11-15, greater than 10, or other suitable value.
The methods and operations described above in connection with fig. 1-10 may be performed by components of device 10 using software, firmware, and/or hardware (e.g., dedicated circuitry or hardware). The software code for performing these operations may be stored on a non-transitory computer-readable storage medium (e.g., a tangible computer-readable storage medium) that is stored on one or more of the components of device 10 (e.g., storage circuitry 16 and/or wireless communication circuitry 24 of fig. 1). The software code may sometimes be referred to as software, data, instructions, program instructions, or code. The non-transitory computer-readable storage medium may include a drive, non-volatile memory such as non-volatile random access memory (NVRAM), a removable flash drive or other removable media, other types of random access memory, and so forth. The software stored on the non-transitory computer readable storage medium may be executed by processing circuitry on one or more of the components of device 10 (e.g., processing circuitry in wireless communication circuitry 24, processing circuitry 18 of fig. 1, etc.). The processing circuitry may include a microprocessor, an application processor, a digital signal processor, a Central Processing Unit (CPU), an application specific integrated circuit having processing circuitry, or other processing circuitry.
According to an embodiment, there is provided a wireless circuit capable of operating in a plurality of radio frequency bands, the wireless circuit comprising: a first amplifier configured to receive a radio frequency signal via an antenna; a mixer having a first input coupled to the output of the first amplifier, a second input coupled to the oscillator circuit, and an output; a second amplifier having an input coupled to the output of the mixer; and an adjustable resistance coupled to an input of the second amplifier and configured to adjust an input impedance of the second amplifier when the wireless circuit operates across multiple radio frequency bands.
According to another embodiment, the wireless circuitry includes control circuitry configured to increase a resistance value of the adjustable resistance when the output impedance of the mixer decreases and to decrease the resistance value of the adjustable resistance when the output impedance of the mixer increases.
According to another embodiment, the input of the second amplifier comprises a first amplifier input terminal and a second amplifier input terminal, and the adjustable resistance has a first terminal coupled to the first amplifier input terminal and a second terminal coupled to the second amplifier input terminal.
According to another embodiment, the wireless circuitry includes: a first parallel capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to a ground line; and a second parallel capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the ground line.
According to another embodiment, the wireless circuitry includes: a first feedback capacitor having a first terminal coupled to the first amplifier input terminal of the second amplifier and having a second terminal coupled to the first amplifier output terminal; and a second feedback capacitor having a first terminal coupled to the second amplifier input terminal of the second amplifier and having a second terminal coupled to the second amplifier output terminal.
According to another embodiment, the wireless circuitry includes: a first feedback resistor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to the first amplifier output terminal; and a second feedback resistor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the second amplifier output terminal.
According to another embodiment, the second amplifier comprises a transimpedance amplifier.
According to another embodiment, the adjustable resistance comprises a plurality of resistor strings, and each resistor string of the plurality of resistor strings comprises a first resistor, a second resistor, and a switch coupled between the first resistor and the second resistor in the resistor string.
According to another embodiment, the adjustable resistance comprises a plurality of resistor strings, and each of the plurality of resistor strings comprises a first switch, a second switch, and a resistor coupled between the first switch and the second switch in the resistor string.
According to one embodiment, there is provided a method of operating a wireless circuit in a plurality of radio frequency bands, the method comprising: receiving a signal at a first amplifier via an antenna; mixing a signal from a first amplifier with a signal from an oscillator at a mixer having an output impedance; receiving the signal from the mixer at a second amplifier; and tuning an adjustable resistor coupled to an input of the second amplifier based on a change in an output impedance of the mixer when the wireless circuit operates across the plurality of radio frequency bands.
According to another embodiment, the tunable resistor includes a plurality of resistor strings, each having a first resistor, a second resistor, and a switch coupled between the first resistor and the second resistor in the resistor string, and tuning the tunable resistor includes selectively enabling and disabling the switch in each of the plurality of resistor strings.
According to another embodiment, the tunable resistor includes a plurality of resistor strings, each having a first switch, a second switch, and a resistor coupled between the first switch and the second switch in the resistor string, and tuning the tunable resistor includes selectively enabling and disabling the first switch and the second switch in each of the plurality of resistor strings.
According to another embodiment, tuning the tunable resistor includes tuning the tunable resistor to provide a first resistance value when the wireless circuitry operates in a first radio frequency band of the plurality of radio frequency bands, and tuning the tunable resistor to provide a second resistance value different from the first resistance value when the wireless circuitry operates in a second radio frequency band of the plurality of radio frequency bands.
According to another embodiment, tuning the tunable resistor includes tuning the tunable resistor to provide a first resistance value when the wireless circuitry operates in a first radio frequency band of the plurality of radio frequency bands, and tuning the tunable resistor to provide a second resistance value greater than the first resistance value when the wireless circuitry operates in a second radio frequency band of the plurality of radio frequency bands that is greater than the first radio frequency band.
According to another embodiment, the second amplifier comprises a transimpedance amplifier having a bandwidth greater than 100 MHz.
According to one embodiment, there is provided an electronic device including: a mixer having a first input coupled to the antenna, a second input coupled to the oscillator, and an output; an amplifier having an input coupled to the output of the mixer; an adjustable resistor coupled to an input of the amplifier; and a processing circuit configured to receive data generated based on the signal output by the amplifier.
According to another embodiment, the electronic device includes a control circuit configured to tune the adjustable resistance according to an operating frequency of the amplifier.
According to another embodiment, the input of the amplifier comprises a first amplifier input terminal and a second amplifier input terminal, and the adjustable resistance has a first resistor terminal coupled to the first amplifier input terminal and a second resistor terminal coupled to the second amplifier input terminal.
According to another embodiment, the electronic device includes: a first parallel capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to a ground line; and a second parallel capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the ground line.
According to another embodiment, the amplifier comprises a first amplifier output terminal and a second amplifier output terminal, and the electronic device comprises: a first feedback capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to the first amplifier output terminal; a second feedback capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the second amplifier output terminal; a first feedback resistor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to the first amplifier output terminal; and a second feedback resistor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the second amplifier output terminal.
The foregoing is merely exemplary and various modifications may be made to the described embodiments. The foregoing embodiments may be implemented independently or in any combination.
Claims (20)
1. A wireless circuit, comprising:
a first amplifier configured to receive a radio frequency signal and generate a corresponding amplified signal;
a mixer configured to receive the amplified signal and generate a corresponding demodulated signal;
a second amplifier configured to receive the demodulated signal; and
an adjustable resistance coupled between the mixer and the second amplifier.
2. The wireless circuit of claim 1, wherein the second amplifier comprises a transimpedance amplifier.
3. The wireless circuitry defined in claim 1 wherein the adjustable resistance comprises:
a first terminal coupled to a first amplifier input terminal of the second amplifier; and
a second terminal coupled to a second amplifier input terminal of the second amplifier.
4. The wireless circuitry defined in claim 3 further comprising:
a first capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to a ground line; and
a second capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the ground line.
5. The wireless circuitry defined in claim 3 further comprising:
a first feedback capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to a first amplifier output terminal of the second amplifier;
a second feedback capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to a second amplifier output terminal of the second amplifier;
a first feedback resistor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to the first amplifier output terminal; and
a second feedback resistor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to the second amplifier output terminal.
6. The wireless circuitry defined in claim 3 further comprising:
a first feedback capacitor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to a first amplifier output terminal of the second amplifier; and
a second feedback capacitor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to a second amplifier output terminal of the second amplifier.
7. The wireless circuitry defined in claim 3 further comprising:
a first feedback resistor having a first terminal coupled to the first amplifier input terminal and having a second terminal coupled to the first amplifier output terminal of the second amplifier; and
a second feedback resistor having a first terminal coupled to the second amplifier input terminal and having a second terminal coupled to a second amplifier output terminal of the second amplifier.
8. The wireless circuitry defined in claim 1 further comprising:
a control circuit configured to adjust the adjustable resistance based on an operating frequency associated with the mixer.
9. The wireless circuitry defined in claim 1 further comprising:
a control circuit configured to adjust the adjustable resistance to compensate for changes in an output impedance of the mixer.
10. The wireless circuitry defined in claim 1 wherein the adjustable resistance comprises:
a plurality of resistors; and
a plurality of switches configured to selectively switch one or more of the plurality of resistors into use.
11. A method of operating a wireless circuit, comprising:
receiving a radio frequency signal and generating a corresponding amplified signal;
receiving the amplified signal and generating a corresponding demodulated signal;
receiving, with an amplifier, the demodulated signal; and
tuning a resistance at an input of the amplifier.
12. The method of claim 11, wherein the amplifier comprises a transimpedance amplifier.
13. The method of claim 11, wherein tuning the resistance comprises:
tuning the resistance to provide a first resistance value when the wireless circuitry is operating at a first frequency; and
tuning the resistance to provide a second resistance value different from the first resistance value when the wireless circuitry is operating at a second frequency.
14. The method of claim 11, wherein:
the resistor comprises a plurality of resistor strings, each resistor string having a first resistor, a second resistor, and a switch coupled between the first resistor and the second resistor in the resistor string; and is
Tuning the resistance includes selectively enabling and disabling the switch in each of the plurality of resistor strings.
15. The method of claim 11, wherein:
the resistor comprises a plurality of resistor strings, each resistor string having a first switch, a second switch, and a resistor coupled between the first switch and the second switch in the resistor string; and is
Tuning the resistance includes selectively enabling and disabling the first switch and the second switch in each of the plurality of resistor strings.
16. A circuit, comprising:
a first differential circuit having an output impedance that varies according to a frequency;
a second differential circuit configured to receive a signal from the first differential circuit; and
an adjustable input resistance coupled at an input of the second differential circuit and configured to compensate for a change in the output impedance of the first differential circuit across a frequency range.
17. The circuit of claim 16, wherein the first differential circuit comprises a radio frequency mixer, and wherein the second differential circuit comprises a transimpedance amplifier.
18. The circuit of claim 16, wherein the first differential circuit is configured to receive a radio frequency signal and an oscillating signal.
19. The circuit of claim 18, further comprising:
a control circuit configured to: increasing the adjustable input resistance when the frequency of the oscillating signal increases and decreasing the adjustable input resistance when the frequency of the oscillating signal decreases.
20. The circuit of claim 16, wherein the second differential circuit further comprises:
a plurality of feedback capacitors; and
a plurality of feedback resistors.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/375,843 | 2021-07-14 | ||
| US17/375,843 US11595069B2 (en) | 2021-07-14 | 2021-07-14 | Transimpedance amplifier (TIA) with tunable input resistance |
| CN202210637930.2A CN115700996B (en) | 2021-07-14 | 2022-06-07 | Transimpedance amplifier (TIA) with tunable input resistance |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210637930.2A Division CN115700996B (en) | 2021-07-14 | 2022-06-07 | Transimpedance amplifier (TIA) with tunable input resistance |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115700997A true CN115700997A (en) | 2023-02-07 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211136875.5A Pending CN115700997A (en) | 2021-07-14 | 2022-06-07 | Transimpedance amplifier (TIA) with tunable input resistance |
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| Country | Link |
|---|---|
| CN (1) | CN115700997A (en) |
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- 2022-06-07 CN CN202211136875.5A patent/CN115700997A/en active Pending
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