CN115699938A

CN115699938A - Information indication method and device, terminal equipment and network equipment

Info

Publication number: CN115699938A
Application number: CN202080101757.3A
Authority: CN
Inventors: 贺传峰
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2020-07-28
Filing date: 2020-07-28
Publication date: 2023-02-03
Also published as: WO2022021085A1

Abstract

The embodiment of the application provides an information indication method and device, terminal equipment and network equipment, wherein the method comprises the following steps: the method comprises the steps that terminal equipment receives a physical broadcast channel PBCH, wherein the PBCH carries first indication information, the first indication information is used for indicating indexes of candidate synchronization signal blocks SSB, the first indication information is characterized by N bits, and N is an integer larger than 5.

Description

Information indication method and device, terminal equipment and network equipment

Technical Field

The embodiment of the application relates to the technical field of mobile communication, in particular to an information indication method and device, terminal equipment and network equipment.

Background

In New Radio-unlicensed (NR-U) technology for unlicensed carriers, a synchronization signal Block (SS/PBCH Block, SSB) is transmitted within a configured Discovery Reference Signal (DRS) window. When the base station transmits the SSB, the start time to obtain channel access may not be the start time of the DRS window due to the influence of Listen Before Talk (LBT). The concept of candidate SSBs within the DRS window was introduced based on uncertain channel access start times. How to indicate that candidate SSBs within the DRS window remain to be optimized.

Disclosure of Invention

The embodiment of the application provides an information indication method and device, terminal equipment and network equipment.

The information indication method provided by the embodiment of the application comprises the following steps:

the method comprises the steps that terminal equipment receives a Physical Broadcast Channel (PBCH), wherein the PBCH carries first indication information, the first indication information is used for indicating indexes of candidate SSBs, the first indication information is characterized by N bits, and N is an integer larger than 5.

the method comprises the steps that network equipment sends PBCH, wherein the PBCH carries first indication information, the first indication information is used for indicating indexes of candidate SSBs, the first indication information is characterized by N bits, and N is an integer larger than 5.

The information indicating device provided by the embodiment of the application is applied to terminal equipment, and the device comprises:

a receiving unit, configured to receive a PBCH, where the PBCH carries first indication information, where the first indication information is used to indicate an index of a candidate synchronization signal block SSB, and the first indication information is characterized by N bits, where N is an integer greater than 5.

The information indicating device provided by the embodiment of the application is applied to network equipment, and the device comprises:

a sending unit, configured to send a PBCH, where the PBCH carries first indication information, the first indication information is used to indicate an index of a candidate SSB, the first indication information is characterized by N bits, and N is an integer greater than 5.

The terminal device provided by the embodiment of the application comprises a processor and a memory. The memory is used for storing computer programs, and the processor is used for calling and running the computer programs stored in the memory and executing the information indication method.

The network equipment provided by the embodiment of the application comprises a processor and a memory. The memory is used for storing computer programs, and the processor is used for calling and running the computer programs stored in the memory and executing the information indication method.

The chip provided by the embodiment of the application is used for realizing the information indication method.

Specifically, the chip includes: and the processor is used for calling and running the computer program from the memory so that the equipment provided with the chip executes the information indication method.

The computer-readable storage medium provided by the embodiment of the present application is used for storing a computer program, and the computer program enables a computer to execute the information indication method.

The computer program product provided by the embodiment of the application comprises computer program instructions, and the computer program instructions enable a computer to execute the information indication method.

The computer program provided by the embodiment of the present application, when running on a computer, causes the computer to execute the above information indication method.

Through the technical scheme, on the premise of not increasing the number of bits carried by the PBCH, the N bits in the PBCH are used for indicating the indexes of the candidate SSBs, and the N bits are an integer larger than 5, so that the N bits can indicate the indexes of a large number of candidate SSBs, and the method is more suitable for indicating the indexes of the candidate SSBs in a high-frequency range.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

fig. 1 is a schematic diagram of a communication system architecture provided by an embodiment of the present application;

FIG. 2 is a schematic illustration of an SSB provided by an embodiment of the present application;

fig. 3-1 is a schematic diagram of a transmission pattern of an SSB in a timeslot according to an embodiment of the present application;

FIG. 3-2 is a diagram of candidate and actual transmission locations of an SSB within a DRS window according to an embodiment of the present application;

fig. 4 is a schematic diagram illustrating an indication of an index of a candidate SSB in PBCH provided in an embodiment of the present application;

fig. 5 is a schematic flowchart of an information indication method provided in an embodiment of the present application;

FIG. 6 is a schematic diagram of an N-bit component provided in an embodiment of the present application;

FIG. 7 is a diagram of a first application example provided by an embodiment of the present application;

FIG. 8 is a diagram of a second application example provided in an embodiment of the present application;

FIG. 9 is a diagram of a third application example provided in an embodiment of the present application;

FIG. 10 is a first schematic view illustrating a structural configuration of an information indicating apparatus according to an embodiment of the present disclosure;

fig. 11 is a schematic structural diagram of an information indicating apparatus according to an embodiment of the present application;

fig. 12 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

FIG. 13 is a schematic structural diagram of a chip of an embodiment of the present application;

fig. 14 is a schematic block diagram of a communication system according to an embodiment of the present application.

Detailed Description

Technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The technical scheme of the embodiment of the application can be applied to various communication systems, for example: a Long Term Evolution (LTE) system, an LTE Frequency Division Duplex (FDD) system, an LTE Time Division Duplex (TDD), a system, a 5G communication system, a future communication system, or the like.

Illustratively, a communication system 100 applied in the embodiment of the present application is shown in fig. 1. The communication system 100 may include a network device 110, and the network device 110 may be a device that communicates with a terminal 120 (or referred to as a communication terminal, a terminal). Network device 110 may provide communication coverage for a particular geographic area and may communicate with terminals located within the coverage area. Alternatively, the Network device 110 may be an evolved Node B (eNB or eNodeB) in an LTE system, or a wireless controller in a Cloud Radio Access Network (CRAN), or the Network device may be a mobile switching center, a relay station, an Access point, an in-vehicle device, a wearable device, a hub, a switch, a bridge, a router, a Network-side device in a 5G Network, or a Network device in a future communication system, and the like.

The communication system 100 also includes at least one terminal 120 located within the coverage area of the network device 110. As used herein, "terminal" includes, but is not limited to, connection via a wireline, such as via a Public Switched Telephone Network (PSTN), a Digital Subscriber Line (DSL), a Digital cable, a direct cable connection; and/or another data connection/network; and/or via a Wireless interface, such as for a cellular Network, a Wireless Local Area Network (WLAN), a digital television Network such as a DVB-H Network, a satellite Network, an AM-FM broadcast transmitter; and/or means of another terminal arranged to receive/transmit communication signals; and/or Internet of Things (IoT) devices. A terminal that is arranged to communicate over a wireless interface may be referred to as a "wireless communication terminal", "wireless terminal", or "mobile terminal". Examples of mobile terminals include, but are not limited to, satellite or cellular telephones; personal Communications Systems (PCS) terminals that may combine cellular radiotelephones with data processing, facsimile, and data Communications capabilities; PDAs that may include radiotelephones, pagers, internet/intranet access, web browsers, notepads, calendars, and/or Global Positioning System (GPS) receivers; and conventional laptop and/or palmtop receivers or other electronic devices that include a radiotelephone transceiver. A terminal can refer to an access terminal, user Equipment (UE), a subscriber unit, a subscriber station, mobile, remote station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or User Equipment. An access terminal may be a cellular telephone, a cordless telephone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), a handheld device having Wireless communication capabilities, a computing device or other processing device connected to a Wireless modem, a vehicle mounted device, a wearable device, a terminal in a 5G network, or a terminal in a future evolved PLMN, etc.

Optionally, the terminals 120 may perform direct-to-Device (D2D) communication therebetween.

Alternatively, the 5G communication system or the 5G network may also be referred to as a New Radio (NR) system or an NR network.

Fig. 1 exemplarily shows one network device and two terminals, and optionally, the communication system 100 may include a plurality of network devices and may include other numbers of terminals within the coverage of each network device, which is not limited in this embodiment of the present application.

Optionally, the communication system 100 may further include other network entities such as a network controller, a mobility management entity, and the like, which is not limited in this embodiment.

It should be understood that, in the embodiments of the present application, a device having a communication function in a network/system may be referred to as a communication device. Taking the communication system 100 shown in fig. 1 as an example, the communication device may include a network device 110 and a terminal 120 having a communication function, and the network device 110 and the terminal 120 may be the specific devices described above and are not described again here; the communication device may also include other devices in the communication system 100, such as other network entities, for example, a network controller, a mobility management entity, and the like, which is not limited in this embodiment.

It should be understood that the terms "system" and "network" are often used interchangeably herein. The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

In order to facilitate understanding of the technical solutions of the embodiments of the present application, the technical solutions related to the embodiments of the present application are described below.

● NR-U system

Unlicensed spectrum is a nationally and regionally divided spectrum available for communication by radio devices, which is generally considered a shared spectrum, i.e., a spectrum may be used by communication devices in different communication systems as long as the regulatory requirements set on the spectrum by countries or regions are met, without requiring the application of a proprietary spectrum license from the government. In order for various communication systems using unlicensed spectrum for wireless communication to coexist friendly on the spectrum, some countries or regions stipulate regulatory requirements that must be met using unlicensed spectrum. For example, in european regions, the communication device follows the LBT principle, that is, before the communication device transmits signals on the unlicensed spectrum channel, it needs to perform channel sensing first, and only when the channel sensing result is that the channel is idle, the communication device can transmit signals; if the channel sensing result of the communication device on the channel of the unlicensed spectrum is that the channel is busy, the communication device cannot transmit signals. In order to ensure fairness, in one transmission, the duration of signal transmission by the communication device using the unlicensed spectrum Channel cannot exceed the Maximum Channel Occupancy Time (MCOT).

In 3GPP Rel-16 NR-U technology for unlicensed bands below 7GHz, the use of unlicensed spectrum in higher bands is considered in subsequent technological evolution, as well as related technologies such as 52.6GHz-71GHz discussed in the Rel-17 standard.

● SSB in NR

Common channels and signals in the NR system, such as synchronization signals and broadcast channels, need to cover the whole cell in a multi-beam scanning manner, so that terminal devices in the cell can receive the common channels and signals. Multi-beam transmission of SSBs is achieved by defining SSB burst sets. An SS burst set contains one or more SSBs. An SSB is configured to carry a Synchronization Signal of a beam and a broadcast channel, where the Synchronization Signal includes a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS), and the broadcast channel is a PBCH. One SS burst set may contain SSBs of the number of SSBs in the cell (SSB number) beams. The maximum number of SSBs, L, is related to the frequency band of the system:

for less than 3GHz bands, L =4;

for the frequency band of 3GHz to 6GHz, L =8;

for the band 6GHz to 52.6GHz, L =64.

One SSB includes one symbol PSS, one symbol SSS, and two symbol PBCH, as shown in fig. 2. The time-frequency resource occupied by the PBCH includes DMRS for demodulation of the PBCH, and the DMRS may also be referred to as PBCH DMRS.

All SSBs in the SSB burst set are transmitted in a 5ms time window and are repeatedly transmitted in a certain period, and the period is configured through high-level parameter SSB-timing, wherein the period comprises 5ms,10ms,20ms,40ms,80ms,160ms and the like. For the terminal device, the index of the SSB is obtained through the received SSB, the index of the SSB corresponds to the relative position of the SSB within the 5ms time window, and the terminal device obtains frame synchronization according to the index of the SSB and the half-frame indication carried in the PBCH. Wherein the index of the SSB is indicated by DMRS of PBCH or information carried by PBCH. In the authorized spectrum, for example, in a frequency band below 6GHz, at most 8 SSBs are contained in the SSB burst set, and the index of the SSBs takes a value of 0 to 7. In NR systems using licensed spectrum, the index of the SSB may be used for the terminal device to obtain frame synchronization and QCL relationships. Specifically, the position of the SSB in the radio frame can be obtained by the index of the SSB and the field indication, thereby obtaining frame synchronization.

PBCH includes PBCH DMRS and PBCH loading. The information carried in the PBCH payload includes a-bit information from a higher layer and 8-bit information related to layer 1 (i.e., physical layer), and the information related to the physical layer includes SFN information, field indication information, and index information of SSB. The specific definition is as follows:

the information carried in the PBCH payload includes: 1) Master Information Block (MIB) from higher layer, with a bit:

and 2) 8 bits from the physical layer correlation:

wherein,

the A bit MIB includes: a 6-bit SFN information field, a 1-bit common subcarrier spacing information field (i.e., a subcarrierspaceingcommon information field), a 4-bit SSB subcarrier offset information field (i.e., a SSB-subcarriersoffset information field), a 1-bit DMRS-related information field (i.e., a DMRS-TypeA-Position information field), an 8-bit SIB1 PDCCH configuration information field (i.e., a PDCCH-ConfigSIB1 information field), and the like, wherein 1-bit reserved bits are also included. The SFN information field corresponds to the highest 6 bits of the SFN. The ssb-SubcarrieronOffset information field is used to indicate the offset k between the Physical Resource Block (PRB) grid between the channels or signals of the synchronization and non-synchronization signal blocks _SSB The offset comprises 0-11 or 0-23 subcarriers. The ssb-SubcarrierOffset information field corresponds to the parameter k _SSB The lowest 4 bits. The subanticriersspacincommon information field is used to indicate the subcarrier spacing of the PDCCH and PDSCH transmitting SIB 1. The contents of the MIB may be referred to as shown in table 1 below.

TABLE 1

Of the 8 bits associated with the physical layer,

is the SFN information field, and corresponds to the lowest 4 bits of the SFN.

An information field is indicated for a field.

Index information field for SSB, when L _SSB In the case of a value of =64,

the highest 3 bits of the index corresponding to SSB, otherwise,

corresponding parameter k _SSB The highest order bit of the group of bits,

to reserve bits; wherein L is _SSB Is the maximum number of SSBs, k _SSB Is subcarrier offset information of the SSB. When the system band is less than 6GHz, i.e. L _SSB Less than 64, the physical layer related information has 2 reserved bits.

● SSB in NR-U

In NR-U, SSBs are transmitted within a configured DRS window. How to reduce the impact of LBT failure on SSB transmission is considered for the transmission pattern of SSBs within the DRS window. These designs include the length of the DRS window, the transmission pattern of the SSB, etc. In the NR-U system, the DRS window is configurable in length, with a maximum length of half a frame, the configurable length comprising {0.5,1,2,3,4,5} ms. When the base station transmits the SSB, the start time to obtain channel access may not be the start time of the DRS window due to the influence of LBT. Based on the uncertain channel access start time, the concept of candidate SSB locations within the DRS window was introduced for this purpose. Referring to fig. 3-1, each timeslot includes two transmission positions of the SSB, and a transmission pattern of the SSB in the DRS window may be obtained according to the number of timeslots included in the DRS window. Taking the DRS window length of 5ms as an example, for SSBs with subcarrier spacing of 30kHz and 15khz, 20 and 10 SSB locations are contained within the DRS window, respectively. The SSB location is referred to as a candidate SSB location, and whether to send SSB on the candidate SSB location depends on the outcome of LBT. After LBT is successful, the base station starts actually transmitting SSBs at consecutive candidate SSB locations at the first candidate SSB location after the start time of channel access. An illustration of candidate transmission positions and actual transmission positions of SSBs within the DRS window is shown in fig. 3-2, where each candidate SSB position corresponds to a candidate SSB index.

Since the length of the DRS window is maximally 5ms, and the DRS window contains maximally 20 SSB candidate positions (subcarrier spacing is 30 kHz), the range of indices of the candidate SSBs needs to support 0, \ 8230;, 19. Therefore, it is necessary to determine an index of 5 bits for indicating candidate SSBs in PBCH. In R15, 8 PBCH DMRS sequences exist, and the index of the PBCH DMRS sequence corresponds to the lowest 3 bits of the index of the candidate SSB. The NR-U follows this approach for indicating the lowest 3 bits of the indices of the candidate SSBs, while the remaining 2 bits use the bits defined in R15 for indicating the 4 th and 5 th bits among the 6 bits of the maximum 64 SSB indices at FR 2. While the carrier frequency band of the R16NR-U system belongs to FR1, in the FR1 frequency band of R15,

these two bits are free, so the 4 th and 5 th bits for indicating the index of the candidate SSB can be redefined in the R16NR-U system. In addition to this, the present invention is,

(i.e., field indication) is also the same as R15. Fig. 4 shows a schematic diagram of index indication of candidate SSBs, the index of the candidate SSB is characterized by 5 bits, wherein 3 bits of lower 3 bits are from PBCH DMRS, and 2 bits of upper 2 bits are from the SSB index information field of PBCH (i.e. the SSB index information field of PBCH

)。

In the frequency band range of 52.6GHz-71GHz, if the subcarrier spacing of SSBs of FR2, i.e., 120kHz and 240kHz, is adopted, then if the window of DRS is still 5ms, 80 and 160 positions of candidate SSBs are contained in the DRS window, respectively. Then a maximum of 8 bits need to be carried in PBCH to indicate the index of the candidate SSB. The 8 bits are not supported by the information field currently defined in PBCH. Therefore, the following technical solutions of the embodiments of the present application are proposed, and the technical solutions of the embodiments of the present application can be applied to, but are not limited to, an NR-U system.

Fig. 5 is a schematic flowchart of an information indicating method provided in an embodiment of the present application, and as shown in fig. 5, the information indicating method includes the following steps:

step 501: the method comprises the steps that terminal equipment receives PBCH, wherein the PBCH carries first indication information, the first indication information is used for indicating indexes of candidate synchronization signal blocks SSB, the first indication information is characterized by N bits, and N is an integer larger than 5.

In the embodiment of the application, the network device sends the PBCH, and accordingly, the terminal device receives the PBCH. Here, the network device may be a base station, such as a gNB.

In this embodiment of the present application, the PBCH carries first indication information, where the first indication information is used to indicate an index of a candidate SSB, the first indication information is characterized by N bits, and N is an integer greater than 5. Here, the location of the candidate SSB is located in a DRS window, and the length of the DRS window may be configured, and optionally, the maximum length of the DRS window is one half frame (i.e., 5 ms). The location of the candidate SSB contained within the DRS window is related to at least the length of the window of DRSs and the subcarrier spacing of the candidate SSB.

In this embodiment of the present application, the number of positions of the candidate SSBs included in the DRS window is T, indexes of the T candidate SSBs need to be characterized by N bits, and N is an integer greater than 5.

In this embodiment of the application, the N bits are determined based on at least two following information in the PBCH: PBCH DMRS, PBCH physical layer information domain and PBCH MIB information domain. Wherein, the bits occupied by the PBCH physical layer information field are 8 bits related to the physical layer in the above technical solution. The PBCH MIB information domain is the A bit MIB information domain in the technical scheme. The following describes as if the N bits are characterized by information in the PBCH.

Referring to fig. 6, N bits are composed of N1 bits, N2 bits, and N3 bits in order of lower bits to upper bits.

● In the embodiment of the application, N1 bits of the N bits are determined based on the PBCH DMRS in the PBCH, where N1 is an integer greater than or equal to 1 and less than N.

Here, the PBCH DMRS supports P kinds, P is a positive integer, and indexes of the P kinds of PBCH DMRSs are characterized by the N1 bits.

In an optional manner, the value of N1 is 3.

In another optional manner, the value of N1 is 4.

Optionally, the N1 bits refer to a lower N1 bit of the N bits.

● In this embodiment, N2 bits of the N bits are determined based on a PBCH physical layer information field in the PBCH, where N2 is an integer greater than or equal to 1 and less than N.

Here, the PBCH physical layer information field includes at least one of: SSB index information field, field indication field.

1) In an alternative, the N2 bits are determined based on the SSB index information field.

In particular, the SSB index information field occupies 3 bits (i.e., 3 bits)

) And the N2 bits correspond to 3 bits in the SSB index information field.

2) In an alternative, the N2 bits are determined based on the field indication field.

In particular, the field indication field occupies 1 bit (i.e., the field indicates the field occupies 1 bit)

) The N2 bits correspond to 1 bit in the field indication field.

3) In an alternative, a first part of the N2 bits is determined based on the SSB index information field, and a second part of the N2 bits is determined based on the field indication field.

In particular, the SSB index information field occupies 3 bits (i.e., 3 bits)

) The field indication field occupies 1 bit (i.e. 1 bit)

) The first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.

Optionally, the bits of the N2 bits are higher than the bits of the N1 bits.

● In this embodiment, N3 bits of the N bits are determined based on the PBCH MIB information field in the PBCH, where N3 is an integer greater than or equal to 1 and less than N.

Here, the PBCH MIB information domain includes at least one of: a subcarrier offset information field of SSB (i.e., SSB-subcarrieronoffset information field), a PDCCH configuration information field of SIB1 (i.e., PDCCH-ConfigSIB1 information field), a common subcarrier spacing information field (i.e., subcarrierspaceingcommon information field), and an idle bit field. It should be noted that the PBCH MIB information field is not limited to these several information fields, and may also include other information fields.

1) In an alternative, the N3 bits are determined based on a subcarrier offset information field of the SSB.

Specifically, the subcarrier offset information field occupies 4 bits, the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.

In an optional manner, the value of N3 is 1.

In another optional mode, the value of N3 is 2.

2) In an alternative, the N3 bits are determined based on the common subcarrier spacing information field.

Specifically, the common subcarrier spacing information field occupies 1 bit, and the N3 bits correspond to 1 bit in the common subcarrier spacing information field.

3) In an alternative, the N3 bits are determined based on the subcarrier offset information field of the SSB and the common subcarrier spacing information field.

Specifically, the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit, the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer greater than or equal to 2 and less than 4.

In an optional manner, the value of N3 is 2.

4) In an alternative, the N3 bits are determined based on the PDCCH configuration information field of SIB 1.

Specifically, the PDCCH configuration information field of SIB1 occupies 8 bits, where the N3 bits correspond to N3 bits in the PDCCH configuration information field of SIB1, and N3 is an integer greater than or equal to 1 and less than 8.

In an optional manner, the value of N3 is 1.

In another optional manner, the value of N3 is 2.

In this embodiment of the present application, the PDCCH configuration information field of SIB1 includes a first indication field and a second indication field, where the first indication field occupies 4 bits, the second indication field occupies 4 bits, the first indication field is used to indicate an index of a first control resource set, and the second indication field is used to indicate an index of a first search space.

In an example, the N3 bits correspond to N3 bits in the first indication field, and N3 is an integer greater than or equal to 1 and less than 4. For example: the N3 bits correspond to 1 bit in the first indication field.

In one example, the N3 bits correspond to N3 bits in the second indication field, and N3 is an integer greater than or equal to 1 and less than 4. For example: the N3 bits correspond to 1 bit or 2 bits in the second indication field.

In one example, the N3 bits correspond to M bits in the first indication domain and N3-M bits in the second indication domain, and M is an integer greater than or equal to 1 and less than N3. For example: the N3 bits correspond to 1 bit in the first indication field and 1 bit in the second indication information field.

Optionally, the bits of the N3 bits are higher than the bits of the N2 bits.

The technical solutions of the embodiments of the present application are illustrated below with reference to specific application examples.

Application example one:

the index of the candidate SSB is indicated by 8 bits (i.e., N = 8). Wherein 8 bits consist of: 3 bits indicated by PBCH DMRS, 3 bits in SSB index information domain, and 2 bits in SSB subcarrier offset information domain.

In the evolution of NR-U technology, the use of unlicensed spectrum in higher frequency bands is considered, such as 52.6GHz-71GHz. If the subcarrier spacing of the SSBs of FR2 is still adopted for the subcarrier spacing of the SSBs, i.e., 120kHz and 240kHz, in the frequency band range of 52.6GHz-71GHz, then 80 and 160 candidate SSB locations are contained within the DRS window, respectively, if the window of DRSs is still 5 ms. Then a maximum of 8 bits need to be carried in PBCH to indicate the index of the candidate SSB. The 8-bit source consists of:

-PBCH DMRS: the PBCH DMRS supports 8 sequences to implicitly indicate 3 bits of information for indicating the lowest 3 bits of the index of the candidate SSB.

3 bits in SSB index information field in PBCH:

bit

6, 5, 4 for indicating the index of the candidate SSB.

2 bits in the sub-carrier offset information field of the SSB in PBCH (i.e. SSB-subcarrieronoffset information field).

In the FR2, ssb-SubcarrierOffset information field includes 4 bits. In the NR-U system, for simplicity of design, the synchronization grid location where the SSB is located is predefined at Rel-16, and may also be a predefined location at Rel-17. Meanwhile, the selection of the channel grid may reduce flexibility, and the subcarrier offset between the RB boundary of the SSB and the common RB boundary due to the flexible selection of the synchronization grid and the channel grid is limited without indicating 12 offsets by 4 bits of the SSB-subcarrieraffset information field, for example, the subcarrier offset contains only 4, and then the SSB-subcarrieraffset information field only needs 2 bits to indicate the subcarrier offset, and the saved 2 bits may be reused, the 2 bits corresponding to 2 bits of the index of the SSB, such as the highest 2 bits.

A schematic diagram of indicating the index of the candidate SSB using 2 bits in the SSB-subanticrierfoffset information field is shown in fig. 7, where bit 0 and bit 1 in the SSB-subanticrierfoffset information field are used to indicate the index of the candidate SSB.

Application example two:

the index of the candidate SSB is indicated by 8 bits (i.e., N = 8). Wherein 8 bits consist of: 3 bits indicated by PBCH DMRS, 3 bits in an SSB index information field, 1 bit in a subcarrier offset information field of SSB (i.e., SSB-subcarrieronffset information field), and 1 bit in a common subcarrier spacing information field (subcarriersspacingmmon information field).

The subcarriersspacingcommon information field, since it is defined in the NR-U technique of Rel-16 that the subcarrier spacing of the PDCCH and the SSB is always the same, the subcarrier spacing of the channel of the PDCCH no longer needs to be indicated by subcarriersspacingcommon. This design may still be used in the Rel-17 high band NR-U technique, where 1 bit in the information field may be used to indicate the index of the candidate SSB.

A schematic diagram of indicating the index of the candidate SSB using 1 bit in the SSB-subcarrieronfset information field and 1 bit in the subcarriersspacingmommon information field is shown in fig. 8, in which bit 0 in the SSB-subcarriersoffset information field and bit 0 in the subcarriersspacingmmon information field are used to indicate the index of the candidate SSB.

Application example three:

the index of the candidate SSB is indicated by 8 bits (i.e., N = 8). Wherein 8 bits consist of: 3 bits indicated by PBCH DMRS, 3 bits in SSB index information field, and 2 bits in PDCCH configuration information field of SIB1 (i.e. Pdcch-ConfigSIB1 information field).

The pdcch-ConfigSIB1 field defines a mapping table of the indication information of the new CORESET #0 (i.e. the first CORESET) in the NR-U technique of Rel-16, one of which is shown in the following table.

TABLE 2

Wherein, the 4-bit CORESET #0 information field (i.e. the first indication field) in the 8-bit pdcch-ConfigSIB1 information field only needs 3 bits to actually indicate 8 kinds of CORESET #0, and the most significant bit thereof is not actually utilized. This bit may be utilized to indicate the index of the candidate SSB.

Similarly, the 4-bit SearchSpace #0 information field (i.e., the second indication field) of the 8-bit pdcch-ConfigSIB1 information field is not actually fully utilized. When frequency division multiplexing is adopted for multiplexing of FR2, SSB and CORESET #0, there is only one kind of configuration of SearchSpace #0, and actually, the 4-bit SearchSpace #0 information field can be used to indicate the index of the candidate SSB.

An exemplary diagram of indicating the index of the candidate SSB with 2 bits in the pdcch-ConfigSIB1 information field is shown in fig. 9, where bit 0 and bit 1 in the pdcch-ConfigSIB1 information field are used to indicate the index of the candidate SSB.

Application example four:

the index of the candidate SSB is indicated by 8 bits (i.e., N = 8). Wherein 8 bits consist of: 4 bits indicated by PBCH DMRS, 3 bits in SSB index information field, and 1 bit in half frame indication field.

The information carried in the PBCH payload includes a PBCH physical layer information field and a PBCH MIB information field. The content of the MIB information is not changed within a transmission time interval, which facilitates the terminal device to perform the merging reception. The physical layer information mainly carries timing related information such as SFN, half frame indication, and SSB index, which are continuously changed in a transmission time interval. The indication of the index of the candidate SSB may be indicated by 8 bits in the PBCH physical layer information field carried in the PBCH payload.

In order to obtain an index of 8 bits for indicating the candidate SSB considering that the 4-bit SFN information domain cannot be utilized in case that the later physical layer information is not changed, the number of sequences of the PBCH DMRS may be extended to 16 for indicating 4 bits of the index of the candidate SSB. In addition, 1 bit of the index of the candidate SSB is indicated by 1 bit in the field indication field of the field. In this case, the half frame in which the SSB is transmitted needs to be predefined as the first half frame or the second half frame.

It should be noted that, for the first to fourth application examples, in addition to the PBCH DMRS and SSB index information fields for indicating the index of the candidate SSB, the information fields in the PBCH may be arbitrarily combined to obtain additional bits (e.g., additional 2 bits, 3 bits, etc.) to set more bits for indicating the index of the candidate SSB. For example, for a high frequency segment of 52.6GHz-71GHz, the subcarrier spacing of the SSB may introduce 480kHz, where for a DRS window of 5ms, the location of the candidate SSB may include 320, and where 9 bits are required to represent the index of the candidate SSB.

According to the technical scheme of the embodiment of the application, the indication bits of the indexes of the candidate SSBs defined by the FR2 in the existing NR technology are utilized to the maximum extent, meanwhile, on the premise that the bit number carried by the PBCH is not increased, redundancy existing in some information fields in the PBCH is utilized, part of bits of the bit field are reused for indicating the indexes of the candidate SSBs, the indication information of the existing bit field is not influenced, and backward compatibility is guaranteed.

Fig. 10 is a schematic structural diagram of an information indicating apparatus provided in an embodiment of the present application, which is applied to a terminal device, and as shown in fig. 10, the information indicating apparatus includes:

a receiving unit 1001, configured to receive a PBCH, where the PBCH carries first indication information, where the first indication information is used to indicate an index of a candidate synchronization signal block SSB, and the first indication information is characterized by N bits, where N is an integer greater than 5.

In an alternative, the N bits are determined based on at least two of the following information in the PBCH:

PBCH DMRS, PBCH physical layer information domain and PBCH MIB information domain.

In an optional manner, N1 bits of the N bits are determined based on PBCH DMRS in the PBCH, where N1 is an integer greater than or equal to 1 and less than N.

In an optional manner, the PBCH DMRS supports P types, where P is a positive integer, and indexes of the P types of PBCH DMRSs are characterized by the N1 bits.

In an optional mode, the value of N1 is 3; or,

the value of N1 is 4.

In an optional manner, N2 bits of the N bits are determined based on a PBCH physical layer information field in the PBCH, where N2 is an integer greater than or equal to 1 and less than N.

In an optional aspect, the PBCH physical layer information field includes at least one of: SSB index information field, field indication field.

In an alternative, the N2 bits are determined based on the SSB index information field.

In an optional manner, the SSB index information field occupies 3 bits, and the N2 bits correspond to 3 bits in the SSB index information field.

In an alternative, the N2 bits are determined based on the field indication field.

In an optional manner, the field indication field occupies 1 bit, and the N2 bits correspond to 1 bit in the field indication field.

In an alternative, a first part of the N2 bits is determined based on the SSB index information field, and a second part of the N2 bits is determined based on the field indication field.

In an alternative, the SSB index information field occupies 3 bits, the field indication field occupies 1 bit,

the first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.

In an optional manner, N3 bits of the N bits are determined based on a PBCH MIB information field in the PBCH, where N3 is an integer greater than or equal to 1 and less than N.

In an optional manner, the PBCH MIB information field includes at least one of: a sub-carrier offset information field of SSB, a PDCCH configuration information field of SIB1, a common sub-carrier interval information field, and an idle bit field.

In an alternative, the N3 bits are determined based on a subcarrier offset information field of the SSB.

In an alternative, the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.

In an alternative, the N3 bits are determined based on the common subcarrier spacing information field.

In an alternative, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to 1 bit in the common subcarrier spacing information field.

In an alternative, the N3 bits are determined based on the subcarrier offset information field of the SSB and the common subcarrier spacing information field.

In an alternative, the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer greater than or equal to 2 and less than 4.

In an alternative, the N3 bits are determined based on the PDCCH configuration information field of SIB 1.

In an alternative, the PDCCH configuration information field of SIB1 occupies 8 bits,

the N3 bits correspond to N3 bits in the PDCCH configuration information field of the SIB1, and N3 is an integer greater than or equal to 1 and less than 8.

In an optional manner, the PDCCH configuration information field of SIB1 includes a first indication field and a second indication field, the first indication field occupies 4 bits, the second indication field occupies 4 bits, the first indication field is used to indicate an index of a first control resource set, the second indication field is used to indicate an index of a first search space,

the N3 bits correspond to N3 bits in the first indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to N3 bits in the second indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to M bits in the first indication field and N3-M bits in the second indication field, where M is an integer greater than or equal to 1 and less than N3.

It should be understood by those skilled in the art that the related description of the information indication apparatus in the embodiments of the present application can be understood by referring to the related description of the information indication method in the embodiments of the present application.

Fig. 11 is a schematic structural diagram of an information indicating apparatus provided in an embodiment of the present application, which is applied to a network device, and as shown in fig. 11, the information indicating apparatus includes:

a sending unit 1101, configured to send a PBCH, where the PBCH carries first indication information, where the first indication information is used to indicate an index of a candidate SSB, the first indication information is characterized by N bits, and N is an integer greater than 5.

In an optional manner, N1 bits of the N bits are determined based on a PBCH DMRS in the PBCH, where N1 is an integer greater than or equal to 1 and less than N.

In an optional manner, the PBCH DMRS supports P types, and indexes of the P types of PBCH DMRSs are characterized by the N1 bits.

In an optional mode, the value of N1 is 3; or,

the value of N1 is 4.

In an optional manner, the PBCH physical layer information field includes at least one of: SSB index information field, field indication field.

In an alternative, the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer of 2 or more and less than 4.

the N3 bits correspond to M bits in the first indication domain and N3-M bits in the second indication domain, and M is an integer greater than or equal to 1 and less than N3.

Fig. 12 is a schematic structural diagram of a communication device 1200 according to an embodiment of the present application. The communication device may be a terminal device or a network device, and the communication device 1200 shown in fig. 12 includes a processor 1210, where the processor 1210 may call and execute a computer program from a memory to implement the method in the embodiment of the present application.

Optionally, as shown in fig. 12, the communication device 1200 may further include a memory 1220. From the memory 1220, the processor 1210 may call and execute a computer program to implement the method in the embodiment of the present application.

The memory 1220 may be a separate device from the processor 1210, or may be integrated into the processor 1210.

Optionally, as shown in fig. 12, the communication device 1200 may further include a transceiver 1230, and the processor 1210 may control the transceiver 1230 to communicate with other devices, and in particular, may transmit information or data to the other devices or receive information or data transmitted by the other devices.

The transceiver 1230 may include a transmitter and a receiver, among others. The transceiver 1230 may further include an antenna, and the number of antennas may be one or more.

Optionally, the communication device 1200 may specifically be a network device in the embodiment of the present application, and the communication device 1200 may implement a corresponding process implemented by the network device in each method in the embodiment of the present application, which is not described herein again for brevity.

Optionally, the communication device 1200 may specifically be a mobile terminal/terminal device according to this embodiment, and the communication device 1200 may implement a corresponding process implemented by the mobile terminal/terminal device in each method according to this embodiment, which is not described herein again for brevity.

Fig. 13 is a schematic structural diagram of a chip of an embodiment of the present application. The chip 1300 shown in fig. 13 includes a processor 1310, and the processor 1310 may call and execute a computer program from a memory to implement the method in the embodiment of the present application.

Optionally, as shown in fig. 13, the chip 1300 may further include a memory 1320. From the memory 1320, the processor 1310 may call and execute a computer program to implement the method of the present embodiment.

The memory 1320 may be a separate device from the processor 1310, or may be integrated into the processor 1310.

Optionally, the chip 1300 may further include an input interface 1330. The processor 1310 may control the input interface 1330 to communicate with other devices or chips, and in particular, may obtain information or data transmitted by other devices or chips.

Optionally, the chip 1300 may further include an output interface 1340. The processor 1310 may control the output interface 1340 to communicate with other devices or chips, and in particular, may output information or data to the other devices or chips.

Optionally, the chip may be applied to the network device in the embodiment of the present application, and the chip may implement the corresponding process implemented by the network device in each method in the embodiment of the present application, and for brevity, details are not described here again.

Optionally, the chip may be applied to the mobile terminal/terminal device in the embodiment of the present application, and the chip may implement the corresponding process implemented by the mobile terminal/terminal device in each method in the embodiment of the present application, and for brevity, no further description is given here.

It should be understood that the chips mentioned in the embodiments of the present application may also be referred to as a system-on-chip, a system-on-chip or a system-on-chip, etc.

Fig. 14 is a schematic block diagram of a communication system 1400 provided in an embodiment of the present application. As shown in fig. 14, the communication system 1400 includes a terminal device 1410 and a network device 1420.

The terminal device 1410 may be configured to implement corresponding functions implemented by the terminal device in the foregoing method, and the network device 1420 may be configured to implement corresponding functions implemented by the network device in the foregoing method, for brevity, which is not described herein again.

It should be understood that the processor of the embodiments of the present application may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or by instructions in the form of software. The Processor may be a general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off the shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.

It will be appreciated that the memory in the embodiments of the subject application can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of example, and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double Data Rate Synchronous Dynamic random access memory (DDR SDRAM), enhanced Synchronous SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

It should be understood that the above memories are exemplary but not limiting illustrations, for example, the memories in the embodiments of the present application may also be Static Random Access Memory (SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (enhanced SDRAM, ESDRAM), synchronous Link DRAM (SLDRAM), direct Rambus RAM (DR RAM), and the like. That is, the memory in the embodiments of the present application is intended to comprise, without being limited to, these and any other suitable types of memory.

The embodiment of the application also provides a computer readable storage medium for storing the computer program.

Optionally, the computer-readable storage medium may be applied to the network device in the embodiment of the present application, and the computer program enables the computer to execute the corresponding process implemented by the network device in each method in the embodiment of the present application, which is not described herein again for brevity.

Optionally, the computer-readable storage medium may be applied to the mobile terminal/terminal device in the embodiment of the present application, and the computer program enables the computer to execute the corresponding process implemented by the mobile terminal/terminal device in each method in the embodiment of the present application, which is not described herein again for brevity.

Embodiments of the present application also provide a computer program product comprising computer program instructions.

Optionally, the computer program product may be applied to the network device in the embodiment of the present application, and the computer program instructions enable the computer to execute corresponding processes implemented by the network device in the methods in the embodiment of the present application, which are not described herein again for brevity.

Optionally, the computer program product may be applied to the mobile terminal/terminal device in the embodiment of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the mobile terminal/terminal device in the methods in the embodiment of the present application, which are not described herein again for brevity.

The embodiment of the application also provides a computer program.

Optionally, the computer program may be applied to the network device in the embodiment of the present application, and when the computer program runs on a computer, the computer is enabled to execute a corresponding process implemented by the network device in each method in the embodiment of the present application, and for brevity, details are not described here again.

Optionally, the computer program may be applied to the mobile terminal/terminal device in the embodiment of the present application, and when the computer program runs on a computer, the computer is enabled to execute the corresponding process implemented by the mobile terminal/terminal device in each method in the embodiment of the present application, which is not described herein again for brevity.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

An information indication method, the method comprising:

the method comprises the steps that terminal equipment receives a physical broadcast channel PBCH, wherein the PBCH carries first indication information, the first indication information is used for indicating an index of a candidate synchronization signal block SSB, the first indication information is characterized by N bits, and N is an integer larger than 5.
The method of claim 1, wherein the N bits are determined based on at least two of the following information in the PBCH:

a PBCH demodulation reference signal DMRS, a PBCH physical layer information field and a PBCH master information block MIB information field.
The method of claim 2, wherein N1 of the N bits are determined based on a PBCH DMRS in the PBCH, wherein N1 is an integer greater than or equal to 1 and less than N.
The method of claim 3, wherein the PBCH DMRS supports P types, P being a positive integer, and indexes of the P types of the PBCH DMRS are characterized by the N1 bits.
The method of claim 3 or 4,

the value of N1 is 3; or,

the value of N1 is 4.
The method of any one of claims 1-5, wherein N2 of the N bits are determined based on a PBCH physical layer information field in the PBCH, wherein N2 is an integer greater than or equal to 1 and less than N.
The method of claim 6, wherein the PBCH physical layer information field comprises at least one of: SSB index information field, field indication field.
The method of claim 7, wherein the N2 bits are determined based on the SSB index information field.
The method of claim 8, wherein the SSB index information field occupies 3 bits, and the N2 bits correspond to 3 bits in the SSB index information field.
The method of claim 7, wherein the N2 bits are determined based on the field indication field.
The method of claim 10, wherein the field indication field occupies 1 bit and the N2 bits correspond to 1 bit in the field indication field.
The method of claim 7, wherein a first portion of the N2 bits is determined based on the SSB index information field and a second portion of the N2 bits is determined based on the field indication field.
The method of claim 12, wherein the SSB index information field occupies 3 bits, the field indication field occupies 1 bit,

the first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.
The method of any one of claims 1-13, wherein N3 of the N bits are determined based on a PBCH MIB information field in the PBCH, wherein N3 is an integer greater than or equal to 1 and less than N.
The method of claim 14, wherein the PBCH MIB information domain comprises at least one of: a subcarrier offset information field of SSB, a physical downlink control channel PDCCH configuration information field of a system information block SIB1, a common subcarrier interval information field and an idle bit field.
The method of claim 15, wherein the N3 bits are determined based on a subcarrier offset information field of the SSB.
The method of claim 16, wherein the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.
The method of claim 15, wherein the N3 bits are determined based on the common subcarrier spacing information field.
The method of claim 18, wherein the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to 1 bit in the common subcarrier spacing information field.
The method of claim 15, wherein the N3 bits are determined based on a subcarrier offset information field and the common subcarrier spacing information field of the SSB.
The method of claim 20, wherein the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer of 2 or more and less than 4.
The method of claim 15, wherein the N3 bits are determined based on a PDCCH configuration information field of the SIB 1.
The method of claim 22, wherein the PDCCH configuration information field of SIB1 occupies 8 bits,

the N3 bits correspond to N3 bits in the PDCCH configuration information field of the SIB1, and N3 is an integer greater than or equal to 1 and less than 8.
The method of claim 23, wherein the PDCCH configuration information field of SIB1 comprises a first indication field occupying 4 bits and a second indication field occupying 4 bits, the first indication field indicating an index of a first set of control resources and the second indication field indicating an index of a first search space,

the N3 bits correspond to N3 bits in the first indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to N3 bits in the second indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to M bits in the first indication domain and N3-M bits in the second indication domain, and M is an integer greater than or equal to 1 and less than N3.
An information indication method, the method comprising:

the method comprises the steps that network equipment sends PBCH, wherein the PBCH carries first indication information, the first indication information is used for indicating indexes of candidate SSBs, the first indication information is characterized by N bits, and N is an integer larger than 5.
The method of claim 25, wherein the N bits are determined based on at least two of the following information in the PBCH:

PBCH DMRS, PBCH physical layer information domain and PBCH MIB information domain.
The method of claim 26, wherein N1 of the N bits are determined based on a PBCH DMRS in the PBCH, wherein N1 is an integer greater than or equal to 1 and less than N.
The method of claim 27, wherein the PBCH DMRS supports P types, and wherein indices of the P types of the PBCH DMRS are characterized by the N1 bits.
The method of claim 27 or 28,

the value of N1 is 3; or,

the value of N1 is 4.
The method of any one of claims 25-29, wherein N2 of the N bits are determined based on a PBCH physical layer information field in the PBCH, wherein N2 is an integer greater than or equal to 1 and less than N.
The method of claim 30, wherein the PBCH physical layer information field comprises at least one of: SSB index information field, field indication field.
The method of claim 31, wherein the N2 bits are determined based on the SSB index information field.
The method of claim 32, wherein the SSB index information field occupies 3 bits and the N2 bits correspond to 3 bits in the SSB index information field.
The method of claim 31, wherein the N2 bits are determined based on the field indication field.
The method of claim 34, wherein the field indication field occupies 1 bit and the N2 bits correspond to 1 bit in the field indication field.
The method of claim 31, wherein a first portion of the N2 bits is determined based on the SSB index information field and a second portion of the N2 bits is determined based on the field indication field.
The method of claim 36, wherein the SSB index information field occupies 3 bits, the field indication field occupies 1 bit,

the first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.
The method of any one of claims 25-37, wherein N3 of the N bits are determined based on a PBCH MIB information field in the PBCH, wherein N3 is an integer greater than or equal to 1 and less than N.
The method of claim 38, wherein the PBCH MIB information domain comprises at least one of: a sub-carrier offset information field of SSB, a PDCCH configuration information field of SIB1, a common sub-carrier interval information field, and an idle bit field.
The method of claim 39, wherein the N3 bits are determined based on a subcarrier offset information field of the SSB.
The method of claim 40, wherein the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.
The method of claim 39, wherein the N3 bits are determined based on the common subcarrier spacing information field.
The method of claim 42, wherein the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to 1 bit in the common subcarrier spacing information field.
The method of claim 39, wherein the N3 bits are determined based on a subcarrier offset information field and the common subcarrier spacing information field of the SSB.
The method of claim 44, wherein the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer of 2 or more and less than 4.
The method of claim 39, wherein the N3 bits are determined based on a PDCCH configuration information field of the SIB 1.
The method of claim 46, wherein the PDCCH configuration information field of SIB1 occupies 8 bits,

the N3 bits correspond to N3 bits in the PDCCH configuration information field of the SIB1, and N3 is an integer greater than or equal to 1 and less than 8.
The method of claim 47, wherein the PDCCH configuration information field of SIB1 comprises a first indication field occupying 4 bits and a second indication field occupying 4 bits, the first indication field being used to indicate an index of a first set of control resources and the second indication field being used to indicate an index of a first search space,

the N3 bits correspond to N3 bits in the first indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to N3 bits in the second indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to M bits in the first indication domain and N3-M bits in the second indication domain, and M is an integer greater than or equal to 1 and less than N3.
An information indicating device is applied to terminal equipment, and the device comprises:

a receiving unit, configured to receive a PBCH, where the PBCH carries first indication information, where the first indication information is used to indicate an index of a candidate synchronization signal block SSB, and the first indication information is characterized by N bits, where N is an integer greater than 5.
The apparatus of claim 49, wherein the N bits are determined based on at least two of the following information in the PBCH:

PBCH DMRS, PBCH physical layer information domain and PBCH MIB information domain.
The apparatus of claim 50, wherein N1 of the N bits are determined based on a PBCH DMRS in the PBCH, wherein N1 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 51, wherein the PBCH DMRS supports P types, P being a positive integer, and indexes of the P types of the PBCH DMRS are characterized by the N1 bits.
The apparatus of claim 51 or 52,

the value of N1 is 3; or,

the value of N1 is 4.
The apparatus of any one of claims 49-53, wherein N2 of the N bits are determined based on a PBCH physical layer information field in the PBCH, wherein N2 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 54, wherein the PBCH physical layer information field comprises at least one of: SSB index information field, field indication field.
The apparatus of claim 55, wherein the N2 bits are determined based on the SSB index information field.
The apparatus of claim 56, wherein the SSB index information field occupies 3 bits, and the N2 bits correspond to 3 bits in the SSB index information field.
The apparatus of claim 55, wherein the N2 bits are determined based on the field indication field.
The apparatus of claim 58, wherein the field indication field occupies 1 bit and the N2 bits correspond to 1 bit in the field indication field.
The apparatus of claim 55, wherein a first portion of the N2 bits is determined based on the SSB index information field and a second portion of the N2 bits is determined based on the field indication field.
The apparatus of claim 60, wherein the SSB index information field occupies 3 bits, the field indication field occupies 1 bit,

the first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.
The apparatus of any one of claims 49-61, wherein N3 of the N bits are determined based on a PBCH MIB information field in the PBCH, wherein N3 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 62, wherein the PBCH MIB information domain comprises at least one of: a sub-carrier offset information field of SSB, a PDCCH configuration information field of SIB1, a common sub-carrier interval information field, and an idle bit field.
The apparatus of claim 63, wherein the N3 bits are determined based on a subcarrier offset information field of the SSB.
The apparatus of claim 64, wherein the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.
The apparatus of claim 63, wherein the N3 bits are determined based on the common subcarrier spacing information field.
The apparatus of claim 66, wherein the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to 1 bit in the common subcarrier spacing information field.
The apparatus of claim 63, wherein the N3 bits are determined based on a subcarrier offset information field and the common subcarrier spacing information field of the SSB.
The apparatus of claim 68, wherein the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer of 2 or more and less than 4.
The apparatus of claim 63, wherein the N3 bits are determined based on a PDCCH configuration information field of the SIB 1.
The apparatus of claim 70, wherein the PDCCH configuration information field of SIB1 occupies 8 bits,

the N3 bits correspond to N3 bits in the PDCCH configuration information field of SIB1, where N3 is an integer greater than or equal to 1 and less than 8.
The apparatus of claim 71, wherein the PDCCH configuration information field of SIB1 comprises a first indication field occupying 4 bits and a second indication field occupying 4 bits, the first indication field indicating an index of a first set of control resources and the second indication field indicating an index of a first search space,

the N3 bits correspond to N3 bits in the first indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to N3 bits in the second indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to M bits in the first indication field and N3-M bits in the second indication field, where M is an integer greater than or equal to 1 and less than N3.
An information indication device applied to a network device, the device comprising:

a sending unit, configured to send a PBCH, where the PBCH carries first indication information, the first indication information is used to indicate an index of a candidate SSB, the first indication information is characterized by N bits, and N is an integer greater than 5.
The apparatus of claim 73, wherein the N bits are determined based on at least two of the following information in the PBCH:

PBCH DMRS, PBCH physical layer information domain and PBCH MIB information domain.
The apparatus of claim 74, wherein N1 of the N bits are determined based on a PBCH DMRS in the PBCH, wherein N1 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 75, wherein the PBCH DMRS supports P types, and indices of the P types of the PBCH DMRS are characterized by the N1 bits.
The apparatus of claim 75 or 76,

the value of N1 is 3; or,

the value of N1 is 4.
The apparatus of any one of claims 73-77, wherein N2 of the N bits are determined based on a PBCH physical layer information field in the PBCH, wherein N2 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 78, wherein the PBCH physical layer information field comprises at least one of: SSB index information field, field indication field.
The apparatus of claim 79, wherein the N2 bits are determined based on the SSB index information field.
The apparatus of claim 80, wherein the SSB index information field occupies 3 bits, and the N2 bits correspond to 3 bits in the SSB index information field.
The apparatus of claim 79, wherein the N2 bits are determined based on the field indication field.
The apparatus of claim 82, wherein the field indication field occupies 1 bit and the N2 bits correspond to 1 bit in the field indication field.
The apparatus of claim 79, wherein a first portion of the N2 bits is determined based on the SSB index information field and a second portion of the N2 bits is determined based on the field indication field.
The apparatus of claim 84, wherein the SSB index information field occupies 3 bits, the field indication field occupies 1 bit,

the first part of bits corresponds to 3 bits in the SSB index information field, and the second part of bits corresponds to 1 bit in the field indication field.
The apparatus of any one of claims 73-85, wherein N3 of the N bits are determined based on a PBCH MIB information field in the PBCH, wherein N3 is an integer greater than or equal to 1 and less than N.
The apparatus of claim 86, wherein the PBCH MIB information domain comprises at least one of: a sub-carrier offset information field of SSB, a PDCCH configuration information field of SIB1, a common sub-carrier interval information field, and an idle bit field.
The apparatus of claim 87, wherein the N3 bits are determined based on a subcarrier offset information field of the SSB.
The apparatus of claim 88, wherein the subcarrier offset information field occupies 4 bits,

the N3 bits correspond to the lower N3 bits in the subcarrier offset information field, and N3 is an integer greater than or equal to 1 and less than 4.
The apparatus of claim 87, wherein the N3 bits are determined based on the common subcarrier spacing information field.
The apparatus of claim 90, wherein the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to 1 bit in the common subcarrier spacing information field.
The apparatus of claim 87, wherein the N3 bits are determined based on a subcarrier offset information field and the common subcarrier spacing information field of the SSB.
The apparatus of claim 92, wherein the subcarrier offset information field occupies 4 bits, the common subcarrier spacing information field occupies 1 bit,

the N3 bits correspond to N3-1 bits in the subcarrier offset information field and 1 bit in the common subcarrier spacing information field, and N3 is an integer greater than or equal to 2 and less than 4.
The apparatus of claim 87, wherein the N3 bits are determined based on a PDCCH configuration information field of the SIB 1.
The apparatus of claim 94, wherein the PDCCH configuration information field of SIB1 occupies 8 bits,

the N3 bits correspond to N3 bits in the PDCCH configuration information field of the SIB1, and N3 is an integer greater than or equal to 1 and less than 8.
The apparatus of claim 95, wherein the PDCCH configuration information field of SIB1 comprises a first indication field occupying 4 bits and a second indication field occupying 4 bits, wherein the first indication field is used for indicating an index of a first set of control resources and the second indication field is used for indicating an index of a first search space,

the N3 bits correspond to N3 bits in the first indication field, wherein N3 is an integer which is greater than or equal to 1 and less than 4; or,

the N3 bits correspond to N3 bits in the second indication domain, and N3 is an integer greater than or equal to 1 and less than 4; or,

the N3 bits correspond to M bits in the first indication domain and N3-M bits in the second indication domain, and M is an integer greater than or equal to 1 and less than N3.
A terminal device, comprising: a processor and a memory for storing a computer program, the processor being configured to invoke and execute the computer program stored in the memory to perform the method of any of claims 1 to 24.
A network device, comprising: a processor and a memory for storing a computer program, the processor being configured to invoke and execute the computer program stored in the memory to perform the method of any of claims 25 to 48.
A chip, comprising: a processor for calling and running a computer program from a memory so that a device on which the chip is installed performs the method of any one of claims 1 to 24.
A chip, comprising: a processor for calling and running a computer program from a memory so that a device on which the chip is installed performs the method of any one of claims 25 to 48.
A computer-readable storage medium storing a computer program for causing a computer to perform the method of any one of claims 1 to 24.
A computer readable storage medium storing a computer program for causing a computer to perform the method of any one of claims 25 to 48.
A computer program product comprising computer program instructions to cause a computer to perform the method of any one of claims 1 to 24.
A computer program product comprising computer program instructions to cause a computer to perform the method of any of claims 25 to 48.
A computer program for causing a computer to perform the method of any one of claims 1 to 24.
A computer program for causing a computer to perform the method of any one of claims 25 to 48.