CN115699770A - Chroma codec enhancement in joint codec of chroma residual - Google Patents

Abstract

An electronic device implements a method of decoding video data. The method comprises the following steps: receiving or inferring, from a bitstream of video data, a first syntax element indicating whether Joint Coding of Chroma Residual (JCCR) is enabled; receiving or inferring, from the bitstream, a second syntax element in a Sequence Parameter Set (SPS) or a Picture Parameter Set (PPS) indicating whether a JCCR symbol flag is present in a picture header, if the first syntax element indicates that the JCCR is enabled; in a case where the second syntax element indicates that the JCCR symbol flag is present in a picture header, receiving the JCCR symbol flag in the picture header from the bitstream, and decoding the video data according to the first syntax element, the second syntax element, and the JCCR symbol flag.

Description

Chroma codec enhancement in joint codec of chroma residual

Cross Reference to Related Applications

This application claims priority to "chroma codec enhancement" in U.S. provisional application No.63/036,439, filed on 8/6/2020, the entire contents of which are incorporated herein by reference in their entirety.

Technical Field

The present application relates generally to video coding and compression, and more particularly, to a method and apparatus for improving chroma coding efficiency.

Background

Various electronic devices such as digital televisions, laptop or desktop computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smart phones, video teleconferencing devices, video streaming devices, and the like, support digital video. Electronic devices transmit, receive, encode, decode, and/or store digital video data by implementing video compression/decompression standards. Some well-known Video codec standards include general Video Coding (VVC), high Efficiency Video Coding (HEVC, also known as h.265 or MPEG-H part 2), and Advanced Video Coding (AVC, also known as h.264 or MPEG-4 part 10), which are jointly developed by ISO/IEC MPEG and ITU-T VCEG. Open Media Alliance Video 1 (AOMedia Video 1, av1) was developed by the Open Media Alliance (Alliance for Open Media, AOM) as a successor to its previous standard VP 9. Audio Video Coding (AVS), which refers to the digital Audio and digital Video compression standards, is another Video compression series Standard developed by the China digital Audio and Video Coding Standard working group of China.

Video compression typically includes performing spatial (intra) prediction and/or temporal (inter) prediction to reduce or eliminate redundancy inherent in video data. For block-based video Coding, a video frame is partitioned into one or more slices, each slice having a plurality of video blocks, which may also be referred to as Coding Tree Units (CTUs). Each CTU may contain a Coding Unit (CU) or be recursively split into smaller CUs until a preset minimum CU size is reached. Each CU (also referred to as a leaf CU) contains one or more Transform Units (TUs), and each CU also contains one or more Prediction Units (PUs). Each CU may be coded in intra, inter, or IBC mode. Video blocks in an intra-coded (I) slice of a video frame are encoded using spatial prediction with respect to reference samples in neighboring blocks within the same video frame. Video blocks in an inter-coded (P or B) slice of a video frame may use spatial prediction with respect to reference samples in neighboring blocks within the same video frame or temporal prediction with respect to reference samples in other previous and/or future reference video frames.

A prediction block for a current video block to be encoded is generated based on spatial or temporal prediction of a reference block (e.g., a neighboring block) that has been previously encoded. The process of finding the reference block may be accomplished by a block matching algorithm. Residual data representing pixel differences between the current block to be encoded and the prediction block is referred to as a residual block or prediction error. An inter-coded block is encoded according to a motion vector pointing to a reference block in a reference frame forming a prediction block, and a residual block. The process of determining motion vectors is typically referred to as motion estimation. And encoding the intra-coded block according to the intra-prediction mode and the residual block. For further compression, the residual block is transformed from the pixel domain to a transform domain, e.g., the frequency domain, thereby generating residual transform coefficients, which may then be quantized. The quantized transform coefficients, initially arranged as a two-dimensional array, may be scanned to produce a one-dimensional vector of transform coefficients and then entropy encoded into a video bitstream to achieve more compression.

The encoded video bitstream is then stored in a computer readable storage medium (e.g., flash memory) for access by another electronic device having digital video capabilities or transmitted directly to the electronic device in a wired or wireless manner. The electronic device then performs video decompression (which is the inverse of the video compression described above) by, for example, parsing the encoded video bitstream to obtain syntax elements from the bitstream and reconstructing the digital video data from the encoded video bitstream to its original format based at least in part on the syntax elements obtained from the bitstream, and renders the reconstructed digital video data on a display of the electronic device.

As digital video quality goes from high definition to 4K × 2K or even 8K × 4K, the amount of video data to be encoded/decoded grows exponentially. There has been a challenge in how to more efficiently encode/decode video data while maintaining the image quality of the decoded video data.

Disclosure of Invention

Methods and apparatus related to video data encoding and decoding, and more particularly to improving the codec efficiency of Chroma codecs, including improving codec efficiency by simplifying Joint Coding of Chroma Residual (JCCR) symbol flag control. In some embodiments, a flag is signaled to indicate whether the JCCR symbol flag is present in the picture header.

According to a first aspect of the present application, a method of decoding video data comprises: receiving or inferring, from a bitstream of video data, a first syntax element indicating whether Joint Coding of Chroma Residual (JCCR) is enabled; receiving or inferring, from the bitstream, a second syntax element in a Sequence Parameter Set (SPS) indicating whether a JCCR symbol flag is present in a picture header, if the first syntax element indicates that the JCCR is enabled; and decoding the video data according to the first syntax element and the second syntax element. In some embodiments, the method of decoding video data further comprises: in the case that the second syntax element indicates that the JCCR symbol flag is present in the picture header, receiving the JCCR symbol flag in the picture header from the bitstream, and further decoding the video data according to the JCCR symbol flag.

According to a second aspect of the present application, a method of decoding video data comprises: receiving or inferring, from a bitstream of video data, a first syntax element indicating whether Joint Coding of Chroma Residual (JCCR) is enabled; receiving or inferring, from the bitstream, a second syntax element in a Picture Parameter Set (PPS) indicating whether a JCCR sign flag is present in a Picture header, if the first syntax element indicates that the JCCR is enabled; and decoding video data according to the first syntax element and the second syntax element. In some embodiments, the method of decoding video data further comprises: in the case that the second syntax element indicates that the JCCR symbol flag is present in the picture header, receiving the JCCR symbol flag in the picture header from the bitstream, and further decoding the video data according to the JCCR symbol flag.

According to a third aspect of the present application, an electronic device includes one or more processing units, a memory, and a plurality of programs stored in the memory. When executed by the one or more processing units, the programs cause the electronic device to implement the above-described method of decoding video data.

According to a fourth aspect of the present application, a non-transitory computer readable storage medium stores a plurality of programs for execution by an electronic device including one or more processing units. When executed by the one or more processing units, the programs cause the electronic device to implement the above-described method of decoding video data.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate the described embodiments and together with the description, serve to explain the principles of the application. Like reference numerals designate corresponding parts.

Fig. 1 is a block diagram illustrating an exemplary video encoding and decoding system according to some embodiments of the present application.

Fig. 2 is a block diagram illustrating an exemplary video encoder according to some embodiments of the present application.

Fig. 3 is a block diagram illustrating an exemplary video decoder according to some embodiments of the present application.

Fig. 4A-4E are block diagrams illustrating how a frame is recursively partitioned into multiple video blocks of different sizes and shapes according to some embodiments of the application.

Fig. 5 is a block diagram illustrating four gradient patterns used in Sample Adaptive Offset (SAO) according to some embodiments of the present application.

Fig. 6 is a flow diagram illustrating an exemplary process for decoding a video signal with joint codec (JCCR) symbol flag control of chroma residuals according to some embodiments of the present application.

Fig. 7 is a flow chart illustrating an exemplary process for decoding a video signal with a simplified JCCR symbol flag control according to some embodiments of the present application.

Detailed Description

Reference will now be made in detail to the present embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous non-limiting specific details are set forth in order to provide an understanding of the subject matter presented herein. It will be apparent, however, to one skilled in the art that various alternatives may be used and the subject matter may be practiced without these specific details without departing from the scope of the claims. For example, it will be apparent to one of ordinary skill in the art that the subject matter presented herein may be implemented on many types of electronic devices having digital video capabilities.

The first generation of AVS standard includes the chinese national standard "information technology, advanced audio video codec, part 2: video (called AVS 1) and information technology, advanced audio video codec, section 16: wireless television video (called AVS +). It can save about 50% of the bit rate compared to the MPEG-2 standard at the same perceptual quality. The second generation AVS standard includes the chinese national standard "information technology, high efficiency multimedia codec" (referred to as AVS 2), mainly aiming at the transmission of ultra high definition television programs. The coding and decoding efficiency of AVS2 is twice that of AVS +. Meanwhile, the AVS2 standard video part is filed by the Institute of Electrical and Electronics Engineers (IEEE) as an international standard application. The AVS3 standard is a new generation of video coding and decoding standard for ultra-high-definition video applications, and aims to exceed the coding and decoding efficiency of the latest international standard HEVC and save about 30% of bit rate compared with the HEVC standard. In month 3 2019, at AVS meeting 68, the AVS3-P2 baseline was completed, which provides approximately 30% bit rate savings compared to the HEVC standard. Currently, a piece of reference software called High Performance Model (HPM) is maintained by the AVS team to demonstrate the reference implementation of the AVS3 standard. As with HEVC, the AVS3 standard builds on top of the block-based hybrid video codec framework.

Fig. 1 is a block diagram illustrating an exemplary video encoding and decoding system according to some embodiments of the present application. As shown in fig. 1, system 10 includes a source device 12, source device 12 generating and encoding video data to be later decoded by a target device 14. Source device 12 and target device 14 may comprise any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, and so on. In some embodiments, source device 12 and target device 14 are equipped with wireless communication capabilities.

In some embodiments, target device 14 may receive encoded video data to be decoded via link 16. Link 16 may include any type of communication medium or device capable of moving encoded video data from source device 12 to destination device 14. In one example, link 16 may include a communication medium that enables source device 12 to transmit encoded video data directly to target device 14 in real-time. The encoded video data may be modulated according to a communication standard, such as a wireless communication protocol, and transmitted to the target device 14. The communication medium may comprise any wireless or wired communication medium, such as a Radio Frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the internet. The communication medium may include a router, switch, base station, or any other device that may facilitate communication from source device 12 to target device 14.

In other embodiments, the encoded video data may be sent from the output interface 22 to the storage device 32. The encoded video data in storage device 32 may then be accessed by target device 14 via input interface 28. Storage device 32 may include any of a variety of distributed or locally accessed data storage media such as a hard disk drive, blu-ray Disc, digital Versatile Disc (DVD), compact Disc Read-Only Memory (CD-ROM), flash Memory, volatile or non-volatile Memory, or any other suitable Digital storage media for storing encoded Video data. In another example, storage device 32 may correspond to a file server or another intermediate storage device that may hold encoded video data generated by source device 12. The target device 14 may access the stored video data from the storage device 32 via streaming or downloading. The file server may be any type of computer capable of storing encoded video data and transmitting the encoded video data to the target device 14. Exemplary File servers include a web server (e.g., for a website), a File Transfer Protocol (FTP) server, a Network Attached Storage (NAS) device, or a local disk drive. The target device 14 may access the encoded video data through any standard data connection suitable for accessing encoded video data stored on a file server, including a wireless channel (e.g., a wireless fidelity (Wi-Fi) connection), a wired connection (e.g., a Digital Subscriber Line (DSL), a cable modem, etc.), or a combination of both a wireless channel and a wired connection. The transmission of the encoded video data from the storage device 32 may be a streaming transmission, a download transmission, or a combination of both a streaming and a download transmission.

As shown in fig. 1, source device 12 includes a video source 18, a video encoder 20, and an output interface 22. Video source 18 may include sources such as the following or a combination of such sources: a video capture device (e.g., a video camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and/or a computer graphics system for generating computer graphics data as source video. As one example, if video source 18 is a video camera of a security monitoring system, source device 12 and destination device 14 may form a camera phone or video phone. However, embodiments described herein may be generally applicable to video codecs, and may be applied to wireless and/or wired applications.

Captured, pre-captured, or computer-generated video may be encoded by video encoder 20. The encoded video data may be transmitted directly to the target device 14 via the output interface 22 of the source device 12. The encoded video data may also (or alternatively) be stored on storage device 32 for later access by target device 14 or other devices for decoding and/or playback. The output interface 22 may further include a modem and/or a transmitter.

The target device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and/or a modem and receives encoded video data over link 16. The encoded video data transmitted over link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included within encoded video data sent over a communication medium, stored on a storage medium, or stored on a file server.

In some embodiments, the target device 14 may include a display device 34, and the display device 34 may be an integrated display device and an external display device configured to communicate with the target device 14. The Display device 34 displays the decoded video data to a user and may include any of a variety of Display devices, such as a Liquid Crystal Display (LCD), a plasma Display, an Organic Light-Emitting Diode (OLED) Display, or another type of Display device.

Video encoder 20 and video decoder 30 may operate according to proprietary standards or industry standards (e.g., VVC, HEVC, part 10 of MPEG-4, advanced Video Coding (AVC), AVS), or extensions of such standards. It should be understood that the present application is not limited to a particular video encoding/decoding standard and may be applicable to other video encoding/decoding standards. It is generally recognized that video encoder 20 of source device 12 may be configured to encode video data according to any of these current or future standards. Similarly, it is also generally contemplated that video decoder 30 of target device 14 may be configured to decode video data in accordance with any of these current or future standards.

Video encoder 20 and video decoder 30 may each be implemented as any of a variety of suitable encoder circuits, such as one or more micro-processing units, digital signal processing units (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs), discrete logic devices, software, hardware, firmware, or any combinations thereof. When implemented in part in software, the electronic device may store instructions for the software in a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processing units to perform the video encoding/decoding operations disclosed herein. Each of video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined encoder/decoder (CODEC) in the respective device.

Fig. 2 is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in the present application. Video encoder 20 may perform intra-prediction encoding and inter-prediction encoding on video blocks within video frames. Intra-prediction coding relies on spatial prediction to reduce or remove spatial redundancy in video data within a given video frame or picture. Inter-prediction coding relies on temporal prediction to reduce or remove temporal redundancy in video data within adjacent video frames or pictures of a video sequence.

As shown in fig. 2, video encoder 20 includes a video data memory 40, a prediction processing unit 41, a Decoded Picture Buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy encoding unit 56. Prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra prediction processing unit 46, and an intra Block Copy (BC) unit 48. In some implementations, video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. An in-loop filter, such as a deblocking filter (not shown), may be located between adder 62 and DPB 64 to filter block boundaries to remove block artifacts from the reconstructed video. In addition to a deblocking filter, another in-loop filter (not shown) may be used to filter the output of adder 62. Further loop filtering, e.g., sample Adaptive Offset (SAO) and adaptive in-loop filter (ALF), may be applied to the reconstructed CU before it is placed in a reference picture memory and used as a reference for coding future video blocks. The video encoder 20 may take the form of fixed or programmable hardware units, or may be dispersed among one or more of the illustrated fixed or programmable hardware units.

Video data memory 40 may store video data to be encoded by components of video encoder 20. The video data in video data storage 40 may be obtained, for example, from video source 18 shown in fig. 1. DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) for use by video encoder 20 in encoding video data (e.g., in intra or inter prediction encoding modes). Video data memory 40 and DPB 64 may be formed from any of a variety of memory devices. In various examples, video data memory 40 may be on-chip with other components of video encoder 20, or off-chip with respect to those components.

As shown in fig. 2, upon receiving the video data, a partition unit 45 within prediction processing unit 41 partitions the video data into video blocks. This partitioning may also include partitioning the video frame into slices, tiles (tiles), or other larger Coding Units (CUs) according to a predefined partitioning structure (e.g., a quadtree structure) associated with the video data. Prediction processing unit 41 may select one of a plurality of possible prediction encoding modes, e.g., one of one or more inter prediction encoding modes of a plurality of intra prediction encoding modes, for the current video block based on the error results (e.g., encoding rate and distortion level). Prediction processing unit 41 may provide the resulting intra-predicted or inter-predicted encoded blocks to adder 50 to generate a residual block, and to adder 62 to reconstruct the encoded block for subsequent use as part of a reference frame. Prediction processing unit 41 also provides syntax elements, such as motion vectors, intra-mode indicators, partition information, and other such syntax information, to entropy encoding unit 56.

To select a suitable intra-prediction encoding mode for the current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction encoding of the current video block in relation to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-prediction encoding of the current video block in relation to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple encoding passes, e.g., to select an appropriate encoding mode for each block of video data.

In some implementations, motion estimation unit 42 determines the inter-prediction mode for the current video frame by generating motion vectors according to predetermined patterns within the sequence of video frames, the motion vectors indicating the displacement of Prediction Units (PUs) of video blocks within the current video frame relative to prediction blocks within the reference video frame. The motion estimation performed by motion estimation unit 42 is a process of generating motion vectors that estimate motion for video blocks. For example, a motion vector may indicate the displacement of a PU of a video block within a current video frame or picture relative to a prediction block within a reference frame (or another encoded unit) associated with the current block being encoded within the current frame (or another encoded unit). The predetermined pattern may designate video frames in the sequence as P-frames or B-frames. Intra BC unit 48 may determine vectors (e.g., block vectors) for intra BC encoding in a similar manner as the motion vectors determined by motion estimation unit 42 for inter prediction, or may determine block vectors using motion estimation unit 42.

In terms of pixel differences, a prediction block for a video block may be or may correspond to a block of a reference frame or reference block that is considered to closely match the video block to be encoded, and the pixel differences may be determined by a Sum of Absolute Differences (SAD), a Sum of Squared Differences (SSD), or other difference metric. In some implementations, video encoder 20 may calculate values for sub-integer pixel positions of reference frames stored in DPB 64. For example, video encoder 20 may interpolate values for a quarter-pixel position, an eighth-pixel position, or other fractional-pixel positions of the reference frame. Thus, the motion estimation unit 42 may perform a motion search with respect to the full pixel position and the fractional pixel position and output a motion vector with fractional pixel accuracy.

Motion estimation unit 42 calculates motion vectors for PUs of video blocks in inter-prediction coded frames by: the location of the PU is compared to locations of prediction blocks for reference frames selected from a first reference frame list (list 0) or a second reference frame list (list 1), each of which identifies one or more reference frames stored in DPB 64. The motion estimation unit 42 sends the calculated motion vector to the motion compensation unit 44 and then to the entropy coding unit 56.

The motion compensation performed by motion compensation unit 44 may involve obtaining or generating a prediction block based on the motion vector determined by motion estimation unit 42. Upon receiving the motion vector for the PU of the current video block, motion compensation unit 44 may locate the prediction block to which the motion vector points in one of the reference frame lists, retrieve the prediction block from DPB 64, and forward the prediction block to adder 50. Adder 50 then forms a residual video block of pixel difference values by subtracting the pixel values of the prediction block provided by motion compensation unit 44 from the pixel values of the current video block being encoded. The pixel difference values forming the residual video block may comprise a luminance difference component or a chrominance difference component or both. Motion compensation unit 44 may also generate syntax elements associated with video blocks of the video frame for use by video decoder 30 in decoding the video blocks of the video frame. The syntax elements may include, for example, syntax elements that define motion vectors used to identify prediction blocks, any flag indicating a prediction mode, or any other syntax information described herein. It should be noted that motion estimation unit 42 and motion compensation unit 44 may be highly integrated, but are illustrated separately for conceptual purposes.

In some embodiments, intra BC unit 48 may generate vectors and obtain prediction blocks in a manner similar to that described above in connection with motion estimation unit 42 and motion compensation unit 44, but in the same frame as the current block being encoded, and these vectors are referred to as block vectors rather than motion vectors. In particular, the intra BC unit 48 may determine an intra prediction mode to be used for encoding the current block. In some examples, intra BC unit 48 may encode current blocks using various intra prediction modes, e.g., during separate encoding passes, and test their performance through rate-distortion analysis. Next, intra BC unit 48 may select an appropriate intra prediction mode among the various tested intra prediction modes to use and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate rate-distortion values for various tested intra prediction modes using rate-distortion analysis, and select an intra prediction mode having the best rate-distortion characteristics among the tested modes as a suitable intra prediction mode to use. Rate-distortion analysis generally determines the amount of distortion (or error) between an encoded block and the original unencoded block that was encoded to produce the encoded block, as well as the bit rate (i.e., the number of bits) used to produce the encoded block. Intra BC unit 48 may calculate ratios from the distortion and rate for various encoded blocks to determine which intra prediction mode exhibits the best rate-distortion value for the block.

In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction according to embodiments described herein. In either case, for intra block copy, the prediction block may be a block that is considered to closely match the block to be encoded in terms of pixel differences, which may be determined by Sum of Absolute Differences (SAD), sum of Squared Differences (SSD), or other difference metric, and identifying the prediction block may include calculating values for sub-integer pixel locations.

Whether the prediction block is from the same frame according to intra prediction or from a different frame according to inter prediction, video encoder 20 may form a residual video block by subtracting pixel values of the prediction block from pixel values of the current video block being encoded to form pixel difference values. The pixel difference values forming the residual video block may include both a luminance component difference and a chrominance component difference.

As an alternative to inter prediction performed by motion estimation unit 42 and motion compensation unit 44 or intra block copy prediction performed by intra BC unit 48 as described above, intra prediction processing unit 46 may intra predict the current video block. Specifically, the intra prediction processing unit 46 may determine an intra prediction mode for encoding the current block. To this end, the intra prediction processing unit 46 may encode the current block using various intra prediction modes, for example, during separate encoding channels, and the intra prediction processing unit 46 (or in some examples, a mode selection unit) may select an appropriate intra prediction mode from the tested intra prediction modes to use. Intra-prediction processing unit 46 may provide information indicating the intra-prediction mode selected for the block to entropy encoding unit 56. The entropy encoding unit 56 may encode information indicating the selected intra prediction mode into a bitstream.

After prediction processing unit 41 determines a prediction block for the current video block via inter prediction or intra prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more Transform Units (TUs) and provided to the Transform processing Unit 52. The transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform, such as a Discrete Cosine Transform (DCT) or a conceptually similar transform.

Transform processing unit 52 may send the resulting transform coefficients to quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The quantization level may be modified by adjusting a quantization parameter. In some examples, quantization unit 54 may then perform a scan of a matrix including quantized transform coefficients. Alternatively, the entropy encoding unit 56 may perform scanning.

After quantization, the entropy encoding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context Adaptive Variable Length Coding (CAVLC), context Adaptive Binary Arithmetic Coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval entropy (PIPE) coding, or another entropy encoding method or technique. The encoded bitstream may then be transmitted to a video decoder 30 as shown in fig. 1, or archived in a storage device 32 as shown in fig. 1 for later transmission to the video decoder 30 or retrieval by the video decoder 30. Entropy encoding unit 56 may also entropy encode the motion vectors and other syntax elements for the current video frame being encoded.

Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain for use in generating reference blocks for predicting other video blocks. As noted above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction blocks to calculate sub-integer pixel values for use in motion estimation.

Adder 62 adds the reconstructed residual block to the motion compensated prediction block produced by motion compensation unit 44 to produce a reference block for storage in DPB 64. The reference block may then be used by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 as a prediction block to inter-predict another video block in a subsequent video frame.

Fig. 3 is a block diagram illustrating an exemplary video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. Prediction processing unit 81 further includes a motion compensation unit 82, an intra prediction unit 84, and an intra BC unit 85. Video decoder 30 may perform a decoding process that is substantially reciprocal to the encoding process described above with respect to video encoder 20 in connection with fig. 2. For example, motion compensation unit 82 may generate prediction data based on motion vectors received from entropy decoding unit 80, and intra-prediction unit 84 may generate prediction data based on intra-prediction mode indicators received from entropy decoding unit 80.

In some examples, the units of video decoder 30 may be tasked to perform embodiments of the present application. Furthermore, in some examples, embodiments of the present application may be dispersed among one or more of the units of video decoder 30. For example, intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of video decoder 30 (e.g., motion compensation unit 82, intra prediction unit 84, and entropy decoding unit 80). In some examples, video decoder 30 may not include intra BC unit 85, and the functions of intra BC unit 85 may be performed by other components of prediction processing unit 81 (e.g., motion compensation unit 82).

Video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of video decoder 30. The video data stored in the video data memory 79 may be obtained, for example, from the storage device 32, from a local video source (e.g., a camera), via wired or wireless network communication of the video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). Video data memory 79 may include a Coded Picture Buffer (CPB) that stores coded video data from a coded video bitstream. DPB 92 of video decoder 30 stores the reference video data for use by video decoder 30 (e.g., in intra-or inter-prediction encoding modes) when decoding the video data. Video data Memory 79 and DPB 92 may be formed from any of a variety of Memory devices, such as Dynamic Random Access Memory (DRAM), including Synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of Memory devices. For illustrative purposes, video data memory 79 and DPB 92 are depicted in fig. 3 as two different components of video decoder 30. It will be apparent to those skilled in the art that video data memory 79 and DPB 92 may be provided by the same memory device or separate memory devices. In some examples, video data memory 79 may be on-chip with other components of video decoder 30, or off-chip with respect to those components.

During the decoding process, video decoder 30 receives an encoded video bitstream representing video blocks and associated syntax elements of an encoded video frame. Video decoder 30 may receive syntax elements at the video frame level and/or the video block level. Entropy decoding unit 80 of video decoder 30 entropy decodes the bitstream to generate quantized coefficients, motion vectors or intra prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vector or the intra prediction mode indicator, and other syntax elements to the prediction processing unit 81.

When a video frame is encoded as an intra-prediction encoded (I) frame or as an intra-coded prediction block for use in other types of frames, intra-prediction unit 84 of prediction processing unit 81 may generate prediction data for a video block of the current video frame based on the signaled intra-prediction mode and reference data from previously decoded blocks of the current frame.

When a video frame is encoded as an inter-prediction encoded (i.e., B or P) frame, motion compensation unit 82 of prediction processing unit 81 generates one or more prediction blocks for the video block of the current video frame based on the motion vectors and other syntax elements received from entropy decoding unit 80. Each of the prediction blocks may be generated from a reference frame within one of the reference frame lists. Video decoder 30 may use a default construction technique to construct reference frame lists, i.e., list 0 and list 1, based on the reference frames stored in DPB 92.

In some examples, when encoding a video block according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vectors and other syntax elements received from entropy decoding unit 80. The prediction block may be within a reconstruction region of the same picture as the current video block defined by video encoder 20.

Motion compensation unit 82 and/or intra BC unit 85 determine prediction information for the video block of the current video frame by parsing the motion vectors and other syntax elements and then use the prediction information to generate a prediction block for the current video block being decoded. For example, motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra-prediction or inter-prediction) for encoding a video block of a video frame, an inter-prediction frame type (e.g., B or P), construction information for one or more of a list of reference frames for the frame, a motion vector for each inter-prediction encoded video block of the frame, an inter-prediction state for each inter-prediction encoded video block of the frame, and other information for decoding a video block in the current video frame.

Similarly, some of the received syntax elements, such as flags, may be used by intra BC unit 85 to determine that the current video block is predicted using an intra BC mode, the build information of which video blocks of the frame are within the reconstruction region and should be stored in DPB 92, the block vector for each intra BC predicted video block of the frame, the intra BC prediction status for each intra BC predicted video block of the frame, and other information used to decode the video blocks in the current video frame.

Motion compensation unit 82 may also perform interpolation using interpolation filters as used by video encoder 20 during encoding of video blocks to calculate interpolated values for sub-integer pixels of a reference block. In this case, motion compensation unit 82 may determine interpolation filters used by video encoder 20 from the received syntax elements and use these interpolation filters to generate prediction blocks.

Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80 using the same quantization parameter calculated by video encoder 20 for each video block in the video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to reconstruct the residual block in the pixel domain.

After motion compensation unit 82 or intra BC unit 85 generates a prediction block for the current video block based on the vectors and other syntax elements, adder 90 reconstructs the decoded video block for the current video block by adding the residual block from inverse transform processing unit 88 to the corresponding prediction block generated by motion compensation unit 82 and intra BC unit 85. An in-loop filter (not shown) may be located between adder 90 and DPB 92 to further process the decoded video block. In-loop filtering (e.g., deblocking filter, sample Adaptive Offset (SAO), and adaptive in-loop filter (ALF)) may be applied to a reconstructed CU before the reconstructed CU is placed in reference picture memory. The decoded video blocks in a given frame are then stored in DPB 92, and DPB 92 stores a reference frame for subsequent motion compensation of the next video blocks. DPB 92, or a memory device separate from DPB 92, may also store decoded video for later presentation on a display device (e.g., display device 34 of fig. 1).

In a typical video encoding process, a video sequence typically comprises an ordered set of frames or pictures. Each frame may include three arrays of samples, denoted SL, SCb, and SCr. SL is a two-dimensional array of brightness samples. SCb is a two-dimensional array of Cb chroma samples. SCr is a two-dimensional array of Cr chroma samples. In other examples, the frame may be monochromatic, and thus include only one two-dimensional array of intensity samples.

As with HEVC, the AVS3 standard builds on top of a block-based hybrid video codec framework. The input video signal is processed block by block, called Coding Unit (CU). Unlike HEVC, which partitions blocks based on only quadtrees, in AVS3 one Coding Tree Unit (CTU) is partitioned into CUs to accommodate different local features of quadtrees/binary trees/extended quadtrees. Furthermore, the concept of multiple partition unit type in HEVC is removed, i.e. there is no longer a separation of CU, prediction Unit (PU) and Transform Unit (TU) in AVS 3. Instead, each CU is always used as a basic unit for prediction and transform without further partitioning. In the tree partition structure of AVS3, one CTU is first divided based on a quad tree structure. The leaf nodes of each quadtree may then be further partitioned based on the binary tree and the extended quadtree structure.

As shown in fig. 4A, video encoder 20 (or, more specifically, segmentation unit 45) generates an encoded representation of a frame by first segmenting the frame into a set of Coding Tree Units (CTUs). A video frame may include an integer number of CTUs ordered sequentially from left to right and top to bottom in raster scan order. Each CTU is the largest logical coding unit, and the width and height of the CTU is signaled by video encoder 20 in a sequence parameter set such that all CTUs in a video sequence have the same size of one of 128 × 128, 64 × 64, 32 × 32, and 16 × 16. It should be noted, however, that the present application is not necessarily limited to a particular size. As shown in fig. 4B, each CTU may include one Coding Tree Block (CTB) of luma samples, two corresponding Coding tree blocks of chroma samples, and syntax elements for encoding samples of the Coding tree blocks. The syntax elements describe the properties of the different types of units that encode the pixel blocks and how the video sequence may be reconstructed at video decoder 30, including inter or intra prediction, intra prediction modes, motion vectors, and other parameters. In a monochrome picture or a picture with three separate color planes, a CTU may comprise a single coding tree block and syntax elements for coding samples of the coding tree block. The coding tree block may be an N × N block of samples.

To achieve better performance, video encoder 20 may recursively perform tree partitioning, e.g., binary tree partitioning, ternary tree partitioning, quadtree partitioning, or a combination thereof, on the coding tree blocks of the CTUs and partition the CTUs into smaller CUs. As depicted in fig. 4C, a 64 × 64 CTU 400 is first divided into four smaller CUs, each having a block size of 32 × 32. Of the four smaller CUs, CU 410 and CU 420 are divided into four CUs with block sizes of 16 × 16, respectively. Two 16 × 16 CUs 430 and 440 are further divided into four CUs having a block size of 8 × 8, respectively. Fig. 4D depicts a quadtree data structure showing the final result of the segmentation process of the CTU 400 as depicted in fig. 4C, each leaf node of the quadtree corresponding to one CU of a respective size ranging from 32 x 32 to 8 x 8. Similar to the CTU depicted in fig. 4B, each CU may include an encoded block (CB) of luma samples and two corresponding encoded blocks of chroma samples of frames of the same size, and syntax elements for encoding the samples of the encoded blocks. In a monochrome picture or a picture with three separate color planes, a CU may comprise a single coding block and a syntax structure for coding the samples of the coding block. It should be noted that the quadtree splitting depicted in fig. 4C and 4D is for illustrative purposes only, and one CTU may be split into multiple CUs based on quadtree splitting/ternary tree splitting/binary tree splitting to adapt to varying local characteristics. In the multi-type tree structure, one CTU is divided in a quadtree structure, and each quadtree-leaf CU can be further divided in binary and ternary tree structures. As shown in fig. 4E, there are five segmentation/division types in AVS3, namely quadtree segmentation, horizontal binary tree segmentation, vertical binary tree segmentation, horizontally extended quadtree segmentation, and vertically extended quadtree segmentation.

In some embodiments, video encoder 20 may further partition the coding block of the CU into one or more (M × N) Prediction Blocks (PBs). PB is a rectangular (square or non-square) block of samples to which the same prediction (inter or intra) is applied. A Prediction Unit (PU) of a CU may include PB of luma samples, two corresponding PBs of chroma samples, and syntax elements for predicting PB. In a monochrome picture or a picture with three separate color planes, a PU may comprise a single PB and syntax structures for predicting the PB. Video encoder 20 may generate predicted luma, cb, and Cr blocks for the luma, cb, and Cr prediction blocks for each PU of the CU.

Video encoder 20 may use intra prediction or inter prediction to generate the prediction block for the PU. If video encoder 20 uses intra-prediction to generate the prediction block for the PU, video encoder 20 may generate the prediction block for the PU based on decoding samples of the frame associated with the PU. If video encoder 20 uses inter-prediction to generate the prediction block for the PU, video encoder 20 may generate the prediction block for the PU based on decoding samples of one or more frames other than the frame associated with the PU.

After video encoder 20 generates the predicted luma block, the predicted Cb block, and the predicted Cr block for one or more PUs of the CU, video encoder 20 may generate a luma residual block for the CU by subtracting the predicted luma block of the CU from the original luma coding block of the CU, such that each sample in the luma residual block of the CU indicates a difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma coding block of the CU. Similarly, video encoder 20 may generate the Cb residual block and the Cr residual block for the CU, respectively, such that each sample in the Cb residual block of the CU indicates a difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb coding block of the CU, and each sample in the Cr residual block of the CU may indicate a difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr coding block of the CU.

Further, as shown in fig. 4C, video encoder 20 may decompose the luma, cb, and Cr residual blocks of the CU into one or more luma, cb, and Cr transform blocks, respectively, using quad-tree partitioning. A transform block is a block of rectangular (square or non-square) samples to which the same transform is applied. A TU of a CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and syntax elements for transforming the transform block samples. Thus, each TU of a CU may be associated with a luma transform block, a Cb transform block, and a Cr transform block. In some examples, the luma transform block associated with a TU may be a sub-block of a luma residual block of a CU. The Cb transform block may be a sub-block of a Cb residual block of the CU. The Cr transform block may be a sub-block of the Cr residual block of the CU. In a monochrome picture or a picture with three separate color planes, a TU may include a single transform block and syntax structures for transforming the samples of the transform block.

Video encoder 20 may apply one or more transforms to a luma transform block of a TU to generate a luma coefficient block for the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficients may be scalars. Video encoder 20 may apply one or more transforms to a Cb transform block of a TU to generate a Cb coefficient block for the TU. Video encoder 20 may apply one or more transforms to a Cr transform block of a TU to generate a Cr coefficient block for the TU.

After generating the coefficient blocks (e.g., luminance coefficient blocks, cb coefficient blocks, or Cr coefficient blocks), video encoder 20 may quantize the coefficient blocks. Quantization generally refers to the process by which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, thereby providing further compression. After video encoder 20 quantizes the coefficient block, video encoder 20 may entropy encode syntax elements that indicate the quantized transform coefficients. For example, video encoder 20 may perform Context Adaptive Binary Arithmetic Coding (CABAC) on syntax elements indicating quantized transform coefficients. Finally, video encoder 20 may output a bitstream that includes the bit sequence that forms a representation of the encoded frames and associated data, the bitstream being stored in storage device 32 or transmitted to destination device 14.

Upon receiving the bitstream generated by video encoder 20, video decoder 30 may parse the bitstream to obtain syntax elements from the bitstream. Video decoder 30 may reconstruct the frames of video data based at least in part on syntax elements obtained from the bitstream. The process of reconstructing the video data is generally reciprocal to the encoding process performed by video encoder 20. For example, video decoder 30 may perform inverse transforms on coefficient blocks associated with TUs of the current CU to reconstruct residual blocks associated with the TUs of the current CU. Video decoder 30 also reconstructs the encoded block of the current CU by adding samples of the prediction block for the PUs of the current CU to corresponding samples of the transform blocks of the TUs of the current CU. After reconstructing the encoded blocks for each CU of a frame, video decoder 30 may reconstruct the frame.

SAO is a process of modifying decoded samples by conditionally adding an offset value to each sample based on values in a look-up table sent by an encoder after applying a deblocking filter. SAO filtering is performed on a region basis based on a filtering type selected by CTB through a syntax element SAO-type-idx. A value of 0 for SAO-type-idx indicates that no SAO filter is applied to the CTB, and a value of 1 and a value of 2 signal the use of the band offset filter type and the use of the edge offset filter type, respectively. In the band offset mode specified by sao-type-idx equal to 1, the selected offset value depends directly on the sample amplitude. In this mode, the entire sample amplitude range is evenly divided into 32 segments (called frequency bands), and the sample values belonging to four of these frequency bands (consecutive within 32 frequency bands) are modified by adding to the transmitted value (denoted as band offset), which may be positive or negative. The main reason for using four consecutive bands is that in smooth areas where banding artifacts may occur, the sample amplitudes in the CTB tend to concentrate in only a few bands. Furthermore, design choices using four offsets are uniform with the operation of the edge offset mode that also uses four offset values. In the edge offset mode specified by sao-type-idx equal to 2, the syntax element sao-eo-class having a value from 0 to 3 signals whether the horizontal direction, the vertical direction or one of the two diagonal gradient directions is used for the edge offset classification in the CTB.

Fig. 5 is a block diagram illustrating four gradient modes for use in an SAO, according to some embodiments of the present application. Four gradient patterns 502, 504, 506, and 508 are used for the corresponding sao-eo-class in the edge shift pattern. The samples labeled "p" indicate the center sample to be considered. Two samples labeled "n0" and "n1" specify two adjacent samples along (a) a horizontal (sao-eo-class = 0) gradient mode, (b) a vertical (sao-eo-class = 1) gradient mode, (c) a 135 ° diagonal (sao-eo-class = 2) gradient mode, and (d) a 45 ° (sao-eo-class = 3) gradient mode. As shown in fig. 5, each sample in the CTB is classified into one of five EdgeIdx classes by comparing the value p of a sample located at a certain position with the values n0 and n1 of two samples located at adjacent positions. This classification is performed for each sample based on the decoded sample value, so the EdgeIdx classification does not require additional signaling. The offset value from the transmitted look-up table is added to the sample value for EdgeIdx classes from 1 to 4, depending on the EdgeIdx class at the sample position. The offset value is always positive for class 1 and class 2 and always negative for class 3 and class 4. Therefore, the filter generally has a smoothing effect in the edge offset mode. Table 1 below shows the sample EdgeIdx class in the SAO edge class.

Table 1: sample EdgeIdx class in SAO edge classification

For SAO type 1 and SAO type 2, a total of four amplitude offset values are transmitted to the decoder for each CTB. For type 1, the symbols are also encoded. The offset values and related syntax elements (such as sao-type-idx and sao-eo-class) are determined by the encoder-typically using criteria that optimize rate-distortion performance. The merge flag may be used to indicate the SAO parameter to inherit from either the left CTB or the upper CTB, thereby enabling signaling. In summary, SAO is a nonlinear filtering operation that allows additional modification of the reconstructed signal and which may enhance the signal representation of smooth regions and surrounding edges.

In some embodiments, disclosed herein are methods and systems to simplify Joint Coding of Chroma Residual (JCCR) CSign flag control in VVC standards. Although the JCCR design in the VVC standard is used as the basic JCCR method in the following description, it will be apparent to those skilled in the art of video coding that the methods and systems described herein can also be applied to other residual codecs or other coding tools with the same or similar design spirit.

In the VVC JCCR design, picture-level flags are signaled to indicate CSign applied in JCCR rescOintC [ x ] [ y ] derivation. However, encoders with a priori knowledge of the encoded video content are subject to repeatedly signaling picture-level flags, even if the entire sequence is only suitable for applying negative signs. The encoder can analyze common use cases to determine JCCR symbols before encoding the sequence, while current VVC syntax requires the encoder to repeatedly signal picture level flags, which can lead to redundancy. Table 2 below shows the picture header structure syntax.

Table 2: picture header structure grammar

ph _ joint _ cbcr _ sign _ flag indicates whether or not the collocated residual samples of the two chroma components have inverted signs in the transform unit where tu _ joint _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1. When tu _ join _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1 for one transform unit, ph _ join _ cbcr _ sign _ flag equal to 0 indicates that the sign of each residual sample of the Cr (or Cb) component is the same as the sign of the collocated Cb (or Cr) residual sample, and ph _ join _ cbcr _ sign _ flag equal to 1 indicates that the sign of each residual sample of the Cr (or Cb) component is given by the inverted sign of the collocated Cb (or Cr) residual sample.

In an embodiment, an SPS flag (SPS _ join _ cbcr _ info _ present _ in _ ph _ flag) is signaled to indicate whether or not there is a ph _ join _ cbcr _ sign _ flag in the picture header. When ph _ join _ cbcr _ sign _ flag does not exist, the value of ph _ join _ cbcr _ sign _ flag is inferred to be equal to 1. Some examples of variations or alternative syntax are provided. The modified syntax is shown in tables 3 and 4 below.

Table 3: signaling an SPS flag (SPS _ joint _ cbcr _ info _ present _ in _ ph _ flag) to indicate whether a Sequence parameter set Raw Byte Sequence Payload (RBSP) syntax exists in a picture header when the ph _ joint _ cbcr _ sign _ flag is present

Table 4: picture header structure syntax when an SPS flag (SPS _ join _ cbcr _ info _ present _ in _ ph _ flag) is signaled to indicate whether or not there is ph _ join _ cbcr _ sign _ flag in the picture header

In some embodiments, the definition of the Sequence parameter set original Byte Sequence Payload (RBSP) semantics shown in table 3 is explained in further detail below.

sps _ join _ cbcr _ enabled _ flag equal to 0 indicates that joint coding of chroma residuals is disabled. sps _ join _ cbcr _ enabled _ flag equal to 1 indicates that joint coding of chroma residuals is enabled. When the sps _ join _ cbcr _ enabled _ flag does not exist, the value of the sps _ join _ cbcr _ enabled _ flag is inferred to be equal to 0.

SPS _ join _ cbcr _ info _ present _ in _ PH _ flag equal to 1 indicates that PH _ join _ cbcr _ sign _ flag is present in the Picture Header (PH) referring to the SPS. The SPS _ join _ cbcr _ info _ present _ in _ PH _ flag equal to 0 indicates that PH _ join _ cbcr _ sign _ flag is not present in the PHs referencing the SPS. When the sps _ join _ cbcr _ info _ present _ in _ ph _ flag does not exist, the value of the sps _ join _ cbcr _ info _ present _ in _ ph _ flag is inferred to be equal to 0.

In some embodiments, the definition of the picture header structure semantics shown in table 4 is explained in more detail below.

ph _ join _ cbcr _ sign _ flag specifies whether or not the collocated residual samples of the two chroma components have inverted signs in the transform unit for which tu _ join _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1. When tu _ join _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1 for one transform unit, ph _ join _ cbcr _ sign _ flag equal to 0 indicates that the sign of each residual sample of the Cr (or Cb) component is the same as the sign of the collocated Cb (or Cr) residual sample, and ph _ join _ cbcr _ sign _ flag equal to 1 indicates that the sign of each residual sample of the Cr (or Cb) component is given by the inverted sign of the collocated Cb (or Cr) residual sample. When ph _ join _ cbcr _ sign _ flag does not exist, it is inferred that the value of ph _ join _ cbcr _ sign _ flag is equal to 1.

In another embodiment, the PPS flag (join _ cbcr _ info _ in _ ph _ flag) is signaled to indicate whether or not ph _ join _ cbcr _ sign _ flag is present in the picture header. When ph _ join _ cbcr _ sign _ flag does not exist, the value of ph _ join _ cbcr _ sign _ flag is inferred to be equal to 1. Some examples of variations or alternative syntax are provided. The modified syntax is shown in tables 5 and 6 below.

Table 5: signaling a PPS flag (join _ cbcr _ info _ in _ ph _ flag) to indicate a picture parameter set Raw Byte Sequence Payload (RBSP) syntax when ph _ join _ cbcr _ sign _ flag is present in the picture header

Table 6: picture header structure syntax when the PPS flag (join _ cbcr _ info _ in _ ph _ flag) is signaled to indicate whether or not there is a ph _ join _ cbcr _ sign _ flag in the picture header

In some embodiments, the definition of the picture parameter set Raw Byte Sequence Payload (RBSP) semantics shown in table 5 is explained in more detail below.

A joint _ cbcr _ info _ in _ PH _ flag equal to 1 indicates that PH _ joint _ cbcr _ sign _ flag is present in the PH referencing the PPS. join _ cbcr _ info _ in _ PH _ flag equal to 0 indicates that PH _ join _ cbcr _ sign _ flag is not present in the PH of the reference PPS. When the joint _ cbcr _ info _ in _ ph _ flag does not exist, the value of the joint _ cbcr _ info _ in _ ph _ flag is inferred to be equal to 0.

rpl _ info _ in _ PH _ flag equal to 1 indicates that reference picture list information is present in the PH syntax structure and is not present in the slice header that references a PPS that does not contain the PH syntax structure. An rpl _ info _ in _ PH _ flag equal to 0 indicates that the reference picture list information is not present in the PH syntax structure and may be present in the slice header referring to the PPS. When rpl _ info _ in _ ph _ flag is not present, the value of rpl _ info _ in _ ph _ flag is inferred to be equal to 0.

SAO _ info _ in _ PH _ flag equal to 1 indicates that SAO filtering information is present in the PH syntax structure and not in the slice header, which refers to a PPS that does not contain a PH syntax structure. SAO _ info _ in _ PH _ flag equal to 0 indicates that SAO filtering information is not present in the PH syntax structure and may be present in the slice header referring to the PPS. When sao _ info _ in _ ph _ flag is not present, the value of sao _ info _ in _ ph _ flag is inferred to be equal to 0.

In some embodiments, the definition of the picture header structure semantics shown in table 6 is explained in more detail below.

ph _ join _ cbcr _ sign _ flag specifies whether or not the collocated residual samples of the two chroma components have inverted signs in the transform unit for which tu _ join _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1. When tu _ join _ cbcr _ residual _ flag [ x0] [ y0] is equal to 1 for one transform unit, ph _ join _ cbcr _ sign _ flag equal to 0 specifies that the sign of each residual sample of the Cr (or Cb) component is the same as the sign of the collocated Cb (or Cr) residual sample, and ph _ join _ cbcr _ sign _ flag equal to 1 specifies that the sign of each residual sample of the Cr (or Cb) component is given by the inverted sign of the collocated Cb (or Cr) residual sample. When ph _ join _ cbcr _ sign _ flag does not exist, it is inferred that the value of ph _ join _ cbcr _ sign _ flag is equal to 1.

Fig. 6 is a flow diagram illustrating an example process 600 for decoding a video signal with simplified Joint Coding of Chroma Residual (JCCR) sign control, according to some embodiments of the present application.

Video decoder 30 receives or infers a first syntax element from a bitstream of video data that indicates whether Joint Coding of Chroma Residues (JCCR) is enabled (610).

In the case where the first syntax element indicates that the JCCR is enabled, video decoder 30 receives or infers from the bitstream a second syntax element indicating whether a JCCR symbol flag is present in a picture header in a Sequence Parameter Set (SPS) (620).

Video decoder 30 decodes video data according to the first syntax element and the second syntax element (630).

In some embodiments, in the case that the second syntax element indicates that the JCCR symbol flag is present in the picture header, video decoder 30 receives the JCCR symbol flag in the picture header from the bitstream and further decodes the video data according to the JCCR symbol flag.

In some embodiments, receiving or inferring from the bitstream a second syntax element (620) in the SPS that indicates whether the JCCR symbol flag is present in the picture header includes: in the case where the second syntax element is present in the SPS, video decoder 30 receives the second syntax element in the SPS from the bitstream indicating whether the JCCR symbol flag is present in the picture header; in the absence of the second syntax element in the SPS, video decoder 30 infers the second syntax element in the SPS to indicate that the JCCR symbol flag is not present in the picture header.

In some embodiments, receiving or inferring the first syntax element (610) indicating whether the JCCR is enabled from a bitstream of the video data comprises: receiving the first syntax element indicating whether the JCCR is enabled from the bitstream in the presence of the first syntax element; in the absence of the first syntax element in SPS, the first syntax element is inferred to indicate that the JCCR is not enabled.

In some embodiments, the first syntax element is sps _ join _ cbcr _ enabled _ flag.

In some embodiments, the second syntax element is sps _ join _ cbcr _ info _ present _ in _ ph _ flag.

In some embodiments, the JCCR symbol flag is ph _ join _ cbcr _ sign _ flag.

In some embodiments, the JCCR sign flag indicates whether a first sign of each residual sample of the plurality of chroma components is the same as a second sign of each collocated residual sample of the corresponding plurality of chroma components.

In some embodiments, in the absence of the JCCR sign flag in the picture header, video decoder 30 infers the JCCR sign flag to indicate that a first sign of each residual sample of the plurality of chroma components is different from a second sign of each collocated residual sample of the corresponding plurality of chroma components.

Fig. 7 is a flow diagram illustrating an example process 700 for decoding a video signal with reduced joint codec (JCCR) symbol flag control of chroma residuals according to some embodiments of the present application.

Video decoder 30 receives or infers a first syntax element from a bitstream of video data that indicates whether Joint Coding of Chroma Residues (JCCR) is enabled (710).

In the case where the first syntax element indicates that the JCCR is enabled, video decoder 30 receives or infers from the bitstream a second syntax element indicating whether a JCCR symbol flag is present in a picture header in a Picture Parameter Set (PPS) (720).

Video decoder 30 decodes the video data according to the first syntax element and the second syntax element (730).

In some embodiments, the first syntax element is sps _ join _ cbcr _ enabled _ flag.

In some embodiments, the second syntax element is join _ cbcr _ info _ in _ ph _ flag.

In some embodiments, in the event that the second syntax element indicates that the JCCR symbol flag is present in the picture header, video decoder 30 receives the JCCR symbol flag in the picture header from the bitstream and further decodes the video data according to the JCCR symbol flag.

In some embodiments, receiving or inferring from the bitstream a second syntax element (720) in the PPS indicating whether a JCCR symbol flag is present in the picture header comprises: in the case where the second syntax element is present in the PPS, video decoder 30 receives from the bitstream the second syntax element in the PPS indicating whether a JCCR sign flag is present in the picture header; when the second syntax element is not present in the PPS, video decoder 30 infers the second syntax element in the PPS to indicate that the JCCR sign flag is not present in the picture header.

In some embodiments, receiving or inferring a first syntax element (710) from a bitstream of the video data indicating whether JCCR is enabled includes: receiving a first syntax element indicating whether JCCR is enabled from a bitstream in the presence of the first syntax element; in the absence of the first syntax element in the PPS, the first syntax element is inferred to indicate that the JCCR is not enabled.

In some embodiments, the JCCR symbol flag is ph _ join _ cbcr _ sign _ flag.

In some embodiments, the JCCR sign flag indicates whether a first sign of each residual sample of the plurality of chroma components is the same as a second sign of each collocated residual sample of the corresponding plurality of chroma components.

In some embodiments, in the absence of the JCCR symbol flag in the picture header, video decoder 30 infers the JCCR symbol flag to indicate that a first sign of each residual sample of the plurality of chroma components is different from a second sign of the collocated residual sample of the corresponding plurality of chroma components.

Other embodiments also include various subsets of the above embodiments combined or otherwise rearranged in various other embodiments.

In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. The computer readable medium may comprise a computer readable storage medium, which corresponds to a tangible medium such as a data storage medium or a communication medium, including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol. In this manner, the computer-readable medium may generally correspond to (1) a non-transitory tangible computer-readable storage medium or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementation of the embodiments described herein. The computer program product may include a computer-readable medium.

The terminology used in the description of the embodiments herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the claims. As used in the description of the embodiments and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It is also to be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, elements, and/or components, but do not preclude the presence or addition of one or more other features, elements, components, and/or groups thereof.

It will also be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first electrode may be referred to as a second electrode, and similarly, a second electrode may be referred to as a first electrode, without departing from the scope of embodiments. The first electrode and the second electrode are both electrodes, but not the same electrode.

Reference throughout this specification to "one example," "an exemplary example," etc., in the singular or plural, means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present application. Thus, the appearances of the phrases "in one example" or "in an example," "in an illustrative example," or the like, in the singular or plural, in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.

The description of the present application has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications, variations and alternative embodiments will become apparent to those of ordinary skill in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. The embodiment was chosen and described in order to best explain the principles of the invention, the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments and with the various modifications as are suited to the particular use contemplated. Therefore, it is to be understood that the scope of the claims is not to be limited to the specific examples of the embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims.

Claims (14)

1. A method of decoding video data, the method comprising:

receiving or inferring, from a bitstream of video data, a first syntax element indicating whether joint coding of chroma residuals is enabled;

receiving or inferring, from the bitstream, a second syntax element in a Sequence Parameter Set (SPS) indicating whether a JCCR symbol flag is present in a picture header, if the first syntax element indicates that the JCCR is enabled; and

decoding the video data according to the first syntax element and the second syntax element.

2. The method of claim 1, further comprising:

receiving the JCCR symbol marker in the picture header from the bitstream, the video data being further decoded according to the JCCR symbol marker, if the second syntax element indicates that the JCCR symbol marker is present in the picture header.

3. The method of claim 1, wherein the receiving or inferring, from the bitstream, a second syntax element in a Sequence Parameter Set (SPS) indicating whether a JCCR symbol flag is present in a picture header comprises:

receiving, from the bitstream, the second syntax element in the SPS indicating whether the JCCR symbol flag is present in the picture header, if the second syntax element is present in the SPS;

in the absence of the second syntax element in the SPS, inferring the second syntax element in the SPS to indicate that the JCCR symbol flag is not present in the picture header.

4. The method of claim 1, wherein the receiving or inferring, from a bitstream of video data, a first syntax element indicating whether joint coding of chroma residuals is enabled comprises:

receiving the first syntax element indicating whether the JCCR is enabled from the bitstream in the presence of the first syntax element;

inferring, in the absence of the first syntax element in the SPS, the first syntax element to indicate that the JCCR is not enabled.

5. The method of claim 1, wherein the first syntax element is sps _ join _ cbcr _ enabled _ flag.

6. The method of claim 1, wherein the second syntax element is sps _ join _ cbcr _ info _ present _ in _ ph _ flag.

7. The method of claim 1, wherein the JCCR symbol flag is ph _ join _ cbcr _ sign _ flag.

8. The method of claim 1, wherein the JCCR symbol flag indicates whether a first symbol of each residual sample of the plurality of chroma components is the same as a second symbol of each collocated residual sample of the corresponding plurality of chroma components.

9. The method of claim 1, further comprising:

in the absence of the JCCR sign flag in the picture header, inferring the JCCR sign flag to indicate that a first sign of each residual sample point of a plurality of chroma components is different from a second sign of each collocated residual sample point of a corresponding plurality of chroma components.

10. A method of decoding video data, the method comprising:

receiving or inferring a first syntax element indicating whether joint coding JCCR of chroma residuals is enabled from a bitstream of video data;

receiving or inferring, from the bitstream, a second syntax element in a Picture Parameter Set (PPS) indicating whether a JCCR symbol flag is present in a picture header, if the first syntax element indicates that the JCCR is enabled; and

decoding the video data according to the first syntax element and the second syntax element.

11. The method of claim 10, wherein the first syntax element is a sps _ join _ cbcr _ enabled _ flag.

12. The method of claim 10, wherein the second syntax element is a join _ cbcr _ info _ in _ ph _ flag.

13. An electronic device, comprising:

one or more processing units;

a memory coupled to the one or more processing units; and

a plurality of instructions stored in the memory that, when executed by the one or more processing units, cause the electronic device to perform the method of any of claims 1-12.

14. A non-transitory computer-readable medium having stored thereon a plurality of instructions for execution by an electronic device comprising one or more processing units, wherein the plurality of instructions, when executed by the one or more processing units, cause the electronic device to perform the method of any of claims 1-12.

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