CN115696784A

CN115696784A - Method for manufacturing circuit frame plate

Info

Publication number: CN115696784A
Application number: CN202110825897.1A
Authority: CN
Inventors: 郭志; 周琼; 蒋生民; 熊晨
Original assignee: Avary Holding Shenzhen Co Ltd; Qing Ding Precision Electronics Huaian Co Ltd
Current assignee: Avary Holding Shenzhen Co Ltd; Qing Ding Precision Electronics Huaian Co Ltd
Priority date: 2021-07-21
Filing date: 2021-07-21
Publication date: 2023-02-03

Abstract

A method of manufacturing a circuit frame panel, comprising: providing a plurality of frame sub-boards, wherein each frame sub-board comprises a first insulating layer and a plurality of conducting wires; the first insulating layer comprises a first surface, a second surface and a third surface, wherein the first surface and the second surface are opposite and spaced in the thickness direction, and the third surface is connected with the first surface and the second surface; each conductive circuit is arranged on the third surface and connected with the first surface and the second surface, or each conductive circuit is embedded into the third surface and connected with the first surface and the second surface; the plurality of frame sub-boards are surrounded to form an accommodating area, and then a second insulating layer is formed to enable the plurality of frame sub-boards to be connected into a whole and form an accommodating cavity, so that the circuit frame board is manufactured; the second insulating layer is combined with the frame sub-board and covers the conducting circuit arranged on the third surface, and the first surface and the second surface are exposed. The manufacturing method of the circuit frame plate is beneficial to improving the utilization rate of the plate.

Description

Method for manufacturing circuit frame plate

Technical Field

The present disclosure relates to a circuit board, and more particularly, to a method for manufacturing a circuit frame board.

Background

Consumer electronic products generally need to carry various electronic devices through a motherboard to realize functions thereof; with the increasing functions of consumer electronic products and the development of stacked components, the occupied space of corresponding module parts is increased, so that the planar X-Y space occupied by the mainboard is reduced. The stacked motherboard can realize the package layout of the device in the vertical Z direction, and thus is more and more widely applied to high-end consumer products. The existing stacked motherboard generally comprises two circuit boards for carrying devices and a frame circuit board with a hollow middle. The hollow frame board is generally a double-panel circuit board, and plays a role in expanding the device placing space and electrically connecting the upper main board and the lower main board and the like.

However, in the conventional main board frame plate, the entire board is designed and then the middle portion of the board is removed to form a hollow space, so that the utilization rate of the board is low.

Disclosure of Invention

In view of the above, it is desirable to provide a method for manufacturing a circuit frame plate, which is advantageous to improve the utilization rate of the plate material.

A method of manufacturing a circuit frame panel, comprising the steps of:

providing a plurality of frame sub-boards, wherein each frame sub-board comprises a first insulating layer and a plurality of conducting wires; the first insulating layer comprises a first surface, a second surface and a third surface, wherein the first surface and the second surface are opposite and spaced in the thickness direction, and the third surface is connected with the first surface and the second surface; each conductive circuit is arranged on the third surface and connected with the first surface and the second surface, or each conductive circuit is embedded into the third surface and connected with the first surface and the second surface; and

the plurality of frame sub-boards are surrounded to form an accommodating area, and then a second insulating layer is formed to enable the plurality of frame sub-boards to be connected into a whole and form an accommodating cavity, so that the circuit frame board is manufactured; the second insulating layer is combined with the frame sub-board and covers the conductive circuit arranged on the third surface, and the first surface and the second surface are exposed.

According to the manufacturing method of the circuit frame plate, the circuit frame plate is manufactured in a mode that the independent frame sub-plates are connected into a whole, the utilization rate of the plate is improved, and meanwhile the independent frame sub-plates can be adjusted to manufacture the circuit frame plates in different sizes and shapes conveniently according to requirements. In addition, the problem that the high aspect ratio of the via hole limits the electroplating and resin hole plugging processes is solved, drilling and hole filling processes are not needed, the small aperture is realized, and the wiring density is improved.

Drawings

Fig. 1a is a schematic perspective view of a frame sub-board according to an embodiment of the present application.

FIG. 1b is a schematic cross-sectional view of the frame sub-board shown in FIG. 1a at an angle.

FIG. 1c is a schematic cross-sectional view of another angle of the frame sub-board shown in FIG. 1 a.

Fig. 2 is a schematic cross-sectional view of a plurality of frame sub-panels shown in fig. 1a arranged around.

Fig. 3 is a schematic cross-sectional view of a circuit frame plate according to an embodiment of the present application.

Fig. 4 is a schematic cross-sectional view of a frame daughter board according to another embodiment of the present application.

Fig. 5a is a schematic cross-sectional view of a frame sub-plate according to yet another embodiment of the present application.

Fig. 5b is a top view of the frame daughter board shown in fig. 5 a.

Fig. 6 is a top view of a double-sided metal substrate provided with through slots according to an embodiment of the present application.

FIG. 7 is a schematic sectional view of the double-sided metal substrate shown in FIG. 6, taken along VII-VII.

Fig. 8 is a plan view of the double-sided metal substrate shown in fig. 6, in which a metal layer is provided on the inner wall of the through groove.

Fig. 9 is a schematic partial cross-sectional view along IX-IX of the double-sided metal substrate provided with a metal layer shown in fig. 8.

Fig. 10 is a schematic cross-sectional view of a second intermediate structure obtained by wiring the double-sided metal substrate provided with the metal layers shown in fig. 8.

FIG. 11 is a schematic partial cross-sectional view of the second intermediate structure shown in FIG. 10 taken along line XI-XI.

Fig. 12 is a schematic partial cross-sectional view of the second intermediate structure shown in fig. 10 taken along XII-XII.

Fig. 13 is a cross-sectional view of the metal layer in the second intermediate structure shown in fig. 10 fabricated into a first pad and a second pad.

FIG. 14 is a schematic partial cross-sectional view of the second intermediate structure shown in FIG. 13 taken along line XIV-XIV.

FIG. 15 is a schematic partial cross-sectional view along XV-XV of the second intermediate structure shown in FIG. 13.

Description of the main elements

Frame sub-board	10
		A first insulating layer	11
Conductive circuit	13
		First surface	111
Second surface	113
		Third surface	115
First bonding pad	151
		Second bonding pad	153
A second insulating layer	30
		Containing cavity	40
A first metal foil	12a
		Second metal foil	12b
Double-sided metal substrate	100
		Through groove	101
First intermediate structure	200
		Spacer region	201
Metal layer	21
		First conductive layer	23
Second conductive layer	25
		Second intermediate structure	400

The following detailed description will further illustrate the present application in conjunction with the above-described figures.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.

Referring to fig. 1a to 5b, a method for manufacturing a circuit frame plate according to an embodiment of the present application includes the following steps:

in step S1, referring to fig. 1a, fig. 1b and fig. 1c, a plurality of frame sub-boards 10 are provided, each of the frame sub-boards 10 includes a first insulating layer 11 and a plurality of conductive traces 13. The first insulating layer 11 includes a first surface 111, a second surface 113, and a third surface 115, the first surface 111 and the second surface 113 are opposite to each other and spaced apart from each other in a thickness direction, and the third surface 115 connects the first surface 111 and the second surface 113. Each of the conductive traces 13 is disposed on the third surface 115 and connects the first surface 111 and the second surface 113.

The number of the conductive traces 13 on each of the frame daughter boards 10 is not limited, and when the number of the conductive traces 13 is two or more, any two of the conductive traces 13 are spaced apart.

The number of the conductive traces 13 included in each of the plurality of frame sub-boards 10 may be the same or different, and the shape and size of the plurality of frame sub-boards 10 may be the same or different, and may be specifically adjusted as necessary. The number of the frame sub-boards 10 can also be adjusted as required.

In the present embodiment, four frame sub-boards 10 are provided, and the conductive traces 13 on each frame sub-board 10 may be located on the same side of the frame sub-board 10.

In some embodiments, referring to fig. 4, each of the conductive traces 13 may be embedded in and connect the first surface 111 and the second surface 113 from the third surface 115.

In some embodiments, referring to fig. 5a and 5b, each of the frame daughter boards 10 may further include a plurality of first pads 151 disposed on the first surface 111 at intervals, and each of the first pads 151 is connected to an end of at least one of the conductive traces 13. As shown in fig. 5a, each of the first pads 151 may connect ends of two of the conductive traces 13. In some embodiments, the number of the first pads 151 on each of the frame sub-boards 10 may also be one.

Each of the frame sub-boards 10 may further include a plurality of second pads 153 spaced apart from each other on the second surface 113, and each of the second pads 153 is connected to an end of at least one of the conductive traces 13. As shown in fig. 5a, each of the second pads 153 may connect the ends of two conductive traces 13. In some embodiments, the number of the second pads 153 on each of the frame sub-boards 10 may also be one.

Step S2, referring to fig. 2 and fig. 3, the plurality of frame sub-boards 10 are surrounded to form a receiving area, and then a second insulating layer 30 is formed to connect the plurality of frame sub-boards 10 into a whole and form a receiving cavity 40, so as to obtain the circuit frame board. The second insulating layer 30 is combined with the frame daughter board 10 and covers the conductive traces 13 disposed on the third surface 115, and the first surface 111 and the second surface 113 are exposed.

Specifically, the plurality of frame sub-boards 10 are placed in an injection mold (not shown) and arranged around the center of the injection mold to form a receiving area, and then the second insulating layer 30 is injection molded to connect the plurality of frame sub-boards 10 in the injection mold into a whole and form a receiving cavity 40.

In this embodiment, the second insulating layer 30 is bonded to the third surface 115. Specifically, the four frame sub-boards 10 are placed in an injection mold and are approximately surrounded to form a rectangular accommodating area, wherein the conductive circuit 13 is arranged towards the rectangular accommodating area; then, the second insulating layer 30 is injection molded to combine with each of the frame sub-boards 10, so that the four frame sub-boards 10 are connected into a whole and form a substantially rectangular receiving cavity 40 corresponding to the rectangular receiving area, thereby obtaining a substantially rectangular circuit frame board.

The adjacent two frame sub-boards 10 can be contacted or spaced.

The material of the second insulating layer 30 may be the same as or different from the material of the first insulating layer 11. In this embodiment, it is preferable that the melting point of the second insulating layer 30 is lower than the melting point of the first insulating layer 11.

According to the manufacturing method of the circuit frame plate, the circuit frame plate is manufactured in a mode that the plurality of independent frame sub-plates 10 are connected into a whole, the utilization rate of the plate is improved, and meanwhile the independent frame sub-plates 10 can be adjusted conveniently to manufacture the circuit frame plates with different sizes and shapes according to requirements.

In some embodiments, referring to fig. 6 to 15, the frame sub-board 10 can be manufactured by, but not limited to, the following methods:

step S11, referring to fig. 6 and fig. 7, a double-sided metal substrate 100 including a first metal foil 12a, a first insulating layer 11 and a second metal foil 12b stacked together is provided, and a plurality of through slots 101 are formed in the double-sided metal substrate 100 at intervals and arranged side by side, so as to obtain a first intermediate structure 200. Each through groove 101 penetrates through the double-sided metal substrate 100 along the stacking direction (i.e., the thickness direction of the double-sided metal substrate 100). The first intermediate structure 200 includes a spacer 201 between two adjacent through slots 101.

The plurality of through slots 101 may be identical or different in shape and size. In the present embodiment, the plurality of through grooves 101 are described by way of example as being identical in shape and size.

In step S12, referring to fig. 8 and 9, a metal layer 21 is formed on the inner wall of the through groove 101 of the first intermediate structure 200 to cover the inner wall of each through groove 101.

In this embodiment, the first conductive layer 23 may be covered on the first metal foil 12a of the first intermediate structure 200, and the second conductive layer 25 may be covered on the second metal foil 12b of the first intermediate structure 200.

The metal layer 21, the first conductive layer 23 and the second conductive layer 25 can be formed by, but not limited to, electroplating.

Step S13, referring to fig. 10, 11 and 12, a circuit is formed on the first intermediate structure 200 provided with the metal layer 21, so as to remove a portion of the first metal foil 12a to form a plurality of conductive traces 13 corresponding to each of the spacers 201, and remove the second metal foil 12b to expose one side of the first insulating layer 11, thereby obtaining a second intermediate structure 400. Each conductive circuit 13 connects the inner walls of two adjacent through slots 101.

In the present embodiment, each conductive trace 13 connects the metal layers 21 on the inner walls of two adjacent through slots 101.

Specifically, the second conductive layer 25 and the second metal foil 12b may be etched and removed to expose one side of the first insulating layer 11, and the first conductive layer 23 and the first metal foil 12a may be etched to form a plurality of conductive traces 13 corresponding to the spacers 201.

The number of the conductive lines 13 formed corresponding to each of the spacers 201 may be the same or different.

In step S14, referring to fig. 13, 14 and 15, a portion of the metal layer 21 on the inner wall of each through groove 101 in the second intermediate structure 400 is removed to form a first pad 151 and a second pad 153 corresponding to two end portions of each conductive trace 13.

Specifically, the metal layer 21 on the inner wall of each through groove 101 may be partially removed by etching.

Step S15, please refer to fig. 5a and 5b, cutting the second intermediate structure 400 along each through slot 101, so as to obtain at least one frame sub-board 10.

In some embodiments, steps S12 and S14 may be omitted.

According to the manufacturing method of the circuit frame plate, the circuit frame plate is manufactured in a mode that the independent frame sub-plates 10 are connected into a whole, the utilization rate of a plate material is improved, and meanwhile the independent frame sub-plates 10 can be adjusted conveniently according to requirements to manufacture the circuit frame plates in different sizes and shapes. In addition, the problem that the high aspect ratio of the via hole limits the electroplating and resin hole plugging processes is solved, drilling and hole filling processes are not needed, the small aperture is realized, and the wiring density is improved.

Although the present application has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method of manufacturing a circuit frame panel, comprising the steps of:

2. The method of manufacturing a circuit frame board of claim 1, wherein each of said frame daughterboards further includes at least one first bonding pad disposed on said first surface, each of said first bonding pads being connected to an end of at least one of said conductive traces.

3. The method of manufacturing a circuit frame panel according to claim 2, wherein each of said frame sub-panels further comprises at least one second bonding pad disposed on said second surface, each of said second bonding pads being connected to an end of at least one of said conductive traces.

4. The method of claim 1, wherein the conductive traces on each of the frame sub-boards are located on a same side of the frame sub-board, and in the step of surrounding the plurality of frame sub-boards to form a receiving area, the method further comprises:

and facing the conductive circuit on each frame sub-board to the receiving area.

5. The method of manufacturing a circuit frame board according to claim 1, wherein the second insulating layer is formed by injection molding.

6. The method of manufacturing a circuit frame board according to claim 5, wherein a melting point of the second insulating layer is smaller than a melting point of the first insulating layer.

7. The method of manufacturing a circuit frame plate as claimed in claim 1, wherein each of the conductive traces is disposed on the third surface and connects the first surface and the second surface, the frame sub-plate is manufactured by:

providing a double-sided metal substrate comprising a first metal foil, a first insulating layer and a second metal foil which are arranged in a stacked mode, and forming a plurality of through grooves which are arranged in parallel at intervals, so that a first intermediate structure is obtained; each through groove penetrates through the double-sided metal substrate along the stacking direction, and the first intermediate structure comprises a spacer area positioned between two adjacent through grooves;

performing circuit manufacturing on the first intermediate structure to remove part of the first metal foil to form a plurality of conductive circuits corresponding to each spacer region, and removing the second metal foil to expose one side of the first insulating layer, so as to obtain a second intermediate structure; each conductive circuit is connected with the inner walls of two adjacent through grooves; and

and cutting the second intermediate structure along each through groove to obtain at least one frame sub-board.

8. The method of manufacturing a circuit frame panel according to claim 7, further comprising, before the step of "routing said first intermediate structure", forming a metal layer on the inner walls of the through-slots of said first intermediate structure so as to cover each of said inner walls of the through-slots;

before the step of cutting the second intermediate structure along each through slot to obtain at least one frame daughter board, the method further includes removing a portion of the metal layer on an inner wall of each through slot in the second intermediate structure to form a first pad and a second pad corresponding to two end portions of each conductive trace.

9. The method of manufacturing a circuit frame panel according to claim 1, wherein adjacent two of said frame sub-panels are in direct contact or spaced apart.