CN115692387A

CN115692387A - Semiconductor packaging structure

Info

Publication number: CN115692387A
Application number: CN202211164858.2A
Authority: CN
Inventors: 种兆永; 李岩; 吴炳财; 张新儿
Original assignee: Quanzhou San'an Integrated Circuit Co ltd
Current assignee: Quanzhou San'an Integrated Circuit Co ltd
Priority date: 2022-09-23
Filing date: 2022-09-23
Publication date: 2023-02-03

Abstract

The invention discloses a semiconductor packaging structure, which comprises metal pins, a cover body, a chip, a plastic packaging wall and a heat sink, wherein the plastic packaging wall is fixedly connected around the heat sink to form a cavity, the heat sink is positioned at the bottom of the cavity, the metal pins penetrate through the inner wall and the outer wall of the plastic packaging wall and extend into the cavity to expose a first surface, the cover body comprises a cover plate and an extension part, the cover plate covers the upper part of the cavity and is attached to the upper surface of the plastic packaging wall, and the extension part extends from the surface of the cover plate towards the direction of the metal pins along the inner wall of the plastic packaging wall; the chip is arranged on the heat sink and is connected with the metal pin in the cavity through a metal lead. Through the mode of moulding plastics in advance with metal pin and plastic envelope wall, heat sink combine and form the cavity, through the lid laminating on the cavity, the lid has the extension that extends towards metal pin, can play better sealed effect, and when the lid was the metal, the extension with be used for being connected the metal pin butt of earthing terminal can realize good electromagnetic shield effect.

Description

Semiconductor packaging structure

Technical Field

The invention relates to the field of packaging, in particular to a semiconductor packaging structure.

Background

Semiconductor packaging refers to the routing of circuit pins on a chip to external connections for connection to other devices. The package type is a case for mounting a semiconductor integrated circuit chip, which not only plays a role in mounting, fixing, sealing, protecting the chip, enhancing the electrothermal performance, etc., but also is connected to pins of the package case by wires through contacts on the chip, and the pins are connected to other devices by wires on a printed circuit board, thereby realizing the connection of the internal chip with an external circuit.

At present, the packaging form of chips of high-power devices and base stations mostly adopts a plastic packaging or ceramic packaging mode, plastic packaging is commonly used for packaging plastic packaging materials, in the plastic packaging process, the temperature can be circulated from low temperature to high temperature and then to low temperature, and the difference of thermal expansion coefficients between the plastic packaging materials and a substrate or a lead frame can cause layering and cracking, so that the reliability is reduced, therefore, the plastic packaging has the advantage of low cost, but the reliability is relatively poor. While ceramic seals have the advantage of high reliability, but are costly.

Disclosure of Invention

The present invention is directed to overcome the disadvantages of the prior art and to provide a semiconductor package structure.

In order to achieve the above purpose, the technical scheme of the invention is as follows:

a semiconductor packaging structure comprises a metal pin, a cover body, a plastic packaging wall and a heat sink, wherein the plastic packaging wall surrounds and is fixedly connected with the periphery of the heat sink to form a cavity, the heat sink is positioned at the bottom of the cavity, the plastic packaging wall is provided with an inner wall and an outer wall which are opposite, the metal pin penetrates through the inner wall and the outer wall of the plastic packaging wall and extends into the cavity to expose a first surface, the cover body comprises a cover plate and an extension part, the cover plate covers the upper part of the cavity and is attached to the upper surface of the plastic packaging wall, and the extension part extends from the surface of the cover plate towards the direction of the metal pin along the inner wall of the plastic packaging wall; the chips are arranged on the heat sink, and the two chips or the chips and the metal pins are connected through metal leads.

Preferably, the cover body is made of metal, the metal pins include a first pin used for being connected with a ground terminal and a second pin not connected with the ground terminal, the extending portion abuts against the first pin located in the cavity, and the extending portion and the second pin are not connected with each other.

Preferably, the cover is made of nonmetal, and the distance between the end of the extension part and the first surface of the metal pin is 0-200 μm.

Preferably, the height of the plastic wall above the first surface of the metal pins is at least 100 μm.

Preferably, the cover plate is attached to the upper surface of the plastic packaging wall and the extension part is attached to the inner wall of the plastic packaging wall through adhesives.

Preferably, the heat sink is embedded in the plastic enclosure wall.

Preferably, the heat sink is provided with a convex edge, the plastic packaging wall is provided with a groove matched with the convex edge, and the convex edge is embedded into the groove.

Preferably, the inner wall of the plastic packaging wall is provided with a step part, and the step part is positioned between the second surface of the metal pin and the upper surface of the heat sink and is flush with the side edge of the metal pin in the cavity.

Preferably, the inner wall surfaces of the plastic packaging walls on the upper side and the lower side of the metal pins in the cavity are flush.

Preferably, the distance between the second surface of the metal pin and the upper surface of the heat sink is greater than the height of the chip.

Compared with the prior art, the invention has the beneficial effects that:

(1) The cover body of the semiconductor packaging structure is provided with the extending part facing the direction of the metal pin, the cover plate is attached to the upper surface of the plastic packaging wall through the adhesive, and the redundant adhesive on the upper surface can seep between the extending part and the plastic packaging wall, so that the better sealing effect is achieved.

(2) The extending part of the cover body of the semiconductor packaging structure can be abutted with the metal pin for connecting the grounding terminal, so that the electromagnetic shielding effect is achieved, and the chip is prevented from being subjected to external electromagnetic interference.

(3) The embedded structure of the convex edge and the groove is adopted between the heat sink and the plastic packaging wall of the semiconductor packaging structure, so that the semiconductor packaging structure has better wrapping property and reliability.

Drawings

Fig. 1 is a first schematic diagram of a semiconductor package structure according to a first embodiment of the present disclosure;

fig. 2 is a second schematic view of a semiconductor package structure according to a first embodiment of the present application;

fig. 3-6 are process flow diagrams of methods of fabricating semiconductor package structures according to a first embodiment of the present application;

fig. 7 is a schematic view of a semiconductor package structure according to a second embodiment of the present application;

reference numerals: 1. a metal pin; 2. a cover body; 21. a cover plate; 22. an extension portion; 3. a chip; 4. plastic packaging the wall; 5. a heat sink; 6. and a metal lead.

Detailed Description

The invention is further explained below with reference to the figures and the specific embodiments. The drawings are only schematic and can be easily understood, and the specific proportion can be adjusted according to design requirements. The above and below relationships and the front/back definitions of the relative elements in the drawings described herein are understood to refer to the relative positions of the elements, and therefore, the elements may be turned over to present the same elements, all within the scope of the present disclosure.

Example one

Referring to fig. 1, an embodiment of the present application provides a semiconductor package structure, including a metal pin 1, a cover 2, a chip 3, a plastic package wall 4 and a heat sink 5, where the plastic package wall 4 surrounds and is fixedly connected to the periphery of the heat sink 5 to form a cavity, and the heat sink 5 is located at the bottom of the cavity and is embedded in the plastic package wall 4. The chip 3 is arranged in a cavity surrounded by the plastic packaging wall 4 and is attached to the heat sink 5. The plastic enclosure wall 4 is injection moulded from a plastics material and has opposed inner and outer walls. The metal pins 1 penetrate through the inner wall and the outer wall of the plastic package wall 4 and extend into the cavity to expose the first surface, that is, the metal pins 1 penetrate into the cavity from the outer side of the plastic package wall 4, a part of the metal pins 1 are wrapped inside the plastic package wall 4, and the metal pins 1 are fixedly connected together by adopting the way of pre-injecting the plastic package wall 4, so that the reliability of the packaging structure can be improved, and the layering phenomenon can be avoided. One end of the metal pin 1 extends into the cavity and is used for being connected with the chip 3; the other end extends outwards from the outer wall of the plastic packaging wall 4 and is used for being connected with the outside. The cover body 2 comprises a cover plate 21 and an extension part 22, the cover plate 21 covers the upper part of the cavity and is attached to the upper surface of the plastic packaging wall 4, and the extension part 22 extends from the surface of the cover plate 21 along the inner wall of the plastic packaging wall 4 towards the direction of the metal pin 1. The extension portions 22 are disposed on the plastic package walls 4 above the first surfaces of the metal pins 1, and the height of the plastic package walls 4 above the first surfaces of the metal pins 1 is at least 100 μm, so as to ensure that there is enough space for the extension portions 22 to extend downward. The cover plate 21 is bonded to the upper surface of the plastic package wall 4 and the extension portion 22 is bonded to the inner wall of the plastic package wall 4 through adhesives. The adhesive is coated between the cover plate 21 and the upper surface of the plastic package wall 4, and the redundant adhesive can extend downwards and penetrate between the extension part 22 and the plastic package wall 4, so that a better sealing effect is achieved.

In one embodiment, referring to fig. 2, the cover 2 is made of metal, the metal pins 1 include a first pin for connecting to a ground terminal and a second pin not connected to the ground terminal, and the extension portion 22 abuts against the first pin located in the cavity, so that the extension portion 22 can be connected to the ground terminal to achieve an electromagnetic shielding effect and prevent the chip 3 from being interfered by external electromagnetic interference. Since the extension portion 22 is made of metal, the extension portion 22 is not connected to the second lead, i.e. the distance between the end of the extension portion and the first surface of the second lead is at least 50 μm, which can prevent the extension portion 22 from being electrically connected to the second lead, thereby affecting the electrical connection between the chip 3 and the outside.

In another embodiment, the cover 2 is made of a non-metal material, and the extension portion 22 can abut against the metal pin 1, so that the cover 2 and the metal pin 1 are not electrically connected; the extension portion 22 may not abut against the metal pin, the extension range of the extension portion 22 may be set according to the sealing requirement of the package structure, and the distance between the end of the extension portion 22 and the first surface of the metal pin 1 is 0-200 μm, so as to ensure a good sealing effect between the cover body 2 and the plastic package wall 4, and reduce the cost.

In a specific embodiment, the lower surface of the heat sink 5 is flush with the lower surface of the plastic package wall 4, and the heat sink 5 can achieve a good heat dissipation effect. Specifically, heat sink 5 is equipped with protruding edge, and plastic envelope wall 4 is equipped with protruding edge complex recess, protruding edge embedding in the recess, realizes heat sink 5 and plastic envelope wall 4's fixed connection, has better parcel nature and reliability. Preferably, the raised edge may be provided on the side of the heat sink 5, with the top of the raised edge being flush with the top of the heat sink 5. The chips 3 are attached to the heat sink 5, and the two chips 3 or the chip 3 and the metal pin 1 are connected through a metal lead 6. Specifically, the back surface of the chip 3 is attached to the surface of the heat sink 5 in the cavity, the front surface of the chip 3 is provided with a bonding pad, and the bonding pad is connected with the metal pin 1 in the cavity through a metal lead 6. In the embodiment of the application, the plastic package wall 4 is provided with a step portion, and the step portion is located between the second surface of the metal pin 1 and the upper surface of the heat sink 5 and flush with the side edge of the metal pin 1 arranged in the cavity. That is, the metal pin 1 located in the cavity is arranged on the step part, so that the subsequent connection with the metal lead 6 is facilitated, and the stability of the device is improved.

Referring to fig. 1 and fig. 3 to 6, an embodiment of the present application further provides a method for manufacturing a semiconductor package structure, which includes the following steps:

(1) Referring to fig. 3, several metal pins 1 are provided as a frame.

(2) Referring to fig. 4, a heat sink 5 is provided, a plastic package wall 4 is formed on the heat sink 5 by a pre-injection molding method, and a part of the metal pins 1 are disposed in the plastic package wall 4, so that the metal pins 1 penetrate through the inner wall and the outer wall of the plastic package wall 4 and extend into the cavity to expose the first surface, thereby realizing connection between the heat sink 5 and the frame, and forming a cavity, wherein the side of the cavity is the plastic package wall 4, and the bottom of the cavity is the heat sink 5.

(3) Referring to fig. 5, the chip 3 is attached to the heat sink 5 in the cavity by silver paste, the back of the chip 3 is attached to the surface of the heat sink 5, and the front of the chip 3 faces upward.

(4) Referring to fig. 6, two chips 3 and/or a chip 3 and a metal pin 1 are connected by a metal lead 6, so that the chip 3 is electrically conducted with the outside.

(5) Referring to fig. 1, a cover body 2 is covered at an opening of the cavity, the cover body 2 and a plastic packaging wall 4 are hermetically connected by using an adhesive, and finally, the single semiconductor packaging structure is cut.

Example two

Referring to fig. 7, a difference between the second embodiment and the first embodiment of the present application is that the inner wall surfaces of the plastic package walls 4 located at the upper and lower sides of the metal pins 1 in the cavity are flush, the side edges of the plastic package walls 4 have no step portion, and the metal pins 1 located in the cavity are suspended and exposed out of the first surface and the second surface at the same time. The rest is the same as the first embodiment.

Further preferably, the distance between the second surface of the metal pin 1 and the upper surface of the heat sink 5 is greater than the height of the chip 3, and the space below the metal pin can be used for partially placing the chip, so that the mounting space of the chip is increased.

The above embodiments are only used to further illustrate the technical solutions of the present invention, but the present invention is not limited to the embodiments, and any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention fall within the protection scope of the technical solutions of the present invention.

Claims

1. A semiconductor package structure, characterized in that: the heat sink is positioned at the bottom of the cavity, the plastic packaging wall is provided with an inner wall and an outer wall which are opposite, the metal pins penetrate through the inner wall and the outer wall of the plastic packaging wall and extend into the cavity to expose the first surface, the cover body comprises a cover plate and an extending part, the cover plate covers the upper part of the cavity and is attached to the upper surface of the plastic packaging wall, and the extending part extends from the surface of the cover plate towards the direction of the metal pins along the inner wall of the plastic packaging wall; the chip is arranged on the heat sink and is connected with the metal pins in the cavity through metal leads.

2. The semiconductor package structure of claim 1, wherein: the cover body is made of metal, the metal pins comprise first pins and second pins, the first pins are used for being connected with a grounding end, the second pins are not connected with the grounding end, the extending portion is abutted to the first pins in the cavity, and the extending portion is not connected with the second pins.

3. The semiconductor package structure of claim 1, wherein: the cover body is made of nonmetal, and the distance between the tail end of the extension part and the first surface of the metal pin is 0-200 mu m.

4. The semiconductor package structure of claim 1, wherein: the height of the plastic packaging wall above the first surface of the metal pin is at least 100 μm.

5. The semiconductor package structure of claim 1, wherein: the cover plate is attached to the upper surface of the plastic packaging wall and the extension part is attached to the inner wall of the plastic packaging wall through adhesives.

6. The semiconductor package of claim 1, wherein: the heat sink is embedded in the plastic packaging wall.

7. The semiconductor package structure of claim 1, wherein: the heat sink is provided with a convex edge, the plastic packaging wall is provided with a groove matched with the convex edge, and the convex edge is embedded into the groove.

8. The semiconductor package structure of claim 1, wherein: the inner wall of plastic envelope wall is equipped with step portion, step portion is located metal pin's second surface with between the upper surface of heat sink, and with establish in the cavity metal pin's side parallel and level.

9. The semiconductor package structure of claim 1, wherein: and the inner wall surfaces of the plastic packaging walls are flush with the upper side and the lower side of the metal pins in the cavity.

10. The semiconductor package structure of claim 9, wherein: the distance between the second surface of the metal pin and the upper surface of the heat sink is larger than the height of the chip.