CN115691650A - Testing device and testing method for output driving capability of eMMC chip - Google Patents

Testing device and testing method for output driving capability of eMMC chip Download PDF

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Publication number
CN115691650A
CN115691650A CN202211395798.5A CN202211395798A CN115691650A CN 115691650 A CN115691650 A CN 115691650A CN 202211395798 A CN202211395798 A CN 202211395798A CN 115691650 A CN115691650 A CN 115691650A
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output
data
output driving
interface
emmc chip
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祝欣
许展榕
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Hefei Kangxinwei Storage Technology Co Ltd
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Hefei Kangxinwei Storage Technology Co Ltd
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Priority to CN202211395798.5A priority Critical patent/CN115691650A/en
Publication of CN115691650A publication Critical patent/CN115691650A/en
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Abstract

The invention provides a device and a method for testing the output driving capability of an eMMC chip, and belongs to the field of testing of eMMC chips. The device comprises: the output current setting module is used for setting the output current of a data IO interface of the eMMC chip as a rated current; the judging module is used for judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current and outputting a corresponding judging signal; and the gear adjusting module is used for controlling the eMMC chip to up-adjust the output driving gear when the judging signal indicates that the output driving capacity does not reach a nominal value. By adopting the invention, the test and adjustment of the output driving capability of the eMMC chip can be quickly realized during the packaging test, and the overall expected effect is improved.

Description

Testing device and testing method for output driving capability of eMMC chip
Technical Field
The invention relates to the field of eMMC chip testing, in particular to a testing device and a testing method for output driving capability of an eMMC chip.
Background
The output drive capability of the eMMC chip directly determines the quality of the output signal.
The current general test method is to select a batch of sample wafers, determine a window of output drive gears by measuring the output drive gears of the batch of sample wafers, and select a window intermediate value. When the eMMC chip is packaged, the output drive notch is set to the above-described window intermediate value, and it is considered that by such setting, the output drive capability of most of the eMMC chips can fall within a desired range.
However, the expected effect of the method depends on the quality of the selected sample wafer, the sample wafer cannot represent all the eMMC chips, and the uniformity of the output driving capability of the eMMC chips cannot be well guaranteed and the expected output driving capability of the eMMC chips cannot be achieved. Therefore, a new testing apparatus and a corresponding testing method are needed to improve the expected effect of the output driving capability.
Disclosure of Invention
In order to solve the problems in the prior art, embodiments of the present invention provide a device and a method for testing an output driving capability of an eMMC chip, which can quickly implement testing and adjusting the output driving capability during a package test, thereby improving an overall expected effect. The technical scheme is as follows:
according to an aspect of the present invention, there is provided a device for testing output driving capability of an eMMC chip, the device including:
the output current setting module is used for setting the output current of a data IO interface of the eMMC chip as a rated current;
the judging module is used for judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current and outputting a corresponding judging signal;
and the gear adjusting module is used for controlling the eMMC chip to up-adjust the output driving gear when the judging signal indicates that the output driving capacity does not reach a nominal value.
Optionally, the output current setting module includes a current mirror circuit, a first end of the current mirror circuit is configured to receive a preset current, and a second end of the current mirror circuit is connected to a data IO interface of the eMMC chip;
the current mirror circuit is used for setting the current of the second end of the current mirror circuit as the rated current of the eMMC chip based on the preset current.
Optionally, an input end of the determining module is configured to receive an output voltage of the data IO interface;
the judging module is used for:
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capacity reaches a nominal value.
Optionally, the gear adjustment module is configured to output a gear adjustment signal when the determination module outputs the first determination signal, where the gear adjustment signal is used to up-adjust an output drive gear of the eMMC chip.
Optionally, the apparatus further comprises a switching module;
the switching module is configured to:
when the judging module outputs the first judging signal, the data IO interface is switched to a communication channel from a test circuit, so that the eMMC chip receives the gear adjusting signal;
and switching the data IO interface back to the test circuit after the output driving gear of the eMMC chip is adjusted upwards.
According to another aspect of the present invention, there is provided a method of testing output drive capability of an eMMC chip, the method including:
setting the output current of a data IO interface of the eMMC chip as a rated current;
judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current;
when the output driving capacity of the data IO interface does not reach a nominal value, the eMMC chip is controlled to adjust an output driving gear upwards until the output driving capacity of the data IO interface reaches the nominal value, or the output driving gear reaches the highest gear.
Optionally, the determining whether the output driving capability of the data IO interface reaches a nominal value includes:
judging whether the output voltage of the data IO interface is smaller than a reference voltage or not;
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capacity reaches a nominal value.
Optionally, the method further includes:
when the output driving capability of the data IO interface does not reach a nominal value, switching the data IO interface from a test circuit to a communication channel so that the eMMC chip receives a gear adjusting signal;
and switching the data IO interface back to the test circuit after the output driving gear of the eMMC chip is adjusted upwards.
According to another aspect of the present invention, there is provided an electronic apparatus including:
a device for testing the output driving capability of the eMMC chip;
a processor; and
a memory for storing a program, wherein the program is stored in the memory,
wherein the program includes instructions that, when executed by the processor, cause the processor to perform the above-described method of testing the output drive capability of the eMMC chip.
According to another aspect of the present invention, there is provided a non-transitory computer readable storage medium storing computer instructions for causing a computer to perform the above-described method of testing output drive capability of an eMMC chip.
In the invention, the output driving capability of the data IO interface is measured through the output current setting module and the judging module, and whether the output driving capability of the data IO interface reaches a nominal value is judged; and if the output driving capability does not reach the nominal value, the output driving gear is adjusted upwards through the gear adjusting module. In the testing device of the eMMC chip, a measuring circuit and a feedback adjusting mechanism are adopted, so that the shipment yield of the eMMC chip is improved.
Drawings
Further details, features and advantages of the invention are disclosed in the following description of exemplary embodiments with reference to the accompanying drawings, in which:
fig. 1 illustrates a schematic diagram of a testing apparatus for output drive capability of an eMMC chip provided according to an exemplary embodiment of the invention;
FIG. 2 illustrates a schematic diagram of a current mirror circuit provided in accordance with an exemplary embodiment of the present invention;
fig. 3 illustrates a flow chart of a method of testing output drive capability of an eMMC chip provided according to an exemplary embodiment of the invention;
FIG. 4 illustrates a block diagram of an exemplary electronic device that can be used to implement an embodiment of the invention.
Detailed Description
Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more complete and thorough understanding of the present invention. It should be understood that the drawings and the embodiments of the present invention are illustrative only and are not intended to limit the scope of the present invention.
It should be understood that the various steps recited in the method embodiments of the present invention may be performed in a different order and/or performed in parallel. Moreover, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the invention is not limited in this respect.
The term "include" and variations thereof as used herein are open-ended, i.e., "including but not limited to". The term "based on" is "based, at least in part, on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions for other terms will be given in the following description. It should be noted that the terms "first", "second", and the like in the present invention are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence of the functions performed by the devices, modules or units.
It is noted that references to "a", "an", and "the" modifications in the present invention are intended to be illustrative rather than limiting, and that those skilled in the art will recognize that reference to "one or more" unless the context clearly dictates otherwise.
The names of messages or information exchanged between devices in the embodiments of the present invention are for illustrative purposes only, and are not intended to limit the scope of the messages or information.
The embodiment of the invention provides a device for testing the output driving capability of an eMMC chip, which can be arranged on a test board card (load board) of the eMMC chip.
Referring to the testing device shown in fig. 1, the device comprises an output current setting module, a judging module and a gear adjusting module.
The output current setting module is used for setting the output current of a data IO interface of the eMMC chip as a rated current;
the judging module is used for judging whether the output driving capacity of the data IO interface reaches a nominal value or not on the basis of the rated current and outputting a corresponding judging signal;
and the gear adjusting module is used for controlling the eMMC chip to adjust the output driving gear upwards when the judgment signal indicates that the output driving capacity does not reach the nominal value.
In one possible implementation, since the output power of the eMMC data IO interface is constant, when the output driving capability of the data IO interface reaches a nominal value, if the rated current is fixed, the output voltage may be stabilized at the rated voltage (e.g., 1.8V). Therefore, the output current of the data IO interface of the eMMC chip may be set to be a rated current by the output current setting module, and the output voltage is measured by the determination module, so as to determine whether the output driving capability of the data IO interface reaches a nominal value.
The output drive gear of the eMMC chip is adjustable, the higher the output drive gear is, the stronger the output drive capability of the eMMC chip is, and the preset value is usually located in the middle gear. When the output drive ability of data IO interface does not reach the nominal value, the condition that output voltage descends can take place, at this moment, can adopt gear adjustment module control EMMC chip to go up the output drive gear, strengthen the output drive ability of eMMC chip.
Optionally, the output current setting module may include a current mirror circuit, a first end of the current mirror circuit is configured to receive a preset current, and a second end of the current mirror circuit is connected to a data IO interface of the eMMC chip.
And the current mirror circuit is used for setting the current of the second end of the current mirror circuit as the rated current of the eMMC chip based on the preset current.
In a possible embodiment, as shown in the current mirror circuit in fig. 2, iin is a constant voltage source input current (i.e. a preset current) preset on the test board, and is a fixed value current.
Since the M2 and M4 gate voltages are equal, the M1 and M3 gate voltages are equal. As can be seen from the current mirror principle, when Vout at the Iout point satisfies Vout minimum > = Vds1 (voltage between drain and source of M1) + Vdsat2 (M2 saturation voltage), the Iout current is equal to Iin current, that is, the output current of the data IO interface of the eMMC chip is set as the rated current. The parameters of M1 and M3 and R may be pre-adjusted to ensure normal operation when the output voltage of the eMMC data IO interface is 1.8V.
Optionally, the input end of the judgment module may be configured to receive an output voltage of the data IO interface. The determination module may be configured to:
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capability reaches a nominal value.
In a possible implementation manner, the determining module may employ a comparator circuit, and two input terminals of the comparator circuit may respectively receive the output voltage of the data IO interface and a reference voltage (e.g., 1.6V). When the output voltage (e.g., 1V) is smaller than the reference voltage, it is determined that the deviation range is exceeded, and the comparator circuit may output a low level as the first determination signal. When the output voltage (e.g., 1.8V) is not less than the reference voltage, the deviation is deemed to be within the range, and the comparator circuit may output a high level as a second determination signal to determine that the eMMC chip passes the test.
Optionally, the gear adjustment module may be configured to: when the first judgement signal of judgement module output, output gear adjustment signal, gear adjustment signal is used for the output drive gear of up-regulating EMMC chip.
In a possible implementation manner, an MCU (micro controller Unit) may be used to detect an output result of the comparator, and transmit the result to a control chip of the test board through an I2C to generate a gear adjustment signal, where the MCU, the control chip of the test board, and related circuits form the gear adjustment module. Or, the gear position adjusting signal can be transmitted to the computer end through the control chip, and the computer end generates the corresponding gear position adjusting signal.
Optionally, the testing apparatus may further include a switching module. The switching module may be configured to: when the judging module outputs a first judging signal, the data IO interface is switched to a communication channel from the test circuit, so that the eMMC chip receives the gear adjusting signal; and after the output driving gear of the eMMC chip is adjusted upwards, the data IO interface is switched back to the test circuit.
In a possible embodiment, the switching module may include a multiplexer circuit (MUX) for connecting the data IO interface and the communication channel or connecting the data IO interface and the test circuit.
Under initial condition, the switching module can be connected data IO interface and test circuit, after above-mentioned test process, if the first judgement signal of judgement module output, the output driving force of eMMC chip does not reach the nominal value this moment promptly, the switching module can be switched data IO interface to communication channel from test circuit.
Furthermore, the eMMC chip can receive the gear adjustment signal through communication channel, through the register with output drive gear up-regulation one-level to output drive gear storage after will adjusting is in the eMMC chip, so that the adjustment is continuously effective.
After the adjustment is completed, the switching module can switch the data IO interface back to the test circuit, repeatedly execute the above-mentioned test process, judge whether the output drive capability of data IO interface reaches the nominal value, until the output drive capability of data IO interface reaches the nominal value, judge that the eMMC chip passes through the test, or, the output drive gear reaches the highest gear, and the output drive capability of data IO interface still does not reach the nominal value, judge that the eMMC chip is unusual.
In the embodiment of the invention, the output driving capability of the data IO interface is measured through the output current setting module and the judging module, and whether the output driving capability of the data IO interface reaches a nominal value is judged; and if the output driving capability does not reach the nominal value, the output driving gear is adjusted upwards through the gear adjusting module. In the testing device of the eMMC chip, a measuring circuit and a feedback adjusting mechanism are adopted, so that the shipment yield of the eMMC chip is improved.
Based on the same inventive concept, the embodiment of the invention provides a method for testing the output driving capability of an eMMC chip.
Referring to the test method illustrated in fig. 3, the method includes the following steps 301-303.
Step 301, setting an output current of a data IO interface of the eMMC chip as a rated current;
step 302, judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current;
and step 303, when the output driving capability of the data IO interface does not reach a nominal value, controlling the eMMC chip to adjust the output driving gear up.
Then, the above steps 301 to 303 are repeated until the output driving capability of the data IO interface reaches the nominal value, or the output driving gear reaches the highest gear. When the output driving capability of the data IO interface reaches a nominal value, judging that the eMMC chip passes the test; when the output driving gear reaches the highest gear and the output driving capability of the data IO interface still does not reach the nominal value, the eMMC chip is judged to be abnormal.
Optionally, the determining whether the output driving capability of the data IO interface reaches a nominal value includes:
judging whether the output voltage of the data IO interface is smaller than a reference voltage or not;
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capacity reaches a nominal value.
Optionally, the method further includes:
when the output driving capacity of the data IO interface does not reach a nominal value, switching the data IO interface from a test circuit to a communication channel so that the eMMC chip receives a gear adjusting signal;
and switching the data IO interface back to the test circuit after the output driving gear of the eMMC chip is adjusted upwards.
In the embodiment of the invention, whether the output driving capability of the data IO interface reaches the nominal value or not is measured on the basis of the rated current output by the data IO interface, and if the output driving capability does not reach the nominal value, the output driving capability is fed back to the eMMC chip to carry out output driving gear up-regulation, so that the shipment yield of the eMMC chip is improved.
An exemplary embodiment of the present invention also provides an electronic device including: a device for testing the output driving capability of the eMMC chip; at least one processor; and a memory communicatively coupled to the at least one processor. The memory stores a computer program executable by the at least one processor, the computer program, when executed by the at least one processor, is operative to cause the electronic device to perform a method according to an embodiment of the present invention.
Exemplary embodiments of the present invention also provide a non-transitory computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor of a computer, is operable to cause the computer to perform a method according to an embodiment of the present invention.
Exemplary embodiments of the present invention also provide a computer program product comprising a computer program, wherein the computer program is operative, when executed by a processor of a computer, to cause the computer to perform a method according to an embodiment of the present invention.
Referring to fig. 4, a block diagram of a structure of an electronic device 400, which may be a server or a client of the present invention, which is an example of a hardware device that may be applied to aspects of the present invention, will now be described. Electronic device is intended to represent various forms of digital electronic computer devices, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 4, the electronic device 400 includes a computing unit 401 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 402 or a computer program loaded from a storage unit 408 into a Random Access Memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, ROM 402, and RAM 403 are connected to each other via a bus 404. An input/output (I/O) interface 405 is also connected to bus 404.
A number of components in the electronic device 400 are connected to the I/O interface 405, including: an input unit 406, an output unit 407, a storage unit 408, and a communication unit 409. The input unit 406 may be any type of device capable of inputting information to the electronic device 400, and the input unit 406 may receive input numeric or character information and generate key signal inputs related to user settings and/or function control of the electronic device. Output unit 407 may be any type of device capable of presenting information and may include, but is not limited to, a display, speakers, a video/audio output terminal, a vibrator, and/or a printer. Storage unit 408 may include, but is not limited to, magnetic or optical disks. The communication unit 409 allows the electronic device 400 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunications networks, and may include, but is not limited to, modems, network cards, infrared communication devices, wireless communication transceivers, and/or chipsets, such as bluetooth devices, wiFi devices, wiMax devices, cellular communication devices, and/or the like.
Computing unit 401 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 401 executes the respective methods and processes described above. For example, in some embodiments, the method of testing the output drive capability of the eMMC chip described above may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the memory cell 408. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 400 via the ROM 402 and/or the communication unit 409. In some embodiments, the computing unit 401 may be configured to perform the above-described method of testing the output drive capability of the eMMC chip by any other suitable means (e.g., by way of firmware).
Program code for implementing the methods of the present invention may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, apparatus, and/or device (e.g., magnetic discs, optical disks, memory, programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal used to provide machine instructions and/or data to a programmable processor.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user may provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the Internet.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

Claims (10)

1. A device for testing output driving capability of an eMMC chip, the device comprising:
the output current setting module is used for setting the output current of a data IO interface of the eMMC chip as rated current;
the judging module is used for judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current and outputting a corresponding judging signal;
and the gear adjusting module is used for controlling the eMMC chip to up-adjust the output driving gear when the judging signal indicates that the output driving capacity does not reach a nominal value.
2. The apparatus of claim 1, wherein the output current setting module includes a current mirror circuit having a first end configured to receive a predetermined current and a second end connected to a data IO interface of the eMMC chip;
the current mirror circuit is used for setting the current of the second end of the current mirror circuit as the rated current of the eMMC chip based on the preset current.
3. The apparatus according to claim 1, wherein an input terminal of the determining module is configured to receive an output voltage of the data IO interface;
the judging module is used for:
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capacity reaches a nominal value.
4. The device of claim 3, wherein the gear adjustment module is configured to output a gear adjustment signal when the determination module outputs the first determination signal, the gear adjustment signal being used to adjust up an output drive gear of the eMMC chip.
5. The apparatus of claim 4, further comprising a switching module;
the switching module is configured to:
when the judging module outputs the first judging signal, the data IO interface is switched to a communication channel from a test circuit, so that the eMMC chip receives the gear adjusting signal;
and after the output driving gear of the eMMC chip is adjusted upwards, the data IO interface is switched back to the test circuit.
6. A method for testing output driving capability of an eMMC chip is characterized by comprising the following steps:
setting the output current of a data IO interface of the eMMC chip as a rated current;
judging whether the output driving capability of the data IO interface reaches a nominal value or not on the basis of the rated current;
when the output driving capacity of the data IO interface does not reach a nominal value, the eMMC chip is controlled to adjust an output driving gear upwards until the output driving capacity of the data IO interface reaches the nominal value, or the output driving gear reaches the highest gear.
7. The method of claim 6, wherein the determining whether the output driving capability of the data IO interface reaches a nominal value comprises:
judging whether the output voltage of the data IO interface is smaller than a reference voltage or not;
when the output voltage is smaller than the reference voltage, outputting a first judgment signal, wherein the first judgment signal is used for indicating that the output driving capability does not reach a nominal value;
and when the output voltage is not less than the reference voltage, outputting a second judgment signal, wherein the second judgment signal is used for indicating that the output driving capacity reaches a nominal value.
8. The method of claim 6, further comprising:
when the output driving capability of the data IO interface does not reach a nominal value, switching the data IO interface from a test circuit to a communication channel so that the eMMC chip receives a gear adjusting signal;
and switching the data IO interface back to the test circuit after the output driving gear of the eMMC chip is adjusted upwards.
9. An electronic device, comprising:
the device of any one of claims 1-5;
a processor; and
a memory for storing a program, wherein the program is stored in the memory,
wherein the program comprises instructions which, when executed by the processor, cause the processor to carry out the method according to any one of claims 6-8.
10. A non-transitory computer readable storage medium having stored thereon computer instructions for causing a computer to perform the method of any one of claims 6-8.
CN202211395798.5A 2022-11-09 2022-11-09 Testing device and testing method for output driving capability of eMMC chip Pending CN115691650A (en)

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