CN115688658B - Method for simulating time quantum transport and evaluating performance limit of nano semiconductor device - Google Patents
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- 238000010521 absorption reaction Methods 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
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Abstract
The invention discloses a method for modeling simulation and performance limit assessment of time quantum transport of a nano semiconductor device. According to the invention, from the time quantum transport theory, the intrinsic transient response of channel charge and source leakage current limited by carrier transport time to gate voltages with different terahertz frequencies is researched, and the performance limits of the intrinsic 3dB bandwidth, the intrinsic cutoff frequency and the like of the device are evaluated. Mainly comprises the following steps: (1) The three-dimensional steady state quantum transport equation is solved numerically to obtain potential energy distribution in the device, and the potential energy distribution is used as a potential energy initial value of time quantum transport simulation; (2) Decomposing the three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation equation and a two-dimensional quantum finite field equation by using a mode space method, and developing a numerical algorithm to couple and solve the three-dimensional time-containing quantum transportation equation and the Poisson equation; (3) And analyzing simulation results to realize time quantum transport characteristics and performance limit evaluation. The method has important application value in the field of high-frequency electronic devices and terahertz electronics.
Description
Technical Field
The invention relates to the field of quantum transport modeling simulation of nano semiconductor electronic devices, in particular to a method for modeling simulation and performance limit evaluation of the time-containing quantum transport of a nano semiconductor device.
Background
Theoretically, the theoretical performance limit of nanoscale transistors is limited by the carrier transport time. Since the channel charge takes a certain time to respond to the change of the gate voltage, if the change of the gate voltage is faster than the carrier transport time T t, the channel charge will not follow the change of the gate voltage, and thus the gate will lose control of the channel. In the case of such very high frequency gate voltage bias, the gate capacitance formed by the gate oxide capacitance and the semiconductor capacitance in series will exhibit a strong frequency dependence, which will decrease with increasing frequency of the applied signal. This is because the semiconductor capacitance will decrease drastically as the frequency approaches 1/T t and increases further.
Currently, due to the existence of non-ideal factors such as parasitic effects, carrier scattering and the like, the working frequency of the nanoscale transistor is far lower than the performance limit limited by carrier transport time, the quantum transport characteristics of the nanoscale transistor can be obtained by self-consistent solving of a fixed state quantum transport equation and a poisson equation (D.Yin et al.,"Assessment of High-Frequency Performance Limit of Black Phosphorus Field-Effect Transistors,"IEEE Transactions on Electron Devices,2017.)., but if the non-ideal factors can be minimized in the future, how good the performance of the transistor can be still to be explored. Therefore, it is necessary to conduct time-quantum transport modeling simulations on nanoscale transistors to investigate their performance limits subject to carrier transport time limitations.
In recent years, there have been many studies and reports on time domain numerical simulation of nanoscale devices. For example, the one-dimensional time quantum transport problem (Y.Chen et al.,"Time-dependent quantum transport and nonquasistatic effects in carbon nanotube transistors,"Applied Physics Letters,2006.); in a carbon nanotube field effect transistor (CNTFET) can be studied by self-consistent solving of a Poisson equation and a one-dimensional time quantum transport equation, and the transient characteristics of a MOSFET can be studied by solving a time Boltzmann transport equation; the radio frequency performance of the multi-grid field effect transistor can be studied by solving a quantum-modified diffusion drift transport equation and a poisson equation through self-consistent; or exploring the radio frequency performance and design optimization method of the nano-sheet transistor by TCAD software. However, there is currently little research on the three-dimensional time-dependent quantum transport characteristics of surrounding gate nano-field effect transistors.
In addition, since the self-consistent solution of the three-dimensional time quantum transport equation and the poisson equation requires a great deal of calculation cost, the three-dimensional time quantum transport equation can be decomposed by adopting a mode space method. Compared with direct real space calculation, the method can improve the calculation efficiency and ensure that higher precision (W.Jing et al.,"A Three-Dimensional Quantum Simulation of Silicon Nanowire Transistors with the Effective-Mass Approximation,"Journal of Applied Physics,2004.), is used for fixed-state quantum transport simulation, however, the method is hardly applied to the time quantum transport simulation of nano semiconductor devices such as nano field effect transistors and the like. The invention provides a method for modeling and simulating time quantum transportation and evaluating performance limit of a nano semiconductor electronic device based on a mode space method by solving a three-dimensional time quantum transportation equation and a poisson equation through self-consistent values.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a method for modeling simulation and performance limit evaluation of the time quantum transport of a nano semiconductor device.
The technical scheme adopted by the invention is as follows:
a method for modeling simulation and performance limit evaluation of time quantum transport of a nano semiconductor device mainly comprises the following steps:
And adopting a progressive waveform estimation technology to self-consistent solve a three-dimensional fixed-state Schrodinger equation and a Poisson equation to obtain potential energy distribution in the device, and taking the potential energy distribution as potential energy initial values of different time steps in time quantum transport numerical simulation.
Decomposing a three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation problem and a quantum finite field problem of a two-dimensional section by adopting a mode space method, and carrying out numerical solution: solving the two-dimensional quantum finite field problem by utilizing a finite difference method numerical value to obtain a normalized eigenfunction and a subband of the two-dimensional section; for different sub-bands, a one-dimensional time quantum transport equation is solved by utilizing a time domain finite difference method to obtain one-dimensional electron density distribution; and multiplying the one-dimensional electron density by the eigen wave function of the two-dimensional section to obtain the three-dimensional electron density distribution.
And (3) coupling and solving a time quantum transport equation and a poisson equation: based on the three-dimensional electron density distribution, numerically solving a poisson equation to obtain updated potential energy distribution of the device; then, the potential energy distribution is used as the input of the time-containing Schrodinger equation, and the iteration solution is carried out until the potential converges, so that the three-dimensional electron density distribution and the source leakage current of the time step are obtained; then, the next time step of solving is entered.
And after the preset simulation time is reached, obtaining the time-dependent change relation of channel charge and source leakage current limited by the carrier transport time. Further, the time quantum transport simulation is carried out under different terahertz frequency gate voltages, and the intrinsic transient response of channel charge and source leakage current to different frequency signal voltages is compared and analyzed, so that the performance limits of the device, such as intrinsic 3dB bandwidth, intrinsic cut-off frequency and the like, can be evaluated. In addition, the intrinsic performance change rule of the device limited by carrier transport time under different structural parameters can be studied.
Compared with the prior art, the invention has the following beneficial effects:
1. compared with the traditional quasi-static method, the method can simulate the quantum transport transient response of the device and the time-dependent change relation of channel charge and source leakage current limited by channel carrier transport time, evaluate the performance limits of intrinsic 3dB bandwidth, intrinsic cut-off frequency and the like of the device, has guiding significance for further improving the performance of the device, and has important application value in the fields of high-frequency electronic devices and terahertz electronics.
2. According to the invention, the internal potential energy distribution of the device obtained by self-consistent solving of the three-dimensional fixed-state Schrodinger equation and the Poisson equation is used as the potential energy initial value of the time quantum transport simulation, so that the convergence speed is increased.
3. According to the method, a mode space method is adopted to decompose a three-dimensional time quantum transport equation, then the three-dimensional time quantum transport equation is solved with a poisson equation in a self-consistent manner, and compared with a direct real space calculation method, the method is used for decomposing the three-dimensional quantum transport problem into a one-dimensional problem and a two-dimensional problem, so that the calculation efficiency can be improved, and higher precision can be ensured. The mode space method is widely used for steady state quantum transport simulation, but is basically blank in the aspect of time quantum transport simulation of nano semiconductor electronic devices such as nano field effect transistors and the like.
Drawings
Other features, objects and advantages of the present invention will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings.
FIG. 1 is a schematic diagram of a typical surrounding gate silicon nanowire field effect transistor structure, wherein FIG. 1 (a) is a 3D structure, FIG. 2 (b) is a Y-Z cross-sectional view after removing an electrode, FIG. c) is an X-Z cross-sectional view after removing an electrode, and FIG. D) is a frequency dependent gate capacitance schematic diagram, which is formed by a gate oxide capacitance and a semiconductor capacitance in series;
FIG. 2 is a flow chart of the time quantum transport simulation of the nano semiconductor electronic device provided by the invention;
FIG. 3 is a flow chart of a one-dimensional time-containing Schrodinger equation for numerical solution by using a time-domain finite difference method in time-containing quantum transport simulation provided by the invention;
Fig. 4 shows simulated transistor band energy levels for V GS =0.5V and V DS =0.5V in an embodiment of the invention;
FIG. 5 shows the transient response of the channel charge in an embodiment of the invention, wherein (a) is the switching transient characteristic of the total channel charge under a rectangular gate voltage pulse and (b) is the on-supply transient characteristic of the total channel charge under a stepped drain voltage;
Fig. 6 shows (a) small signal channel charge and (b) drain current over time at different frequencies for an embodiment of the invention, wherein the applied gate voltage V GS(tn)=VG0+vg0sin(2πftn),VG0=0.5V,vg0 = 10mV and the drain voltage V DS = 0.5V;
FIG. 7 is a graph showing the variation of (a) gate capacitance and (b) transconductance with frequency for an embodiment of the present invention, wherein the intrinsic 3dB bandwidth of the device is 7.5THz according to the graph (b);
FIG. 8 is a graph showing the relationship between the small signal gate current and the drain current with frequency, the intersection of which is the intrinsic cut-off frequency of the device, which is about 4.8THz, in an embodiment of the present invention;
fig. 9 is a graph showing the intrinsic 3dB bandwidth and the intrinsic cutoff frequency as a function of (a) channel length and (b) cross-sectional area in an embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications could be made by those skilled in the art without departing from the inventive concept. These are all within the scope of the present invention.
The method is suitable for the surrounding grid type silicon nanowire field effect transistor, and is suitable for most nanoscale semiconductor electronic devices.
According to one embodiment of the invention, the method for modeling simulation and performance evaluation of the time quantum transport of a nano-semiconductor electronic device comprises the following steps:
Step one: the potential energy distribution inside the device is obtained by self-consistent solving of a three-dimensional steady state quantum transport equation and a poisson equation by adopting a progressive waveform estimation technology, the potential energy distribution is used as potential energy initial values of different time steps in time quantum transport numerical simulation, and a control equation of the solving process is shown in table 1.
Step two: based on a mode space method, the time quantum transport simulation is carried out by self-consistent solving of a three-dimensional time quantum transport equation and a poisson equation, wherein the potential energy initial value is derived from the first step. And (3) adopting a mode space method to spread a three-dimensional wave function in a subband characteristic function space, so as to decompose a three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation problem and a quantum finite field problem of a two-dimensional section. The method comprises the steps of utilizing a finite difference method to numerically solve a two-dimensional quantum finite field problem to obtain a normalized eigenfunction and a subband of a two-dimensional section; for different sub-bands, a one-dimensional time quantum transport equation is solved by utilizing a time domain finite difference method to obtain one-dimensional electron density distribution; and multiplying the one-dimensional electron density by the eigen wave function of the two-dimensional section to obtain the three-dimensional electron density distribution. Based on the three-dimensional electron density distribution, solving a poisson equation numerically to obtain updated potential energy distribution of the device; and then, taking the potential energy distribution as the input of the time-containing Schrodinger equation, and carrying out iterative solution until the potential converges to obtain the three-dimensional electron density distribution and the source leakage current of the time step. Then, the next time step of solving is entered. The control equation for this solving process is listed in table 1.
Step three: the device performance limits were evaluated. And (3) obtaining the time-dependent change relation of channel charge and source leakage current limited by carrier transport time based on the simulation result of the step two. Further, the time quantum transport simulation is carried out under different terahertz frequency gate voltages, and the intrinsic transient response of channel charge and source leakage current to different frequency signal voltages is compared and analyzed, so that the performance limits of the device, such as intrinsic 3dB bandwidth, intrinsic cut-off frequency and the like, are evaluated. In addition, the intrinsic performance change rule of the device limited by carrier transport time under different structural parameters can be studied. The model control equation is listed in table 1.
Table 1 control equation in model
The symbols and terms appearing herein are given in Table 2.
The symbols and terms appearing in Table 2
As shown in fig. 2, a flow chart of time-dependent quantum transport simulation of a nano-semiconductor electronic device is provided. Firstly, the internal potential energy distribution of the device is obtained by self-consistent solving of a poisson equation (formula 1) and a fixed-state schrodinger equation (formula 2), and is used as potential energy initial values of different time steps in time quantum transport numerical simulation (step one). The three-dimensional time-containing Schrodinger equation (formula 3) is decomposed into a one-dimensional time-containing quantum transportation problem (formula 6) and a two-dimensional cross-section quantum confinement problem (formula 5) by adopting a mode space method, and the method specifically comprises the following steps: substituting the obtained potential energy initial value into a two-dimensional section Schrodinger equation (formula 5), and solving the equation by utilizing a finite difference method numerical value to obtain a normalized eigenfunction and a subband of the two-dimensional section; then, for different sub-bands, a one-dimensional time quantum transport equation (formula 6-13) is solved by utilizing a time domain finite difference method to obtain one-dimensional electron density distribution (formula 14); multiplying the one-dimensional electron density by the eigen wave function of the two-dimensional section to obtain a three-dimensional electron density distribution (formula 15); and then feeding back the three-dimensional electron density distribution to the poisson equation (formula 1) for iterative solution until the electron potential energy converges, and entering the next time step (step two). After the preset simulation time is reached, the time-dependent change relation (formula 14-16) of channel charge and source leakage current limited by carrier transport time can be obtained; further, the time quantum transport simulation is carried out under the gate voltages of different terahertz frequency bands, the intrinsic transient response of channel charge and source leakage current to signal voltages of different frequencies is compared and analyzed, the change relation (formula 17-18) of the gate capacitance and transconductance along with the frequency can be obtained, and further, the performance limits of the intrinsic 3dB bandwidth, the intrinsic cut-off frequency and the like of the device are evaluated; in addition, the intrinsic performance change rule of the device limited by carrier transport time under different structural parameters can be studied (step three). The model control equation is listed in table 1.
As shown in fig. 3, a flow chart for solving the one-dimensional time-containing quantum transport equation by using the time-domain finite difference method in the second step is provided. The method comprises the following specific steps: the wave function is first written in real and imaginary form as shown in (equation 7), the one-dimensional time-containing schrodinger equation is decomposed into (equation 8) and (equation 9), and then the time-steps are respectively repeated at t=n Δt and t= (n+0.5) Δt alternation time stepsAndApplying an excitation source, calculating according to (formula 12) and (formula 13), and applying corresponding absorption boundary conditions, the method can be used for calculating according to/>AndAnd calculating a one-dimensional electron density distribution.
The relevant parameters used in the simulations performed for the example of fig. 1 are listed in table 3.
TABLE 3 device dependent parameters
The three lowest sub-band energy levels of the transistor are shown in fig. 4, and the quantum confinement effect causes the device energy band to be quantized into discrete energy levels. Fig. 5 (a) is a response of channel charge to gate voltage pulse, with rise time and fall time of 0.13ps and 0.06ps, respectively; fig. 5 (b) shows the response of the channel charge to a step voltage applied to the drain, indicating that after the voltage is applied, the channel charge takes some time to reach steady state. Fig. 6 is a plot of small signal channel charge and drain current versus time for gate voltages at different frequencies (5, 10,50 thz). As the signal frequency increases, the magnitude of the small signal channel charge and current decreases, as the accumulation and removal of channel charge is limited by the carrier transport time T t. If the gate voltage changes faster than the carrier transport time T t, or equivalently, when the device operating frequency reaches 1/T t and increases further, the channel charge will not keep up with the change in gate voltage and therefore the gate will lose control of the channel. Fig. 7 is a graph of gate capacitance C g and transconductance g m as a function of frequency, which decrease with increasing frequency above 4.0THz, reaching quasi-static values below 4.0 THz. C g decreases with increasing frequency because at such high frequency gate voltage bias, the channel charge does not follow the change in gate voltage, resulting in a significant decrease in C s, although C ox is not frequency dependent. In this case, the fixed quantum method is no longer effective. The intrinsic 3dB bandwidth of the device limited by the carrier transport time is also obtained from fig. 7 (b), which is about 7.5THz. Fig. 8 is a plot of small signal gate current and drain current amplitude as a function of frequency, with the intersection being the device intrinsic cutoff frequency, defined as the unity gain frequency, at about 4.8THz. FIG. 9 is a graph showing the intrinsic 3dB bandwidth f 3dB and the intrinsic cut-off frequency f cutoff of a device as a function of channel length and cross-sectional area, with the performance limits of the device being limited by carrier transport time, and with the channel length of the device increasing, carrier transport time increasing, so f 3dB and f cutoff decreasing; on the other hand, an increase in the cross-sectional area results in a decrease in the quantum confinement effect, a decrease in the effective mass of carriers in the transport direction, and a decrease in carrier transport time, and thus increases f 3dB and f cutoff.
According to the time quantum transport simulation result, the operating frequency of the device limited by the carrier transport time can reach terahertz (THz), which is far greater than the operating frequency (GHz) of the current practical device limited by non-ideal factors such as parasitic effect. In the future, there is still a great room for optimization in terms of transistor technology, design, etc., and if these non-ideal factors can be reduced to be small, the performance of the transistor can be improved to a great extent, which is worth exploring. The method for modeling and simulating the time quantum transport and evaluating the performance limit of the nano semiconductor device has important application value in the fields of high-frequency electronic devices and terahertz electronics.
The foregoing describes specific embodiments of the present application. It is to be understood that the application is not limited to the particular embodiments described above, and that various changes or modifications may be made by those skilled in the art within the scope of the appended claims without affecting the spirit of the application. The embodiments of the application and the features of the embodiments may be combined with each other arbitrarily without conflict.
Claims (3)
1. The method for modeling simulation and performance limit evaluation of the time quantum transport of the nano semiconductor device is characterized by comprising the following steps of:
numerically solving a three-dimensional steady state quantum transport equation to obtain potential energy distribution in the device, and taking the potential energy distribution as potential energy initial values of different time steps in time quantum transport numerical simulation;
decomposing a three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation problem and a quantum finite field problem of a two-dimensional section by adopting a mode space method, and carrying out coupling solution with a Poisson equation until convergence to obtain three-dimensional electron density distribution and source leakage current of the time step, and entering the next time step;
After the preset simulation time is reached, obtaining the time-dependent change relation of channel charge and source leakage current limited by carrier transport time; further, the time quantum transport simulation is carried out under different terahertz frequency gate voltages, and the intrinsic transient response of channel charge and source leakage current to different frequency signal voltages is compared and analyzed, so that the intrinsic 3dB bandwidth and the intrinsic cutoff frequency performance limit of the device are evaluated;
The method adopts a mode space method to decompose a three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation problem and a quantum finite field problem of a two-dimensional section, and the three-dimensional time-containing quantum transportation problem and the quantum finite field problem are coupled with a Poisson equation to solve until convergence, specifically comprising the following steps: (1) Decomposing a three-dimensional time-containing Schrodinger equation into a one-dimensional time-containing quantum transportation problem and a quantum finite field problem of a two-dimensional section by adopting a mode space method, and carrying out numerical solution: solving the two-dimensional quantum finite field problem by utilizing a finite difference method numerical value to obtain a normalized eigenfunction and a subband of the two-dimensional section; for different sub-bands, a one-dimensional time quantum transport equation is solved by utilizing a time domain finite difference method to obtain one-dimensional electron density distribution; multiplying the one-dimensional electron density by the eigen wave function of the two-dimensional section to obtain three-dimensional electron density distribution;
(2) And (3) coupling and solving a time quantum transport equation and a poisson equation: based on the three-dimensional electron density distribution, numerically solving a poisson equation to obtain updated potential energy distribution of the device; then, the potential energy distribution is used as the input of the time-containing Schrodinger equation again, and the iteration solution is carried out until the electronic potential energy converges, so that the three-dimensional electron density distribution and the source leakage current of the time step are obtained; then, the next time step of solving is entered.
2. The method for modeling simulation and performance limit assessment of time-lapse quantum transport of the nano semiconductor device according to claim 1, wherein the three-dimensional fixed-state schrodinger equation and poisson equation are self-consistent solved by adopting a progressive waveform estimation technology to obtain potential energy distribution inside the device, the potential energy distribution is used as a potential energy initial value of the time-lapse quantum transport simulation, and convergence speed can be accelerated by reasonable initial value setting.
3. The method for modeling and evaluating the performance limit of the nano semiconductor device according to claim 1, wherein the time-dependent quantum transport modeling simulation result is used for obtaining the time-dependent change relation of channel charge and source leakage current limited by carrier transport time; further, the time quantum transport simulation is carried out under different terahertz frequency gate voltages, and the intrinsic transient response of channel charge and source leakage current to different frequency signal voltages is compared and analyzed, so that the intrinsic 3dB bandwidth and the intrinsic cutoff frequency performance limit of the device are evaluated; in addition, based on the time quantum transport simulation, the intrinsic performance change rule of the device limited by carrier transport time under different structural parameters can be studied.
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