CN115686639A - Branch prediction method applied to processor and branch predictor - Google Patents

Branch prediction method applied to processor and branch predictor Download PDF

Info

Publication number
CN115686639A
CN115686639A CN202211290962.6A CN202211290962A CN115686639A CN 115686639 A CN115686639 A CN 115686639A CN 202211290962 A CN202211290962 A CN 202211290962A CN 115686639 A CN115686639 A CN 115686639A
Authority
CN
China
Prior art keywords
branch
predicted value
value
predictor
branch instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211290962.6A
Other languages
Chinese (zh)
Inventor
范志华
王铎
汤胜中
李文明
安学军
叶笑春
范东睿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Computing Technology of CAS
Original Assignee
Institute of Computing Technology of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Computing Technology of CAS filed Critical Institute of Computing Technology of CAS
Priority to CN202211290962.6A priority Critical patent/CN115686639A/en
Publication of CN115686639A publication Critical patent/CN115686639A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Advance Control (AREA)

Abstract

The invention provides a branch prediction method and a branch predictor applied to a processor, wherein the branch prediction method comprises the following steps: acquiring a first intermediate parameter and a first predicted value of a TAGE predictor for performing branch prediction on a branch instruction; acquiring a second intermediate parameter and a second predicted value of the GEHL predictor for performing branch prediction on the branch instruction; utilizing a preset combined predictor to recombine and determine a plurality of sub-indexes according to a preset rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes; and generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index, so that the accuracy of branch prediction and the efficiency of a processor are improved.

Description

Branch prediction method applied to processor and branch predictor
Technical Field
The present invention relates to the field of computer architecture, specifically to the field of branch prediction technology of processors, and more specifically, to a branch prediction method and a branch predictor applied to a processor.
Background
In computer architectures, superscalar computers (i.e., computers having multiple processing components that can execute more than one instruction per clock cycle) can be used for high-level, computationally intensive applications. Often, superscalar computers employ one or more pipeline processors to better handle certain computationally intensive computer programs.
Computer programs typically include a large number of branch instructions that, when executed, require an evaluation of whether to continue execution of the next instruction in memory or to jump to an instruction specified by the branch target address. If program execution jumps to the branch specified by the branch target address, a branch specified by the branch instruction is deemed "Taken" (Taken), and if execution continues with the next sequential instruction in memory, it is deemed "Not Taken" (Not Taken). To avoid stalls due to waiting for actual evaluation of branch instructions, modern processors may employ some form of branch prediction, whereby the branching behavior of branch instructions is predicted early in the pipeline, and execution time may be saved by starting speculative execution of the corresponding branch ahead of time using unallocated computing resources (i.e., the pipeline). Therefore, in the development of processors, branch prediction technology has been a hot issue of research in the industry as an important method for improving the performance of general-purpose processors, and is widely used not only in high-performance processors but also in embedded processors that are power-consumption sensitive.
The design and application of branch prediction strategies are important factors affecting processor performance and overhead. As modern processors move toward deep pipeline, superscalar, and multicore, the penalty incurred by a branch prediction unit misprediction becomes increasingly unacceptable. Meanwhile, the branch prediction unit occupies a certain area and power consumption overhead at the front end of the processor, which puts higher requirements on the performance and overhead design of the branch prediction unit.
The O-GEHL (Optimized geographic History Length) branch predictor was proposed in the first branch prediction tournament (Seznec, 2004), and can effectively utilize the long global History of 100-200 bits. The O-GEHL predictor is optimized on the basis of the GEHL predictor. In the tournament, the prediction accuracy of the 64Kbits O-GEHL predictor ranks second and the best practice prize is achieved. The O-GEHL predictor uses a history length index prediction table which is a geometric sequence, and calculates a prediction value by using a class perceptron mode, so that the storage resources are better utilized, and meanwhile, the selection of history length parameters is strong in robustness. For harsh applications, most of the storage space in the O-GEHL predictor is dedicated to a table of local historical indices for the corresponding branch instruction; for less demanding applications, a table of very long global history indices common to multiple branch instructions is utilized.
The TAGE predictor comprises a plurality of different prediction tables, and indexes used by the different prediction tables are different in length and grow exponentially. During prediction, the basic prediction table and other prediction tables are indexed at the same time, and the prediction result of the prediction table with the longest index history is selected from the hit prediction tables to serve as the final prediction result. The TAGE predictor improves the prediction speed and the prediction accuracy, but the hardware design complexity is high, and the area overhead is large. Meanwhile, the single TAGE predictor uses an address and history mixed index mechanism, which inevitably causes interference caused by address conflict and influences the prediction accuracy.
The branch prediction mechanism depends greatly on the behavior of the program, and the single-mechanism predictor does not keep high accuracy on any program. Compared with a single-mechanism predictor, the adoption of a multi-mechanism mixed branch prediction strategy is a common method for designing the branch predictor in the current high-performance processor, and the multi-mechanism mixed predictor can realize higher prediction accuracy. The prediction accuracy of the current hybrid branch prediction strategy still remains to be improved.
Disclosure of Invention
Therefore, the present invention is directed to overcome the above-mentioned drawbacks of the prior art and to provide a branch prediction method and a branch predictor applied to a processor.
The purpose of the invention is realized by the following technical scheme:
according to a first aspect of the present invention, there is provided a branch prediction method applied to a processor, comprising: acquiring a first intermediate parameter and a first predicted value of a TAGE predictor for performing branch prediction on a branch instruction; acquiring a second intermediate parameter and a second predicted value of the GEHL predictor for performing branch prediction on the branch instruction; utilizing a preset combined predictor to recombine and determine a plurality of sub-indexes according to a preset rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes; and generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index.
In some embodiments of the invention, the combinatorial predictor is configured to: setting a saturation counter indicating the historical branch condition of the corresponding sub-index aiming at the corresponding sub-index, and updating the saturation counter corresponding to the sub-index associated with the branch instruction after obtaining the branch result of the corresponding branch instruction; and determining a third predicted value and a confidence coefficient of the third predicted value based on the sum of the count values in the corresponding saturation counters according to a plurality of sub-indexes corresponding to one branch instruction.
In some embodiments of the invention, the pattern history table stores, via a saturation counter, historical branch conditions indicating branch instructions corresponding to respective query indices; the method comprises the following steps: determining a final predicted value corresponding to the branch instruction from the count value in the corresponding saturation counter based on the query index corresponding to the corresponding branch instruction; and updating a saturation counter corresponding to the query index associated with the branch instruction according to the corresponding final predicted value after the branch result of the branch instruction is obtained.
In some embodiments of the present invention, the first intermediate parameter includes a provision item, a valid bit of the provision item, and a candidate item corresponding to the branch prediction of the branch instruction by the TAGE predictor; the second intermediate parameter comprises a summation result corresponding to branch prediction of the branch instruction by the GEHL predictor, and the summation result is a reference of the second prediction value determined by the GEHL predictor; and each sub-index is obtained by splicing the PC value corresponding to the branch instruction, the providing item, the valid bit of the providing item, the candidate item and the specified bit in the summation result according to a preset rule, and the specified bits utilized by any two sub-indexes are different.
In some embodiments of the invention, the plurality of sub-indices comprises: the first sub-index is obtained by splicing a second predicted value, a first predicted value and 0-7 bits of a PC value, the second sub-index is obtained by splicing the valid bit of a provided item, 0-2 bits of a candidate item, 0-2 bits of the provided item and 0-2 bits of the PC value, the third sub-index is obtained by splicing 0-4 bits of a summation result of a GEHL predictor and 0-4 bits of the PC value, the fourth sub-index is obtained by splicing 0-4 bits of the summation result of the GEHL predictor, the second predicted value, the first predicted value and 0-2 bits of the PC value, and the fifth sub-index is obtained by splicing the valid bit of the provided item, 0-2 bits of the candidate item, 0-2 bits of the provided item, the second predicted value, the first predicted value and 0 bit of the PC value.
In some embodiments of the present invention, the low order to the high order of the query index are obtained by sequentially concatenating the third predicted value, the confidence of the third predicted value, and 0-6 bits of the PC value.
In some embodiments of the invention, the method further comprises: acquiring a fourth predicted value obtained by a preset perceptron predictor through branch prediction on the branch instruction according to the global history and the local history of the branch instruction; and generating a query index according to the PC value, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value corresponding to the branch instruction, and determining a final predicted value corresponding to the branch instruction from a preset mode history table based on the query index.
In some embodiments of the invention, the preset perceptron predictor comprises: the global history perceiving machine is used for providing a perception value which is obtained by perceiving the segmentation based on the global history and indicates the branch direction, and the perception value is obtained by training the global history of recording the branch result of all the branch instructions; the local history perceiving machine is used for providing a perception value which is obtained by perceiving based on the segmentation of the local history and indicates the branch direction, and the perception value is obtained by training the local history of the branch result of the specified branch instruction; and the fourth predicted value is obtained according to the perception value of the global historical perception machine and the perception value of the local historical perception machine.
According to a second aspect of the present invention, there is provided a branch predictor using the branch prediction method of the first aspect, comprising: the TAGE predictor is used for acquiring a first intermediate parameter and a first predicted value for performing branch prediction on the branch instruction; the GEHL predictor is used for acquiring a second intermediate parameter and a second predicted value for performing branch prediction on the branch instruction; the combined predictor is used for recombining and determining a plurality of sub-indexes according to a preset rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes; and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index.
In some embodiments of the invention, the branch predictor further comprises: a perceptron predictor configured to: performing branch prediction on the branch instruction according to the global history and the local history of the branch instruction to obtain a fourth predicted value; and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table based on the query index.
According to a third aspect of the invention, there is provided a processor comprising: a branch predictor configured to perform a branch prediction method as described in the first aspect on a branch instruction to be predicted to determine a final predicted value corresponding to the branch instruction; or, the branch predictor of the second aspect is adopted to determine a final predicted value corresponding to the branch instruction to be predicted; one or more processing units configured to speculatively execute corresponding executable instructions in the taken branch according to a final predicted value corresponding to the branch instruction by the branch predictor.
According to a fourth aspect of the present invention, there is provided an electronic apparatus comprising: one or more processors as described in the third aspect; and a memory, wherein the memory is to store executable instructions; the one or more processors are configured to execute respective executable instructions via execution.
Compared with the prior art, the invention has the advantages that:
on the basis of two existing branch predictors (namely, a TAGE predictor and a GEHL predictor) with higher prediction accuracy, a plurality of sub-indexes are recombined by using intermediate parameters (an intermediate product for generating predicted values, the intermediate parameter corresponding to the TAGE predictor is called a first intermediate parameter for distinguishing and the intermediate parameter corresponding to the GEHL predictor is called a second intermediate parameter) and predicted values (the predicted value output by the TGAE predictor is called a first predicted value for distinguishing and the predicted value output by the GEHL predictor is called a second predicted value) of the two existing branch predictors and a PC value corresponding to a branch instruction, and a corresponding third predicted value and a confidence coefficient of the third predicted value are determined based on the recombined sub-indexes; and generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index. Therefore, the accuracy of branch prediction can be further improved, the overhead caused by the error of branch prediction is reduced, and the performance of the processor is improved
Drawings
Embodiments of the invention are further described below with reference to the accompanying drawings, in which:
FIG. 1 is a flow chart illustrating a branch prediction method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a sensor according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a relationship between query indexes generated by the branch prediction method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail by embodiments with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As mentioned in the background section, the prediction accuracy of current hybrid branch prediction strategies remains to be improved. The inventor finds that the existing mixed branch prediction strategy only adopts the predicted values finally output by some existing predictors, the interference caused by address conflict of the combined indexes is large, and the further improvement of the branch prediction accuracy is influenced. Therefore, on the basis of two existing branch predictors (namely, a TAGE predictor and a GEHL predictor) with high prediction accuracy, a plurality of sub-indexes are recombined with a PC value corresponding to a branch instruction by using an intermediate parameter (an intermediate product for generating a predicted value, and for distinguishing, the intermediate parameter corresponding to the TAGE predictor is called a first intermediate parameter, and the intermediate parameter corresponding to the GEHL predictor is called a second intermediate parameter) and a predicted value (for distinguishing, the predicted value output by the TGAE predictor is called a first predicted value, and the predicted value output by the GEHL predictor is called a second predicted value) of the two existing branch predictors, and a confidence coefficient of a corresponding third predicted value and the third predicted value is determined based on the recombined sub-indexes; and generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index. Therefore, the accuracy of branch prediction can be further improved, and the overhead caused by the error of branch prediction can be reduced, so that the performance of the processor is improved.
Before describing embodiments of the present invention in detail, some of the terms used therein will be explained as follows:
the predicted value is a value indicating whether a branch is predicted taken; the predicted value is an integer value, and for example, a value of 1 indicates acceptance, and a value of 0 indicates non-acceptance. In other words, the predicted value is the result of a predictor outputting a branch prediction for a branch instruction, indicating whether the result of the branch prediction is a jump or no jump; jumps are generally denoted by 1 and no jumps are denoted by 0. For the sake of distinction, the result output by the TAGE predictor is referred to hereinafter as the first predicted value; referring to the result output by the GEHL predictor with the second prediction value; the final predicted value is used to refer to the branch prediction method of the present invention or the result output by the branch predictor.
PC refers to a Program Counter (Program Counter) for storing the address of the current instruction to be executed.
The PC value corresponding to the branch instruction is a Program Counter value (or called Program Counter value) of the branch instruction, and records the address of the branch instruction.
The confidence of the predicted value is the confidence level indicating whether a branch is predicted taken (taken corresponding jump, not taken corresponding not jump); usually represented by multiple bits, such as: 00 indicates strong unadoption, 01 indicates weak unadoption, 10 indicates weak adoption, and 11 indicates strong adoption.
The branch outcome refers to the actual outcome of whether the branch instruction jumped.
According to an embodiment of the present invention, referring to fig. 1, there is provided a branch prediction method applied to a processor, including the steps of: s1, S2, S3 and S4. For a better understanding of the present invention, each step is described in detail below with reference to specific examples.
In step S1, a first intermediate parameter and a first predicted value of the branch prediction performed on the branch instruction by the TAGE predictor are obtained.
According to one embodiment of the invention, the PC (Program Count) value of the branch instruction is input into the TAGE predictor, and the corresponding first predicted value is obtained. Meanwhile, a corresponding first intermediate parameter also exists in the TAGE predictor, and can be used for constructing the sub-index to improve the prediction accuracy. Preferably, the first intermediate parameters include a supply item, a valid bit of the supply item and a candidate item corresponding to the branch prediction of the branch instruction by the TAGE predictor. The provided item (generally called Provider) corresponding to the branch prediction of the branch instruction by the TAGE predictor is a component with the longest history length matched in the matching of the mark (Tag) in the TAGE predictor. The significand of the supply of the TAGE predictor (hereinafter simply the supply) is the bit used to confirm that this item matches the branch instruction, and is typically represented by u bits (u-bits). The candidate of the TAGE predictor (commonly called Alt provider) is the next longest part of the (tagged) history length matched in the Tag (Tag) matching in the TAGE predictor.
In step S2, a second intermediate parameter and a second predicted value of the branch prediction performed on the branch instruction by the GEHL predictor are obtained.
According to one embodiment of the invention, the PC (Program Count) value of the branch instruction is input into the GEHL predictor, resulting in a corresponding second predicted value. Meanwhile, a corresponding second intermediate parameter also exists in the GEHL predictor, and can be used for constructing the sub-index so as to improve the prediction precision. Preferably, the second intermediate parameter includes a summation result (generally referred to as Sum result) corresponding to the branch prediction performed by the GEHL predictor on the branch instruction, and the summation result is used for determining a reference of the second prediction value for the GEHL predictor. The result of this summation is represented by the sum of the recorded values output by all the prediction tables in the GEHL predictor, represented by a number of bits (bits), which is used to determine the prediction value (prediction) of the GEHL predictor. In an embodiment of the present invention, the GEHL predictor may refer to an O-GEHL predictor or a GEHL predictor. Preferably, however, the present invention employs an O-GEHL predictor to provide better prediction accuracy. The experimental data given later were obtained using the O-GEHL predictor.
In step S3, a preset combined predictor is used to reconstruct and determine a plurality of sub-indices according to a predetermined rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter, and the second predicted value corresponding to the branch instruction, and determine a corresponding third predicted value and a confidence level of the third predicted value based on the reconstructed plurality of sub-indices;
according to an embodiment of the present invention, each sub-index is obtained by selecting the PC value corresponding to the branch instruction, the provided item, the valid bit of the provided item, the candidate item, and the specified bit in the summation result according to a predetermined rule for splicing, and the specified bits utilized by any two sub-indexes are different. It should be understood that a plurality of sub-pattern branch tables are preset in the combined predictor, and each sub-index corresponds to a saturation counter which indicates the historical branch condition of the corresponding sub-index in one sub-pattern branch table. The technical scheme of the embodiment can at least realize the following beneficial technical effects: in the process of generating the sub-index, the invention not only uses the final prediction results (predicted values) of the TAGE predictor and the GEHL predictor, but also uses the intermediate parameters for generating the final prediction results, thereby providing more effective information in the indexing process, reducing the influence of index address conflict and improving the precision of branch prediction.
To facilitate understanding of the composition of sub-indices in a combinatorial predictor, an exemplary form of a sub-index is given below, and according to one embodiment of the invention, the plurality of sub-indices includes:
the first sub-index is obtained by splicing 0-7 bits of the second predicted value, the first predicted value and the PC value;
for example, the first sub-pattern transfer table PHT 1 The bits of the corresponding first sub-index are:
index 0 =prediction GEHL
index 1 =prediction TAGE
index 9:2 =PC 7:0
therein, index 0 Bit 0, index, representing a sub-index 1 Bit 1, index, representing a sub-index 9:2 2-9 bits of the sub-index (the definition of the sub-index bits in the following formula is similar, and the description is omitted), and prediction GEHL Representing the second predicted value (i.e. GEHL predictor)Predicted value of) prediction, prediction TAGE Representing the first predicted value (i.e. the predicted value of the TAGE predictor), PC 7:0 Indicating bits 0-7 in the PC value to which the branch instruction corresponds.
The second sub-index is obtained by splicing the valid bit of the provided item, 0-2 bits of the candidate item, 0-2 bits of the provided item and 0-2 bits of the PC value;
for example, the second sub-pattern transfer table PHT 2 The bits of the corresponding second sub-index are:
index 0 =U
index 3:1 =alt_provider 2:0
index 6:4 =provider 2:0
index 9:7 =PC 2:0
wherein U represents the significand of the offer item, alt _ provider 2:0 0-2 bit, provider, representing a candidate 2:0 0-2 bits, PC, representing offered items 2:0 Indicating bits 0-2 in the PC value to which the branch instruction corresponds.
The third sub-index is obtained by splicing 0-4 bits of a summation result of the GEHL predictor and 0-4 bits of a PC value;
for example, the third sub-pattern transfer table PHT 3 The bits of the corresponding third sub-index are:
index 4:0 =GEHL-sum 4:0
index 9:5 =PC 4:0
wherein GEHL-sum 4:0 0-4 bit, PC, representing the summation result of GEHL predictor 4:0 Indicating bits 0-4 in the PC value to which the branch instruction corresponds.
The fourth sub-index is obtained by splicing 0-4 bits of the summation result of the GEHL predictor, the second predicted value, the first predicted value and 0-2 bits of the PC value,
for example, the fourth sub-pattern transfer table PHT 4 The corresponding bits of the fourth sub-index are:
index 4:0 =GEHL_sum 4:0
index 5 =prediction GEHL
index 6 =prediction TAGE
index 9:7 =PC 2:0
wherein GEHL-sum 4:0 0-4 bit prediction representing the summation result of GEHL predictor GEHL Indicating a second prediction value, prediction TAGE Indicates the first predicted value, PC 2:0 Indicating bits 0-2 in the PC value to which the branch instruction corresponds.
And the fifth sub-index is obtained by splicing the valid bit of the provided item, the 0-2 bits of the candidate item, the 0-2 bits of the provided item, the second predicted value, the first predicted value and the 0 bit of the PC value.
For example, the fifth submode transfer table PHT 5 The corresponding bits of the fifth sub-index are:
index 0 =U
inde 3:1 =alt_provider 2:0
index 6:4 =provider 2:0
index 7 =prediction GEHL
inde 8 =prediction TAGE
index 9 =PC 0
wherein U represents the significand of the offer item, alt _ provider 2:0 0-2 bit, provider, representing a candidate 2:0 Bit 0-2, prediction representing a supplied item GEHL Representing a second prediction value, prediction TAGE Indicates the first predicted value, PC 0 Indicating bit 0 of the PC value corresponding to the branch instruction.
It should be noted that the above sub-index format is merely a specific example of the specific bit, and the inventor determines the above sub-index format through multiple tests and adjustments. It should be understood that the implementer may adjust as needed to make reasonable use of the PC value, the intermediate parameters of the two predictors, and the predicted value to construct sub-indices that are beneficial for improving branch prediction accuracy, e.g., the implementer may adjust the PC value, the specific bits utilized in the provided entry, and test to select other available sub-index forms.
According to one embodiment of the invention, the combined predictor is configured to: setting a saturation counter indicating the historical branch condition of the corresponding sub-index aiming at the corresponding sub-index, and updating the saturation counter corresponding to the sub-index associated with the branch instruction after obtaining the branch result of the corresponding branch instruction; and determining a third predicted value and the confidence of the third predicted value based on the sum of the count values in the corresponding saturation counters according to a plurality of sub-indexes corresponding to one branch instruction.
According to one embodiment of the invention, the combined predictor includes a TAGE predictor, a GEHL predictor, and 5 sub-Pattern branch tables (branch Pattern History tables). The sub-index corresponding to each sub-mode transition table adopts an index bit width of 10 bits (bits), and each entry corresponds to a saturation counter with a predetermined bit width (such as 3 bits or 4 bits). Before the maximum or minimum numerical value which can be recorded by the saturation counter is not reached, updating is carried out according to the branch result corresponding to the branch instruction every time, if the branch result is a jump, the value is +1, and if the branch result is-1, the value is not-1. The prediction process of the combined predictor is as follows:
1. first, the intermediate parameters and predicted values of the TAGE predictor and GEHL predictor are obtained from the PC (Program Count) value. This part is available on the basis of open-source TAGE and GEHL predictors, and therefore will not be described in detail;
2. carrying out specific combination on the existing PC value, the intermediate parameter and the predicted value of the TAGE predictor, and the intermediate parameter and the predicted value of the GEHL predictor to construct 5 sub-indexes, and respectively obtaining the sub-predicted value corresponding to each sub-mode transfer table from the indexes of the 5 sub-mode transfer tables;
3. and performing predetermined summation processing on the sub-prediction values (corresponding to the values in the saturation counter) matched by the 5 sub-indexes to obtain a third prediction value output by the whole combined predictor and the confidence coefficient of the third prediction value.
It was described above how a plurality of sub-indices are combined from existing PC values, intermediate parameters of the TAGE predictor, GEHL predictor, and predicted values (prediction results). And calculating a third predicted value and the confidence coefficient of the third predicted value according to the count value indexed out by the sub-index in the saturation counter corresponding to the corresponding sub-mode transfer table.
According to one embodiment of the invention, the third predicted value is determined as follows:
summing the count values respectively indexed out from the saturation counters of the corresponding sub-mode transfer tables by the sub-indexes according to a preset summation formula, wherein when the summed value is greater than or equal to 0, the third predicted value is skip, otherwise, the third predicted value is not skip, wherein the preset summation formula is as follows:
Figure BDA0003901318170000101
wherein M represents the total number of sub-indexes,
Figure BDA0003901318170000102
denotes a mean shift (offset value) of a sum of count values indexed from the corresponding sub pattern transition table for the M-term sub-index, and C (i) denotes a count value indexed from the corresponding sub pattern transition table according to the ith sub-index. For example, if the sub-indices are 5 sub-indices shown in the foregoing embodiment, the predetermined summation formula is:
Figure BDA0003901318170000103
wherein,
Figure BDA0003901318170000111
is the mean shift of the sum of the count values indexed from the corresponding sub-pattern transition table for the 5 sub-indices, and C (i) represents the count value indexed from the corresponding sub-pattern transition table according to the ith sub-index. When the combinar _ sum is more than or equal to 0, the jump is predicted, and when the combinar _ sum is less than 0, the jump is predicted not. As mentioned earlier, the saturating counter in the sub-index from the corresponding sub-pattern transition table may adopt a 4-bit (bits) saturating counter. Where the recorded value is C (i). Before the maximum or minimum value recorded by the saturation counter is not reached, the value is divided into pointsAnd updating a branch result corresponding to the branch instruction, wherein if the branch result is jump, the branch result is +1, and otherwise, the branch result is-1.
The confidence SumType (and type) of the third predictor is calculated from the combinar sum, as shown in the following equation. The threshold θ is updated every time the prediction result is returned or speculatively updated, and SumType represents the reliability of the prediction result and is transmitted to the final predictor as a parameter.
Figure BDA0003901318170000112
Where θ represents a predetermined threshold. The threshold θ may be a fixed value or a dynamically adjusted value. Preferably, the update logic of the dynamically adjusted threshold is: when the third predicted value predicted by the combined predictor is verified to be a correct prediction, if the absolute value of the value obtained according to a preset summation formula is smaller than the threshold value theta, the threshold value theta is automatically reduced by 1, otherwise, the threshold value theta is unchanged; the threshold θ is self-increasing (to decrease the confidence of the next prediction) when the third predicted value predicted by the combined predictor is confirmed as a wrong prediction.
In step S4, a query index is generated according to the PC value, the third predicted value, and the confidence of the third predicted value corresponding to the branch instruction, and the final predicted value corresponding to the branch instruction is determined from a predetermined pattern history table using the query index.
According to one embodiment of the invention, a predetermined pattern history table stores historical branch conditions indicating corresponding branch instructions for respective query indexes via a saturation counter; it is equivalent to finally constructing a predetermined pattern history table consisting of the corresponding query index and the corresponding saturation counter to further provide more effective information to improve the accuracy of branch prediction. The branch prediction method comprises the following steps: determining a final predicted value corresponding to the branch instruction from the count value in the corresponding saturation counter based on the query index corresponding to the corresponding branch instruction; and updating a saturation counter corresponding to the query index associated with the branch instruction according to the corresponding final predicted value after the branch result of the branch instruction is obtained. According to an embodiment of the present invention, the update of the saturation counter corresponding to the query index may adopt a general update mode, that is: before the maximum or minimum numerical value which can be recorded by the saturation counter is not reached, the count value of the saturation counter is updated according to the branch result corresponding to the branch instruction every time, wherein if the branch result is a jump, the count value is +1, and otherwise, the count value is-1.
According to one embodiment of the invention, the low order to the high order of the query index are obtained by sequentially concatenating the third predicted value, the confidence of the third predicted value, and 0-6 bits of the PC value. For example, the query index is represented as:
index 0 =sign(combinar_sum)
index 2:1 =SumType
index 9:3 =PC 6:0
wherein sign (combinar _ sum) represents a third predicted value, sumType represents the confidence of the third predicted value, and PC 6:0 Indicating bits 0-6 in the PC value to which the branch instruction corresponds. sign (·) represents a sign function, when the combinar _ sum is more than or equal to 0, the prediction is jump, and 1 is output, otherwise, the prediction is not jump, and 0 is output.
The inventor conducts experiments by running spec2006 benchmark on a simulator, the average conditional branch accuracy of the TAGE predictor occupying 64k of storage overhead is 89.2%, and the average conditional branch accuracy of the GEHL predictor is 88.9%. The branch prediction method of the invention combines the intermediate parameters and the predicted values of the two existing predictors, and the accuracy of the obtained third predicted value is improved to 93.0%. It can be seen that the method of the present invention effectively reduces the index address conflict and improves the accuracy of branch prediction.
In order to further improve the accuracy of branch prediction, the prediction value of a perceptron can be added. According to an embodiment of the invention, the branch prediction method further comprises: acquiring a fourth predicted value obtained by a preset perceptron predictor through branch prediction on a branch instruction according to records of Global History (usually called Global History) and local History (usually called Branch History)) of the branch instruction; and generating a query index according to the PC value, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value corresponding to the branch instruction, and determining a final predicted value corresponding to the branch instruction from a preset mode history table based on the query index. According to one embodiment of the present invention, a preset perceptron predictor comprises: the global history perceiving machine is used for providing a perception value which is obtained by perceiving the segmentation based on the global history and indicates the branch direction, and the perception value is obtained by training the global history of recording the branch result of all the branch instructions; the local history perceiving machine is used for providing a perception value which is obtained by perceiving based on the segmentation of the local history and indicates the branch direction, and the perception value is obtained by training the local history of the branch result of the specified branch instruction; and the fourth predicted value is obtained according to the perception value of the global historical perception machine and the perception value of the local historical perception machine. The technical scheme of the embodiment can at least realize the following beneficial technical effects: the invention provides further information by utilizing the fourth predicted value predicted by the perceptron predictor according to the global history and the local history, and can further improve the accuracy of branch prediction.
According to one embodiment of the present invention, any one of the global history perceptron and the local history perceptron is structured as: the perceptron comprises a bias vector table and a plurality of weight vector tables (each corresponding to a weight vector table) arranged for different segments of the history (the global history perceptron corresponds to the global history, and the local history perceptron corresponds to the local history), wherein the perceptron is configured to: hashing the PC value of the branch instruction to obtain a hash index, indexing a corresponding offset vector from an offset vector table according to the hash index, indexing a corresponding weight vector from a corresponding weight vector table according to the hash index obtained by hashing the PC value of the branch instruction and different historical segments, and obtaining a plurality of weight vectors; and summing the offset vector, the indexed multiple weight vectors and the preset mean shift to obtain a perception value of the perceptron. Wherein the perceptron is configured to update the bias vector in the following manner: if the branch result appears once, the corresponding offset vector is increased by 1, otherwise, the offset vector is decreased by 1; the perceptron is configured to update the weight vector in the following manner: when the branch direction indicated by a hash index and the weight vector corresponding to the historical segment is the same as the branch result, the weight vector is increased by 1 toward the current indicated branch direction, otherwise, the weight vector is decreased by 1. Such as: and when the weight vector corresponding to one hash index and the historical segment is greater than or equal to 0, indicating that the indicated branch direction is a jump, and otherwise, indicating that the branch direction is not a jump. It should be understood that the different value indexes of the same history segment are located differently, for example, for simplicity: assuming that the hash index is 11010014 and the length of each historical segment is 2 bits, there are four cases of 00, 01, 10 and 11 for the same historical segment, and four different index values, 1101001400, 1101001401, 1101001410 and 1101001411, are respectively formed with the hash index, and corresponding weight vectors are respectively indexed from four positions of the weight vector table. The technical scheme of the embodiment can at least realize the following beneficial technical effects: the invention can use the perceptron to correct the defect that the main predictor uses a short branch history when the number of cycles is larger, and adopts a history segmentation method, compared with a simple perceptron predictor, the invention can increase the usable history length and reduce the hardware overhead. For the sake of illustrating the principle, the following takes the global history aware as an example with reference to fig. 2, and illustrates the prediction steps thereof:
1. hashing (hash) the PC value of the branch instruction onto a hash index (hash _ index);
2. using hash index from offset vector table W 0 Find out the corresponding offset vector w 0 Indexing corresponding weight vectors from a weight vector table corresponding to each segment by using the Hash index and the segments of the global history to obtain a plurality of weight vectors; for example, assume that a historical segment is step, GHR [ step-1:0 ] in length]Indicating that the bits from 0 to step-1 in the global history are utilized, corresponding to the hash index of the PC value and GHR [ step-1:0 ]]From the weight vector table W 1 Weight vector w is derived from the cable 1 The index may be indexed by a hash of the PC value and GHR [2 × step-1]From the weight vector table W 2 Weight vector w is derived from the cable 2 … …, which may be indexed by a hash of the PC value and GHR [ n × step-1 (n-1) step]From the weight vector table W n Weight vector w is derived from the cable n
3. Calculating an output perception value y of the global history perception machine:
Figure BDA0003901318170000141
wherein, w 0 Representing an offset vector, w i Represents the ith weight vector, n represents the number of weight vectors,
Figure BDA0003901318170000142
indicating a predetermined mean shift. Assuming GWIDTH denotes the history length used and step denotes the length of the segment, then
Figure BDA0003901318170000143
The predetermined mean shift is
Figure BDA0003901318170000144
The process of updating the vector by the global history perceptron (the local history perceptron is similar, and only the history adopted is the local history) is the training process. All vectors are adjusted as follows:
1.w 0 if the branch result of the current branch instruction is a jump, corresponding to w 0 The value of (b) is increased by 1, otherwise, the value is decreased by 1;
2.w i if the branch direction indicated by a hash index and the weight vector corresponding to the historical segment is the same as the branch result, the weight vector is self-increased by 1 towards the current indicated branch direction, otherwise, the weight vector is self-decreased by 1.
The structure and the updating mode of the local history sensor are similar to those of the global history sensor, and the only difference is that the adopted history information is the local history, which is not described in detail herein.
In the case of introducing a perceptron predictor, referring to fig. 3, according to an embodiment of the present invention, the low order to the high order of the query index are obtained by sequentially concatenating the fourth predicted value, the third predicted value, the confidence of the third predicted value, and 0-5 bits of the PC value. For example, the query index is represented as:
index 0 =sign(perc_sum)
index 1 =sign(combinar_sum)
index 3:2 =SumType
index 9:4 =PC 5:0
wherein sign (perc _ sum) represents the fourth predicted value, sign (combinar _ sum) represents the third predicted value, sumType represents the confidence of the third predicted value, and PC 5:0 Indicating bits 0-5 in the PC value to which the branch instruction corresponds. perc _ sum represents the sum of the perception value of the global history perceptron and the perception value of the local history perceptron. sign (perc _ sum) indicates that when perc _ sum is greater than or equal to 0, the output fourth predicted value is 1; otherwise it is 0.
Through experiments, under the condition that the perceptron predictor (including the global history and the local history perceptron) is introduced, the branch prediction method provided by the invention can reduce the number of branch errors (MPKI) of each thousand instructions to 4.5, and the prediction accuracy is further increased to 94.2%.
It should be understood that the foregoing examples of sub-indexes and two specific query indexes are merely illustrative, and the present invention is not limited thereto, and those skilled in the art can utilize the principles of the present invention to adjust some of the used PC values, the first intermediate parameter, the first predicted value, the second intermediate parameter, and the designated bits in the second predicted value to achieve similar effects.
According to an embodiment of the present invention, there is provided a branch predictor using the branch prediction method described in the foregoing embodiment, including: the TAGE predictor is used for acquiring a first intermediate parameter and a first predicted value for performing branch prediction on the branch instruction; the GEHL predictor is used for acquiring a second intermediate parameter and a second predicted value for performing branch prediction on the branch instruction; the combined predictor is used for recombining and determining a plurality of sub-indexes according to a predetermined rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes; and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index. Preferably, the branch predictor further comprises: a perceptron predictor configured to: performing branch prediction on the branch instruction according to the global history and the local history of the branch instruction to obtain a fourth predicted value; and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table based on the query index. For brevity, the embodiments of the branch prediction method of the foregoing embodiments are provided as implementation details of the branch predictor, and are not described herein again.
According to an embodiment of the present invention, there is provided a processor including: the branch predictor of the foregoing embodiment is configured to perform branch prediction on a branch instruction to be predicted to determine a corresponding final predicted value; one or more processing units configured to speculatively execute corresponding executable instructions in the taken branch according to a final predicted value corresponding to the branch instruction by the branch predictor.
According to an embodiment of the present invention, there is provided an electronic apparatus including: one or more processors as described in the previous embodiments; and a memory, wherein the memory is to store executable instructions; the one or more processors are configured to execute respective executable instructions via execution.
It should be noted that, although the steps are described in a specific order, the steps are not necessarily performed in the specific order, and in fact, some of the steps may be performed concurrently or even in a changed order as long as the required functions are achieved.
The present invention may be a system, method and/or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions embodied therewith for causing a processor to implement various aspects of the present invention.
The computer readable storage medium may be a tangible device that retains and stores instructions for use by an instruction execution device. The computer readable storage medium may include, for example, but is not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing.
Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (12)

1. A branch prediction method for a processor, comprising:
acquiring a first intermediate parameter and a first predicted value of a TAGE predictor for performing branch prediction on a branch instruction;
acquiring a second intermediate parameter and a second predicted value of the GEHL predictor for performing branch prediction on the branch instruction;
utilizing a preset combined predictor to recombine and determine a plurality of sub-indexes according to a preset rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes;
and generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index.
2. The branch prediction method of claim 1, wherein the combined predictor is configured to:
setting a saturation counter indicating the historical branch condition of the corresponding sub-index aiming at the corresponding sub-index, and updating the saturation counter corresponding to the sub-index associated with the branch instruction after obtaining the branch result of the corresponding branch instruction;
and determining a third predicted value and the confidence of the third predicted value based on the sum of the count values in the corresponding saturation counters according to a plurality of sub-indexes corresponding to one branch instruction.
3. The branch prediction method of claim 2 wherein the pattern history table stores historical branch conditions indicative of corresponding branch instructions for respective lookup indices via a saturation counter;
the method comprises the following steps:
determining a final predicted value corresponding to the branch instruction from the count value in the corresponding saturation counter based on the query index corresponding to the corresponding branch instruction; and is
And updating a saturation counter corresponding to the query index associated with the branch instruction according to the corresponding final predicted value after the branch result of the branch instruction is obtained.
4. The branch prediction method of claim 1,
the first intermediate parameters comprise a providing item, a valid bit of the providing item and a candidate item corresponding to the branch prediction of the branch instruction by the TAGE predictor;
the second intermediate parameter comprises a summation result corresponding to branch prediction of the branch instruction by the GEHL predictor, and the summation result is a reference of the second prediction value determined by the GEHL predictor;
each sub-index is obtained by splicing the PC value corresponding to the branch instruction, the provided item, the valid bit of the provided item, the candidate item and the specified bit in the summation result according to a preset rule, and the specified bits utilized by any two sub-indexes are different.
5. The branch prediction method according to claim 4, the plurality of sub-indices comprising:
the first sub-index is obtained by splicing the second predicted value, the first predicted value and 0-7 bits of the PC value,
a second sub-index resulting from concatenation of significant bits providing the items, 0-2 bits of the candidate items, 0-2 bits providing the items, 0-2 bits of the PC value,
the third sub-index is obtained by splicing 0-4 bits of the summation result of the GEHL predictor and 0-4 bits of the PC value,
the fourth sub-index is obtained by splicing 0-4 bits of the summation result of the GEHL predictor, the second predicted value, the first predicted value and 0-2 bits of the PC value,
and the fifth sub-index is obtained by splicing the valid bit of the provided item, the 0-2 bits of the candidate item, the 0-2 bits of the provided item, the second predicted value, the first predicted value and the 0 bit of the PC value.
6. The branch prediction method according to claim 5, wherein the low order to the high order of the query index are obtained by concatenating the third prediction value, the confidence of the third prediction value, and 0-6 bits of the PC value.
7. The branch prediction method according to any one of claims 1-6, characterized in that the method further comprises:
acquiring a fourth predicted value obtained by a preset perceptron predictor through branch prediction on the branch instruction according to the global history and the local history of the branch instruction;
and generating a query index according to the PC value, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value corresponding to the branch instruction, and determining a final predicted value corresponding to the branch instruction from a preset mode history table based on the query index.
8. The branch prediction method of claim 8, wherein the preset perceptron predictor comprises:
the global history perceiving machine is used for providing a perception value which is obtained by perceiving the segmentation based on the global history and indicates the branch direction, and the perception value is obtained by training the global history of recording the branch result of all the branch instructions;
the local history perceiving machine is used for providing a perception value which is obtained by perceiving based on the segmentation of the local history and indicates the branch direction, and the perception value is obtained by training the local history of the branch result of the specified branch instruction;
and the fourth predicted value is obtained according to the perception value of the global historical perception machine and the perception value of the local historical perception machine.
9. A branch predictor using the branch prediction method of any one of claims 1-8, comprising:
the TAGE predictor is used for acquiring a first intermediate parameter and a first predicted value for performing branch prediction on the branch instruction;
the GEHL predictor is used for acquiring a second intermediate parameter and a second predicted value for performing branch prediction on the branch instruction;
the combined predictor is used for recombining and determining a plurality of sub-indexes according to a preset rule according to specified bits in the PC value, the first intermediate parameter, the first predicted value, the second intermediate parameter and the second predicted value corresponding to the branch instruction, and determining a corresponding third predicted value and a confidence coefficient of the third predicted value based on the recombined sub-indexes; and
and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value and the confidence coefficient of the third predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table by using the query index.
10. The branch predictor of claim 9, further comprising: a perceptron predictor configured to: performing branch prediction on the branch instruction according to the global history and the local history of the branch instruction to obtain a fourth predicted value;
and the final predictor is used for generating a query index according to the PC value corresponding to the branch instruction, the third predicted value, the confidence coefficient of the third predicted value and the fourth predicted value, and determining the final predicted value corresponding to the branch instruction from a preset mode history table based on the query index.
11. A processor, comprising:
a branch predictor configured to perform the branch prediction method of any one of claims 1-8 on a branch instruction to be predicted to determine a final predicted value corresponding to the branch instruction; or, it is the branch predictor of claim 9 or 10, for determining the final predicted value corresponding to the branch instruction to be predicted;
one or more processing units configured to speculatively execute corresponding executable instructions in the taken branch according to a final predicted value corresponding to the branch instruction by the branch predictor.
12. An electronic device, comprising:
one or more processors as claimed in claim 11; and
a memory, wherein the memory is to store executable instructions;
the one or more processors are configured to execute respective executable instructions via execution.
CN202211290962.6A 2022-10-21 2022-10-21 Branch prediction method applied to processor and branch predictor Pending CN115686639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211290962.6A CN115686639A (en) 2022-10-21 2022-10-21 Branch prediction method applied to processor and branch predictor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211290962.6A CN115686639A (en) 2022-10-21 2022-10-21 Branch prediction method applied to processor and branch predictor

Publications (1)

Publication Number Publication Date
CN115686639A true CN115686639A (en) 2023-02-03

Family

ID=85065777

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211290962.6A Pending CN115686639A (en) 2022-10-21 2022-10-21 Branch prediction method applied to processor and branch predictor

Country Status (1)

Country Link
CN (1) CN115686639A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117055961A (en) * 2023-08-15 2023-11-14 海光信息技术股份有限公司 Scheduling method and scheduling device for multithreading and processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117055961A (en) * 2023-08-15 2023-11-14 海光信息技术股份有限公司 Scheduling method and scheduling device for multithreading and processor

Similar Documents

Publication Publication Date Title
JP6796468B2 (en) Branch predictor
US5687360A (en) Branch predictor using multiple prediction heuristics and a heuristic identifier in the branch instruction
EP1851620B1 (en) Suppressing update of a branch history register by loop-ending branches
RU2447486C2 (en) Presentation of cycle transitions in transitions prehistory register using multiple bits
US7609582B2 (en) Branch target buffer and method of use
US8095777B2 (en) Structure for predictive decoding
MX2008016116A (en) Methods and apparatus for proactive branch target address cache management.
US8572358B2 (en) Meta predictor restoration upon detecting misprediction
US10162635B2 (en) Confidence-driven selective predication of processor instructions
CN109643237B (en) Branch target buffer compression
US20130152048A1 (en) Test method, processing device, test program generation method and test program generator
Farooq et al. Store-load-branch (slb) predictor: A compiler assisted branch prediction for data dependent branches
US20150277926A1 (en) Efficient Branch Predictor History Recovery In Pipelined Computer Architectures Employing Branch Prediction And Branch Delay Slots Of Variable Size
US7069426B1 (en) Branch predictor with saturating counter and local branch history table with algorithm for updating replacement and history fields of matching table entries
CN115686639A (en) Branch prediction method applied to processor and branch predictor
US10007524B2 (en) Managing history information for branch prediction
US6918033B1 (en) Multi-level pattern history branch predictor using branch prediction accuracy history to mediate the predicted outcome
US7010676B2 (en) Last iteration loop branch prediction upon counter threshold and resolution upon counter one
CN111258654B (en) Instruction branch prediction method
CN111078295B (en) Mixed branch prediction device and method for out-of-order high-performance core
US11010170B2 (en) Arithmetic processing apparatus which replaces values for future branch prediction upon wrong branch prediction
CN117234594A (en) Branch prediction method, electronic device and storage medium
US7428627B2 (en) Method and apparatus for predicting values in a processor having a plurality of prediction modes
US20040003213A1 (en) Method for reducing the latency of a branch target calculation by linking the branch target address cache with the call-return stack
GB2416412A (en) Branch target buffer memory array with an associated word line and gating circuit, the circuit storing a word line gating value

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination