CN115685728A - BMS master control verification system, method, electronic equipment and storage medium - Google Patents
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Abstract
The invention discloses a BMS (battery management system) master control verification system, a method, electronic equipment and a storage medium, wherein the BMS master control verification system comprises an upper computer, a first connector, a BMS master control and a data acquisition unit, the upper computer is connected with the BMS master control through the first connector, the data acquisition unit is respectively connected with the upper computer and the first connector, the upper computer generates first analog data according to received data analog instructions corresponding to BMS slave control or external equipment, and the first analog data is sent to the BMS master control through the first connector; data collector gathers BMS master control received data and sends the host computer as second analog data, through setting up the BMS master control, and adopts the host computer to simulate BMS from accuse, external equipment to BMS master control send data, then the host computer can contrast first analog data and second analog data to judge whether to prove that the BMS master control is invalid, not only consuming time few, saving consumables, the verification process is also simple.
Description
Technical Field
The invention relates to the technical field of battery management, in particular to a BMS (battery management system) master control verification system, a BMS master control verification method, electronic equipment and a storage medium.
Background
BMS master control can make statistics of voltage temperature system information or calculation SOC (State of charge), SOH (State of health) algorithm etc. that BMS slave control gathered, can also communicate with other external devices outside the BMS system, and when early detection BMS master control, the system framework of setting up need satisfy BMS system framework, just can verify effectively that the BMS master control is invalid.
However, when the BMS system framework is built, the voltage simulation board or the simulation battery core and the like need to be connected in a section by section, so that the workload is large, the consumed time is long, the consumed materials are more, the line sequence can be disordered, the battery core parameters in the BMS system need to be frequently debugged in the later stage, and the verification process is complicated.
Disclosure of Invention
The invention provides a BMS master control verification system, a BMS master control verification method, electronic equipment and a storage medium, and aims to solve the problems of large workload, long time consumption, more material consumption, complicated verification process and disordered line sequence when a constructed system framework is used for verifying BMS master control.
In a first aspect, the invention provides a BMS master control verification system, which comprises an upper computer, a first connector, a BMS master control and a data collector, wherein the upper computer is connected with the BMS master control through the first connector, the data collector is respectively connected with the upper computer and the BMS master control,
the upper computer is used for generating first simulation data according to the received data simulation instruction corresponding to the target object, and sending the first simulation data to the BMS main control through the first connector, wherein the target object comprises at least one of the BMS slave control and external equipment;
the data acquisition unit is used for acquiring data received by the BMS master control and sending the data to the upper computer as second analog data;
and the upper computer is also used for comparing the first simulation data with the second simulation data so as to judge and verify whether the BMS master control is invalid or not.
In a second aspect, the present invention provides a BMS master control verification method applied to the BMS master control verification system according to the first aspect, wherein the BMS master control verification system includes an upper computer, a first connector, a BMS master control and a data collector, the upper computer is connected with the BMS master control through the first connector, the data collector is respectively connected with the upper computer and the BMS master control, and the BMS master control verification method includes:
the upper computer generates first simulation data according to a received data simulation instruction corresponding to a target object, and sends the first simulation data to a BMS master controller through the first connector, wherein the target object comprises at least one of the BMS slave controller and external equipment;
the data collector collects data received by the BMS master control and sends the data to the upper computer as second analog data;
and the upper computer compares the first simulation data with the second simulation data to judge and verify whether the BMS master control is invalid or not.
In a third aspect, the present invention provides an electronic device, comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores a computer program executable by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the BMS master verification method according to the second aspect of the present invention.
In a fourth aspect, the present invention provides a computer-readable storage medium storing computer instructions for causing a processor to implement the BMS master verification method according to the second aspect of the present invention when executed.
The BMS master control verification system comprises an upper computer, a first connector, a BMS master control and a data acquisition unit, wherein the upper computer is connected with the BMS master control through the first connector; the data collector collects data received by the BMS master control and sends the data to the upper computer as second simulation data; the upper computer also compares the first simulation data with the second simulation data to judge and verify whether the BMS master control is invalid or not. Only has built the BMS master control among the BMS system in this embodiment, and adopt the host computer to simulate BMS slave control, external equipment is to BMS master control send data, then the host computer can judge whether the BMS master control is inefficacy through the first analog data that the contrast was sent and the second analog data that the BMS master control was received of monitoring, not only the work load is little, consuming time is few, practice thrift the consumptive material, when later stage debugging, can directly send the analog data that corresponds to the BMS master control by the host computer and verify whether the BMS master control is inefficacy, the verification process is simple.
It should be understood that the statements in this section are not intended to identify key or critical features of the embodiments of the present invention, nor are they intended to limit the scope of the invention. Other features of the present invention will become apparent from the following description.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a BMS master control verification system according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a connection relationship between a master controller and a slave controller of a BMS according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another BMS master verification system according to an embodiment of the present invention;
fig. 4 is a flowchart of a BMS master verification method according to a second embodiment of the present invention;
fig. 5 is a schematic structural diagram of an electronic device according to a third embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Fig. 1 is a schematic structural diagram of a BMS master control verification system according to an embodiment of the present invention, and as shown in fig. 1, the BMS master control verification system includes an upper computer 1, a first connector 21, a BMS master control 3, and a data collector 4, the upper computer 1 is connected to the BMS master control 3 through the first connector 21, that is, the upper computer 1 can communicate with the BMS master control 3, and the data collector 4 is connected to the upper computer 1 and the BMS master control 3, respectively.
In this embodiment, the BMS master and the BMS slave belong to two subsystems in the same BMS system, as shown in fig. 2, the BMS system belongs to a distributed BMS, the BMS master 3 is connected to a plurality of BMS slaves 5, and each BMS slave 5 serves as a battery cluster.
The BMS slave control is mainly used for monitoring and acquiring the information of the battery monomer, such as the voltage, the temperature and the like of the battery monomer, sending the acquired information to the BMS master control, and further performing battery heat management, abnormal alarm and the like. The BMS main control function comprises the collection of current and voltage data of a battery cluster, the detection of electric leakage, and the calibration of SOC (State of charge) and SOH (State of health) to be used as the basis of the subsequent charging and discharging management.
In addition to the BMS slave, the BMS master may communicate with other devices, such as a PCS (Power conversion system), an EMS (Energy management system), and the like. Therefore, in the present embodiment, the target object for information interaction with the BMS master includes at least one of the BMS slave and the external device. Specifically, before carrying out BMS master control verification, can compile the communication protocol of BMS master control and BMS slave control, BMS master control and external equipment into host computer software to when the host computer simulation BMS slave control and external equipment communicate with the BMS master control, ensure the accuracy of communication between BMS master control and the host computer.
The upper computer is used for generating first simulation data according to the received data simulation instruction corresponding to the BMS slave control and sending the first simulation data to the BMS master control through the first connector.
The upper computer can be software in a computer and can be developed based on Python, labview, C language and the like. The data simulation instruction may include first simulation data, and when the upper computer receives the data simulation instruction, the first simulation data is obtained from the data simulation instruction, or corresponding first simulation data may be set for each data simulation instruction, and the data simulation instruction and the first simulation data are stored in a memory of the upper computer in an associated manner, so that the upper computer may find the first simulation data corresponding to the data simulation instruction from the memory. The first analog data may include temperature, voltage, internal resistance, abnormality information, etc. of the battery when the target object is the BMS slave, and may include generator parameters, load parameters, etc. when the target object is the external device.
The first connector is a data transmission channel, the first connector may include a USB-CAN converter, a USB-serial converter, a network cable, and the like to meet different types of data and/or transmission requirements of different transmission channels, and accordingly, communication interfaces corresponding to the first connector, such as a CAN interface, an RS485 interface, and a TCP/IP interface, are respectively disposed on the upper computer and the BMS, wherein, in an optional embodiment of the present invention, the first analog data may also be a communication protocol, and the BMS main control may perform protocol verification on the communication protocol to obtain a verification result as the second analog data.
The host computer is connected with the BMS main control through first connector, and consequently, the host computer can send first analog data to the BMS main control through first connector, and first analog data is the analog data of BMS slave control, has simulated the process that BMS slave control sent data to BMS main control promptly.
And the data collector is used for collecting data received by the BMS master control and sending the data to the upper computer as second simulation data. In this embodiment, the data collector is connected to the BMS host, and the data collector may collect data received by the BMS host. In an optional example, the data collector may further be disposed on the first connector to collect data sent to the primary master control by the upper computer, and the data is used as second analog data and sent to the upper computer.
The upper computer is further used for comparing the first simulation data with the second simulation data to judge and verify whether the BMS master control is invalid or not. For example, the first analog data represents data of the BMS slave and the external device, the second analog data is data received by the BMS master, if the first analog data is the same as the second analog data, the first analog data represents that the BMS master can normally communicate with the BMS slave and the external device, and if the first analog data is different from the second analog data or the data amount is different from the second analog data, the first analog data represents that the BMS master has abnormal communication with the BMS slave and the external device. Furthermore, after the BMS master control is judged to be invalid, failure information can be generated, the second simulation data of BMS loss and errors can be included in the information under test, and staff can debug the BMS master control according to the failure information.
The BMS master control verification system comprises an upper computer, a first connector, a BMS master control and a data acquisition unit, wherein the upper computer is connected with the BMS master control through the first connector; the data collector collects data received by the BMS master control and sends the data to the upper computer as second simulation data; the upper computer also compares the first simulation data with the second simulation data to judge and verify whether the BMS master control is invalid or not. Only has built the BMS master control among the BMS system in this embodiment, and adopt the host computer to simulate BMS slave control, external equipment is to BMS master control send data, then the host computer can judge whether the BMS master control is inefficacy through the first analog data that the contrast was sent and the second analog data that the BMS master control was received of monitoring, not only the work load is little, consuming time is few, practice thrift the consumptive material, when later stage debugging, can directly send the analog data that corresponds to the BMS master control by the host computer and verify whether the BMS master control is inefficacy, the verification process is simple.
In an optional embodiment of the invention, the upper computer comprises a data simulation instruction analysis module and a first simulation data generation module, wherein the data simulation instruction comprises target object information and simulation parameters;
the data simulation instruction analysis module is used for analyzing a data simulation instruction corresponding to the target object to obtain target object information and simulation parameters and sending the target object information and the simulation parameters to the first simulation data generation module;
and the first simulation data generation module is used for generating first simulation data according to the target object information and the simulation parameters and sending the first simulation data to the BMS main control module.
The target object information may include a name, a number, a model number, etc. of the target object information, and the simulation parameter is a simulation parameter controlled by the BMS. Namely, target object information and simulation parameters are integrated in first simulation data, such as battery A, temperature 50 ℃, battery B, temperature 60 ℃; the upper computer may compare the target object information and the simulation parameters when determining whether the second simulation data received by the BMS is consistent with the data sent by the upper computer, and may also bind and compare the target object information and the simulation parameters.
In an alternative embodiment of the present invention, as shown in fig. 3, the BMS master control 3 includes a primary master control 31 and a secondary master control 32, the primary master control 31 is connected to the secondary master control 32 through a second connector 22, and the primary master control 31 is further connected to the upper computer 1 through a third connector 23;
the secondary master control is used for receiving first analog data sent by the upper computer through the first connector, processing the first analog data to obtain second analog data, and sending the second analog data to the primary master control through the second connector; the data acquisition unit is connected with the primary master control unit, and can acquire the received data of the primary master control unit as second analog data and send the second analog data to the upper computer; the upper computer can calculate the data throughput of the BMS main control by comparing the first simulation data sent to the secondary main control with the second simulation data sent by the primary main control, and judges whether the BMS main control fails or not according to the data throughput. In an optional example, the data collector may be further disposed on the second connector to collect data sent by the secondary master controller to the primary master controller, and the data is used as second analog data and sent to the upper computer.
The data throughput, that is, the sizes of the write data and the read data of the BMS master, may determine that the BMS master fails if there is a difference in the sizes of the write data and the read data. The second connector and the third connector may be CAN buses.
The BMS system can be divided into a secondary architecture and a tertiary architecture, wherein the secondary architecture comprises a BMS main control and a BMS slave control, the BMS main control of the tertiary architecture is divided into a primary main control and a secondary main control, which is equivalent to dividing the original BMS main control into two modules, and each module shares partial functions in the BMS main control.
The secondary master control collects various single battery information uploaded by the BMS slave control, such as temperature, voltage, current and the like, calculates and analyzes the SOC and SOH of the battery pack, and sends all the information to the primary master control. The secondary master control performs data processing on the first analog data to obtain second analog data, which may be the secondary master control collecting the first analog data to obtain the second analog data, and when the battery information of the first analog data is provided, the secondary master control may calculate the corresponding SOC or SOH according to the first analog data.
The primary master control is responsible for collecting various battery data, i.e. second analog data, uploaded by the secondary master control, and meanwhile, the primary master control may be further connected to external devices, such as a PCS (Power Conversion System), an EMS (Energy Manager System), and the like, and then the primary master control may send the second analog data to the external devices, such as the EMS, the PCS, and the like. In this embodiment, the external device is simulated by the upper computer, and the primary master controller may send the second simulation data to the upper computer through the third connector.
Specifically, the whole data transmission process is as follows: the upper computer simulates a BMS slave control to send first simulation data to a secondary master control, the secondary master control processes the data to obtain second simulation data and sends the second simulation data to a primary master control, and the primary master control sends the second simulation data to the upper computer, wherein the upper computer simulates external equipment at the moment. The host computer can compare whether the received second analog data is the same as the sent first analog data, and then can judge whether the BMS main control can normally communicate with the external equipment, and whether the data collected by the BMS slave control can be sent to the external equipment, if so, it indicates that the BMS main control function is normal, and if not, it indicates that the BMS main control is invalid.
In this embodiment, the host computer not only can simulate BMS slave control or external equipment and send first analog data to the BMS master control, can also simulate external equipment and receive the second analog data that BMS master control sent, need not to set up BMS slave control and external equipment, has practiced thrift the consumptive material, has also simplified system architecture.
In an optional embodiment of the present invention, the BMS master control includes at least one cell, each cell corresponds to one cell number, the first analog data includes cell data,
the upper computer is also used for sending the battery cell data to the BMS main control through the first connector, and the battery cell data comprises battery cell numbers and battery cell parameters; the BMS master control system also comprises a battery cell data acquisition module and a battery cell parameter writing module, wherein the battery cell data acquisition module is used for acquiring a battery cell number and a battery cell parameter from the received battery cell data. And the battery cell parameter writing module is used for writing the battery cell parameters into the battery cells corresponding to the battery cell numbers. Namely, come to BMS master control through the host computer and send the setting data relevant with electric core to carry out parameter setting to electric core, need not the parameter of artifical each electric core of regulation, simplified the debugging process of BMS system.
In an optional embodiment of the invention, the upper computer and the BMS master control store the same cell characteristic table, the cell characteristic table includes cell characteristic data and battery performance information matched with the cell characteristic data, the first simulation data includes the cell characteristic data,
the upper computer is also used for sending the battery cell characteristic data to the BMS main control through the first connector, and searching battery performance information matched with the battery cell characteristic data from the battery cell characteristic table according to the battery cell characteristic data, wherein the battery performance information comprises SOC and SOH and serves as first performance data; the BMS main control system also comprises a battery performance information searching module, wherein the battery performance information searching module is used for searching battery performance information matched with the battery core characteristic data from the battery core characteristic table as second performance data based on the received battery core characteristic data and sending the second performance data to an upper computer; the upper computer is also used for determining that the BMS master control fails when the first performance data and the second performance data are different.
The BMS master control has the function of calculating and analyzing battery performance information of the battery pack, different battery cores generally have different battery core characteristic data, and the battery core characteristic data can be data which can be used for determining the battery performance information, such as voltage, temperature, internal resistance and the like. By comparing the first performance data with the second performance data, whether the battery performance information matched with the battery core characteristic data can be found in the BMS main control or not can be checked, and whether the data searching function of the BMS main control is normal or not can be determined. In addition, the formula for calculating the battery performance information according to the battery core characteristic data can be set in the BMS main control, and whether the data calculation function of the BMS main control is normal or not can be verified.
In an alternative embodiment of the present invention, as shown in fig. 3, the BMS master verification system further includes a power module 6, and the power module 6 is connected to the BMS master 3. The power module 6 supplies power to the BMS main control 3.
Example two
Fig. 4 is a BMS master control verification method provided in the second embodiment of the present invention, which can be used for verifying the function of a built BMS master control, and can be applied to a BMS master control verification system in the first embodiment, where the BMS master control verification system includes an upper computer, a first connector, a BMS master control and a data collector, the upper computer is connected to the BMS master control through the first connector, and the data collector is respectively connected to the upper computer and the BMS master control, as shown in fig. 4, the BMS master control verification method includes:
s401, the upper computer generates first simulation data according to the received data simulation instruction corresponding to the target object, and sends the first simulation data to the BMS main control through the first connector.
Wherein the target object includes at least one of a BMS slave and an external device;
s402, the data collector collects data received by the BMS master control and sends the data to the upper computer as second analog data;
and S403, the upper computer compares the first simulation data with the second simulation data to judge whether the BMS master control is invalid or not.
In an optional embodiment of the present invention, the data simulation instruction includes target object information and simulation parameters, and the generating of the first simulation data according to the received data simulation instruction corresponding to the target object includes:
the upper computer analyzes the data simulation instruction corresponding to the target object to obtain target object information and simulation parameters; and generating first simulation data according to the target object information and the simulation parameters and sending the first simulation data to the BMS main control.
In an alternative embodiment of the present invention, the BMS master includes a primary master and a secondary master, the primary master is connected with the secondary master through a second connector,
the secondary master control receives first analog data sent by the upper computer through the first connector, performs data processing on the first analog data to obtain second analog data, and sends the second analog data to the primary master control through the second connector;
the data acquisition unit acquires second analog data of the received data of the primary master control, and the second analog data is used as second analog data and is sent to the upper computer;
and the upper computer calculates the data throughput of the BMS master control according to the first simulation data and the second simulation data, and judges whether the BMS master control fails according to the data throughput.
On the basis of the last alternative embodiment, the primary master controller is also connected with the upper computer through a third connector,
and the primary master control sends the second analog data to the upper computer through the third connector.
In an optional embodiment of the present invention, the BMS master control includes at least one cell, each cell corresponds to one cell number, the first analog data includes cell data,
the upper computer sends the battery cell data to the BMS main control through the first connector, and the battery cell data comprises battery cell numbers and battery cell parameters;
the BMS main control acquires the cell number and the cell parameters from the received cell data; and writing the cell parameters into the cell corresponding to the cell serial number.
In an optional embodiment of the invention, the upper computer and the BMS master control store the same cell characteristic table, the cell characteristic table includes cell characteristic data and battery performance information matched with the cell characteristic data, the battery performance information includes SOC and SOH, the first analog data includes the cell characteristic data,
the upper computer sends the battery cell characteristic data to a BMS main control through the first connector, and battery performance information matched with the battery cell characteristic data is searched from a battery cell characteristic table according to the battery cell characteristic data and is used as first performance data;
the BMS master control searches battery performance information matched with the battery core characteristic data from the battery core characteristic table based on the received battery core characteristic data to serve as second performance data, and sends the second performance data to the upper computer;
and the upper computer determines that the BMS master control fails when the first performance data and the second performance data are different.
In an optional embodiment of the present invention, the BMS master verification system further includes a power module connected to the BMS master.
The BMS master control verification method of the embodiment can be applied to the BMS master control verification system provided by the first embodiment, so that the BMS master control verification method has corresponding beneficial effects. It should be noted that, as for the method embodiment, since it is basically similar to the system embodiment, the description is relatively simple, and for the relevant points, reference may be made to partial description of the system embodiment.
EXAMPLE III
FIG. 5 illustrates a schematic diagram of an electronic device 40 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 5, the electronic device 40 includes at least one processor 41, and a memory communicatively connected to the at least one processor 41, such as a Read Only Memory (ROM) 42, a Random Access Memory (RAM) 43, and the like, wherein the memory stores a computer program executable by the at least one processor, and the processor 41 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 42 or the computer program loaded from the storage unit 48 into the Random Access Memory (RAM) 43. In the RAM 43, various programs and data necessary for the operation of the electronic apparatus 40 can also be stored. The processor 41, the ROM 42, and the RAM 43 are connected to each other via a bus 44. An input/output (I/O) interface 45 is also connected to bus 44.
A number of components in the electronic device 40 are connected to the I/O interface 45, including: an input unit 46 such as a keyboard, a mouse, or the like; an output unit 47 such as various types of displays, speakers, and the like; a storage unit 48 such as a magnetic disk, an optical disk, or the like; and a communication unit 49 such as a network card, modem, wireless communication transceiver, etc. The communication unit 49 allows the electronic device 40 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
In some embodiments, the BMS master verification method may be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as the storage unit 48. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 40 via the ROM 42 and/or the communication unit 49. When the computer program is loaded into the RAM 43 and executed by the processor 41, one or more steps of the BMS master verification method described above may be performed. Alternatively, in other embodiments, processor 41 may be configured to perform the BMS master verification method by any other suitable means (e.g., by way of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be performed. A computer program can execute entirely on a machine, partly on a machine, as a stand-alone software package partly on a machine and partly on a remote machine or entirely on a remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the Internet.
The computing system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical host and VPS service are overcome.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired results of the technical solution of the present invention can be achieved.
The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A BMS master control verification system is characterized by comprising an upper computer, a first connector, a BMS master control and a data collector, wherein the upper computer is connected with the BMS master control through the first connector, the data collector is respectively connected with the upper computer and the BMS master control,
the upper computer is used for generating first simulation data according to a received data simulation instruction corresponding to a target object, and sending the first simulation data to the BMS master control through the first connector, wherein the target object comprises at least one of BMS slave control and external equipment;
the data acquisition unit is used for acquiring data received by the BMS master control and sending the data to the upper computer as second analog data;
and the upper computer is also used for comparing the first simulation data with the second simulation data so as to judge and verify whether the BMS master control is invalid or not.
2. The BMS host control verification system according to claim 1, wherein said upper computer comprises a data simulation instruction parsing module and a first simulation data generating module, said data simulation instruction comprising target object information and simulation parameters;
the data simulation instruction analysis module is used for analyzing a data simulation instruction corresponding to the target object to obtain target object information and simulation parameters and sending the target object information and the simulation parameters to the first simulation data generation module;
and the first simulation data generation module is used for generating first simulation data according to the target object information and the simulation parameters and sending the first simulation data to the BMS main control.
3. The BMS master verification system of claim 1, wherein the BMS master comprises a primary master and a secondary master, the primary master being connected to the secondary master through a second connector,
the secondary master control is used for receiving the first analog data sent by the upper computer through the first connector, performing data processing on the first analog data to obtain second analog data, and sending the second analog data to the primary master control through the second connector;
the data collector collects data received by the primary master control, and the data is used as the second analog data and is sent to the upper computer;
and the upper computer is also used for calculating the data throughput of the BMS master control according to the first simulation data and the second simulation data and judging whether the BMS master control fails or not according to the data throughput.
4. The BMS master verification system of claim 3, wherein said primary master is further connected to said upper computer through a third connector,
the primary master control is used for sending the second analog data to the upper computer through the third connector.
5. The BMS master verification system of any of claims 1 to 4, wherein the BMS master comprises at least one cell, the first analog data comprises cell data,
the upper computer is further used for sending the battery cell data to the BMS main control through the first connector, the battery cell data comprise battery cell numbers and battery cell parameters, and each battery cell corresponds to one battery cell number;
the BMS master control further includes:
the battery cell data acquisition module is used for acquiring a battery cell number and battery cell parameters from the received battery cell data;
and the battery cell parameter writing module is used for writing the battery cell parameters into the battery cells corresponding to the battery cell numbers.
6. The BMS master verification system of any of claims 1 to 4, wherein the upper computer and the BMS master have the same cell characteristic table stored therein, wherein the cell characteristic table comprises cell characteristic data and battery performance information matched with the cell characteristic data, wherein the first analog data comprises the cell characteristic data,
the upper computer is also used for sending the battery cell characteristic data to the BMS main control through the first connector, and searching battery performance information matched with the battery cell characteristic data from the battery cell characteristic table according to the battery cell characteristic data to serve as first performance data;
the BMS master control further includes:
the battery performance information searching module is used for searching battery performance information matched with the battery core characteristic data from the battery core characteristic table based on the received battery core characteristic data to serve as second performance data, and sending the second performance data to the upper computer;
and the upper computer is also used for determining that the BMS master control fails when the first performance data and the second performance data are different.
7. The BMS host control verification system of any one of claims 1-4, further comprising a power module connected to the BMS host control.
8. The BMS master control verification method is characterized by being applied to a BMS master control verification system, wherein the BMS master control verification system comprises an upper computer, a first connector, a BMS master control unit and a data acquisition unit, the upper computer is connected with the BMS master control unit through the first connector, the data acquisition unit is respectively connected with the upper computer and the BMS master control unit, and the BMS master control verification method comprises the following steps:
the upper computer generates first simulation data according to a received data simulation instruction corresponding to a target object, and sends the first simulation data to a BMS master controller through the first connector, wherein the target object comprises at least one of the BMS slave controller and external equipment;
the data collector collects data received by the BMS master control and sends the data to the upper computer as second analog data;
and the upper computer compares the first simulation data with the second simulation data to judge and verify whether the BMS master control is invalid or not.
9. An electronic device, characterized in that the electronic device comprises:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores a computer program executable by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the BMS master authentication method of claim 8.
10. A computer-readable storage medium storing computer instructions for causing a processor to implement the BMS master verification method of claim 8 when executed.
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