CN115679286A

CN115679286A - Selective passivation and selective deposition

Info

Publication number: CN115679286A
Application number: CN202210891880.0A
Authority: CN
Inventors: J.W.梅斯; M.E.吉文斯; S.P.霍卡; V.帕鲁丘里; I.J.拉伊杰马克斯; 邓少任; A.伊利贝里; E.E.托伊斯; D.朗格里; C.德泽拉; M.图米恩
Original assignee: ASM IP Holding BV
Current assignee: ASM IP Holding BV
Priority date: 2021-07-30
Filing date: 2022-07-27
Publication date: 2023-02-03
Also published as: KR20230019044A; TW202311556A

Abstract

Methods of selective deposition are provided. A material is selectively deposited on the first surface of the substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from the gas phase reactant on the first surface relative to the second surface. The layer of interest is selectively deposited on the second surface from a gas phase reactant relative to the first surface. The first surface may be metallic and the second surface is dielectric. Thus, materials such as dielectric transition metal oxides and nitrides can be selectively deposited on metal surfaces relative to dielectric surfaces using the techniques described herein.

Description

Selective passivation and selective deposition

Incorporated by reference into any priority application

This application is a continuation-in-part application of U.S. patent application No. 16/588,600 filed on 30.9.2019, which in turn claims the benefit of U.S. provisional patent application No. 62/805,471 filed on 14.2.2019 and U.S. provisional patent application No. 62/740,124 filed on 2.10.2018, both of which are incorporated herein by reference in their entirety.

Technical Field

The present disclosure generally relates to selectively depositing a material on a first surface of a substrate relative to a second surface of a different material composition.

Background

The shrinking device dimensions in semiconductor fabrication requires new innovative processing methods. Traditionally, patterning in semiconductor processing involves subtractive processes in which a capping layer is deposited, masked by photolithographic techniques, and etched through openings in a mask. Additive patterning is also known, wherein a masking step precedes the deposition of the material of interest, for example using lift-off techniques or damascene processes. In most cases, expensive multi-step lithographic techniques are used for patterning.

Patterning can be simplified by selective deposition, which is of increasing interest in semiconductor manufacturers. Selective deposition is very beneficial in various aspects. It is worth noting that it can reduce the number of photolithography steps and reduce the processing cost. Selective deposition can also promote scaling in narrow structures, for example, by enabling bottom-up filling. Electrochemical deposition is a form of selective deposition in that metals can be selectively formed on conductive elements. Chemical Vapor Deposition (CVD) and Atomic Layer Deposition (ALD) are surface sensitive technology vapor deposition techniques and have therefore been investigated as good candidates for selective deposition. Selective ALD is proposed, for example, in U.S.6,391,785.

One of the challenges of selective deposition is that the selectivity of the deposition process is often insufficient to achieve the selectivity target. Surface pre-treatments can sometimes be used to inhibit or promote deposition on one or both surfaces, but typically such treatments themselves require photolithography to perform the treatment or to remain only on the surface to be treated.

Therefore, more practical methods are needed to achieve selective deposition.

Disclosure of Invention

In one aspect, a method of selective deposition on a second surface of a substrate relative to a first surface of the substrate is provided, wherein the first and second surfaces have different compositions. The method sequentially comprises the following steps: forming an inhibitor layer selectively from the gas-phase reactant on the first surface relative to the second surface; baking the inhibitor layer; and selectively depositing a layer of interest from the gas phase reactant on the second surface opposite the passivation layer.

In some embodiments, the method further comprises treating the first and second surfaces prior to selectively forming the inhibitor layer. In some embodiments, the method includes wherein the processing includes exposing the substrate to a plasma. In some embodiments, the treatment includes exposing the substrate to a silane, such as an alkyl aminosilane. In some embodiments, the treating comprises exposing the substrate to N- (trimethylsilyl) dimethylamine (TMSDMA) or trimethylchlorosilane. In some embodiments, the method further comprises cleaning the second surface to remove any inhibitor after selectively forming the inhibitor layer. In some embodiments, the method includes wherein the cleaning includes treating with a hydrogen plasma. In some embodiments, baking includes heating the substrate to a temperature of about 300 to 400 ℃.

In some embodiments, the method further comprises cleaning the first and second surfaces after selectively depositing the layer of interest. In some embodiments, cleaning comprises treating the surface with a hydrogen plasma. In some embodiments, the method further comprises wherein selectively forming the inhibitor layer comprises selectively vapor depositing an organic layer on the first surface. In some embodiments, the organic layer is a polyimide layer.

In some embodiments, the layer of interest is selectively deposited by an atomic layer deposition process. In some embodiments, the first surface comprises a metal or metallic material and the second surface comprises a dielectric material.

In some embodiments, the layer of interest comprises a metal oxide. In some embodiments, the metal oxide comprises zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, yttrium oxide, lanthanum oxide, or other transition metal oxides, or mixtures thereof. In some embodiments, the metal oxide comprises a dielectric transition metal oxide. In some embodiments, the metal oxide comprises aluminum oxide. In some embodiments, a composition comprising Trimethylaluminum (TMA), dimethylaluminum chloride, aluminum trichloride (AlCl) is used ₃ ) Aluminum precursors of dimethylaluminum isopropoxide (DMAI) or Triethylaluminum (TEA) to deposit aluminum oxide. In some embodiments, the alumina is deposited using an aluminum precursor comprising an alkylaluminum compound comprising two different alkyl groups as ligands. In some embodiments, the aluminum oxide is deposited using an aluminum precursor having one alkyl ligand and two alkoxy ligands. In some embodiments, the use includes AlMe (OMe) ₂ 、AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、AlEt(OEt) ₂ 、AlEt(OiPr) ₂ And AlEt (OtBu) ₂ The aluminum precursor of one or more of (a) deposits aluminum oxide. In some embodiments, the aluminum oxide is deposited using an aluminum precursor comprising one or more acetic acid ligands. For example, in some embodiments, the aluminum precursor comprises aluminum triacetate. In some embodiments, aluminum oxide is deposited using an aluminum precursor comprising a heteroleptic aluminum compoundThe heteroleptic aluminum compounds comprise an alkyl group and another ligand, such as a halide, e.g., cl. In some embodiments, the aluminum compound is deposited using an aluminum precursor comprising a metalorganic aluminum compound or an organometallic aluminum compound.

In some embodiments, the layer of interest comprises a metal nitride. In some embodiments, the metal nitride is titanium nitride. In some embodiments, the material is removed from the TiCl by a vapor deposition process ₄ And NH ₃ And depositing titanium nitride.

In another aspect, a cluster tool is provided for selectively depositing a layer of interest on a second surface of a substrate relative to a first surface of the substrate, wherein the first and second surfaces have different compositions. The combination tool comprises: a first module configured to pre-process a substrate; a second module configured to process the substrate with plasma; a third module configured for vapor depositing an inhibitor on the first surface of the substrate relative to the second surface of the substrate; and a fourth module configured for vapor deposition of a layer of interest.

In another aspect, a system for selectively depositing a dielectric on a second surface of a substrate relative to a first surface of the substrate is provided. The system comprises: a first chamber configured for selective deposition of an organic passivation layer and partial etch back of the organic passivation layer; and a second chamber configured for selective deposition of a dielectric on the second surface relative to the first surface of the substrate.

In another aspect, a system for selectively depositing a film of interest on a second surface of a substrate relative to a first surface of the substrate is provided. The system comprises: a first chamber configured for pre-processing a substrate and an etching process; a second chamber configured for selective deposition of an organic passivation layer; and a third chamber configured for selectively depositing a film of interest on the second surface of the substrate relative to the first surface of the substrate.

In some embodiments, the third chamber is further configured for a baking process. In some embodiments, the system further comprises a fourth chamber configured for a baking process.

Drawings

Fig. 1A is a schematic cross-sectional view of a portion of a substrate having first and second surfaces of different compositions according to a first embodiment.

Fig. 1B is a cross-sectional view of the substrate of fig. 1A after selective passivation of the first surface.

Fig. 1C is a cross-sectional view of the substrate of fig. 1B after selective deposition on a second surface.

Fig. 1D is a cross-sectional view of the substrate of fig. 1C after removal of passivation material from the first surface.

Fig. 2A is a schematic cross-sectional view of a portion of a substrate having first and second surfaces of different compositions, according to a second embodiment, with a passivation barrier material formed on the second surface.

Fig. 2B is a cross-sectional view of the substrate of fig. 2A after selective passivation of the first surface.

Fig. 2C is a cross-sectional view of the substrate of fig. 2B after removing the passivation barrier material from the second surface.

Fig. 2D is a schematic cross-sectional view of the substrate of fig. 2C after selective deposition on a second surface.

Fig. 2E is a cross-sectional view of the substrate of fig. 2D after removing passivation material from the first surface.

Fig. 3A is a schematic cross-sectional view of the substrate of fig. 2D after selective deposition of further material on the second surface, according to a third embodiment.

Fig. 3B is a schematic cross-sectional view of the substrate of fig. 3A after removing passivation material from the first surface.

Fig. 4A is a flow chart generally illustrating a process of selectively depositing an organic passivation layer.

Fig. 4B is a flow diagram generally illustrating an Atomic Layer Deposition (ALD) process for selectively depositing an organic layer.

FIG. 5 is a schematic diagram of an apparatus configured for selective deposition of a polymer layer and in-situ etch back from an undesired surface.

Fig. 6 is an overall process flow diagram of selective deposition of a dielectric layer on a second surface after selective passivation of the first surface with an organic material according to an embodiment.

Fig. 7 is a flow chart of a schematic cross section of a portion of a substrate utilizing first and second surfaces having different compositions and generally illustrating the effect of the degree of etch back on the passivation material on the relationship of the formed dielectric layer and the first and second surface interfaces.

Fig. 8 is a flow chart of a schematic cross section of a portion of a substrate utilizing first and second surfaces having different compositions and generally illustrating the effect of passivation layer thickness on the relationship of the formed dielectric layer to the interface of the first and second surfaces.

Fig. 9 is a flow chart of a schematic cross-section of a portion of a substrate utilizing first and second surfaces having different compositions and generally illustrating the effect of dielectric thickness on the relationship of the formed dielectric layer to the interface of the first and second surfaces.

FIG. 10A is a cross-sectional view of a portion of a substrate having first and second surfaces of different compositions, with a passivation layer and a dielectric layer selectively deposited thereon, respectively.

Fig. 10B is a schematic cross-sectional view of a portion of a substrate having first and second surfaces of different compositions, wherein the first surface is recessed relative to the second surface, and a passivation layer and a dielectric layer are selectively deposited thereon, respectively.

Fig. 10C is a schematic cross-sectional view of a portion of a substrate having first and second surfaces of different compositions, wherein the first surface is elevated relative to the second surface and a passivation layer and a dielectric layer are selectively deposited thereon, respectively.

Fig. 10D is a schematic cross-sectional view of a portion of a substrate having first and second surfaces of different compositions, wherein the first surface is recessed relative to the second surface and a passivation layer and a dielectric layer are selectively deposited thereon, respectively.

FIG. 11A is a schematic cross-sectional view of a portion of a substrate with embedded metal features.

Fig. 11B is a schematic cross-sectional view of the substrate of fig. 11A after forming a metal cap to define a first surface.

Fig. 11C is a schematic cross-sectional view of the substrate of fig. 11B after selective passivation deposition and etch back, leaving a passivation film over the metal cap, with an edge of the metal cap exposed.

FIG. 11D is a cross-sectional view of the substrate shown in FIG. 11C after selective deposition of a dielectric material on the low-k surface of the substrate, wherein the deposited dielectric material is resistant to etching by the low-k material and overlaps the metal cap.

Fig. 11E is a schematic cross-sectional view of the substrate of fig. 11D after the passivation layer is removed.

Figure 12A is a flow chart showing a schematic cross section of a portion of a substrate having first and second surfaces of different composition and generally illustrating selective passivation of the first surface, etch back in a manner that leaves the passivation overlapping the second surface, and selective deposition of a dielectric etch mask over the remainder of the second surface.

Fig. 12B is a schematic cross-sectional view of the substrate of fig. 12A with the passivation layer removed, leaving a gap between the first surface and the dielectric etch mask, the exposed low-k material in the gap selectively etched, and deposited to leave an air gap in the substrate.

Fig. 13 is a flow chart illustrating a selective deposition process flow.

Figure 14 is a flow chart illustrating a process flow for selective deposition on three-dimensional structures such as trenches or vias.

Detailed Description

Methods and apparatus for selectively depositing material on a second surface relative to a first surface are disclosed, wherein the first and second surfaces have a material difference. For example, one of the surfaces may comprise a metallic material, while the other surface may comprise an inorganic dielectric material. In embodiments described herein, an organic passivation layer is selectively deposited on the first surface relative to the second surface. In some embodiments, the first surface is metallic and the second surface is dielectric; in other embodiments, the first surface is a dielectric and the second surface is metallic. Subsequently, a layer of interest is selectively deposited on the second surface opposite the organic passivation layer. In some embodiments, the layer of interest may be Al ₂ O ₃ And (3) a layer. In some embodiments, the layer of interest may be a TiN layer. Additional layers may be selectively deposited on the second layer relative to the organic passivation layerOn the layer of interest on both surfaces.

In one embodiment, the first surface comprises a metal surface, such as an elemental metal or metal alloy, and the second surface comprises an inorganic dielectric surface, such as a low-k material. Examples of low-k materials include silicon oxide-based materials, including grown or deposited silicon dioxide, doped and/or porous oxides, native oxides on silicon, and the like. A polymeric passivation layer is selectively deposited on the metal surface relative to the inorganic dielectric surface. Subsequently, the layer of interest is selectively deposited on the inorganic dielectric surface. The layer of interest may include a metal element. Examples of layers of interest include dielectrics, such as zirconia (e.g., zrO) ₂ ) Hafnium oxide (e.g., hfO) ₂ ) Alumina (e.g., al) ₂ O ₃ ) Titanium nitride (e.g., tiN) and titanium oxide (e.g., tiO) ₂ ). Methods are provided for selectively depositing such materials on silica-based surfaces relative to polymer surfaces.

In a second embodiment, the first surface comprises an inorganic dielectric surface, such as a low-k material, and the second surface comprises a metal surface, such as an elemental metal or metal alloy. Examples of low-k materials include silicon oxide-based materials, including grown or deposited silicon dioxide, doped and/or porous oxides, native oxides on silicon, and the like. A polymeric passivation layer is deposited on the inorganic dielectric surface selectively to the metal surface. Prior to depositing the polymeric passivation layer, the metal surface may be provided with a passivation barrier layer, such as a self-assembled monolayer (SAM). The passivation barrier layer facilitates selective deposition of a polymer on the inorganic dielectric surface, and can thereafter be removed to allow selective deposition of a layer of interest on the metal surface relative to the polymer passivation layer. The layer of interest may include a metal element. Examples of layers of interest include metal layers (see, e.g., us patent No. 8,956,971, granted on month 2, 17, 2015 and us patent No. 9,112,003, granted on month 8, 18, 2015), metal nitride layers (e.g., titanium nitride), and metal oxide layers (e.g., zirconium oxide, hafnium oxide, titanium oxide, and aluminum oxide). Methods for selectively depositing such materials on metal surfaces relative to polymeric surfaces are provided.

In a third embodiment, the process of the second embodiment is performed to provide a layer of interest on a metal surface selectively to a polymer passivated inorganic dielectric surface. Thereafter, another layer of interest is selectively deposited on the layer of interest while the polymer remains passivating the inorganic dielectric surface. For example, the layer of interest may include a metal layer, while the additional layer of interest includes a metal oxide layer (e.g., zirconium oxide, hafnium oxide, titanium oxide). Methods for selectively depositing such materials on metal surfaces relative to polymeric surfaces are provided.

After selective deposition of the layer of interest on the second surface, the polymeric passivation layer may be removed from the first surface. For example, an oxidation process may selectively remove the polymer material. The conditions are chosen to avoid damage to surrounding materials on the substrate.

Embodiments are also provided for controlling the edge profile and edge location of a selected deposition layer relative to other features on a substrate, such as the boundary between underlying metal and dielectric surfaces. Thus, control of the relative positioning of the edges of the selection layer is provided without the need for expensive lithographic patterning. Applications of such control are illustrated, including examples of selecting layers to overlap with the deposition minimized material; selecting an example in which the layer is formed with a gap spacing between the layer and the deposition-minimized material; and examples of selecting edges of a layer to align with a boundary between two different underlying materials.

Surface of the substrate

According to some aspects of the present disclosure, selective deposition may be used to deposit a film of interest on a second surface opposite the first surface. The two surfaces may have different material properties that allow for selective formation of organic materials thereon, such as selective deposition of a polymer layer on the first surface relative to the second surface, which in turn allows for subsequent selective deposition of a layer of interest on the second surface relative to the organic passivated first layer.

For example, in the embodiments described herein, one surface may be a conductive (e.g., metal or metallic) surface of the substrate, while the other surface may be a non-conductive (e.g., inorganic dielectric) surface of the substrate. In some embodiments, the non-conductive surface comprises-OH groups, such as a silicon oxide-based surface (e.g., low-k materials, including grown and deposited silicon oxide materials and native oxides on silicon). In some embodiments, the non-conductive surface may additionally include an-H terminus, such as an HF-impregnated Si or HF-impregnated Ge surface. In such an embodiment, the surface of interest would be considered to include the-H end and the material below the-H end.

For any of the examples above, the difference in material between the two surfaces allows the vapor deposition process to selectively deposit an organic passivation layer on the first surface relative to the second surface. In some embodiments, cyclic vapor deposition is used, for example, a cyclic CVD or Atomic Layer Deposition (ALD) process is used. In some embodiments, the selectivity of the organic passivation layer may be achieved without passivating/blocking agents on the surface to accept fewer organic layers; and/or without a catalyst on the surface to receive more organic layers. For example, in embodiments where the first surface is a metal and the second surface is a dielectric, the polymer may be selectively deposited directly on the metal surface as opposed to an inorganic dielectric surface. In other embodiments, where the first surface is dielectric and the second surface is metallic, the second surface is first treated to inhibit polymer deposition thereon. For example, a passivation barrier self-assembled monolayer (SAM) may be first formed on a metal surface to facilitate selective deposition of a polymer passivation layer on a dielectric surface, such as an inorganic dielectric surface, relative to a second metal surface covering the SAM. After completion of the selective deposition of the organic passivation, a material of interest, such as a metal oxide or metal layer, may be further selectively deposited on the unpassivated second surface relative to the passivated first surface.

For embodiments in which one surface comprises a metal and the other surface does not, unless otherwise specified, if a surface is referred to herein as a metal surface, it can be a metal surface or a gold-property surface. In some embodiments, metal or metallicThe surface may comprise a metal, a metal oxide and/or mixtures thereof. In some embodiments, the metal or metallic surface may include surface oxidation. In some embodiments, the metal or metallic material of the metal or metallic surface is electrically conductive with or without surface oxidation. In some embodiments, the metal or metallic surface comprises one or more transition metals. In some embodiments, the metallic or metallic surface comprises one or more of Al, cu, co, ni, W, nb, fe, or Mo. In some embodiments, the metallic surface comprises titanium nitride. In some embodiments, the metal or metallic surface comprises one or more noble metals, such as Ru. In some embodiments, the metallic or metallic surface comprises a conductive metal oxide, nitride, carbide, boride or combinations thereof. For example, the metal or metallic surface may include RuO _x 、NbC _x 、NbB _x 、 NiO _x 、CoO _x 、NbO _x 、MoO _x 、WO _x 、WNC _x One or more of TaN or TiN.

In some embodiments, the metallic or metallic surface comprises cobalt (Co), copper (Cu), tungsten (W), or molybdenum (Mo). In some embodiments, the metallic or metallic surface may be any surface capable of accepting or cooperating with the first or second precursor used in the selective deposition process of the organic passivation layer or layer of interest, as described herein, depending on the embodiment.

In some embodiments, an organic passivation material (e.g., polyimide) is selectively deposited on a metal surface, such as a Co, cu, W, or Mo surface. In some embodiments, the selective deposition of the organic passivation material on the metal surface is performed at about

Recycle to about

Circulation, about

Recycle to about

Circulation, about

Per cycle about

Per cycle or about

Recycle to about

The growth rate per cycle occurs. In some embodiments, the growth rate of the organic passivation material on the metal surface is greater than about

Per cycle, greater than about

Per cycle, greater than about

Per cycle, greater than about

Cycle, and in some embodiments, the upper limit of the growth rate is less than about

Circulation, less than about

Circulation, less than about

Per cycle or less than about

And/or circulation. In some embodiments, the selectivity of the metal surface relative to the second surface is maintained at these growth rates.

In some embodiments, the organic passivation material is selectively deposited on the metal oxide surface relative to other surfaces. The metal oxide surface may be, for example, WO _x 、TiO _x A surface. In some embodiments, the metal oxide surface is an oxidized surface of a metallic material. In some embodiments, the metal oxide surface is formed by using an oxygen composition, such as comprising O ₃ 、H ₂ O、H ₂ O ₂ 、O ₂ Oxygen atoms, plasma or from a composition of radicals or mixtures thereof to oxidize at least the surface of the metallic material. In some embodiments, the metal oxide surface is a native oxide formed on the metal material.

In some embodiments, the second surface may comprise a metal surface including a passivation barrier layer thereover. That is, in some embodiments, the second surface can include a metal surface that includes a material that inhibits deposition of a passivation layer thereon, such as a self-assembled monolayer (SAM).

In some embodiments, the organic passivation material is selectively deposited on the first metal oxide surface relative to the second dielectric surface, which is an oxidized surface of the metal material.

In some embodiments, one of the first and second surfaces is a metallic or metallic surface of the substrate and the other surface is a dielectric surface of the substrate. The term dielectric is used in the description herein to distinguish it simply from another surface, i.e., a metal or metallic surface. Those skilled in the art will appreciate that not all non-conductive surfaces are dielectric surfaces, and instead, not all metallic surfaces are conductive. For example, a metallic or metallic surface may comprise an oxidized metal surface that is non-conductive or has a very high resistivity. The selective deposition process taught herein can deposit on such non-conductive metallic surfaces with minimal deposition on the passivated dielectric surface, and a similar selective deposition process can deposit on the dielectric surface with minimal deposition on the passivated non-conductive metallic surface.

In some embodiments, the substrate may be pretreated or cleaned before or at the beginning of the selective deposition process. In some embodiments, the substrate may be subjected to a plasma cleaning process prior to or at the beginning of the selective deposition process. In some embodiments, the plasma cleaning process may not include ion bombardment, or may include a relatively small amount of ion bombardment. For example, in some embodiments, the substrate surface may be exposed to plasma, radicals, excited species, and/or atomic species before or at the beginning of the selective passivation layer deposition process. In some embodiments, the substrate surface may be exposed to a hydrogen plasma, radicals, or atomic species before or at the beginning of the selective passivation layer deposition process.

In some embodiments, a non-plasma pretreatment process is performed. For example, in some embodiments, the substrate surface may be exposed to a silicon reactant, such as N- (trimethylsilyl) dimethylamine (TMSDMA) or trimethylchlorosilane. The reactants may be provided in a single long pulse or in a sequence of multiple shorter pulses. In some embodiments, the reactants are provided in 1 to 25 pulses for about 1 to about 60 seconds. Between pulses, the reaction chamber may be purged with an inert gas. The purging may, for example, last about 1 to 30 seconds.

In some embodiments, the surface is combined with a compound of formula (R) ^I ) ₃ Si(NR ^II R ^III ) In which R is ^I Is a linear or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl group, R ^II Is a linear or branched C1-C5 alkyl, linear or branched C1-C4 alkyl or hydrogen, and R ^III Is a linear or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl group.

In some embodiments, the surface has the formula (R) ^I ) ₃ Silane contact of SiA, wherein R ^I Is a linear or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl group, anda is any ligand that reacts with a silicon-containing surface. That is, the silane is bound to the surface through ligand a, or ligand a forms a bond with the surface, but then ligand a may migrate away from the surface and/or the silane.

The temperature of the pretreatment process may be, for example, about 100 to about 300 ℃. The pressure during the pretreatment process may be, for example, about 10 deg.f ^-5 To about 760 torr, or in some embodiments, about 1 to 10 torr or about 0.1 to about 10 torr. In some embodiments, the pre-treatment or cleaning process may be performed in situ, i.e., in the same reaction chamber as the selective deposition process. However, in some embodiments, the pretreatment or cleaning process may be performed in a separate reaction chamber. In some embodiments, the reaction chamber in which the pretreatment process is performed is part of a cluster tool, including one or more additional reaction chambers. For example, such a cluster tool may include additional reaction chambers for depositing inhibitors, etching, and/or depositing films of interest. In some embodiments, the cluster tool includes separate modules for pre-treatment, inhibitor deposition, post deposition plasma cleaning (etching) of inhibitors, deposition of layers of interest, and post plasma deposition cleaning. In some embodiments, the same module may be used for two or more processes. For example, the same module may be used for plasma cleaning after pretreatment, deposition of inhibitors, and deposition of a layer of interest. In some embodiments, a cluster tool includes a first pre-treatment module, a plasma cleaning module, an inhibitor deposition module, and a module for depositing a layer of interest.

Selectivity is

One skilled in the art will appreciate that selective deposition may be fully selective or partially selective. The partial selectivity process may produce a fully selective layer by a post-deposition etch that removes all deposited material from surface B, but not all deposited material from surface a. Selective deposition does not require full selectivity in order to obtain the desired benefits, because a simple etch-back process can leave a fully selective structure without the need for expensive masking processes.

The selectivity of the deposition on surface a relative to surface B can be given as a percentage calculated by [ (deposition on surface a) - (deposition on surface B) ]/(deposition on surface a). Deposition can be measured in any of a variety of ways. For example, deposition may be given as a measured thickness of the deposited material, or may be given as a measured amount of the deposited material. In embodiments described herein, selective deposition of the organic passivation layer may be performed on the first surface (a) relative to the second surface (B). Subsequently, a layer of interest is deposited selectively on the second surface (a) with respect to the organic passivation layer (B) on the first surface.

In some embodiments, the selectivity of the selective deposition of the passivation layer on the first surface (relative to the second surface) and/or the selectivity of the layer of interest on the second surface (relative to the passivation layer on the first surface) is greater than about 10%, greater than about 50%, greater than about 75%, greater than about 85%, greater than about 90%, greater than about 93%, greater than about 95%, greater than about 98%, greater than about 99%, or even greater than about 99.5%. In the embodiments described herein, the selectivity of the organic passivation layer deposition may vary with the duration or thickness of the deposition. Surprisingly, for the vapor phase polymer layer deposition described herein, it has been found that selectivity increases with increasing deposition duration. In contrast, typical selective deposition based on differential nucleation on different surfaces tends to decrease in selectivity with increasing deposition duration or thickness.

In some embodiments, the deposition occurs only on the first surface and not on the second surface. In some embodiments, the deposition on surface a of the substrate has a selectivity of at least about 80% relative to surface B of the substrate, which may be sufficient selectivity for some particular applications. In some embodiments, the deposition on surface a of the substrate has at least about 50% selectivity relative to surface B of the substrate, which may be sufficient selectivity for some particular applications. In some embodiments, the deposition on surface a of the substrate has a selectivity of at least about 10% relative to surface B of the substrate, which may be selective enough for some particular applications. Those skilled in the art will appreciate that the partial selectivity process may produce a fully selective structural layer by a post-deposition etch that removes all of the deposited material from surface B, but not all of the deposited material from surface a. In addition, post-deposition etching may also help to customize the location and/or profile of the selectively deposited layer.

In some embodiments, the thickness of the organic layer deposited on the first surface of the substrate can be less than about 50 nanometers, less than about 20 nanometers, less than about 10 nanometers, less than about 5 nanometers, less than about 3 nanometers, less than about 2 nanometers, or less than about 1 nanometer, while the ratio of material deposited on the first surface of the substrate relative to the second surface of the substrate can be greater than or equal to about 200: 1, greater than or equal to about 100: 1, greater than or equal to about 50: 1, greater than or equal to about 25: 1, greater than or equal to about 20: 1, greater than or equal to about 15: 1, greater than or equal to about 10: 1, greater than or equal to about 5: 1, greater than or equal to about 3: 1, or greater than or equal to 2:1.

in some embodiments, the selectivity of the selective deposition processes described herein may depend on the material composition of the material defining the first and/or second surface of the substrate. For example, in some embodiments, the first surface comprises a BTA passivated Cu surface and the second surface comprises a natural or chemical silica surface, optionally greater than about 8: 1 or greater than about 15: 1. In some embodiments, when the first surface comprises a metal or metal oxide and the second surface comprises a natural or chemical silica surface, the selectivity can be greater than about 5: 1 or greater than about 10: 1.

Selective deposition on dielectrics

Fig. 1A-1D schematically illustrate a first embodiment of selectively passivating a first surface relative to a second surface, followed by selective deposition on the second surface relative to the passivated first surface. In the illustrated embodiment, the first surface comprises a metallic material; the second surface comprises an inorganic dielectric material; and the material of interest deposited on the second surface comprises a dielectric material.

Fig. 1A shows a substrate having a materially different exposed surface. For example, the first surface may include or be defined by a metal such as cobalt (Co), copper (Cu), tungsten (W), or molybdenum (Mo). The second surface may comprise or be defined by an inorganic dielectric such as a low k layer (typically a silicon oxide based layer) or a silicon surface with a native oxide (also a form of silicon oxide) formed thereon.

Fig. 1B shows the substrate of fig. 1A after selective deposition of a passivation layer on the first surface. For example, the passivation layer may be a polymer layer selectively deposited on the metallic surface of the first layer. A method for selectively depositing a polymer layer by a vapor deposition technique is disclosed in U.S. patent application No. 15/170, 769, filed on 1/6/2016, the entire disclosure of which is incorporated herein by reference. Further information and examples of selective deposition of polymer layers for use as passivation layers are provided below.

In some embodiments, the selectively deposited polymer is a polyimide. In some embodiments, the deposited polymer is a polyamide. Other examples of deposited polymers include dimers, trimers, polyurea layers, polythiophene polyurethanes, polythioureas, polyesters, polyimines, other polymeric forms, or mixtures of the foregoing materials. Vapor deposited organic materials include polyamic acids, which can be precursors for polymer formation. The selectively deposited layer may be a mixture comprising a polymer and a polyamic acid, which mixture will be considered a polymer for purposes of this disclosure.

In some embodiments, the selective deposition of a polymer, such as polyimide, on a first metal-containing surface, such as a copper surface, is performed at a rate of about

Recycle to about

Circulation, about

Recycle to about

Circulation, about

Recycle to about

Per cycle or about

Recycle to about

The growth rate per cycle occurs. In some embodiments, the growth rate of a polymer, such as polyimide, on a first metal-containing surface, such as Cu, is greater than about

Per cycle, greater than about

Per cycle, greater than about

Per cycle, greater than about

A growth rate of less than about at the upper end in some embodiments

Circulation, less than about

Circulation, less than about

Per cycle or less than about

And/or circulation. In some embodiments, selectivity is maintained at these growthsAt a rate of speed.

In some embodiments, the selective deposition of polyimide on the copper surface is performed at about

Recycle to about

Circulation, about

Recycle to about

Circulation, about

Recycle to about

Per cycle or about

Recycle to about

Growth rate per cycle. In some embodiments, the growth rate of the polyimide on the Cu surface is greater than about

Per cycle, greater than about

Per cycle, greater than about

Per cycle, greater than about

A growth rate of less than about at the upper end in some embodiments

Circulation, less than about

Circulation, less than about

Per cycle or less than about

And/or circulation. In some embodiments, selectivity is maintained at these growth rates.

As described above, any organic material deposited on the second surface (in this example, an inorganic dielectric surface) may be removed by an etch-back process. In some embodiments, an etching process after selective deposition of the organic layer may remove the deposited organic material from both the first surface and the second surface of the substrate. In some embodiments, the etching process may be isotropic.

In some embodiments, the etching process may remove the same amount or thickness of material from the first and second surfaces. That is, in some embodiments, the etch rate of the organic material deposited on the first surface may be substantially similar to the etch rate of the organic material deposited on the second surface. Due to the selective nature of the deposition processes described herein, the amount of organic material deposited on the second surface of the substrate is significantly less than the amount of material deposited on the first surface of the substrate. Thus, the etching process may completely remove the deposited organic material from the second surface of the substrate, while the deposited organic material may remain on the first surface of the substrate. A suitable process for etching the polymer is described below with reference to fig. 1D.

Fig. 1C shows the substrate of fig. 1B after selective deposition of a layer of interest X on a second surface (in this example an inorganic dielectric surface) relative to a passivation layer on the first surface (in this example a metallic surface). The layer of interest X may be a dielectric material, such as a metal oxide, e.g. zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, yttrium oxide, lanthanum oxide or other transition metal oxides or mixtures thereof. In some embodiments, the metal oxide is a dielectric transition metal oxide, or a mixture of dielectric transition metal oxides. In some embodiments, the layer of interest X may be a metal nitride, such as titanium nitride. Methods for selective deposition of such metal oxide layers by vapor deposition techniques using hydrophobic precursors to aid selectivity with respect to organic passivation layers are disclosed in U.S. provisional patent application No. 62/332, 396, filed 5/2016, the entire disclosure of which is incorporated herein by reference. Further information and examples of selective deposition of metal oxides and other layers of interest are provided below.

As described above, any X material deposited on the passivation layer on the first surface may be removed by an etch-back process. Because the layer of interest is selectively deposited on the second surface, any X material remaining on the passivated surface will be thinner than the passivation layer formed on the metallic surface. Thus, the etch-back process can be controlled to remove all X material on the passivation layer without removing all layers of interest from the dielectric surface. Repeating the selective deposition and etch back in this manner results in an increase in the thickness of the X material on the dielectric in each cycle of deposition and etching. Repeated selective deposition and etch back in this manner may also result in an increase in the overall selectivity of the X material over the dielectric, as each cycle of deposition and etch leaves a clean passivation layer on which selective X deposition nucleates very little. Optionally, in a lift-off process, any X material may be removed during subsequent removal of the passivation layer, example conditions of which are described below with reference to fig. 1D. As is known in the art, the lift-off process removes overlying material by removing underlying material through undercuts. Any X material formed on the passivation layer in a short selective deposition process tends to be discontinuous, allowing the etchant to access the underlying material to be removed. The lift-off etch does not require complete removal of the passivation layer to remove all unwanted X material from the passivation layer surface, so that a direct etch or lift-off process can be used to remove X material from the passivation layer surface in a cyclic selective deposition and removal.

Fig. 1D shows the substrate of fig. 1C after the passivation layer is removed from the first surface. In some embodiments, the etching process may include exposing the substrate to a plasma. In some embodiments, the plasma may include oxygen atoms, oxygen radicals, oxygen plasma, or a combination thereof. In some embodiments, the plasma may include hydrogen atoms, hydrogen radicals, hydrogen plasma, or combinations thereof (see, e.g., example 2 below for selective deposition of a passivation layer). In some embodiments, the plasma may also include a noble gas species, such as an Ar or He species. In some embodiments, the plasma may consist essentially of a rare gas species. In some cases, the plasma may include other species, such as nitrogen atoms, nitrogen radicals, nitrogen plasma, or combinations thereof. In some embodiments, the etching process may include exposing the substrate to an etchant comprising oxygen, such as O ₃ . In some embodiments, the substrate may be exposed to the etchant at a temperature between about 30 ℃ and about 500 ℃, or between about 100 ℃ and about 400 ℃. In some embodiments, the etchant may be supplied in one continuous pulse, or may be supplied in multiple shorter pulses. As described above, in the complete removal of the passivation layer or the partial removal of the passivation layer in the cyclical selective deposition and removal, the passivation layer removal can be used to strip any remaining X material from the passivation layer.

As noted above, in some embodiments, O ₃ (e.g. O) ₃ /N ₂ ) May be used in an etching process to remove the organic passivation layer. In some embodiments, the etching process may be performed at a substrate temperature of about 20 ℃ to about 500 ℃. In some embodiments, the etching process may be performed at a substrate temperature of about 50 ℃ to about 300 ℃. In some embodiments, the etching process may be performed at a substrate temperature of about 100 ℃ to about 250 ℃. In some embodiments, the etching process may be performed at a substrate temperature of about 125 ℃ to about 200 ℃. In some embodiments, the etching process may be performed at a rate of about 0.05 nm/min to about 50.0 nm/min. In some embodiments, the etching process may be at about 0.1 nm/minTo a rate of about 5.0 nm/min. In some embodiments, the etching process may be performed at a rate of about 0.2 nm/min to about 2.5 nm/min. In some embodiments for single wafer or small lot (e.g., 5 wafers or less) processing, low O may be used ₃ Concentration etch process with low O ₃ The concentration etch process is performed at 0.01 torr to 200 torr or approximately 0.1 torr to 100 torr (e.g., 2 torr). The etchant pulse may be between 0.01 and 20 seconds, between 0.05 and 10 seconds, or between 0.1 and 2 seconds (e.g., 0.5 second pulse/0.5 second O) ₃ Cleaning). O is ₃ The flow rate may range from 0.01slm to 1slm, or from 0.01slm to 0.250slm. Inert (e.g. N) ₂ ) The carrier gas flow may range from 0.1slm to 20slm, or from 0.5slm to 5slm (e.g., 1.2 slm). In some embodiments, high O may be used ₃ Concentration etch process in which O is high ₃ The concentration etch process is performed at 1-100 torr or 5-20 torr (e.g., 9 torr) with longer exposure per cycle. For example, O ₃ The exposure time may be between 0.1 and 20 seconds, or between 0.5 and 5 seconds (e.g., 1 second pulse/1 second O) ₃ Cleaning). Such high O ₃ Oxygen of concentration process ₃ The flow rate may be between 0.1slm and 2.0slm, or between 0.5slm and 1.5slm (e.g., 750 sccm), inert (e.g., N ₂ ) The dilution flow is 0.1slm to 20slm, or 0.5slm to 5slm (e.g., 1.2 slm).

In some embodiments, a baking step may be performed after etching. The baking may be performed in the same reactor in which the organic material is deposited, in the same reactor in which the etching process is performed, in the same reactor in which the layer of interest is to be subsequently deposited, or may be performed in a separate reactor from one or more aspects of the process. In some embodiments, the baking process is performed in a reaction chamber that is part of the cluster tool, and the substrate is moved into one or more different reaction chambers of the cluster tool for additional processing after baking.

In some embodiments, the substrate is baked for a period of about 1 to about 15 minutes. In some embodiments, the substrate is baked at a temperature of about 200 ℃ to about 500 ℃. In some embodiments, the baking step comprises two or more steps, wherein the substrate is baked at a first temperature for a first period of time and then at a second temperature for a second period of time.

Additional treatments, such as thermal or chemical treatments, may be performed before, after, or between the aforementioned processes. For example, the treatment may modify the surface or remove portions of the metal, silicon oxide, polymer passivation, and metal oxide surfaces exposed at various stages of the process. In some embodiments, the substrate may be pretreated or cleaned prior to or at the beginning of the selective deposition process. In some embodiments, the substrate may be subjected to a plasma cleaning process prior to or at the beginning of the selective deposition process. In some embodiments, the plasma cleaning process may not include ion bombardment, or may include a relatively small amount of ion bombardment. For example, in some embodiments, the substrate surface may be exposed to plasma, radicals, excited species, and/or atomic species before or at the beginning of the selective deposition process. In some embodiments, the substrate surface may be exposed to a hydrogen plasma, radicals, or atomic species prior to or at the beginning of the selective deposition process. In some embodiments, the pre-treatment or cleaning process may be performed in the same reaction chamber as the selective deposition process, however in some embodiments, the pre-treatment or cleaning process may be performed in a separate reaction chamber.

Selective deposition on metals

Fig. 2A-2E illustrate a second embodiment for selectively passivating a first surface relative to a second surface, followed by selective deposition on the second surface relative to the passivated first surface. In the illustrated embodiment, the first surface comprises an inorganic dielectric material; the second surface comprises a metallic surface; and the material of interest deposited on the second surface comprises a dielectric material or a metal.

Fig. 2A shows a substrate similar to that of fig. 1A, with a materially different surface. However, for this embodiment, the surface is described in reverse terms. In particular, the second surface may comprise or be defined by a metallic material such as cobalt (Co), copper (Cu), tungsten (W) or molybdenum (Mo). The first surface may comprise an inorganic dielectric such as a low-k layer (typically a silicon oxide based layer) or a silicon surface having a native oxide (also a form of silicon oxide) formed thereon. A passivation barrier is formed on the second surface. Note that the term "blocking" does not mean that the subsequent selective deposition of the passivation layer is completely blocked by the passivation barrier layer. In contrast, the passivation barrier layer on the second surface need only inhibit deposition of the passivation layer to have a lower growth rate relative to the growth rate on the first surface.

In one embodiment, the passivation barrier layer includes a self-assembled monolayer (SAM). The SAM may be selectively formed on the second (metallic) surface and not on the first (dielectric) surface. Advantageously, it has been found that sulfur-containing SAMs effectively minimize the deposition of passivation layers thereon.

Fig. 2B shows the selective formation of a passivation layer (e.g., an organic passivation layer) on the first surface, in this case the inorganic dielectric layer, relative to the passivation barrier layer on the second surface. The vapor deposition process described herein is capable of depositing polymer on inorganic dielectrics, and may even deposit selectively (i.e., at different deposition rates) on different types of silicon oxide, as described in the above-incorporated patent application No. 15/170,769 filed on 6/1/2016. In this embodiment, the sulfur-containing SAM inhibits the polymer from being deposited thereon, and thus the polymer may be selectively formed on the first surface and may act as a passivation layer to prevent subsequent deposition.

Fig. 2C shows the substrate of fig. 2B after removal of the passivation barrier layer from the second surface. For example, the sulfur-containing SAM material may be removed by performing a heat treatment at a temperature lower than a temperature at which a polymer layer such as polyimide is removed. Thus, the passivation layer is selectively left on the first surface, while the second surface is exposed. The structure is similar to that of fig. 1B, except that in this embodiment the first passivation surface is an inorganic dielectric and the second surface is a metallic surface.

Fig. 2D shows the substrate of fig. 2C after selective deposition of a layer of interest X on the second surface relative to the passivation layer on the first surface. As mentioned in relation to the first embodiment, and described in the above-incorporated provisional patent application No. 62/332, 396, filed 5/2016, the vapor deposition technique may be used to selectively deposit metal oxides on a number of different surfaces, the hydrophobic precursor assisting the selectivity with respect to the organic passivation layer. Further information and examples of selective deposition of metal oxides and other layers of interest are provided below.

Alternatively, the layer of interest X is a metal layer. U.S. patent nos. 8,956,971, issued on day 17, 2, 2015 and U.S. patent No. 9,112,003, issued on day 18, 8, 2015, the entire disclosures of which are incorporated herein by reference, teach processes for the selective deposition of metallic materials on metallic surfaces relative to other material surfaces, including organic surfaces.

Fig. 2E shows the substrate of fig. 2D after removal of the passivation layer from the first surface, leaving a dielectric over the selectively formed metal or metal over the metal. The passivation layer may be removed as described above in relation to the first embodiment, e.g. by O ₃ The etching is removed.

Fig. 3A-3B illustrate a third embodiment of selective passivation of a first surface relative to a second surface, followed by selective deposition on the second surface relative to the passivated first surface. In the illustrated embodiment, the process of FIGS. 2A-2D is performed first.

Fig. 3A shows the substrate of fig. 2D after further selective deposition. In the case where the layer of interest X is a metallic material, further selective deposition may form a dielectric material as the second layer of interest Y on the first layer of interest selectively with respect to the organic passivation layer. As described above with respect to the first and second embodiments, and in the above-incorporated provisional patent application No. 62/332, 396 filed 5/2016, the vapor deposition technique may be used to selectively deposit metal oxides on a variety of different surfaces, with the hydrophobic precursor contributing to the selectivity relative to the organic passivation layer. Further information and examples of selective deposition of metal oxides and other layers of interest are provided below.

Fig. 3B shows the substrate of fig. 3A after removal of the passivation layer from the first surface, leaving the selectively formed dielectric on the metal. The passivation layer may be removed as described above in relation to the first embodiment, e.g. by O ₃ The etching is removed.

As with the first embodiment, the second and third embodiments may include additional treatments, such as thermal or chemical treatments, before, after, or between the aforementioned processes.

Selective deposition of passivation layers

Vapor deposition techniques can be applied to organic passivation layers and polymers such as polyimide layers, polyamide layers, polyurea layers, polyurethane layers, polythiophene layers, etc., as disclosed in the incorporated U.S. patent application No. 15/170,769 filed on 6/1/2016. CVD of the polymer layer may result in better thickness control, mechanical flexibility, conformal coverage, and biocompatibility than application of liquid precursors. The sequential deposition process of polymers can produce high growth rates in small research scale reactors. Similar to CVD, sequential deposition processes can result in better thickness control, mechanical flexibility, and conformality. The terms "sequential deposition" and "cyclical deposition" are used herein in the context of processes in which substrates are exposed alternately or sequentially to different precursors, regardless of whether the reaction mechanism is similar to ALD, CVD, MLD, or a mixture thereof.

Referring to fig. 4A, in some embodiments, a substrate comprising a first surface and a second surface is provided at block 11. As described herein, the first and second surfaces may have different material properties. In some embodiments, the first surface may be a conductive surface, such as a metal or metallic surface, and the second surface may be a dielectric surface (see, e.g., fig. 1A-1D). In some embodiments, the first surface may be a dielectric surface and the second surface may be a different second dielectric surface. In some embodiments, the first surface may be a dielectric surface, such as a silicon oxide-based material, and the second surface may be a passivation barrier material, such as a SAM (see, e.g., fig. 2A-3B).

In some embodiments, the first precursor may be vaporized at a first temperature to form a first vapor phase precursor. In some embodiments, the first precursor vapor is delivered to the substrate at the second temperature through the gas line. In some embodiments, the second transport temperature is higher than the first evaporation temperature. In some embodiments, the substrate is contacted with a first vapor phase precursor or reactant for a first exposure time at block 12. In some embodiments, the substrate may be contacted with the first vapor phase precursor at a third temperature that is higher than the first temperature.

In some embodiments, the first precursor exposure period is from about 0.01 seconds to about 60 seconds, from about 0.05 seconds to about 30 seconds, from about 0.1 seconds to about 10 seconds, or from about 0.2 seconds to about 5 seconds. The optimal exposure time can be readily determined by one skilled in the art on a case-by-case basis. In some embodiments where a batch reactor may be used, an exposure time of greater than 60 seconds may be employed.

In some embodiments, in block 13, the substrate is contacted with a second vapor phase precursor or reactant for a second exposure period. In some embodiments, the second precursor may be vaporized at a fourth temperature to form a second vapor phase precursor. In some embodiments, the second reactant vapor is delivered to the substrate through the gas line at a second temperature. In some embodiments, the fifth transport temperature is higher than the first evaporation temperature. In some embodiments, the substrate may be contacted with the second vapor precursor at a sixth temperature that is higher than the fourth temperature. In some embodiments, the sixth temperature may be substantially the same as the third temperature at which the first vapor precursor contacts the substrate.

In some embodiments, the second precursor exposure period is from about 0.01 seconds to about 60 seconds, from about 0.05 seconds to about 30 seconds, from about 0.1 seconds to about 10 seconds, or from about 0.2 seconds to about 5 seconds. The optimal exposure time can be readily determined by one skilled in the art on a case-by-case basis. In some embodiments, where an intermittent reactor may be used, an exposure time of greater than 60 seconds may be employed.

In block 14, an organic layer is selectively deposited on the first surface relative to the second surface. Those skilled in the art will appreciate that the selective deposition of the organic layers is a result of the contacting acts 12-13 described above, and not a result of the separating acts. In some embodiments, the contacting action (blocks 12-13) described above may be considered a deposition cycle. This selective deposition cycle may be repeated until a sufficient thickness of layer is left on the substrate (block 15) and the deposition is complete (block 16). The selective deposition cycle may include additional actions that need not be performed in the same order or identically in each iteration, and may be readily extended to more complex vapor deposition techniques. For example, a selective deposition cycle may include an additional reactant supply process, such as supplying and removing (relative to the substrate) additional reactants in each cycle or selected cycles. Although not shown, the process may additionally include treating the deposited layer to form a polymer (e.g., UV treatment, annealing, etc.). As described above, the selectively formed organic layer may serve as a passivation layer to inhibit deposition thereon and to increase the selectivity of subsequent selective deposition of the layer of interest.

Referring to fig. 4B, in certain embodiments, the vapor deposition process of fig. 4A includes an atomic layer deposition process. At block 21, a substrate including a first surface and a second surface is provided. The first and second surfaces may have different material properties. In some embodiments, the first surface may be a conductive surface, such as a metal or metallic surface, and the second surface may be a dielectric surface (see, e.g., fig. 1A-1D). In some embodiments, the first surface may be a dielectric surface and the second surface may be a different second dielectric surface. In some embodiments, the first surface may be a dielectric surface, such as a silicon oxide-based material, and the second surface may be a passivation barrier material, such as a SAM (see, e.g., fig. 2A-3B).

In some embodiments, a sequential deposition method for selective vapor deposition of an organic passivation layer includes evaporating a first organic precursor at a first temperature to form a first precursor vapor at block 22. In some embodiments, the first precursor vapor is delivered to the substrate at a second temperature through a gas line. In some embodiments, the second transport temperature is higher than the first vaporization temperature. In some embodiments, the substrate is contacted with a vapor phase first precursor for a first exposure period at block 23. In some embodiments, the first precursor or species thereof is chemisorbed on the substrate in a self-saturating or self-limiting manner. The gas line can be any conduit that delivers the first precursor vapor from the source to the substrate. In some embodiments, the substrate may be exposed to the first precursor vapor at a third temperature that is higher than the first temperature.

In some embodiments, the first precursor exposure period is from about 0.01 seconds to about 60 seconds, from about 0.05 seconds to about 30 seconds, from about 0.1 seconds to about 10 seconds, or from about 0.2 seconds to about 5 seconds. The optimal exposure period can be readily determined by one skilled in the art on a case-by-case basis. In some embodiments, where a batch reactor may be used, an exposure period of greater than 60 seconds may be employed.

Then, at block 24, excess first precursor vapor (and any volatile reaction byproducts) may be removed from contact with the substrate. Such removal can be accomplished, for example, by purging, evacuating, moving the substrate away from the chamber or region exposed to the first reactant, or a combination thereof. In some embodiments, the first precursor removal period, e.g., the purge period, is from about 0.01 seconds to about 60 seconds, about 0.05 seconds to about 30 seconds, about 0.1 seconds to about 10 seconds, or about 0.2 seconds to about 5 seconds. The optimal removal period can be easily determined by one skilled in the art on a case-by-case basis. In some embodiments, where a batch reactor may be used, a removal period of greater than 60 seconds may be employed.

In some embodiments, at block 25, the second precursor may be vaporized at a fourth temperature to form a second vapor phase precursor. In some embodiments, the second reactant vapor is transported to the substrate through the gas line at a second temperature. In some embodiments, the fifth transport temperature is higher than the first evaporation temperature. In some embodiments, the substrate may be contacted with the second vapor precursor at a sixth temperature that is higher than the fourth temperature. In some embodiments, the sixth temperature may be substantially the same as the third temperature at which the first vapor precursor contacts the substrate. In some embodiments, the substrate may be exposed to the second precursor vapor for a second exposure period at block 26. In some embodiments, the second reactant may react with the adsorbed species of the first reactant on the substrate.

In some embodiments, at block 27, excess second precursor vapor (and any volatile reaction byproducts) are removed from contact with the substrate such that the first reactant vapor and the second reactant vapor do not mix. In some embodiments, the vapor deposition process of the organic layer does not employ plasma and/or free radicals, and may be considered a thermal vapor deposition process. In some embodiments, the second precursor removal period, e.g., a purge period, is from about 0.01 seconds to about 60 seconds, about 0.05 seconds to about 30 seconds, about 0.1 seconds to about 10 seconds, or about 0.2 seconds to about 5 seconds. The optimal removal period can be easily determined by one skilled in the art on a case-by-case basis. In some embodiments, where a batch reactor may be used, a removal period of greater than 60 seconds may be employed.

In block 28, an organic layer is selectively deposited on the first surface relative to the second surface. Those skilled in the art will appreciate that the selective deposition of the organic layer is a result of the above-described contacting action rather than a separate action. In some embodiments, the contacting and removing (and/or stopping the supplying) actions (blocks 23-27) described above may be considered a deposition cycle. In some embodiments, the deposition cycle may be repeated until a desired thickness of organic layer is selectively deposited. This selective deposition cycle may be repeated (block 29) until a sufficient thickness of layer remains on the substrate and deposition is complete (block 30). The selective deposition cycle may include additional actions that need not be performed in the same order or identically in each iteration, and may be readily extended to more complex vapor deposition techniques. For example, a selective deposition cycle may include additional reactant supply processes, such as supplying and removing additional reactants in each cycle or selected cycles. Although not shown, the process may additionally include treating the deposited layer to form a polymer (e.g., UV treatment, annealing, etc.).

Various reactants can be used in the above process. For example, in some embodiments, the first precursor or reactant is an organic reactant, such as a diamine, e.g., 1,6-Diaminohexane (DAH), or any other monomer having two reactive groups. In some embodiments, the second reactant or precursor is also an organic reactant capable of reacting with the adsorbed species of the first reactant under deposition conditions. For example, the second reactant may be an anhydride, such as furan-2,5-dione (maleic anhydride). The anhydride may comprise a dianhydride, for example, pyromellitic dianhydride (PMDA), or any other monomer having two reactive groups that will react with the first reactant.

In some embodiments, the substrate is contacted with the first precursor before being contacted with the second precursor. Thus, in some embodiments, the substrate is contacted with an amine, such as a diamine, e.g., 1,6-Diaminohexane (DAH), prior to contact with another precursor. However, in some embodiments, the substrate may be contacted with the second precursor before being contacted with the first precursor. Thus, in some embodiments, the substrate is contacted with an acid anhydride, such as furan-2,5-dione (maleic anhydride) or a dianhydride, such as pyromellitic dianhydride (PMDA), prior to contact with another precursor.

In some embodiments, different reactants may be used to adjust layer properties. For example, a polyimide layer may be deposited using 4,4' -oxydianiline or 1,4-diaminobenzene instead of 1,6-diaminohexane to obtain a more rigid structure with more aromaticity and increased dry etch resistance.

In some embodiments, the reactants are free of metal atoms. In some embodiments, the reactant does not comprise a semimetal atom. In some embodiments, one of the reactants comprises a metal or semi-metal atom. In some embodiments, the reactants comprise carbon and hydrogen and one or more of the following elements: n, O, S, P or a halide, such as Cl or F. In some embodiments, the first reactant may include, for example, adipoyl Chloride (AC).

The deposition conditions may vary depending on the reactants selected and may be optimized according to the selection. In some embodiments, the reaction temperature may be selected from the range of about 80 ℃ to about 250 ℃. In some embodiments, the reaction chamber pressure can be from about 1 mTorr to about 1000 Torr, from about 10 Torr ^-5 To about 760 torr, or in some embodiments, from about 1 to 10 torr. In some embodiments, for example where the selectively deposited organic layer comprises a polyamide, the reaction temperature may be selected from the range of about 80 ℃ to about 150 ℃. In some embodiments where the selectively deposited organic layer comprises a polyamide, the reaction temperature may be greater than about 80 ℃, 90 ℃, 100 ℃, 110 ℃, 120 ℃, 130 ℃, 140 ℃, or 150 ℃. In some embodiments where the selectively deposited organic layer comprises polyimide, the reaction temperature may be greater than about 160 ℃, 180 ℃, 190 ℃, 200 ℃, or 210 ℃.

For example, for sequential deposition of polyimide using PMDA and DAH in a single wafer deposition tool, the substrate temperature may be selected in the range of about 150 ℃ to about 250 ℃ or about 170 ℃ to about 210 ℃, and the pressure may be selected in the range of about 1 mtorr to about 760 torr or about 100 mtorr to about 100 torr.

In some embodiments, the reactants used in the selective deposition processes described herein can have the general formula:

(1)R ¹ (NH ₂ ) ₂

wherein R is ¹ And may be an aliphatic carbon chain containing 1 to 5 carbon atoms, 2 to 4 carbon atoms, 5 or less carbon atoms, 4 or less carbon atoms, 3 or less carbon atoms, or 2 carbon atoms. In some embodiments, the bonds between carbon atoms in the reactants or precursors may be single bonds, double bonds, triple bonds, or some combination thereof. Thus, in some embodiments, the reactant may comprise two amino groups. In some embodiments, the amino groups of the reactants may occupy one or both end positions on the aliphatic carbon chain. However, in some embodiments, the amino group of the reactant may not occupy either end position on the aliphatic carbon chain. In some embodiments, the reactant may include a diamine. In some embodimentsThe reactants may comprise an organic precursor selected from the group of 1,2-diaminoethane (l), 1,3-diaminopropane (l), 1,4-diaminobutane (l), 1, 5-diaminopentane (l), 1,2-diaminopropane (l), 2,3-butanediamine, 2,2-dimethyl-1,3-propanediamine (l).

(2)R ² (COCl) ₂

wherein R is ² And may be aliphatic carbon chains containing 1 to 3 carbon atoms, 2 to 3 carbon atoms, or 3 or less carbon atoms. In some embodiments, the bonds between carbon atoms in the reactants or precursors may be single bonds, double bonds, triple bonds, or some combination thereof. In some embodiments, the reactant may include a chloride. In some embodiments, the reactant may comprise a diacid chloride. In some embodiments, the reactant may comprise an organic precursor selected from the group of oxalyl chloride (I), malonyl chloride, and fumaryl chloride.

In some embodiments, the reactants comprise an organic precursor selected from the group of 1,4-diisocyanatobutane or 1,4-diisocyanatobenzene. In some embodiments, the reactant comprises an organic precursor selected from the group of terephthaloyl chloride, alkyl diacid chlorides, such as adipoyl chloride, suberoyl chloride, azelaioyl chloride, sebacoyl chloride, or terephthaloyl chloride. In some embodiments, the reactant comprises an organic precursor selected from the group of 1,4-diisothiocyanatobenzene or terephthalaldehyde. In some embodiments, the reactant to be vaporized may also be a diamine, such as 1,4-diaminobenzene, decane-1, 10-diamine, 4-nitrobenzene-1,3-diamine, 4,4' -oxydianiline, or ethylenediamine. In some embodiments, the reactant may be bis (2-hydroxyethyl) terephthalate. In some embodiments, the reactant may be a carboxylic acid, for example an alkyl-, alkenyl-, alkanedienyl-dicarboxylic or tricarboxylic acid, such as oxalic acid, malonic acid, succinic acid, glutaric acid, or propane-1,2, 3-tricarboxylic acid. In some embodiments, the reactant may be an aromatic carboxylic or dicarboxylic acid, such as benzoic acid, benzene-1,2-dicarboxylic acid, benzene-1,4-dicarboxylic acid, or benzene-1,3-dicarboxylic acid. In some embodiments, the reactant may comprise one or more OH "groups bonded to the hydrocarbon. In some embodiments, the reactant may be selected from the group of diols, triols, aminophenols such as 4-aminophenol, benzene-1,4-diol, or benzene-1,3,5-triol. In some embodiments, the reactant may be 8-hydroxyquinoline. In some embodiments, the reaction may include an alkenyl chlorosilane, such as an alkenyl trichlorosilane, such as 7-octenyltrichlorosilane.

In some embodiments, the vapor pressure of the reactants may be greater than about 0.5 torr, 0.1 torr, 0.2 torr, 0.5 torr, 1 torr, or greater at a temperature of about 20 ℃ or room temperature. In some embodiments, the reactants may have boiling points of less than about 400 ℃, less than 300 ℃, less than about 250 ℃, less than about 200 ℃, less than about 175 ℃, less than about 150 ℃, or less than about 100 ℃

Selective deposition of a layer of interest relative to an organic surface

After deposition of the organic passivation layer, a layer, such as a metal oxide layer, is selectively deposited on the second, non-passivated surface. In some embodiments, the reactants are selected to nucleate preferentially on non-passivated surfaces.

Selective deposition of metallic materials and metal oxides can be facilitated by the use of hydrophobic reactants relative to organic materials, such as the passivation layer disclosed herein, as disclosed in the incorporated U.S. provisional patent application No. 62/332, 396, filed 5/2016. After selectively forming the passivation layer on the first surface, in some embodiments, the metal oxide is selectively deposited on the second surface by alternately and sequentially contacting the substrate with a first hydrophobic reactant comprising a metal of the metal oxide and a second reactant comprising oxygen. In some embodiments, the second reactant is water or H ₂ O ₂ . In some embodiments, the substrate is sequentially contacted with the first and second reactants, similar to the sequence of fig. 4A, except that a non-organic layer is selectively deposited on or over the second surface (see, e.g., fig. 1A-3B).

The hydrophobic reactant comprises one or more hydrophobic ligands. In some embodiments, the hydrophobic reactant comprises two to four hydrophobic ligands. Where the hydrophobic reactant comprises a metal having a valence/oxidation state of n, in some embodiments, the hydrophobic precursor comprises n-1 or n-2 hydrophobic ligands.

In some embodiments, the at least one hydrophobic ligand comprises only C and H. In some embodiments, the at least one hydrophobic ligand comprises C, H and Si or Ge, but does not comprise an additional element.

In some embodiments, the hydrocarbon ligand comprises one or more of:

● C1-C10 hydrocarbons (single, double or triple bond)

O alkyl group

■ C1-C5 alkyl

●Me、Et、Pr、 ⁱ Pr、Bu、 ^t Bu

O. alkenyl group

■ C1-C6 alkenyl

O. Cyclic Hydrocarbon

■C3-C8

● Cyclopentadienyl radical

● Cycloheptadienyl radicals

● Cycloheptatrienyl

● Cyclohexyl radical

● Derivatives of these

O aromatic group

■ C6 aromatic ring and derivatives thereof

In some embodiments, the hydrophobic reactant does not comprise a hydrophilic ligand. However, in some embodiments, the hydrophobic reactant may comprise one or two hydrophilic ligands. In some embodiments, the hydrophilic ligand comprises nitrogen, oxygen, and/or halogen groups.

In some embodiments, the hydrophilic ligand is an alkylamine (-NR) ₂ Wherein each R may be alkyl, hydrogen). In some embodiments, the hydrophilic ligand may be-NMe ₂ -NEtMe or-NEt ₂ 。

In some embodiments, the hydrophilic ligand is an alkoxide, e.g., -OMe, -OEt, -O ⁱ Pr，-O ^t Bu。

In some embodiments, the hydrophilic ligand comprises a halide, such as chloride, fluoride, or other halide.

In some embodiments, the hydrophobic precursor comprises the structural formula:

○L _n MX _y wherein

■ In some embodiments, n is 1-6;

● In some embodiments, n is 1-4 or 3-4.

■ In some embodiments, y is 0-2;

● In some embodiments, y is 0-1.

■ L is a hydrophobic ligand;

● In some embodiments, L is Cp or a C1-C4 alkyl ligand.

■ X is a hydrophilic ligand;

● In some embodiments, X is an alkylamine, alkoxide, or halide ligand.

■ M is a metal (including group 13 element B, ga);

● In some embodiments, M has an oxidation state from + I to + VI.

In some embodiments, M has an oxidation state of + IV to + V

● In some embodiments, M may be a transition metal.

In some embodiments, M is titanium, tantalum, niobium, tungsten, molybdenum, hafnium, zirconium, vanadium, or chromium.

■ In some embodiments, M is Hf, zr, ta, or Nb.

● In some embodiments, M is Zr.

In some embodiments, M is cobalt, iron, nickel, copper, or zinc.

In some embodiments, the metal is not tungsten or molybdenum.

● In some embodiments, M may be a rare earth metal.

In some embodiments, M is La, ce, or Y.

● In some embodiments, M may be a group 2-13 metal.

In some embodiments, M is barium, strontium, magnesium, calcium, or scandium.

● In some embodiments, M is not a noble metal.

Generally, in some embodiments, selective ALD processes employ metal precursors. In some embodiments, the metal of the metal precursor may be selected from the group comprising al, ti, ta, nb, W, mo, hf, zr, V, cr, co, fe, ni, cu, zn, la, ce, Y, ba, sr, mg, ca or Sc, or mixtures thereof. In some embodiments, the metal may be aluminum.

In some embodiments, the hydrophobic reactant is bis (methylcyclopentadienyl) methoxymethylzirconium (IV) ((CpMe) ₂ -Zr-(OMe)Me)。

In some embodiments, the hydrophobic reactant is bis (methylcyclopentadienyl) methoxymethylhafnium (IV) ((CpMe) ₂ -Hf-(OMe)Me)。

In other embodiments, a selective ALD process employs an aluminum precursor. Examples of the Al precursor include Trimethylaluminum (TMA), aluminum trichloride (AlCl) ₃ ) Aluminum Dimethylisopropoxide (DMAI), triethylaluminum (TEA) AlMe (OMe) ₂ 、AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、 AlEt(OEt) ₂ 、AlEt(OiPr) ₂ 、AlEt(OtBu) ₂ And aluminum triacetate.

In some embodiments, the aluminum precursor is a heteroleptic aluminum compound. In some embodiments, the heteroleptic aluminum compound comprises an alkyl group and another ligand, such as a halide, e.g., cl. In some embodiments, the aluminum compound is dimethyl aluminum chloride. In some embodiments, the aluminum precursor is an alkyl precursor comprising two different alkyl groups as ligands. In some embodiments, the aluminum precursor is a metal organic compound. In some embodiments, the aluminum precursor is an organometallic compound.

In some embodiments, the selective ALD process utilizes an aluminum precursor comprising at least one alkyl ligand and at least one alkoxy ligand. In some embodiments, one or more alkoxy ligands may be isopropoxy ligands. In some embodiments, one or more alkoxy ligands may be methoxy or ethoxy ligands, or larger ligands, such as tert-butoxy ligands. In some embodiments, one or more alkyl ligands may be methyl ligands. In some embodiments, one or more alkyl ligands may be an ethyl ligand.

In some embodiments, the aluminum precursor comprises two alkyl ligands and one alkoxy ligand. For example, as described above, the aluminum precursor may be aluminum dimethyl isopropoxide. In some embodiments, the aluminum precursor comprises one alkyl ligand and two alkoxy ligands. In some embodiments, the aluminum precursor comprises AlMe (OMe) ₂ 、 AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、AlEt(OEt) ₂ 、AlEt(OiPr) ₂ And AlEt (OtBu) ₂ One or more of (a).

In some embodiments, the aluminum precursor comprises one or more acetic acid ligands. For example, in some embodiments, the aluminum precursor comprises aluminum triacetate. In some embodiments, an aluminum precursor comprising one or more acetic acid ligands is used, and acetic anhydride is released during the deposition process. Acetic anhydride can help dry the surface and increase the selectivity of the process.

In some embodiments, the second reactant contributes one or more elements to the selectively deposited material. For example, the second reactant may be an oxygen precursor for depositing a metal oxide or a nitrogen precursor for depositing a metal nitride.

In some embodiments, the second reactant comprises an oxygen precursor.

In some embodiments, the second reactant comprises H ₂ O。

In some embodiments, the second reactant comprises O ₃ 。

In some embodiments, the second reactant comprises H ₂ O ₂ 。

In some embodiments, the second reactant comprises an oxygen plasma, an ion, a radical, atomic oxygen, or an excited species of oxygen.

In some embodiments, the second reactant comprises a nitrogen precursor.

In some embodiments, the second reactant comprises NH ₃ 。

In some embodiments, the second reactant comprises N ₂ H ₄ 。

In some embodiments, the second reactant comprises a nitrogen-containing plasma, ions, radicals, atomic N, or excited species comprising N. In some embodiments, the nitrogen reactant may comprise a mixture with a corresponding hydrogen species.

In some embodiments, other reactants that contribute elements other than N or O to the deposition material may be utilized. These reactants may be used in addition to the N or O second reactant, or they may themselves serve as the second reactant. For example, in some embodiments, a sulfur reactant may be used to deposit sulfide, a carbon reactant may be used to deposit carbon, or a silicon reactant may be used to deposit silicide.

In some embodiments, a second (or additional) reactant may be used that facilitates deposition of a metallic or gold-like film, such as an elemental metal film. For example, in some embodiments, a hydrogen reactant may be used.

Alternatively, as described with respect to fig. 2D, a metal conductive film of interest may be selectively deposited on the second surface, the metallic surface, relative to the organic passivation layer. For example, U.S. patent nos. 8,956,971, issued 2/17 in 2015 and U.S. patent No. 9,112,003, issued 8/18 in 2015, the entire disclosures of which are incorporated herein by reference, teach processes for the selective deposition of gold-attribute materials on metallic surfaces relative to non-metallic surfaces (including organic materials). Also as described above with reference to fig. 3A, another dielectric layer, i.e., a metal oxide material, may be selectively formed on the selectively formed metallic material layer prior to removing the organic passivation layer.

In some embodiments, a thin film comprising a material of interest, such as alumina (e.g., al), is selectively deposited on one or more first dielectric or low-k surfaces relative to one or more second metal surfaces, such as copper, cobalt, titanium nitride, or tungsten surfaces ₂ O ₃ ) Or titanium nitride (e.g., tiN). Fig. 13 illustrates an exemplary process.

In step 1A of fig. 13, a substrate comprising a low-k surface and a metal surface is pretreated. As described above, in some embodiments, the pretreatment may include exposing the substrate to a plasma, such as a hydrogen plasma. In some embodiments, a non-plasma pretreatment process is performed. For example, in some embodiments, the substrate surface may be exposed to a silicon reactant, such as N- (trimethylsilyl) dimethylamine (TMSDMA) or trimethylchlorosilane. The reactants may be provided in a single long pulse or in a sequence of multiple short pulses. In some embodiments, the reactants are provided in 1 to 25 pulses of about 1 to about 60 seconds. Between pulses, the reaction chamber may be purged with an inert gas. The purge may, for example, last about 1 to 30 seconds.

In some embodiments, the surface has the structural formula (R) ^I ) ₃ Si(NR ^II R ^III ) In which R is ^I Is a linear or branched C1-C10 hydrocarbon group or a linear or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl group, R ^II Is a linear or branched C1-C10 hydrocarbon radical or a linear or branched C1-C5 alkyl radical, a linear or branched C1-C4 alkyl radical or hydrogen, R ^III Is a linear or branched C1-C10 hydrocarbon group or a linear or branched C1-C5 alkyl group or a linear chain.

In some embodiments, the surface has the formula (R) ^I ) ₃ Silane contact of SiA, wherein R ^I Is a linear or branched C1-C10 hydrocarbyl group or a linear or branched C1-C5 alkyl group or a linear or branched C1-C4 alkyl group, and A is any ligand that reacts with a silicon-containing surface. That is, the silane is bound to the surface through ligand a, or ligand a forms a bond with the surface, but ligand a can migrate from the surface and/or the silane.

The temperature of the pretreatment process may be, for example, about 100 to about 300 ℃. The pressure in the pretreatment process may be, for example, about 10 ^-5 To about 760 torr, or in some embodiments, about 1 to 10 torr or about 0.1 to about 10 torr. In some embodiments, the pre-treatment or cleaning process may be performed in situ, i.e., in the same reaction chamber as the selective deposition process.

In step 1B, an inhibitor, for example an organic material such as polyimide, is selectively deposited on the metal surface. The inhibitor may be deposited as described herein. In some embodiments, the deposition temperature isFrom about 160 to about 220 ℃. The reaction chamber pressure can be, for example, from about 10 ^-5 To about 760 torr, or in some embodiments, from about 1 to 10 torr or about 1 to 25 torr. In some embodiments, the vapor deposition cycle for depositing the polyimide inhibitor is performed about 1 to 1000 times.

In some embodiments, the imide inhibitor is deposited by alternating and sequential contact of the substrate with DAH and PDMA. DAH and PDMA may be alternately and sequentially supplied to the reaction space by pulses having a pulse length of about 0.1 to 10s, followed by purging between pulses for about 0.1 to 10 s.

In step 1C, a clean-up process is performed to remove any inhibitors present on the low-k surface. The cleaning process may include H ₂ And (4) carrying out plasma treatment. The removal process may be performed as described herein. In some embodiments, the cleaning process is performed at a temperature of about room temperature to about 400 ℃. A plasma power of about 10 to 1000W or about 25 to 250W may be used to flow H ₂ For example, at a flow rate of about 10 to 500 sccm. The cleaning time after inhibitor deposition may be, for example, about 1 to 600 seconds.

In step 1D, baking is performed. The baking may, for example, densify the inhibited layer and make it more robust, e.g., resistant to subsequent higher temperature processes. In some embodiments, the baking is performed at a temperature of about 100 to about 800 ℃, for example about 300 to about 600 ℃. In some embodiments, the baking step is performed at a temperature greater than 300 ℃. In some embodiments, the baking step is performed at a temperature of about 400 ℃. In some embodiments, the baking time is from about 1 to about 15 minutes. Baking may comprise two steps-a first step at a lower temperature and a second step at a higher temperature. For example, the baking may include a first step at a temperature of about 250 ℃ and a second step at a temperature of about 400 ℃. In some embodiments, the first and second steps are performed for the same amount of time. In other embodiments, they are performed for different amounts of time.

In some embodiments, the baking is performed in the same reactor as the subsequent selective deposition of the material of interest. In some embodiments, the baking is performed in the same reactor as the deposition of the inhibitor. In some embodiments, the baking is performed in a separate reaction chamber.

In step 1E, a material is selectively deposited on the dielectric surface relative to the metal surface containing the inhibitor by a vapor deposition process. The selective deposition may be as described herein.

In some embodiments, in step 1E, alumina is deposited by alternately contacting the substrate with an aluminum reactant and an oxygen reactant. In some embodiments, the aluminum reactant may include one or more aluminum precursors. For example, the aluminum reactant may include Trimethylaluminum (TMA), aluminum trichloride (AlCl) ₃ ) Aluminum Dimethylisopropoxide (DMAI), triethylaluminum (TEA), alMe (OMe) ₂ 、AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、 AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、AlEt(OEt) ₂ 、AlEt(OiPr) ₂ 、AlEt(OtBu) ₂ And aluminum triacetate. In some embodiments, the aluminum precursor is a heteroleptic aluminum compound. In some embodiments, the heteroleptic aluminum compound comprises an alkyl group and another ligand, such as a halide, e.g., cl. In some embodiments, the aluminum compound is dimethyl aluminum chloride. In some embodiments, the aluminum precursor is an alkyl precursor comprising two different alkyl groups as ligands.

In some embodiments, the aluminum reactant comprises an aluminum precursor comprising at least one alkyl ligand and at least one alkoxy ligand. In some embodiments, one or more alkoxy ligands may be an isopropoxy ligand. In some embodiments, one or more alkoxy ligands may be methoxy or ethoxy ligands, or larger ligands, such as tert-butoxy ligands. In some embodiments, one or more alkyl ligands may be methyl ligands. In some embodiments, one or more alkyl ligands may be an ethyl ligand. In some embodiments, the aluminum precursor comprises two alkyl ligands and one alkoxy ligand.

In some embodiments, the aluminum reactant comprises a mixture having one alkyl ligand and two alkoxy groupsAn aluminum precursor of a base ligand. In some embodiments, the aluminum reactant comprises AlMe (OMe) ₂ 、AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、AlEt(OEt) ₂ 、AlEt(OiPr) ₂ And AlEt (OtBu) ₂ One or more of (a).

In some embodiments, the aluminum precursor comprises one or more acetic acid ligands. For example, in some embodiments, the aluminum reactant comprises aluminum triacetate.

In some embodiments, the aluminum precursor is a metal organic compound. In some embodiments, the aluminum precursor is an organometallic compound.

The oxygen reactant may include, for example, water or H ₂ O ₂ . In some embodiments, the alumina may be deposited by an atomic layer deposition process in which the substrate is alternated and sequentially with aluminum Dimethylisopropoxide (DMAI) and water or H ₂ O ₂ And (4) contacting. In some embodiments, the temperature in the reaction chamber during alumina deposition is from about 150 to about 350 ℃. The pulse time for the reactants may be from about 0.1 to about 10 seconds, and the purge time between reactant pulses may also be from about 0.1 to about 10 seconds. The reaction chamber pressure can be, for example, from about 10 ^-5 To about 760 torr, or in some embodiments, from about 1 to 10 torr.

In some embodiments, titanium nitride is deposited in step 1E by alternately contacting the substrate with a titanium reactant and a nitrogen reactant. The titanium reactant may comprise, for example, tiCl ₄ . The nitrogen reactant may include, for example, NH ₃ . In some embodiments, tiN may be deposited by an atomic layer deposition process, wherein the substrate is alternately and sequentially with TiCl ₄ And NH ₃ And (4) contacting. In some embodiments, the temperature in the reaction chamber during titanium nitride deposition is about 250 to about 500 ℃. The pulse time for the titanium reactant may be from about 0.2 to about 10 seconds and the pulse time for the nitrogen reactant may be from about 0.1 to about 10 seconds. The purge time between reactant pulses can also be about 0.1 to about 10 seconds. The chamber pressure can be, for example, about 10 ^-5 To about 760 torr, or in some embodiments, about 1 to 10 torr. Using the process illustrated in FIG. 13The process deposits a titanium nitride layer.

In step 1F, the substrate is subjected to a post-deposition cleaning step, such as with H ₂ Plasma treatment to remove inhibitors from the metal surface. The cleaning step can include H ₂ And (4) carrying out plasma treatment. The cleaning process may be performed as described herein. In some embodiments, the cleaning step is performed at a temperature of about room temperature to about 400 ℃. Plasma powers of about 10 to 2000W, 25 to 1000W, or 25 to 250W may be used for flowing H ₂ For example, at a flow rate of about 10 to 500 sccm. The cleaning time after depositing the layer of interest may be, for example, about 1 to 600 seconds.

In some embodiments, a material such as alumina (e.g., al) is included ₂ O ₃ ) Or titanium nitride (e.g., tiN), is selectively deposited on the first surface of the three-dimensional structure relative to the one or more second surfaces. The three-dimensional structure may comprise, for example, vias or trenches. In some embodiments, an inhibitor, such as a polyimide layer, is non-selectively deposited on the three-dimensional structure. The inhibitor is then patterned to expose areas where selective deposition is desired. For example, anisotropic etching may be used to remove a layer from a surface on which deposition is desired. Vapor deposition is then performed to deposit the layer of interest on the areas not covered by the inhibitor.

An exemplary process for selective deposition on a three-dimensional structure is shown in fig. 14. Structures including trench or via openings are shown. As shown in step 2A, the inhibitor is conformally deposited on the features. The inhibitor may be deposited as described herein. For example, the polyimide may be vapor deposited as described herein. In step 2B, the inhibitor is removed from the trench bottom by anisotropic etching. As shown in step 2C, the inhibitor is baked after etching, and the layer of interest is selectively deposited on the exposed surface of the trench bottom relative to the surface containing the inhibitor. Finally, the inhibitor material is removed from the remaining surface, as shown in step 2D. Although not shown, additional pre-treatment steps may be performed as described herein.

Passivation barrier layer

As described above, a self-assembled monolayer (SAM) may be used to inhibit deposition of the organic passivation layer, thereby facilitating selective deposition of the organic passivation layer on other surfaces. Thus, the term "blocking" is merely a label and does not imply 100% deactivation of the organic passivation layer deposition. As discussed elsewhere herein, even imperfect selectivity is sufficient to obtain a fully selective structure after the etch-back process.

In one embodiment, a passivation barrier layer is formed on the second surface to inhibit deposition of the sulfur-containing SAM. In one embodiment, the second surface is a metallic surface. In one embodiment, the metallic surface is pretreated with an acid treatment prior to SAM formation.

Deposition apparatus

Examples of suitable reactors that may be used in the selective deposition processes described herein include commercially available ALD equipment. In addition to ALD reactors, many other kinds of reactors capable of growing organic passivation layers may be used, including CVD reactors, VDP reactors and MLD reactors.

The selective dielectric on dielectric deposition described herein with reference to fig. 1A-1D may be performed in up to five processes. (1) Pretreatment, (2) selective organic passivation layer deposition on the first surface; (3) Partially etching back, also known as a "clean up" etch, any organic material from the second surface, (4) selective dielectric deposition on the second surface; and (5) removing the organic passivation layer from the first surface.

In one embodiment, the tools for this sequence can be minimized by combining (2) selective organic passivation layer deposition and (3) partial etch back in one chamber and using a cluster chamber to perform (4) selective dielectric deposition on the second surface. The pre-treatment may be performed on another platform (e.g., a wet bench) or may be omitted by adjusting certain recipes. The removal of the organic passivation layer may be performed in a separate ashing tool, such as an ashing tool commonly used for removing photoresist and other organic materials, or using the same or similar chemistry used for partial etch back of organic materials in the deposition chamber. Thus, the deposition phase and intermediate etch back can be performed in a stage comprising 2 reactors, including 4 or 8 processing stations, for polyimide deposition and etch back; and 2 reactors, including 4 or 8 processing stations, for selective dielectric deposition.

In some embodiments, the cluster tool comprises three or more reaction chambers. For example, the first chamber may be used for one or both of a pre-treatment and an etching process. A second chamber may be used to deposit the organic layer and a third chamber may be used to selectively deposit the film of interest. The baking process may be performed in situ in the same chamber as the selective deposition of the film of interest, or may be performed in a different chamber.

In some embodiments, the selective deposition process described herein may be performed in at least six processes, as shown in fig. 13. (step 1A) a pretreatment, (step 1B) selective inhibitor deposition, e.g. deposition of an organic layer on the first surface; (step 1C) partially etching back, also called "clean up" etching, any organic material from the second surface, (step 1D) baking the organic layer; (step 1E) selective deposition on a second surface; and (step 1F) removing the organic layer from the first surface.

Referring to fig. 5, the apparatus 100 is used to perform polymer deposition and organic material etch back in-situ. The apparatus 100 comprises a reaction chamber defining a reaction space 115, the reaction space 115 being configured to accommodate at least one substrate 120. Apparatus 100 also includes a first reactant vessel 105 configured to vaporize a first organic reactant 110 to form a first reactant vapor. A gas line 130 fluidly connects the first reactant reservoir 105 to the reaction space 115, and a substrate 120 can be accommodated in the reaction space 115. The gas line 130 is configured to selectively deliver the first reactant vapor from the first reactant vessel 105 to an inlet manifold 135 leading to the reaction space 115. The apparatus 100 also includes a second reactant reservoir 140 containing a second reactant 145. In some embodiments, second reactant 145 is naturally in a gaseous state; in other embodiments, the second reactant reservoir 140 is also configured to evaporate the second reactant 145 from a natural liquid or solid state. The second reactant reservoir 140 is in selective fluid communication with the inlet manifold 135. The inlet manifold 135 may include a shared distribution chamber across the chamber width in a showerhead or cross-flow configuration, or may maintain separate paths for separate reactants to the reaction space 120. For sequential deposition embodiments, it may be desirable to keep the reactant inlet paths separate until introduced to the reaction space 115 to avoid reaction along the surface of the common flow path for multiple reactants, which may lead to particle generation. In some embodiments, the apparatus may include additional vessels for supplying additional reactants.

The illustrated apparatus 100 also includes a plasma source 147. Although schematically illustrated as appearing attached to the reaction space 115, one skilled in the art will appreciate that the plasma source may be a remote plasma source external to the reaction space 115 or may be an in situ plasma generator that directly generates plasma bodies (e.g., capacitively coupled) within the reaction space 115. Alternatively or additionally, an ozone generator may be used to remove organic material.

One or more additional gas sources 150 are in selective fluid communication with the first reactant vessel 105, the reaction space 115, and the plasma source 147 (to the extent of separation from the reaction space 115). The gas source 150 may include an inert gas that may be used as a purge gas and a carrier gas, as well as other gases used for plasma etch back (e.g., ar/H) ₂ ). As shown, the inert gas supply from the gas source can also be in selective fluid communication with the second reactant container 140 and any other desired reactant containers to serve as a carrier gas.

The control system 125 is in communication with the valves of the gas distribution system according to the organic passivation layer deposition and etch back methods described herein. The control system 125 typically includes a memory programmed for a desired process and at least one processor. For sequential deposition processes, the valves operate in a manner that alternately and repeatedly exposes the substrates to the reactants, whereas for simultaneous supply of the reactants in a conventional CVD process, the valves may be operated to simultaneously expose the substrates to the mutually reactive reactants.

The exhaust outlet 155 of the reaction space 115 is in communication with a vacuum pump 165 through an exhaust line 160. Control system 125 is configured to operate vacuum pump 165 to maintain a desired operating pressure and to evacuate excess reactant vapors and byproducts through exhaust outlet 155.

The control system 125 may also control the pressure and temperature of various components of the apparatus 100. For example, the control system may be programmed to maintain the substrate 120 at a temperature suitable for the process being performed. In one embodiment, the control system 125 is further configured to maintain the first reactant 110 in the first reactant vessel 105 at a temperature a and to maintain the substrate 120 in the reaction space 115 at a temperature B, wherein the temperature B is lower than the temperature a. In one embodiment, the control system 125 or a separate temperature controller is also configured to maintain the gas line 130 at a temperature C, wherein the temperature C is higher than the temperature a.

Thus, the apparatus 100 includes

source vessels

105, 140 for vaporizing and supplying the reactants described above for polymer deposition (e.g., one vessel for diamine and one vessel for dianhydride precursor). The plasma source 147 is in communication with a gas source 150, the gas source 150 comprising H ₂ And a source of an inert gas (e.g., a noble gas such as argon or helium). In addition, the apparatus 100 includes a control system 125, the control system 125 being programmed to supply gases and operate the plasma source in a manner to perform the polymer deposition and hydrogen plasma etch back described herein. The control system 125 maintains the substrate 120 in the range of 180 to 220 c or about 190 to 210 c so that the polymer deposition and etch back can be sequentially performed at the same temperature without removing the substrate 120 from the reaction space 115. The etch-back may be 0.5-600 seconds, 1-120 seconds, 1-60 seconds, 1-20 seconds, 2-15 seconds, and 5-15 seconds. As another example, pulsed ozone (O) ₃ ) An etching process may be used for the etch-back process. As will be appreciated by those skilled in the art, the process conditions may be modified to perform a slower and more controlled etch for the purpose of partially etching back to minimize over-etching of the desired passivation layer on the first surface. In fact, O for polymers ₃ The etching rate strongly depends on the etching temperature. The combination of selective deposition of the passivation layer and partial etch back does not increase the process time of a single chamber too much because of the etchThe etching process is usually very short. The same equipment and etchant may also be used to remove the passivation layer.

The apparatus 100 configured for polymer deposition and etch back may be a showerhead reactor (showerhead reactor) having solid source vessels for DAH (evaporation temperature about 40 ℃) and PMDA (evaporation temperature about 170 ℃). In one embodiment, plasma source 147 includes an in-situ direct plasma (e.g., capacitively coupled) tool with argon and H for in-situ etch back ₂ And (4) supplying. In another embodiment, the apparatus 100 may be a cross-flow reactor (cross-flow reactor) rather than a showerhead reactor, but still have the

solid source vessels

105, 140 and direct plasma capability described above. In another embodiment, the plasma source 147 includes a remote plasma coupled to the reaction space 115 to supply the plasma generated from Ar/H ₂ Plasma of the plasma. In another embodiment, the plasma source 147 may be replaced with an ozone generator connected to the reaction space 115. A remote plasma or ozone generator may be connected to the showerhead reactor, for example.

The polymer deposition apparatus 100 desirably includes self-cleaning capabilities to keep the reaction space 115 and the exhaust line 160 clean after multiple depositions. In some embodiments, the above-mentioned in-situ or remote Ar/H for etch back may be at higher power or temperature ₂ Plasma source 147 may be suitable for periodic chamber cleaning because it may operate without production substrates and only periodically (rather than per wafer). Alternatively, the polymer deposition chamber may be configured to provide NF ₃ A remote plasma for etching, or ozone supply, for periodic chamber cleaning. In some embodiments, O ₃ /N ₂ The supply may be adapted for periodic chamber cleaning, possibly at higher power or temperature than the polymer partial etch back or removal process, because the chamber cleaning process operates without production of the substrate and only periodically (rather than per wafer).

Line edge position

Referring to FIG. 6, in some implementationsIn an example, as described above, the selective deposition on the second surface can be performed by selectively depositing a dielectric (e.g., zrO) on the second surface ₂ ) And selective passivation of the latter first surface. In the illustrated flow diagram, the first surface may be metallic (e.g., an integrated circuit interlayer dielectric or an embedded metal feature in an ILD) and the second surface may be dielectric (e.g., an ILD). Passivation may include a polymer or other organic material selectively deposited on the first surface relative to the second surface of the component in step 1. Subsequently, a polymer etch back, sometimes referred to as a "clean" etch, is performed to achieve selectivity to remove polymer that may have been deposited on the second surface in step 2, without removing all of the polymer from the first surface. Since the polymer acts as a passivation layer, in step 3, a dielectric material is selectively deposited on the second surface. Any number of suitable dielectric materials may be used in step 3. In some embodiments, the dielectric material may be selected from ZrO ₂ And other metal oxides such as transition metal oxides or aluminum oxides, or other dielectric oxides including mixtures having etch selectivity to, or slow etch rates under conditions in which silicon dioxide based materials are etched. Although some such metal oxides may have high k values above 5 or even above 10, they are thin, located at a position that avoids significant parasitic capacitance in the metallization structure, and advantageously allow masking the surface against selective etching of the silicon oxide material. In other embodiments, the dielectric may be a silicon oxide based material, but may be thicker to serve as an etch mask as described herein. In step 4 of fig. 6, the polymer passivation is removed from the first surface.

Fig. 7 illustrates the effect of etch back time to remove a passivation layer (e.g., a polymer or other organic layer) from the second surface on the formed dielectric layer. More specifically, by selecting the extent of the intermediate polymer etch-back process, the location of the selectively formed dielectric layer edge can be controlled relative to the boundary between the underlying metallic surface and the dielectric surface. In an embodiment, the polymer is deposited on the first surface relative to the second surface of the part, as previously described in step 1 of fig. 6, as shown in the first row of illustrations in fig. 7. As shown in the polymer deposition diagram, the deposition of polymer on the first surface forms a thicker polymer layer surface on the first surface and a relatively thin polymer layer on the second surface, and thus has a polymer thickness that slopes downward from the first surface to the second surface at the first-second surface boundary. Subsequently, as previously described in step 2 of fig. 6, the polymer etch back may be performed for different durations (or for the same duration at different etch rates, e.g., by different temperatures or etchant concentrations, or for different durations and different etch rates) to control the thickness and shape of the polymer layer, as shown in the first column, lines 2 to 6, illustration of fig. 7. The etch back may be isotropic or anisotropic. In some embodiments, the polymer etch time is the shortest and the polymer etch does not remove enough polymer to expose the second surface, as shown in the second row of illustrations in fig. 7. In this case, the subsequent selective dielectric deposition does not work because both the first and second surfaces are covered with the passivation layer, which is removed by the lift-off process with the removal of the passivation layer, even if there is a small amount of dielectric deposition. In some embodiments, the polymer etch time is selected to remove a majority of the formed polymer from the second surface, but leave a polymer layer front extending over the first-second surface boundary onto the second surface, as shown in the third row diagram of fig. 7. In this case, subsequent selective deposition of the dielectric and removal of the polymer leaves a gap between the edge of the deposited dielectric and the first-second surface boundary. In some embodiments, the polymer etch time is selected to remove polymer from the second surface and the polymer layer edge is aligned with the first-second surface boundary. In this case, subsequent selective deposition of the dielectric and removal of the polymer aligns the bottom surface edge of the deposited dielectric with the first-second surface boundary. In some embodiments, the polymer etch time is selected to remove polymer from the second surface and to remove a portion of the polymer from the first surface, and there is a first gap between the polymer layer leading edge and the first-second surface boundary, as shown in line 5 diagram in fig. 7. In this case, the subsequent selective deposition of the dielectric and removal of the polymer causes the deposited dielectric to extend beyond the first-second surface boundary and overlap the first surface. If the polymer etch time is conducted for an extended period of time and the polymer etch completely removes the polymer from both the first surface and the second surface, as shown schematically in line 6 of fig. 7, then the subsequent dielectric deposition is not selective.

Thus, selective dielectric selective deposition and partial polymer etch back, as previously described in steps 3 and 4 of fig. 6, may be performed to produce various relationships between the edges of the selectively deposited dielectric layer on the second surface and the interface between the first and second surfaces, depending on the extent of passivation etch back after its selective deposition, as shown in the right-most image illustrated in row 2 to row 6 of the third column of fig. 6. In some embodiments, no dielectric layer is formed because the polymer layer passivates the second surface, as shown in the second row diagram in fig. 7. In some embodiments, there is a gap between the second surface and the dielectric on the first surface, as shown in the line 3 illustration in fig. 7. In some embodiments, the dielectric layer edge is aligned with the first-second surface boundary, as shown in the row 4 illustration in fig. 7. In some embodiments, the dielectric layer overlaps the first surface, as shown in fig. 7, line 5. In some arrangements, the dielectric layer is formed on both the first surface and the second surface because no polymer layer passivates the first surface.

Fig. 8 illustrates the effect of passivation layer deposition thickness on the formed dielectric layer. More specifically, the location of the selectively formed dielectric layer edge relative to the boundary between the underlying metallic surface and the dielectric surface may be controlled by selecting the thickness of the intermediate polymer passivation layer. As the passivation layer deposition thickness increases, the passivation layer thickness increases on both the first surface and the second surface. However, because the passivation layer is selectively deposited on the first surface, the thickness of the passivation layer on the second surface increases less than the thickness of the passivation layer on the first surface. Thus, the passivation etch back, dielectric deposition and passivation removal will result in a selective dielectric layer having different locations with respect to the first-second surface boundary. In some embodiments, a passivation layer is deposited that creates a gap between the edge of the selectively deposited dielectric layer and the first-second surface boundary, as illustrated in the first column of fig. 8. In some embodiments, a thicker polymer layer is deposited, which creates a larger gap between the edge of the selectively deposited dielectric layer and the first surface, as shown in the second column diagram of fig. 8.

Fig. 9 illustrates the effect of the selectively deposited dielectric thickness on the relative position of the formed dielectric layer and the first-second surface boundary. More specifically, the location of the selectively formed dielectric layer edge relative to the boundary between the underlying metallic and dielectric surfaces may be controlled by selecting the thickness of the selective dielectric layer. The dielectric overhang edge extends more and more across the first-second surface boundary as the thickness of dielectric deposition selectively deposited on the second surface increases. In some embodiments, a dielectric layer is deposited that creates some overhang structure, as shown in the first column diagram of FIG. 9. In some embodiments, a thicker dielectric layer is deposited, which creates a larger overhang, as shown in the second column of FIG. 9. In some embodiments, an even thicker dielectric layer is deposited, which creates an even larger dielectric overhang on the first surface, as shown in the third column illustration of fig. 9. For certain subsequent processes, such as anisotropic processing (e.g., anisotropic reactive ion etching), the overhanging region may mask and protect portions of the first surface from subsequent processing.

Thus, in some embodiments, the dielectric layer is selectively deposited to create overhang and/or overlap with the metallic features, although largely selectively formed on a dielectric surface similar to that of FIG. 1. In some embodiments, the dielectric layer does not include overhangs or overlaps, and edges of the selectively deposited dielectric layer on the dielectric may be aligned with edges of the metallic features, or there may be a gap between the edges of the selectively deposited dielectric layer and the metallic features. Due to the selective deposition techniques taught herein, the selectively deposited dielectric layer may have selectively deposited features without the need to pattern the dielectric layer using conventional masking and etching. For example, the edges of the dielectric layer may taper with a slope of less than 45 degrees rather than having vertical or steeply sloped sidewalls as in typical lithographically patterned layers. The feature etch profile may be retained regardless of whether the selectively deposited layer is subjected to a clean-up etch or a partial etch back.

Fig. 10A-10D illustrate how topography affects the relationship between the selectively deposited dielectric and the boundary between the first and second surfaces.

Fig. 10A illustrates a planar structure resulting in the edges of the selectively deposited dielectric 2502 being aligned with the first-second surface boundaries. A passivated layer 2504, e.g., a polymeric material, a passivated first surface may be defined by a metallic material, e.g., an embedded metal 2506, and a second surface may be defined by a low-k dielectric, e.g., an interlayer dielectric (ILD) 2508. A passivation layer 2504 is selectively deposited on the first surface and a dielectric layer 2502 is selectively deposited on the second surface, wherein an edge of the dielectric layer 2502 is aligned with the first-second surface boundary.

Fig. 10B shows the first surface recessed relative to the second surface. As described above, the first surface may comprise a metallic material 2506, the metallic material 2506 being embedded and recessed in a low-k dielectric material 2508 defining the second surface. A passivation layer 2504 is selectively formed over the first surface within the recess. A dielectric layer 2502 is disposed on the second surface and the recess walls, wherein an edge of the dielectric layer 2502 meets a surface of the passivation layer 2504. Removal of the passivation layer 2504 will result in the dielectric layer 2502 being selectively formed on the second surface, but overlapping the first surface (e.g., the metallic feature 2506).

Fig. 10C shows the first surface raised relative to the second surface. The first surface may be defined by a metallic material 2506 embedded in and protruding above the second surface, which metallic material 2506 may be a low-k dielectric material 2508. A passivation layer 2504 is disposed over the first surface, including the protruding sidewalls, and thus at least partially disposed on the second surface. A dielectric layer 2502 is disposed on the second surface but spaced apart from the first surface by a thickness of passivation material 2504 on the sidewalls. Thus, after removal of the passivation layer 2504, a gap exists between the dielectric layer 2502 and the first surface (e.g., the protruding metal feature 2606).

Fig. 10D illustrates a recessed first surface of some embodiments. In this case, after the passivation layer 2504 is removed, a gap remains between the selectively deposited dielectric layer 2502 on the second surface and the first surface. In this case, the gap takes the form of a vertical sidewall of the second surface, which is then exposed to subsequent processing.

Accordingly, fig. 7-10D illustrate variables that can be adjusted to adjust the position of the selectively deposited dielectric 2502 (e.g., on the dielectric second surface) relative to the interface between the first and second surfaces (e.g., between the metal feature 2506 and the low-k dielectric 2508). In particular, fig. 7 shows how the extent or time of the passivation layer etch back affects the relative position; FIG. 8 shows how the thickness of the selectively deposited passivation layer affects the relative position; FIG. 9 shows how the thickness of a selectively deposited dielectric layer affects relative position; fig. 10A-10D show how the topography of the first and second surfaces affects the relative position. These variables can be adjusted to affect whether the selectively deposited dielectric on the second surface is aligned with, has a gap relative to, or overlaps the first surface.

Example application program

Fig. 11A-11E illustrate a device and process of generating a device with improved electrical isolation in some embodiments. Fig. 11A illustrates a partially fabricated integrated circuit having embedded metal features 2606, the embedded metal features 2606 defining a first surface that is flush with a second surface defined by the surrounding low-k material 2608, similar to the planar structure shown in fig. 10A. The metal feature comprises a first material that also includes a Cu 2610 and a TaN barrier material 2612 within the first low-k dielectric material 2608.

Fig. 11B shows the device of fig. 11A after a conductive barrier layer 2614 over the first material. In some embodiments, barrier layer 2614 may be W. Although illustrated as protruding, in some embodiments, the barrier material 2614 over the Cu 2610 lines or vias may be embedded into the surrounding low-k material 2608 and flush with the surrounding low-k material 2608.

Fig. 11C shows the device of fig. 11B after selective deposition of a passivation layer 2604 on the first surface, now defined by the metallic barrier 2614 (W), where the edges of the first surface are exposed. In some embodiments, the passivation layer 2604 can be an organic material, such as a polymer. In some embodiments, the selective deposition of the passivation layer 2604 is followed by an etch back of the passivation layer material sufficient to expose some of the metal first surface.

Fig. 11D shows the device of fig. 11C after selective deposition of a dielectric layer 2602 on the second surface, the dielectric layer 2602 overlapping the metallic first surface. In some embodiments, the dielectric layer 2602 can be a high-k material. In some embodiments, the high-k material may be ZrO ₂ . In some embodiments, the selective dielectric layer 2602 may be a low-k material, such as SiOC, al ₂ O ₃ And SiN. In some embodiments, the selectively deposited dielectric material 2602 may serve as an etch stop with respect to a subsequent etch through the low-k material 2608 to open a trench or via that exposes the metallic barrier material 2614.

Fig. 11E shows the device of fig. 11D after removal of the polymer passivation layer 2604, thereby exposing the underlying metal layer (here, barrier material 2614) surface. The selective dielectric 2602 overlaps the metallic first surface defined by the barrier layer 2614 and reduces the risk of shorting when subsequent metallic features (e.g., overlying metal lines or vias) are formed thereon. In particular, a low-k material is deposited over the structure of FIG. 11E, forming openings and filling with metal. Creating openings by masking and selective low-k etching, and etching the selectively deposited dielectric (e.g., zrO) ₂ ) And (4) stopping. The overlap of the selectively deposited dielectric 2602 with the metal features defined by the barrier layer 2614 is due to conditions selected during passivation, etch back, dielectric deposition and/or topography to prevent misalignment. Thus, the overlap prevents undesired etching of the lower-k material 2608 or contacts to adjacent metal features. Note that the selectively deposited dielectric material 2602 may remain in the final integrated circuit device, acting as an ILD layerThe etching in between is stopped. Although the usual high-k materials are avoided in the metallization process, the parasitic capacitance is minimal. The parasitic capacitance is minimized due to the dominant position of the high-k material relative to the low-k material, which is thin due to its function, and the advantage of the high selectivity of the dielectric cap layer relative to the high-k material outweighs the slight parasitic capacitance introduced by the material selection. Of course, high etch selectivity may also be achieved by a lower k material selectively deposited on the ILD.

Fig. 12A-12B illustrate a device and process of creating a device having an air gap that may be desirable for various reasons, such as reducing parasitic capacitance between closely spaced metal features (e.g., metal lines) in an integrated circuit, in some embodiments. Fig. 12A illustrates a planar surface of a partially fabricated integrated circuit of some embodiments, similar to the device previously illustrated in fig. 10A. The initial structure may be a first surface defined by a metal feature 2706 (e.g., a Cu line with a dielectric and barrier liner) surrounded by a second surface defined by a dielectric material 2608 (e.g., a low-k ILD). A passivation layer 2704 is selectively deposited on the first surface and an etch back is performed to expose the second surface leaving the passivation layer 2704 on the first surface and partially on the second surface. Dielectric 2702 is selectively deposited on the second surface with the dielectric layer edges spaced from the first-second surface boundary onto the second surface. Fig. 12B shows the device of fig. 12A after removing the passivation layer 2704 to expose the first surface and partially expose the second surface previously covered by the first material, leaving a gap 2710 between the selectively deposited dielectric material and the first surface (metal feature 2706). The exposed second material is then selectively etched to form cavities 2712 in those gaps 2710 near the metal features. In some embodiments, the second material that is selectively etched is SiO. In some embodiments, the selective etch is a HBr dry etch. HBr dry etch can selectively etch silicon oxide at a rate of about 6-8nm/min, while some other materials such as silicon nitride (b: (r), (r))<0.3 nm/min) and zirconia: (a)<0.3 nm/min) at a lower rate and may not be free of chlorine (e.g., cl) ₂ ) Or sulfur hexafluoride (e.g. sulfur hexafluoride)，SF ₆ ) Tungsten is etched in the case of (1). The deposition of the third material 2714 (e.g., a standard low-k material) having sufficiently low conformality leaves air gaps 2716 within the low-k material 2708 adjacent the lateral sides of the metal features 2706. As is known in the art, the air cavities reduce the overall k value of the ILD and reduce the parasitic capacitance between metal features.

While certain embodiments and examples have been discussed, it will be understood by those skilled in the art that the scope of the claims extends beyond the specifically disclosed embodiments to other alternative embodiments and/or uses and obvious modifications and equivalents thereof.

Claims

1. A method of selectively depositing a metal oxide on a second surface of a substrate relative to a first surface of the substrate, wherein the first and second surfaces have different compositions, the method comprising in sequence:

forming an organic passivation layer on the first surface selectively from a gas phase reactant relative to the second surface; and

a metal oxide from a gas phase reactant is selectively deposited on a second surface opposite the passivation layer.

2. The method of claim 1, wherein the first surface comprises a metal or metallic material and the second surface comprises a dielectric material.

3. The method of claim 1, wherein the metal oxide comprises zirconium oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, yttrium oxide, lanthanum oxide, or other transition metal oxides, or mixtures thereof.

4. The method of claim 1, wherein the metal oxide comprises alumina.

5. The process of claim 4, wherein the catalyst comprises Trimethylaluminum (TMA), dimethylaluminum chloride, aluminum trichloride (AlCl) ₃ ) Aluminum precursors of dimethylaluminum isopropoxide (DMAI) or Triethylaluminum (TEA) to deposit the aluminum oxide.

6. The method of claim 4, wherein the alumina is deposited using an aluminum precursor comprising a heteroleptic aluminum compound comprising an alkyl group and another ligand.

7. The method of claim 4, wherein the alumina is deposited using an aluminum precursor comprising a metalorganic aluminum compound or an organometallic aluminum compound.

8. The method of claim 4, wherein the alumina is deposited using an aluminum precursor comprising an alkylaluminum compound comprising two different alkyl groups as ligands.

9. The method of claim 4, wherein the aluminum oxide is deposited using an aluminum precursor comprising at least one alkyl ligand and at least one alkoxy ligand.

10. The method of claim 9, wherein the aluminum precursor has one alkyl ligand and two alkoxy ligands.

11. The method of claim 9, wherein the aluminum precursor has two alkyl ligands and one alkoxy ligand.

12. The method of claim 4, wherein using comprises AlMe (OMe) ₂ 、AlMe(OEt) ₂ 、AlMe(OiPr) ₂ 、AlMe(OtBu) ₂ 、AlEt(OMe) ₂ 、AlEt(OEt) ₂ 、AlEt(OiPr) ₂ And AlEt (OtBu) ₂ The aluminum precursor of one or more of (a) deposits aluminum oxide.

13. The method of claim 4, wherein the aluminum oxide is deposited using an aluminum precursor comprising one or more acetic acid ligands.

14. The method of claim 13, wherein the aluminum precursor comprises aluminum triacetate.

15. The method of claim 1, wherein the metal oxide is selectively deposited by an atomic layer deposition process.

16. The method of claim 1, further comprising treating the first surface and the second surface prior to selectively forming the organic passivation layer.

17. The method of claim 16, wherein the treating comprises exposing the substrate to plasma or silane.

18. The method of claim 16, wherein the treating comprises exposing the substrate to N- (trimethylsilyl) dimethylamine (TMSDMA), trimethylchlorosilane, or an alkyl aminosilane.

19. The method of claim 1, wherein selectively forming an organic passivation layer comprises selectively depositing an imide layer on the first surface relative to the second surface.

20. The method of claim 19, further comprising treating the deposited layer by UV treatment or annealing to form a polymer layer.