CN115664699A - Method, apparatus, medium, and computer program product for generation and verification of identification codes - Google Patents

Abstract

The invention relates to the technical field of computers, in particular to a generation and verification method of identification codes. The generation method of the identification code comprises the following steps: generating a body portion of the identification code, the body portion including a random portion; generating a check code of the identification code according to the body part by using a preset check code algorithm; encrypting the random portion; the body part and the check code are combined into an identification code. The identification code checking method comprises the following steps: decrypting the random portion; generating a verification result according to the body part by using a preset verification code algorithm; and comparing the verification result with the verification code, and determining that the body part is correct under the condition that the comparison result is the same. The invention also relates to an identification code generating and verifying device, medium and computer program product.

Description

Method, apparatus, medium, and computer program product for generation and verification of identification codes

Technical Field

The present invention relates to the field of computer technology, and in particular, to a method, an apparatus, a medium, and a computer program product for generating and verifying an identification code.

Background

The industrial internet is a key network infrastructure which meets the development requirement of industrial intelligence, has the characteristics of low time delay, high reliability and wide coverage, and is a new state and application mode formed by the deep fusion of a new generation of information communication technology and advanced manufacturing industry. The industrial internet identification resolution system is an important component of an industrial internet network system, is a neural hub supporting interconnection and intercommunication of the industrial internet, and has the function similar to a domain name resolution system (DNS) in the internet field. The core of the industrial Internet identification and resolution system comprises an identification coding system and a resolution system. The identification code refers to an identity symbol which can uniquely identify physical resources such as machines and products and virtual resources such as algorithms and processes. The industrial product production chain is complex, the identification code is not easy to find due to errors, the identification code is open and searchable, and the identification code is easy to be counterfeited by people guessing the coding method, so that serious economic loss can be caused.

Disclosure of Invention

The invention aims to provide a method, equipment, a medium and a computer program product for generating and verifying an identification code, which solve the technical problem that the identification code in the industrial Internet is easy to forge.

The embodiment of the invention discloses a generation method of an identification code, which is used for electronic equipment and comprises the following steps:

generating an identity-coded body portion, the body portion including a random portion;

generating a check code of the identification code according to the body part by using a preset check code algorithm;

encrypting the random portion;

the body part and the check code are combined into an identification code.

Optionally, encrypting the random portion comprises:

the random portion is encrypted using a private key of an asymmetric encryption algorithm.

Optionally, the asymmetric encryption algorithm is a DSA algorithm, an RSA algorithm, an ECC algorithm, a DH algorithm, an SM2 algorithm, or an SM9 algorithm.

The method of claim 1, wherein the check code algorithm is a parity check algorithm, a hamming check algorithm, or a cyclic redundancy check algorithm.

Optionally, the identification code is an industrial internet identification code.

Optionally, the identification code comprises a prefix and a suffix, the prefix comprising a country code, an industry code and an enterprise code, the suffix comprising an object code and a check code, wherein the prefix and the object code form the body part.

Optionally, the object code includes a business portion for identifying the business object and a random portion.

The embodiment of the invention discloses a method for checking an identification code, which is used for electronic equipment, wherein the identification code comprises a body part and a check code, the body part comprises a random part, and the method comprises the following steps of

Decrypting the random portion;

generating a verification result according to the body part by using a preset verification code algorithm;

and comparing the verification result with the verification code, and determining that the body part is correct under the condition that the comparison result is the same.

Optionally, the random portion is encrypted by a private key of an asymmetric encryption algorithm;

decrypting the random portion includes: the random portion is decrypted using the public key of the asymmetric encryption algorithm.

Optionally, the asymmetric encryption algorithm is a DSA algorithm, an RSA algorithm, an ECC algorithm, a DH algorithm, an SM2 algorithm, or an SM9 algorithm.

Optionally, the check code algorithm is a parity check algorithm, a hamming check algorithm or a cyclic redundancy check algorithm.

Optionally, the identification code is an industrial internet identification code.

Optionally, the identification code comprises a prefix comprising a country code, an industry code and an enterprise code and a suffix comprising an object code and a check code, wherein the prefix and the object code form an ontology part.

Optionally, the object code includes a business portion for identifying the business object and a random portion.

The embodiment of the invention discloses a device for generating identification codes, which comprises a memory and a processor, wherein the memory stores computer executable instructions, and the instructions, when executed by the processor, cause the device to implement the method for generating identification codes according to the embodiment of the invention.

The embodiment of the invention discloses a computer storage medium, wherein instructions are stored on the computer storage medium, and when the instructions are run on a computer, the instructions cause the computer to execute the identification code generation method according to the embodiment of the invention.

Embodiments of the present invention disclose a computer program product comprising computer executable instructions for execution by a processor to implement a method of generating an identification code according to embodiments of the present invention.

The embodiment of the invention discloses a verification device of identification codes, which comprises a memory and a processor, wherein the memory is used for storing computer executable instructions, and the instructions are executed by the processor, so that the device implements the verification method of the identification codes according to the embodiment of the invention.

The embodiment of the invention discloses a computer storage medium, wherein instructions are stored on the computer storage medium, and when the instructions are operated on a computer, the instructions cause the computer to execute the verification method of the identification code according to the embodiment of the invention.

Embodiments of the present invention disclose a computer program product comprising computer executable instructions to be executed by a processor to implement a method of verification of an identity code according to embodiments of the present invention.

Compared with the prior art, the implementation mode of the invention has the main differences and the effects that:

in the present invention, a random portion is introduced for preventing or identifying forgery.

In the present invention, asymmetric encryption ensures that the identification code cannot be forged. And encryption enhances the randomness of the random portion. Only the random part is encrypted, and other parts are not encrypted, so that the calculation can be simplified. The check code is generated by calculation, then the random part is encrypted and replaced, and the random part needs to be decrypted before verification, so that the counterfeiting is further prevented, and the error checking capability is further enhanced.

In the invention, the random part is decrypted by using the public key during verification, the decryption failure indicates that the code is forged, and the verification failure indicates that the code is forged or has errors. The method can be used for off-line checking to verify whether the fake is made, and does not depend on an identification analysis system.

In the present invention, an object code is divided into a business part and a random part, and the random part is used to prevent or recognize forgery.

Drawings

Fig. 1 is a schematic diagram illustrating an implementation scenario of a generation and verification method of an identification code according to an embodiment of the present invention.

Fig. 2 shows a flow chart of a generation method of an identification code according to an embodiment of the present invention.

Fig. 3 shows a schematic diagram of identification coding in a generation process according to an embodiment of the invention.

Fig. 4 shows a flow chart of a method of verifying an identification code according to an embodiment of the invention.

Fig. 5 shows a schematic diagram of identification coding in a verification process according to an embodiment of the invention.

Fig. 6 shows a schematic diagram of identification coding in a verification process according to an embodiment of the invention.

Fig. 7 illustrates a schematic diagram of an industrial internet identification code according to an embodiment of the present invention.

Fig. 8 is a block diagram showing a hardware configuration of an electronic device for generation and verification of an identification code according to an embodiment of the present invention.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

With the rapid development of the industrial internet, the identification codes become important basic and strategic resources, accurate butt joint between a global supply chain system and an enterprise production system can be realized by endowing objects such as parts, machines, products and the like with unique codes, the sharing and sharing of associated data across enterprises, regions and industries are promoted, and a uniform code specification is a key for exerting the value of the coding resources. As shown in fig. 1, terminal 101 and terminal 103 are in the same system, e.g., a global supply chain system or an enterprise production system, and have access to the industrial internet. The terminals 101 and 103 may be desktop terminals or mobile terminals, and the mobile terminals may be, but are not limited to, various personal computers, notebook computers, smart phones, tablet computers, portable wearable devices, code scanning devices, and the like. The terminals 101 and 103 may be installed with applications, such as browsers or clients, that may perform access to remote services. The application related to the embodiment of the application may be a software client, or a client such as a web page or an applet, and if the application is a client such as a web page or an applet, the background server is a background server corresponding to the software or the web page or the applet, and the specific type of the client is not limited.

The terminal 101 generates and allocates an identification code for physical resources and processes such as materials, machines and products, and virtual resources such as software, models and data, then accesses the identification analysis system through the network 102, and registers the identification code in the identification analysis system, so as to be used for logical positioning and information query of physical entities and virtual objects, and support data sharing and sharing across enterprises, regions and industries. The terminal 103 may then obtain the identity code and perform identity resolution. For example, the terminal 103 may be a code scanning gun, a smart phone, or other read-write terminal, and the identification code may use a one-dimensional code, a two-dimensional code, a radio frequency identification code (RFID), a near field communication identifier (NFC), or other code as a carrier, and trigger an identification parsing process with the aid of the terminal 103. Or, the terminal 103 or its chip or communication module may embed the identifier to actively send the parsing request to the parsing node through the network.

The network 102 may be an industrial internet, including one or more, and may include various connection types, such as a wired, wireless communication link, cloud, or fiber optic cable, etc., and the specific examples of the network described above may include an industrial internet provided by a communication provider of the terminals 101 and 103.

Because the industrial production chain is long, the identification codes are easy to be mistaken among systems and are not easy to be found. In the same industry, the identification code is generated according to a uniform specification, and a counterfeiter also knows the rule of identification generation. If counterfeiters inject the forged identification codes into the system, the counterfeiters can also be registered as legal identification codes, so that loss is brought to production enterprises. In order to solve the above problems, in the existing technical solution, a security check code is added to an identification code for discovering a coding error caused by a system error. For example, when the terminal 103 parses the identification code, the identification code is queried in the identification parsing system, and if the identification code can be queried in the identification parsing system, the identification code is proved to be valid, otherwise, the identification code is considered to be illegal.

The prior art scheme can only find coding errors caused by system errors, and can not verify identification codes intentionally edited by counterfeiters. The problem of whether the counterfeits exist is identified by the dependence identification analysis query system, and if a counterfeiter attacks to inject the counterfeited identification codes into the identification code pool to be registered, the counterfeits can be successfully performed. Furthermore, in some off-line production environments, it is not possible to discern whether the identification code is a counterfeit.

In view of the above technical problems, an embodiment of the present application discloses a method for generating an identification code, which is used for an electronic device, and a flowchart of the method is shown in fig. 2, where the method 200 includes:

step 202, generating a body part of the identification code, wherein the body part comprises a random part;

for example, in the scenario shown in fig. 1, the terminal 101 generates and allocates an identification code for physical resources and processes, software, models, data, and other virtual resources such as materials, machines, products, and the like, and as shown in fig. 3, the generated identification code 300 includes a body part 301, and the body part 301 includes a random part 3011. The random portion 3011 may be a random number satisfying statistical randomness, a pseudo random number satisfying cryptographic security randomness, or a true random number satisfying true randomness.

In the present invention, a random portion is introduced for preventing or identifying forgery.

Step 204, generating a check code of the identification code according to the body part by using a preset check code algorithm;

for example, using a check code algorithm, e.g., a parity check algorithm, a hamming check algorithm, or a cyclic redundancy check algorithm, for the body portion 301, a corresponding check code 302 is generated: ccc is used as a security code of the identification code 300 and is used for verifying or security verification of the identification code 300 in subsequent use.

At step 206, the random portion is encrypted.

For example, the random part 3011 is encrypted by using a private key of an asymmetric encryption algorithm, where the random part 3011a before encryption is rrr, and the random part 3011b after encryption is mmm, instead of rrr before encryption. In the present application, the asymmetric encryption algorithm may be, but is not limited to, a DSA algorithm, an RSA algorithm, an ECC algorithm, a DH algorithm, an SM2 algorithm, or an SM9 algorithm.

In the present invention, asymmetric encryption ensures that the identification code cannot be forged. And encryption enhances the randomness of the random portion. Only the random part is encrypted, and other parts are not encrypted, so that the calculation can be simplified. The check code is generated by calculation, then the random part is encrypted and replaced, and the random part needs to be decrypted first to check when the check is required, so that the counterfeiting is further prevented, and the error checking capability is further enhanced.

Step 208, the body part and the check code are combined into an identification code.

Accordingly, an embodiment of the present application discloses a method for verifying an identifier code, which is used for an electronic device, where the identifier code includes an ontology portion and a verification code, the ontology portion includes a random portion, a flowchart of the method is shown in fig. 4, and the method 400 includes:

step 402, decrypting the random part of the identification code;

for example, in the scenario shown in fig. 1, in industrial production, the terminal 103 needs to verify the identification code 300, for example, the identification code 300 may use a one-dimensional code, a two-dimensional code, a radio frequency identification code (RFID), a near field communication identifier (NFC), and the like as a carrier, and the terminal 103 may be used as a code scanning gun, a smart phone, and the like to read the identification code 300, so as to trigger an identification parsing verification process. The terminal 103 or its chip or communication module may embed the identification code 300 to actively send a parsing request to the parsing node through the network. In the verification process, as shown in fig. 5, the random part 3011b of the identification code 300 is encrypted by using a key of an asymmetric encryption algorithm, during verification, the terminal 103 decrypts the random part 3011b of the identification code 300 by using a corresponding public key of the same asymmetric encryption algorithm, if decryption succeeds, mmm of the encrypted random part 3011b is decrypted to rrr of the random part 3011a before encryption, and if decryption fails, the identification code 300 is determined to be forged.

Step 404, generating a checking result according to the body part by using a preset checking code algorithm;

for example, the check code 302 is generated from the body part 301 by using a check code algorithm, and the terminal 103 uses the same check algorithm for the decrypted body part 301 during the check to obtain a check result.

And 406, comparing the verification result with the verification code, and determining that the body part is correct under the condition that the comparison result is the same.

For example, if the verification result is the same as the verification code 302, i.e., both are ccc, it is determined that the identification code 300 is not forged and has no error. Since, if the body portion 301 is not faulty in the production chain and the decryption of the random portion 3011 is successful in step 402, the random portion 3011b is decrypted to the pre-encrypted random portion 3011a generated by the terminal 101, and the body portion 301 is also restored to the body portion 301 used by the terminal 101 to generate the check code 302, it is clear that using the same check code algorithm for the same body portion 301 will yield the same result. If the verification result is different from the verification code 302, it is determined that the identification code 300 is forged or in error. For example, as shown in FIG. 6, if the random portion 3011b is decrypted to obtain a decrypted random portion 3011c, and the random portion 3011c is rrx, which is different from rrr of the random portion 3011a before encryption. Since the random part 3011 is a part of the body part 301, the decrypted body part is also different from the body part 301 used for generating the check code 302, and obviously, the check result is also different from the check code 302, which may indicate that the identification code is forged or in error.

In the invention, the random part is decrypted by using the public key before verification, the decryption failure indicates that the code is forged, and the verification failure indicates that the code is forged or has errors. The method can be used for off-line verification to verify whether the fake is made, and does not depend on an identification analysis system.

According to some embodiments of the application, as shown in fig. 7, the identification code 300 is an industrial internet identification code, comprising a prefix 701 and a suffix 702, the prefix 701 comprising a country code 7011, an industry code 7012 and an enterprise code 7013, the suffix 702 comprising an object code 7021 and a security code 7022, wherein the security code 7022 is used for security verification. In the present application, the object code 7021 is further divided into a business part 7021a and a random part 3011, the check code 302 is used as a security code 7013, and the prefix 701 and the object code 7021 constitute the body part 301. The country code 7011, the industry code 7012, and the enterprise code 7013 of the prefix 701 are codes for uniquely identifying a main body, that is, a country, an industry, and an enterprise, and the business portion 7021a may be codes for uniquely identifying a specific business object in industrial production, for example, physical resources and processes such as materials, machines, products, and the like, and virtual resources such as software, models, data, and the like.

In the present invention, an object code is divided into a business part and a random part, and the random part is used to prevent or identify forgery.

Fig. 8 is a block diagram of a hardware configuration of an electronic device implementing the generation and verification of identification codes according to an embodiment of the present invention.

As shown in fig. 8, electronic device 800 may include one or more processors 802, a system board 808 coupled to at least one of processors 802, a system memory 804 coupled to system board 808, a non-volatile memory (NVM) 806 coupled to system board 808, and a network interface 810 coupled to system board 808.

The processor 802 may include one or more single-core or multi-core processors. The processor 802 may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, baseband processors, etc.). In embodiments of the invention, the processor 802 may be configured to perform one or more embodiments in accordance with the various embodiments shown in fig. 2 and 4.

In some embodiments, the system motherboard 808 may include any suitable interface controllers to provide any suitable interface to at least one of the processors 802 and/or any suitable device or component in communication with the system motherboard 808.

In some embodiments, the system motherboard 808 may include one or more memory controllers to provide an interface to the system memory 804. System memory 804 may be used to load and store data and/or instructions. In some embodiments, system memory 804 of electronic device 800 may include any suitable volatile memory, such as suitable Dynamic Random Access Memory (DRAM).

NVM 806 may include one or more tangible, non-transitory computer-readable media for storing data and/or instructions. In some embodiments, the NVM 806 may include any suitable non-volatile memory, such as flash memory, and/or any suitable non-volatile storage device, such as at least one of an HDD (Hard Disk Drive), CD (Compact Disc) Drive, DVD (Digital Versatile Disc) Drive.

The NVM 806 can include a portion of a storage resource installed on a device of the electronic device 800 or it can be accessed by, but is not necessarily a part of, the device. For example, the NVM 806 can be accessed over a network via the network interface 810.

In particular, system memory 804 and NVM 806 may include: a temporary copy and a permanent copy of instructions 820. The instructions 820 may include: instructions that, when executed by at least one of the processors 802, cause the electronic device 800 to implement the methods shown in fig. 2 and 4. In some embodiments, the instructions 820, hardware, firmware, and/or software components thereof may additionally/alternatively be located in the system motherboard 808, the network interface 810, and/or the processor 802.

Network interface 810 may include a transceiver to provide a radio interface for electronic device 800 to communicate with any other suitable device (e.g., front end module, antenna, etc.) over one or more networks. In some embodiments, network interface 810 may be integrated with other components of electronic device 800. For example, the network interface 810 may be integrated with at least one of the processors 802, the system memory 804, the NVM 806, and a firmware device (not shown) having instructions that, when executed by at least one of the processors 802, the electronic device 800 implements one or more of the various embodiments illustrated in fig. 2 and 4.

The network interface 810 may further include any suitable hardware and/or firmware to provide a multiple-input multiple-output radio interface. For example, network interface 810 may be a network adapter, a wireless network adapter, a telephone modem, and/or a wireless modem.

In one embodiment, at least one of the processors 802 may be packaged together with one or more controllers for a system motherboard 808 to form a System In Package (SiP). In one embodiment, at least one of the processors 802 may be integrated on the same die with one or more controllers for a system motherboard 808 to form a system on a chip (SoC).

The electronic device 800 may further include: an input/output (I/O) device 812 is coupled to the system motherboard 808. I/O device 812 may include a user interface to enable a user to interact with electronic device 800; the design of the peripheral component interface enables peripheral components to also interact with the electronic device 800. In some embodiments, the electronic device 800 further comprises a sensor for determining at least one of environmental conditions and location information associated with the electronic device 800.

In some embodiments, I/O devices 812 may include, but are not limited to, a display (e.g., a liquid crystal display, a touch screen display, etc.), a speaker, a microphone, one or more cameras (e.g., still image cameras and/or video cameras), a flashlight (e.g., a light emitting diode flash), and a keyboard.

In some embodiments, the peripheral component interfaces may include, but are not limited to, a non-volatile memory port, an audio jack, and a power interface.

In some embodiments, the sensors may include, but are not limited to, a gyroscope sensor, an accelerometer, a proximity sensor, an ambient light sensor, and a positioning unit. The positioning unit may also be part of the network interface 810 or interact with the network interface 810 to communicate with components of a positioning network, such as Global Positioning System (GPS) satellites.

It is to be understood that the illustrated structure of the embodiments of the invention is not to be construed as a specific limitation to the electronic device 800. In other embodiments of the present application, the electronic device 800 may include more or fewer components than illustrated, or combine certain components, or split certain components, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Program code may be applied to input instructions to perform the functions described in this disclosure and to generate output information. The output information may be applied to one or more output devices in a known manner. For the purposes of this application, a system for processing instructions that includes the processor 802 includes any system having a processor such as a Digital Signal Processor (DSP), a microcontroller, an Application Specific Integrated Circuit (ASIC), or a microprocessor.

The program code may be implemented in a high level procedural or object oriented programming language to communicate with a processing system. The program code can also be implemented in assembly or machine language, if desired. Indeed, the mechanisms described in this disclosure are not limited in scope to any particular programming language. In any case, the language may be a compiled or interpreted language.

One or more aspects of at least one embodiment may be implemented by instructions stored on a computer-readable storage medium, which when read and executed by a processor, enable an electronic device to implement the methods of the embodiments described herein.

According to some embodiments of the present application, a computer storage medium is disclosed, having stored thereon instructions that, when executed on a computer, cause the computer to perform any one of the possible methods of the first embodiment described above.

The first embodiment is a method embodiment corresponding to the present embodiment, and the present embodiment can be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the first embodiment.

According to some embodiments of the present application, a computer program product is disclosed, comprising computer executable instructions to be executed by a processor to implement a method of generation and verification of an identification code according to embodiments of the present invention.

The first embodiment is a method embodiment corresponding to the present embodiment, and the present embodiment can be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the first embodiment.

It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. In addition, for the convenience of description, only a part, not all of the structure or process related to the present application is illustrated in the drawings. It should be noted that in the present specification, like reference numerals and letters denote like items in the drawings.

It will be understood that, although the terms "first", "second", etc. may be used herein to describe various features, these features should not be limited by these terms. These terms are used merely for distinguishing and are not intended to indicate or imply relative importance. For example, a first feature may be termed a second feature, and, similarly, a second feature may be termed a first feature, without departing from the scope of example embodiments.

In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present embodiment can be understood in specific cases by those of ordinary skill in the art.

The illustrative embodiments of the present application include, but are not limited to, identification code generation and verification methods, apparatus, media and computer program products.

Various aspects of the illustrative embodiments will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. It will be apparent, however, to one skilled in the art that some alternative embodiments may be practiced using the features described in part. For purposes of explanation, specific numbers and configurations are set forth in order to provide a more thorough understanding of the illustrative embodiments. It will be apparent, however, to one skilled in the art that alternative embodiments may be practiced without the specific details. In some other instances, well-known features are omitted or simplified in order not to obscure the illustrative embodiments of the present application.

Further, various operations will be described as multiple operations separate from one another in a manner that is most helpful in understanding the illustrative embodiments; however, the order of description should not be construed as to imply that these operations are necessarily order dependent, and that many of the operations can be performed in parallel, concurrently, or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when the described operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.

References in the specification to "one embodiment," "an illustrative embodiment," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may or may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature is described in connection with a particular embodiment, the knowledge of one skilled in the art can affect such feature in combination with other embodiments, whether or not such embodiments are explicitly described.

The terms "comprising," "having," and "including" are synonymous, unless the context dictates otherwise. The phrase "A and/or B" means "(A), (B) or (A and B)".

As used herein, the term "module" may refer to, be part of, or include: memory (shared, dedicated, or group) for executing one or more software or firmware programs, an Application Specific Integrated Circuit (ASIC), an electronic circuit and/or processor (shared, dedicated, or group), a combinational logic circuit, and/or other suitable components that provide the described functionality.

In the drawings, some features of the structures or methods may be shown in a particular arrangement and/or order. However, it should be understood that such specific arrangement and/or ordering is not required. Rather, in some embodiments, these features may be described in a manner and/or order different from that shown in the illustrative figures. Additionally, the inclusion of structural or methodical features in a particular figure does not imply that all embodiments need to include such features, and in some embodiments, may not include such features or may be combined with other features.

In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented in the form of instructions or programs carried or stored on one or more transitory or non-transitory machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors or the like. When the instructions or program are executed by a machine, the machine may perform the various methods described previously. For example, the instructions may be distributed via a network or other computer readable medium. Thus, a machine-readable medium may include, but is not limited to, any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), such as floppy diskettes, optical disks, compact disc read-only memories (CD-ROMs), magneto-optical disks, read-only memories (ROMs), random Access Memories (RAMs), erasable programmable read-only memories (EPROMs), electrically erasable programmable read-only memories (EEPROMs), magnetic or optical cards, or flash memory or tangible machine-readable memory for transmitting network information via electrical, optical, acoustical or other forms of signals (e.g., carrier waves, infrared signals, digital signals, etc.). Thus, a machine-readable medium includes any form of machine-readable medium suitable for storing or transmitting electronic instructions or machine (e.g., a computer) readable information.

While the embodiments of the present application have been described in detail with reference to the accompanying drawings, the application of the present application is not limited to the various applications mentioned in the embodiments of the present application, and various structures and modifications can be easily implemented with reference to the present application to achieve various advantageous effects mentioned herein. Variations that do not depart from the gist of the disclosure are intended to be within the scope of the disclosure.

Claims (20)

1. A method for generating an identification code, for an electronic device, the method comprising:

generating a body portion of the identification code, the body portion including a random portion;

generating a check code of the identification code according to the body part by using a preset check code algorithm;

encrypting the random portion;

combining the body part and the check code into the identification code.

2. The method of claim 1, wherein encrypting the random portion comprises:

the random portion is encrypted using a private key of an asymmetric encryption algorithm.

3. The method of claim 2, wherein the asymmetric encryption algorithm is a DSA algorithm, an RSA algorithm, an ECC algorithm, a DH algorithm, an SM2 algorithm, or an SM9 algorithm.

4. The method of claim 1, wherein the check code algorithm is a parity check algorithm, a hamming check algorithm, or a cyclic redundancy check algorithm.

5. The method of claim 1, wherein the identification code is an industrial internet identification code.

6. The method of claim 5, wherein the identification code comprises a prefix comprising a country code, an industry code, and an enterprise code and a suffix comprising an object code and the check code, wherein the prefix and the object code comprise the body portion.

7. The method of claim 6, wherein the object code comprises a business portion for identifying a business object and the random portion.

8. A verification method of identification codes is used for electronic equipment, and is characterized in that the identification codes comprise body parts and verification codes, the body parts comprise random parts, and the method comprises the following steps of

Decrypting the random portion;

generating a verification result according to the body part by using a preset verification code algorithm;

and comparing the verification result with the verification code, and determining that the body part is correct under the condition that the comparison result is the same.

9. The method of claim 8, wherein the random portion is encrypted by a private key of an asymmetric encryption algorithm;

decrypting the random portion comprises: decrypting the random portion using a public key of the asymmetric encryption algorithm.

10. The method of claim 9, wherein the asymmetric cryptographic algorithm is a DSA algorithm, an RSA algorithm, an ECC algorithm, a DH algorithm, an SM2 algorithm, or an SM9 algorithm.

11. The method of claim 8, wherein the check code algorithm is a parity check algorithm, a hamming check algorithm, or a cyclic redundancy check algorithm.

12. The method of claim 8, wherein the identification code is an industrial internet identification code.

13. The method of claim 12, wherein the identification code comprises a prefix comprising a country code, an industry code, and an enterprise code and a suffix comprising an object code and the check code, wherein the prefix and the object code comprise the body portion.

14. The method of claim 13, wherein the object code comprises a business portion for identifying a business object and the random portion.

15. An identification code generating device, characterized in that the device comprises a memory storing computer executable instructions and a processor, which instructions, when executed by the processor, cause the device to carry out the identification code generating method according to any one of claims 1-7.

16. A computer storage medium having stored thereon instructions which, when run on a computer, cause the computer to execute the method of generating an identification code according to any one of claims 1-7.

17. A computer program product comprising computer executable instructions for execution by a processor to implement a method of generating an identity code according to any of claims 1 to 7.

18. A verification device for identification codes, characterized in that it comprises a memory storing computer-executable instructions and a processor, which instructions, when executed by the processor, cause the device to implement a verification method for identification codes according to any one of claims 8-14.

19. A computer storage medium having stored thereon instructions which, when run on a computer, cause the computer to perform a method of verifying an identity code according to any one of claims 8-14.

20. A computer program product comprising computer executable instructions for execution by a processor to implement a method of verification of an identity code according to any of claims 8 to 14.

Images