CN115663874A - VSC flexible-direct convergence grid-connected system phase-locked synchronization stability analysis method and system - Google Patents
VSC flexible-direct convergence grid-connected system phase-locked synchronization stability analysis method and system Download PDFInfo
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Abstract
The invention discloses a method and a system for analyzing the phase-locked synchronization stability of a VSC flexible-direct convergence grid-connected system, which belong to the technical field of power grids and are characterized in that when the VSC flexible-direct convergence grid-connected system has an asymmetric fault; the following steps are completed: s1, acquiring circuit characteristics after a fault and current source characteristics of an MMC under a deep fault based on a VSC-MMC system control strategy; s2, when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established; s3, defining a power angle, solving the PCC positive sequence q-axis voltage of the VSC and the existence condition of a balance point, and establishing a second-order nonlinear mathematical model; and S4, analyzing the influence of the key factors on the transient synchronization stability of the system by using a phase plane method. Based on the control strategy, namely the MMC side adopts a positive and negative sequence control strategy, the locking synchronization stability of the VSC-MMC system under the asymmetric fault is analyzed.
Description
Technical Field
The invention belongs to the technical field of power grids, and particularly relates to a method and a system for analyzing phase-locked synchronization stability of a VSC flexible direct-convergence grid-connected system.
Background
With the continuous development of power grids, asymmetric faults are faults with the highest probability in an electric power system in the operation process, and the synchronous stable analysis of locking under the asymmetric faults is more complex. In recent years, voltage Source Converters (VSCs) have been widely used in new energy and high voltage direct current transmission systems as a reliable and mature topology. With the large-scale access of the VSC to the grid, maintaining the phase-locked synchronous stability of the VSC during a fault is of great significance to the active/reactive support during the fault and the stability during fault recovery. In engineering, most of existing VSCs (voltage source controlled rectifiers) keep synchronization with a power grid by using phase-locked loops (PLLs), however, negative sequence currents can affect the synchronization stability of the PLLs, asymmetric faults are various in form, the negative sequence currents under different types of asymmetric faults have different influence laws on the PLLs, a coupling effect exists between positive sequence currents and negative sequence currents, and the PLL stability can be affected by the distribution of different positive sequence currents and different negative sequence currents.
Offshore wind power generation becomes one of main energy sources, so that scenes that new energy with VSC as an interface is sent out through MMC are increased. Under marine wind power MMC sent out this scene, provide stable voltage and frequency by MMC, adopt the control mode of network construction (Grid Forming) promptly, and directly drive the fan and use VSC to link to each other with MMC as the interface, wherein VSC adopts PLL to follow public coupling point (point of common coupling, PCC) point department voltage phase place, realizes with MMC's synchronization. With the stricter new energy grid-connected guide rules, the fault ride-through capability under asymmetric faults is considered under the VSC-MMC scene. Therefore, in order to implement fault ride-through under an asymmetric fault, factors influencing the phase-locked synchronization stability of the system need to be analyzed and researched after the fault.
At present, a phase-locked synchronization VSC grid connection form is a Modular Multilevel Converter (MMC) grid connection (VSC-MMC). For the increasingly strict new energy grid-connected guide rule, the fault ride-through capability under the asymmetric fault is considered under the scene of VSC-MMC, and in order to realize the fault ride-through under the asymmetric fault, factors influencing the synchronous stability of the system phase lock need to be analyzed and researched after the fault. Therefore, analyzing the VSC phase locking synchronization stability under the asymmetric fault has important significance on the safe and stable operation of the system.
In a VSC-MMC system, an MMC serves as a balance node of the system to provide stable positive sequence voltage and frequency, and a voltage-current double closed-loop voltage-frequency (VF) control mode with a current inner loop is adopted. Different from a VSC direct grid-connected system, the VSC-MMC system can independently control negative sequence current due to the fact that power electronic conversion equipment is arranged on two sides of the VSC-MMC system. The research of asymmetric fault ride-through of the VSC-MMC system is still in the preliminary exploration phase, during the asymmetric fault, it is not feasible to control the negative sequence current of both sides to 0, and there is no good theorem that the VSC side or the MMC side can better bear the negative sequence current. However, due to the negative sequence control and the negative sequence current bearing capacity on both sides, a huge space is provided for asymmetrical fault strategy research. Due to the characteristics, the stability of the phase-locking synchronization of the VSC-MMC system under the asymmetric fault is more complex.
Disclosure of Invention
The invention provides a VSC flexible direct convergence grid-connected system phase-locking synchronization stability analysis method and system for solving the technical problems in the known technology.
The invention aims to provide a method for analyzing the phase-locked synchronization stability of a VSC flexible-direct-convergence grid-connected system, which is used for analyzing the phase-locked synchronization stability of the VSC flexible-direct-convergence grid-connected system when an asymmetric fault occurs in the VSC flexible-direct-convergence grid-connected system; the following steps are completed:
s1, acquiring circuit characteristics after a fault and current source characteristics of an MMC under a deep fault based on a VSC-MMC system control strategy;
s2, when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
s3, defining a power angle, solving the PCC positive sequence q-axis voltage of the VSC and the existence condition of a balance point, and establishing a second-order nonlinear mathematical model;
and S4, analyzing the influence of the key factors on the transient synchronization stability of the system by using a phase plane method.
The second objective of the present invention is to provide a phase-locked synchronization stability analysis system for a VSC flexible-direct-convergence grid-connected system, comprising:
a data acquisition module: acquiring the circuit characteristic after the fault and the current source characteristic of the MMC under the deep fault based on the VSC-MMC system control strategy;
establishing an equivalent circuit module: when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
establishing a model module: defining a power angle, solving the PCC positive sequence q-axis voltage of VSC and the existence condition of a balance point, and establishing a second-order nonlinear mathematical model;
an analysis module: and analyzing the influence of key factors on the transient synchronization stability of the system by using a phase plane method.
The third purpose of the invention is to provide an information data processing terminal for implementing the method for analyzing the phase-locked synchronization stability of the VSC flexible-direct convergence grid-connected system.
A fourth object of the present invention is to provide a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to execute the above VSC flexible direct convergence grid-connected system phase-locked synchronization stability analysis method.
The invention has the advantages and positive effects that:
the invention firstly introduces a VSC-MMC system control strategy, circuit characteristics after fault and current source characteristics of MMC under deep fault; when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronous stability is used, then a power angle under the scene is defined, the existence conditions of PCC positive sequence q-axis voltage and a balance point of the VSC are solved, and a second-order nonlinear mathematical model is established. And finally, analyzing the influence of key factors on the transient synchronization stability of the system by using a phase plane method. The influence of the positive sequence/negative sequence dq axis current distribution of the MMC on the stability of the system is discussed in the invention. Under the deep asymmetric fault, initial phase angles phi p and phi n are defined firstly, and the fact that when the angles phi p and phi n are kept constant, the closer phi p is to pi, the stronger the system synchronization stability is, namely when a positive sequence current limiter adopts a limiting mode with priority on a q axis, the transient stability of the system can be enhanced. In addition, the negative-sequence current dq-axis current distribution of the MMC also affects the transient stability of the system. Under the condition of single-phase short circuit fault, when phi n is controlled to be less than or equal to phi p and less than or equal to phi n and less than or equal to phi p + pi/2+ theta, the system can obtain good transient synchronization stability. And under the two-phase grounding and two-phase short circuit faults, when phi n is controlled to be equal to or less than phi p + pi and equal to or less than phi n and equal to or less than phi p +3pi/2+ theta, the system can obtain good transient synchronization stability. In addition, it can be seen that this region changes with the change in φ p, so that φ p and φ n need to be controlled in cooperation with each other for better system stability.
Drawings
FIG. 1 is a block diagram of MMC control using VF control;
FIG. 2 is a VSC control block diagram;
FIG. 3 is a general equivalent circuit diagram of the VSC-MMC system after a fault occurs;
FIG. 4 is a schematic diagram of a current limited mode;
FIG. 5 is an equivalent circuit diagram of the VSC-MMC system under the asymmetric fault;
FIG. 6 is a dq plot of MMC and VSC;
FIG. 7 shows a difference
A lower power angle curve diagram;
FIG. 8 is C under different faults;
FIG. 9 is a diagram of different limiter types;
FIG. 10 is a graph showing the effect of φ p on transient synchronization stability under an asymmetric fault;
FIG. 11 is a diagram showing the effect of different φ p on the transient synchronization stability under a single-phase short-circuit fault;
FIG. 12 is a graph showing the effect of different φ p on the transient synchronization stability under a two-phase ground fault;
FIG. 13 is a graph showing the effect of different φ p on transient synchronization stability under two-phase short circuit fault.
Detailed Description
In order to further understand the contents, features and effects of the present invention, the following embodiments are illustrated and described in detail with reference to the accompanying drawings:
the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art without creative efforts based on the technical solutions of the present invention belong to the protection scope of the present invention.
Please refer to fig. 1 to 13.
A VSC flexible-direct convergence grid-connected system phase-locked synchronization stability analysis method is characterized in that when an asymmetric fault occurs in a VSC flexible-direct convergence grid-connected system; the following steps are completed:
s1, acquiring circuit characteristics after a fault and current source characteristics of an MMC under a deep fault based on a VSC-MMC system control strategy;
s2, when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
s3, defining a power angle, solving the PCC positive sequence q-axis voltage of the VSC and the existence condition of a balance point, and establishing a second-order nonlinear mathematical model;
and S4, analyzing the influence of key factors on the transient synchronization stability of the system by using a phase plane method.
The invention carries out detailed analysis on the phase-locked synchronization stability of the VSC flexible direct grid-connected system under the asymmetric fault. In the VSC-MMC system, wherein the MMC is controlled as shown in fig. 1, in order to limit the fault current, the positive/negative sequence control employs a voltage outer loop and a current inner loop, wherein ums and ims are the PCC voltage and current of the MMC, and umc is the MMC output voltage. Xmeq = ω mLeq is the MMC equivalent output reactance and Leq is the equivalent output inductance. θ MMC = ω mt is the phase provided by the MMC. Xline is the equivalent reactance of the total ac transmission line. In fig. 2, lfil and cfi are VSC output filter inductance and capacitance, uw and iw are VSC output voltage and current, respectively, in fig. 3, iwdc is VSC dc side current, and replaces the dc side of VSC with a constant current source and capacitance, umdc is MMC dc side voltage, and the dc side of MMC is replaced with a constant voltage source. Xw and Xm represent equivalent fault reactances from the fault point to the VSC side and the MMC side, respectively. And uf and if represent fault voltage and fault current, respectively. In fig. 1 and 2, subscripts "d", "q" represent electric quantities of d-axis and q-axis, respectively, while "p", "n" and "0" represent electric quantities in positive sequence, negative sequence and zero sequence, and subscript ref represents a reference value of electric quantities such as current voltage.
When the VSC-MMC system is operating normally, the MMC behaves as a voltage source and the VSC as a current source. When the collection line has a deep asymmetric fault (namely, the fault resistance is small, and the voltage drop amplitude of the line is large), as shown in fig. 3, the output positive sequence voltage of the MMC drops, and since the external ring command of the positive sequence is unchanged, Δ umsp = umspref-umsp >0 is caused, and the command value of the positive sequence current reaches the upper limit of the amplitude limiting value, as shown in the figure. Since the fault circuit is small, the output positive sequence current will exceed the positive sequence current clipping value Impmax. As can be seen from fig. 4, when Δ imsp = imspref-imsp <0 is generated, a gradual decrease of the positive sequence modulation voltage umcp is forced, thereby ensuring that the MMC output positive sequence current can be limited to a maximum value. Therefore, the MMC outputs the positive sequence current to be stabilized at Impmax, and the MMC positive sequence is externally shown as a current source.
In addition, as the negative sequence control of the MMC also adopts the control mode of the voltage-current double closed loop, the design idea is that the negative sequence voltage is controlled to be 0 instead of the negative sequence current limit value through the negative sequence voltage outer loop. Therefore, consistent with the MMC positive sequence power supply characteristic analysis process, when an asymmetric fault occurs, the outer loop of the negative sequence control of the MMC fails, so that the MMC negative sequence current is maintained at the negative sequence current limit value Imnmax, and thus, the MMC exhibits a current source characteristic in the negative sequence network. In the phase-locked synchronous stability analysis, the dynamic process of the current inner loop of the VSC or MMC can be ignored. Therefore, VSCs and MMCs appear as controlled current sources in the sequential network, with the magnitude of the current being the magnitude of the current command value.
Based on the above analysis, according to fig. 3, when a deep asymmetric fault occurs, an equivalent circuit diagram of the VSC-MMC system is shown in fig. 5. The respective sequence impedances in fig. 5 are represented as:
wherein X wp 、X wn And X w0 Positive, negative and zero sequence reactances, X, respectively, of the VSC side mp 、X mn And X m0 Positive, negative and zero sequence reactances, X, respectively, of the MMC side w And X m System reactance, X, being VSC side and MMC side respectively Nw And X Nm The grounding reactance of the VSC side and the MMC respectively.
In the VSC-MMC system, the VSC uses PLL to synchronize with the MMC. To solve the phase-locked second-order nonlinear model of the system, the angle difference between the dq coordinate systems of the VSC and the MMC is defined as the power angle of the VSC-MMC system, and the relationship is shown in fig. 6, where the black coordinate axis represents the dq coordinate system of the MMC, and the q ω -d ω coordinate axis represents the dq coordinate system of the VSC, where the angle difference between the dq coordinate systems is δ, and in addition, ω w = ω m = ω gn in a steady state. The relationship between the electric quantity fM such as voltage or current in the dq coordinate system of the MMC and the electric quantity fW in the dq coordinate system of the VSC is shown as follows:
wherein
Furthermore, according to fig. 6, a mathematical model of the PLL of the VSC in the VSC-MMC system can be derived:
δ＝∫((K pPLL u wpq +K iPLL ∫u wspq dt)dt (4)
in the formula (I), the compound is shown in the specification,
is the positive sequence q-axis voltage at the PCC point of the VSC.
The existence of the balance point of the system is a precondition for realizing the stable operation of the system. Therefore, when analyzing the phase-locked transient synchronization problem of the VSC-MMC system, the condition of the system balance point needs to be discussed first. Taking a single-phase short-circuit fault as an example, when the single-phase short-circuit fault occurs, the equivalent circuit can be solved according to equation (2) as shown in fig. 5 (a)
It is expressed as:
wherein the equivalent impedance is expressed as:
and the initial phase angle is expressed as:
to facilitate analysis
Can be combined with A (1) And B (1) The addition of (a) is considered as a phasor synthesis, and therefore:
wherein:
to ensure that there is a balance point for the system that must be met,
having a solution, therefore, is specifically shown as
Ensuring that formula (11) has a solution, needs to be satisfied
Similarly, the equivalent circuit diagrams under two-phase short circuit and two-phase ground fault are shown in fig. 5 (b) and (c), and the PCC positive sequence q-axis voltage and balance point existence conditions are shown in table 1, where the superscripts (1,1) and (2) represent that the variables are under two-phase ground and two-phase short circuit fault, respectively. Wherein the initial phase angle
And
expressed as shown in formula (7). In addition, in view of the frequency fluctuations of the power grid, it is possible to obtain:
in the formula, ω gn is the 50Hz grid frequency provided by the MMC.
Therefore, the differences in Table 3-1
The expression (13) is substituted into (3-4), and a phase-locked second-order nonlinear model of the VSC-MMC system can be obtained, as shown in Table 2. It can be seen from table 2 that the system synchronization stability is mainly affected by VSC
Phase-locked loop parameters, positive sequence/negative sequence dq axis allocation of MMC.
Table 1: uwspq expression and balance point existence condition under asymmetric fault
Table 2: nonlinear mathematical model expression of PLL
In a VSC-MMC system, the MMC exhibits current source characteristics in both positive and negative sequence networks under deep asymmetric faults. According to Table 2, allocation of the positive/negative sequence dq currents of MMC, i.e. initial phase
And
the phase lock synchronization stability of the system is affected. Therefore, the invention mainly aims at analyzing the influence of the allocation system of the MMC side positive and negative sequences dq.
For the convenience of analysis, taking single-phase short-circuit fault as an example, the single-phase short-circuit fault in table 1 can be similarly identified
The expression is rewritten as:
u wspq ＝F (1) +C (1) (14)
wherein
Similarly, the other faults in Table 1
Overwrite to the new form as shown in table 3. And a voltage-power angle curve of the system can be plotted as shown in fig. 7.
TABLE 3 different asymmetry faults
Expression (2)
As the MMC is composed of switching devices and high controllability, current dq axis distribution can be realized within the range of ensuring the output current to be in the overcurrent capacity. Therefore, the system synchronization stability can be enhanced by controlling according to the dimension pair. From fig. 7, it can be seen that there are two components of C that can affect the system stability, i.e., amplitude and phase. As can be seen from the synchronous instability mechanism and FIG. 7, the control is performed while keeping the amplitude constant
And is
When the fault occurs, the acceleration range of the power angle is increased, and the power angle is easy to cross the UEP (point c) to cause the system to be unstable, and the power angle is divergent. Keeping the amplitude constant, by controlling
And is
When the current limiter is larger, as shown in fig. 7 (b), although the system can obtain better synchronization stability, the current limiter is difficult to control to a proper position due to the action of the current limiter after the fault. Furthermore, if it is in
The system can achieve stability at point b, where the power angle δ is less than 0. After the fault is recovered, the initial power angle position is delta 0<0, which is not conducive to system failure recovery. In engineering practice, the power angle operation range is 0-2 pi. Therefore, it should be controlled to
As shown in fig. 7 (c) and 7 (d),
the closer to pi, the shorter the distance between the point a and the point b, the smaller the power angle acceleration distance, and the higher the synchronization stability of the system. Therefore, it is necessary to secure
And the power angle can not exceed the point c, and the requirements are as follows:
according to the above analysis, as shown in fig. 7 (c) and 7 (d), increasing Cmax can increase the distance between b and c, i.e., increase the deceleration distance. Therefore, to ensure good system stability, the distance between the point a and the point b needs to be reduced, and the distance between the point b and the point c needs to be increased.
TABLE 4 New expression of F2 under different asymmetric faults
As can be seen from fig. 7, when the VSC output current remains constant, i.e. F remains constant, the factors that influence the transient stability of the system are the magnitude of C and the initial phase. To facilitate the analysis of the impact of the MMC positive/negative sequence dq axis current allocation, C under different faults was rewritten as shown in Table 4. From table 4, it can be seen that under an asymmetric fault, C is synthesized by the MMC output positive sequence current contribution Q1 and negative sequence current contribution Q2, and the synthesized phasor of C can be plotted, as shown in fig. 8.
(1) Analysis of influence of positive-sequence dq-axis current distribution on transient stability
Generally, MMC output current is predominantly positive sequence current dominated. As can be seen from fig. 8, the amplitude and phase of Q1 and Q2 are affected by the combination under different asymmetric faults. After a fault, the positive sequence current enters a current limiting modeThe positive-sequence dq current distribution caused by the limiter being different from one limiter to another
By definition, it can be seen that, when a q-axis current-first limiter is employed,
the larger will be, as shown in fig. 3-9, and therefore the slicer type will have a different effect on the initial operating point of the system, and thus on the synchronization stability of the system. When the included angle between Q1 and Q2 is ensured to be constant, that is to say, the included angle is ensured
And with
The angle difference is constant with
Does not change in amplitude, and the initial phase
Will be closer and closer to pi, resulting in an increased stability of the system.
According to Table 2, the timing of keeping the included angle between Q1 and Q2 constant and different under different asymmetric fault types can be drawn
The phase diagram below, as shown in fig. 10. As can be seen from FIG. 10, when
The power angle diverges, as shown by the dotted line, indicating that the system is unstable; ensure other conditions to be unchanged
Or pi, the system stability increases and the power angle can converge, as shown by the dashed and solid lines。
(2) Analysis of influence of negative sequence dq-axis current distribution on transient stability
As can be seen from fig. 8, the combination of Q1 and Q2 causes the phase and amplitude of C to change. Therefore, the Q1 and Q2 synthesis needs to take into account both the phase and amplitude effects to optimize the system stability. In the case of a single-phase short-circuit fault, the phase of Q2 is controlled to be a black shaded area as shown by S1 in fig. 8 (a), which provides good stability
The requirements are satisfied:
in the formula
In case of a two-phase short circuit and a two-phase ground fault, the phase of Q2 is controlled to be a black diagonal region, as shown by S2 in fig. 8 (b), which can provide better stability, and satisfies the following conditions:
in the formula
The superscript (n) may be (2) or (1,1) which represents parameters under the two-phase short-circuit fault and the two-phase ground fault, respectively.
Difference under single-phase short-circuit fault
The effect on transient synchronization stabilization is shown in fig. 11. As can be seen from FIG. 11, the followingIs facing
In the context of the variations of (a),
the area of better stability also changes, and when
In this region, the stability is better than in the other regions, as shown by the solid lines.
Difference under single-phase short-circuit fault
The effect on transient synchronization stabilization is shown in fig. 11. As can be seen from FIG. 11 (a), the setup
When in use
When the power angle of the system converges, as shown by the dotted line, it indicates that the system maintains synchronous stability, and when the power angle converges, the system maintains synchronous stability
Or-pi, -3pi/2, the power angle of the system is divergent, as shown by the two-dot chain line, the dashed line and the solid line, indicating that the system is out of sync and stable at this time. From FIG. 11 (b) and FIG. 11 (c), when
Or 3pi/4, when
At-3 pi/4 and-pi, respectively, the power angle of the system can converge to a stable equilibrium point, at which time the system remains synchronized and stable, as shown by the dotted line. When in
Taking out the region other than S1 in FIG. 8 (a)In the field, the power angle diverges, resulting in a loss of system stability. It can be seen that S1 in FIG. 8 (a) follows
Is changed when
When the system falls in the area S1, the system can obtain better stability.
Two-phase ground fault and two-phase short-circuit fault are different
The effects on transient synchronization stabilization are shown in fig. 12 and 13, respectively. As can be seen from fig. 12 (a) and 13 (a), an arrangement is provided
When in use
The power angle of the system converges, as shown by the solid line, indicating that the system maintains synchronous stability, while the power angle of the system converges, as shown by the solid line
Or-pi/2, -pi, the power angle of the system is divergent, as shown by the dashed-two dotted line, the dashed-dotted line, and the dashed-dotted curve, indicating that the system is now out of sync stability. As can be seen from FIGS. 12 (b) and 13 (b), and FIGS. 12 (c) and 13 (c), when
When increased to pi/2 or 3pi/4, when
At-7 pi/4 and-2 pi, respectively, the power angle of the system can converge to a stable equilibrium point, at which time the system remains synchronized and stable, as shown by the solid line. Therefore, under two-phase short circuit and two-phase ground fault, S2 in fig. 8 (b) follows
Will vary, and furthermore, will
In S2, the system can obtain good stability.
This application has defined the merit angle of VSC-MMC system based on the dq coordinate system of MMC and VSC, converts the electric quantity under the MMC coordinate system to under the dq coordinate system of VSC to the PCC positive sequence q axle voltage of VSC and the condition that stable balance point exists under the asymmetric trouble have been solved. A phase-locked loop second-order nonlinear transient model for analysis is established, key influencing factors are extracted, and MMC positive sequence/negative sequence dq current distribution is mainly included.
And the influence of key factors on the transient synchronization stability of the system is analyzed by using a phase plane method. The influence of the positive sequence/negative sequence dq axis current distribution of the MMC on the stability of the system is discussed in the invention. Under a depth asymmetry fault, hold
And
when the angle is fixed at a certain time,
the closer to pi, the stronger the system synchronization stability, namely, the transient stability of the system can be enhanced when the positive sequence current limiter adopts a q-axis-first limiting mode. In addition, the negative-sequence current dq-axis current distribution of the MMC also affects the transient stability of the system. Under single-phase short-circuit fault when
Is controlled at
And the system can obtain good transient synchronization stability. When two phases are grounded and two phases are in short circuit fault
Is controlled at
And the system can obtain good transient synchronization stability. In addition, it can be seen that this area follows
So that to obtain a better stability of the system, it is necessary to change
And
and controlling in a mutual matching way.
A VSC flexible direct convergence grid-connected system phase-locked synchronization stability analysis system comprises:
a data acquisition module: acquiring the circuit characteristic after the fault and the current source characteristic of the MMC under the deep fault based on the VSC-MMC system control strategy;
establishing an equivalent circuit module: when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
establishing a model module: defining a power angle, solving the PCC positive sequence q-axis voltage of VSC and the existing conditions of a balance point, and establishing a second-order nonlinear mathematical model;
an analysis module: and analyzing the influence of the key factors on the transient synchronization stability of the system by using a phase plane method.
The third purpose of the invention is to provide an information data processing terminal for implementing the method for analyzing the phase-locked synchronization stability of the VSC flexible-direct convergence grid-connected system.
A fourth object of the present invention is to provide a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to execute the above VSC flexible direct convergence grid-connected system phase-locked synchronization stability analysis method.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When used in whole or in part, can be implemented in a computer program product that includes one or more computer instructions. When loaded or executed on a computer, cause the flow or functions according to embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL), or wireless (e.g., infrared, wireless, microwave, etc.)). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), among others.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention in any way, and all simple modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the scope of the technical solution of the present invention.
Claims (9)
1. A VSC flexible direct convergence grid-connected system phase-locked synchronization stability analysis method is characterized in that when an asymmetric fault occurs in a VSC flexible direct convergence grid-connected system; the following steps are completed:
s1, acquiring circuit characteristics after a fault and current source characteristics of an MMC under a deep fault based on a VSC-MMC system control strategy;
s2, when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
s3, defining a power angle, solving the PCC positive sequence q-axis voltage of the VSC and the existence condition of a balance point, and establishing a second-order nonlinear mathematical model;
and S4, analyzing the influence of key factors on the transient synchronization stability of the system by using a phase plane method.
2. The method for analyzing the phase-locked synchronous stability of the VSC flexible direct-sink grid-connected system according to claim 1, wherein the deep fault is that a fault resistance is small and a line voltage drop amplitude is increased.
3. The method for analyzing the phase-locked synchronization stability of the VSC soft direct convergence grid-connected system according to claim 1, wherein the sequence impedances of the equivalent circuit are expressed as:
wherein, X wp 、X wn And X w0 Positive, negative and zero sequence reactances, X, respectively, of the VSC side mp 、X mn And X m0 Positive, negative and zero sequence reactances, X, respectively, of the MMC side w And X m System reactance, X, being VSC side and MMC side respectively Nw And X Nm The grounding reactance of the VSC side and the MMC respectively.
4. The method for analyzing the phase-locked synchronization stability of the VSC flexible direct-convergence grid-connected system according to claim 1, wherein S3 specifically comprises: based on the dq coordinate system of MMC and VSC, define the merit angle of VSC-MMC system, convert the electric quantity under the MMC coordinate system to under the dq coordinate system of VSC to solve the PCC positive sequence q axle voltage of VSC and the condition that stable balance point exists under the asymmetric fault, establish the phase-locked loop second order non-linear transient state model that is used for the analysis, extracted key factor, key factor includes MMC positive sequence/negative sequence dq current distribution.
5. The utility model provides a gentle direct integration of VSC synchronization stability analytic system that is incorporated into power networks phase-locked which characterized in that includes:
a data acquisition module: acquiring the circuit characteristic after the fault and the current source characteristic of the MMC under the deep fault based on the VSC-MMC system control strategy;
establishing an equivalent circuit module: when a deep fault is established, an equivalent circuit for analyzing the phase-locked synchronization stability is established;
establishing a model module: defining a power angle, solving the PCC positive sequence q-axis voltage of VSC and the existing conditions of a balance point, and establishing a second-order nonlinear mathematical model;
an analysis module: and analyzing the influence of key factors on the transient synchronization stability of the system by using a phase plane method.
6. The VSC soft direct convergence grid-connected system phase-locked synchronous stability analysis system of claim 5, wherein the deep fault is a small fault resistance and an increased line voltage sag amplitude.
7. The VSC soft direct convergence grid-connected system phase-locked synchronous stability analysis system of claim 5, wherein the equivalent circuit sequence impedances are expressed as:
wherein, X wp 、X wn And X w0 Positive, negative and zero sequence reactances, X, respectively, of the VSC side mp 、X mn And X m0 Positive, negative and zero sequence reactances, X, respectively, of the MMC side w And X m System reactance, X, being VSC side and MMC side respectively Nw And X Nm The grounding reactance of the VSC side and the MMC respectively.
8. An information data processing terminal for implementing the VSC flexible direct convergence grid-connected system phase-locked synchronization stability analysis method according to any one of claims 1 to 4.
9. A computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to perform the VSC flexible grid-tied system phase-locked synchronization stability analysis method of any one of claims 1 to 4.
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