CN115659897B - Electronic device, storage medium, device and method for determining flip chip pitch - Google Patents
Electronic device, storage medium, device and method for determining flip chip pitch Download PDFInfo
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Abstract
The application discloses an electronic device, a storage medium, a device and a method for determining flip chip spacing, and belongs to the field of quantum chip manufacturing. The scheme utilizes upper and lower chips in the flip chip to construct a coordinate system and a corresponding plane equation, and solves partial coordinates of the concerned point through the equation to obtain other coordinates of the concerned point, so that pitch data of the flip chip is obtained. According to the scheme, the distance between each two positions in the chip can be measured and calculated on the premise that the arrangement density of the components in the flip chip is not affected, so that the flip chip has high use flexibility and convenience.
Description
Technical Field
The application belongs to the field of quantum chip preparation, and particularly relates to an electronic device, a storage medium, and a device and a method for determining flip chip spacing.
Background
At present, the number of quantum bits in a quantum chip is continuously increased, so that in the preparation process of the quantum chip, a flip chip bonding process is often selected to convert the planar structure of the chip into a three-dimensional structure, so that the utilization rate of unit area is improved, and the area of the chip is controlled.
The flip chip bonding process requires the formation of bonding metal layers on the upper chip and the base chip/lower chip, respectively, and then pressure bonding the upper chip and the base chip together to form the flip chip. The solder metal layer therein may serve the dual function of a mechanical connection and an electrical connection.
Conventionally, in superconducting quantum chips, the pitch between upper and lower chips after crimping is generally between several micrometers and tens of micrometers. In view of the small spacing between the upper and lower chips, the precision of the corresponding equipment is limited, and the physical and chemical processes in the crimping process and other factors, the layer spacing of the flip chip cannot be precisely controlled, or the precise control is difficult.
On the other hand, the chip spacing determines the coupling of the circuits and the primordial qi pieces among the chips of different layers to a great extent, so that unexpected influence can be generated on the performance of the chips.
Therefore, there is a need for a solution that is easy to implement and that can effectively detect the layer spacing at different locations of a flip chip without being susceptible to excessive interference from the layout of components in the chip.
Disclosure of Invention
In view of this, the present application discloses an electronic device, a storage medium, an apparatus and a method for determining flip chip pitch. Which can be implemented to determine the pitch of the flip chip. And the scheme can realize the determination of the spacing of the positions of interest such as the edge, the inside and the like of the flip chip under the condition of higher density of components in the chip, thereby having higher use flexibility and convenience.
The scheme exemplified by the application is implemented as follows.
In a first aspect, the present examples provide a method of determining a flip-chip pitch of a first chip and a second chip having flip-chip interconnections. The method comprises the following steps:
selecting a target point from the first chip surface, and obtaining a plane equation in a three-dimensional orthogonal coordinate system;
the three-dimensional orthogonal coordinate system is determined by a first coordinate axis, a second coordinate axis and a third coordinate axis, a plane defined by the first coordinate axis and the second coordinate axis is coincident with the surface of the second chip, and a plane expressed by a plane equation is coincident with a target area of the surface of the first chip;
the target point is provided with coordinate information based on a three-dimensional orthogonal coordinate system, wherein the coordinate information comprises a first coordinate of the target point on a first coordinate axis, a second coordinate of the target point on a second coordinate axis and a third coordinate of the target point on a third coordinate axis, and the third coordinate is related to the distance between the first chip and the second chip;
substituting the first coordinate and the second coordinate in the coordinate information into a plane equation, and solving a third coordinate of the target point.
In the above-described scheme, the third coordinate associated with the pitch of the first chip and the second chip is calculated using two coordinates among the three-dimensional coordinates of the target point based on the plane equation in the three-dimensional orthogonal coordinate system, thereby obtaining the pitch of the first chip and the second chip.
Wherein a plane defined by the first coordinate axis and the second coordinate axis of the three-dimensional orthogonal coordinate system coincides with the surface of the second chip. The surface of the first chip may be positioned within the three-dimensional orthogonal coordinate system, and the points in the surface of the first chip have three-dimensional coordinates in the three-dimensional orthogonal coordinate system. Therefore, a plane equation corresponding to a plane coincident with the surface of the first chip is constructed in the three-dimensional orthogonal coordinate system, and the third coordinate of the plane equation can be calculated from two coordinates of one interest point by using the plane equation. Since the coordinates of any point in the three-dimensional orthogonal coordinate system are the vertical distances of the other two coordinate axes corresponding to the projection point distances of the point on one axis, the third coordinate obtained by the calculation can be known to represent the distance between the first chip and the second chip.
In a second aspect, examples of the present application provide a method of determining a flip-chip pitch of a first chip and a second chip having flip-chip interconnections. The method comprises the following steps:
constructing a three-dimensional orthogonal coordinate system, wherein one coordinate plane of the three-dimensional orthogonal coordinate system is determined according to the surface of one chip of the first chip and the second chip;
establishing a plane equation of the surface of the other chip in the first chip and the second chip in a three-dimensional orthogonal coordinate system;
Obtaining a target point from the surface of another chip, wherein the target point has target coordinates and two-dimensional coordinates in a coordinate plane, and the target coordinates represent flip chip spacing;
and solving the target coordinates through a plane equation by utilizing the two-dimensional coordinates.
In a third aspect, examples of the present application provide a method of determining a flip-chip pitch of a first chip and a second chip having flip-chip interconnections. The method comprises the following steps:
determining a target point on the surface of the first chip, the target point having a vertical distance relative to the surface of the second chip, and the vertical distance being indicative of a separation between the first chip and the second chip;
three reference points positioned on the surface of the first chip are selected, and the target point is positioned in a triangular area defined by the three reference points;
determining a three-dimensional orthogonal coordinate system and constructing a plane equation matched with three reference points, wherein two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip;
and solving the coordinates of the target point on a third coordinate axis by using the coordinates of the target point on two coordinate axes through a plane equation, wherein the coordinates of the target point on the third coordinate axis are related to the vertical distance.
In a fourth aspect, examples of the present application provide an apparatus for determining a flip-chip pitch having a first chip and a second chip flip-chip interconnected, the apparatus comprising:
a first determining module for determining a target point on the first chip surface, the target point having a vertical distance relative to the first chip surface, and the vertical distance being indicative of a separation between the first chip and the second chip;
the selecting module is used for selecting three reference points positioned on the surface of the first chip, and the target point is positioned in a triangle area defined by the three reference points;
the second determining module is used for determining a three-dimensional orthogonal coordinate system and constructing a plane equation matched with three reference points, wherein two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip;
and the solving module is used for solving the coordinate of the target point on the third coordinate axis through a plane equation by utilizing the coordinates of the target point on two coordinate axes, and the coordinate of the target point on the third coordinate axis is related to the vertical distance.
In a fifth aspect, examples of the present application provide a storage medium having a computer program stored therein, wherein the computer program is configured to run the aforementioned method of determining flip chip pitch.
In a sixth aspect, examples of the present application provide an electronic device comprising a memory having a computer program stored therein and a processor configured to run the computer program to implement the aforementioned method of determining flip chip pitch.
The beneficial effects are that:
compared with the prior art, the scheme of the application example utilizes the three-dimensional coordinates of a limited number of real measurement points to estimate the coordinates of other points in the flip chip, and the space between chip layers of the flip chip is characterized according to the coordinates. The scheme is not limited by the layout density of components in the chip, and can confirm flip-chip spacing at points of interest of a plurality of areas (such as edges, inside and the like) of the chip.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.
Fig. 1 is a schematic structural diagram of a flip chip according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 3 is a flowchart of a first method for determining a flip chip pitch according to an embodiment of the present application;
Fig. 4 is a flowchart of a second method for determining a flip chip pitch according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an apparatus for determining flip chip pitch according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a three-dimensional orthogonal coordinate system established according to a flip chip in a method for determining a flip chip pitch according to an embodiment of the present application;
fig. 7 is a flowchart of a third method for determining a flip chip pitch according to an embodiment of the present application;
fig. 8 is a schematic diagram of two schemes for selecting positions of real points in the method for determining flip chip pitch according to the embodiment of the present application;
fig. 9 is a schematic diagram of two cases of the target point inside and outside the limited area of the three selected real measurement points in the method for determining flip chip pitch according to the embodiment of the present application.
Icon: 100-flip chip; 101-a first chip; 102-a second chip; 200-an electronic device; 201-bus; 202-a communication module; 203-memory; 204-a processor; 601-a first determination module; 602-a selection module; 603-a second determination module; 604-a solution module.
Detailed Description
To enable quantum chips to integrate more qubits, it is generally chosen to be tuned from a planar architecture to a three-dimensional architecture that is stereoscopic, e.g., built as flip chip 100. The flip chip 100 has, for example, the structure shown in fig. 1 (the interconnection structure, various components, and the like are omitted). One of the diagrams in fig. 1 shows a top view of the flip chip 100, and the other diagram shows a front view of the flip chip 100. As shown in fig. 1, the flip chip 100 has a first chip 101 and a second chip 102, which are laminated and opposed. The first chip 101 and the second chip 102 have a distance d therebetween, so that a gap is formed therebetween. This distance is typically determined in common by the components of the individual chip configuration.
In fabricating the flip chip 100, the distance between the first chip 101 and the second chip 102 is very important. For example, too close a distance may cause component damage (so it is known that the distance is greater than the height of the highest component on the chip surface, and if not, the component will be broken during the bonding process); while too far a distance may result in low space utilization, which is detrimental to the miniaturization of the flip chip 100. Particularly for superconducting quantum chips, too far distance may result in inefficient coupling of different components, components. Therefore, the inter-chip distance needs to be controlled during the fabrication of the flip chip 100.
To the best of the inventors' knowledge, there are currently two main ways to control the inter-chip distance of the flip chip 100 during fabrication.
One is directly by photographing the edges of the flip chip 100 (e.g., with an electron microscope from the front view perspective of fig. 1), and then measuring from the picture to obtain the spacing between the first chip 101 and the second chip 102. To obtain relatively more accurate results, it is common to choose to measure a plurality of points and then to perform data processing (e.g., calculating a simple arithmetic average of all measurements) to obtain the spacing.
Secondly, the flip chip 100 with the transparent substrate is photographed directly on the front side (for example, photographed with an industrial camera from the top view in fig. 1), and the flip chip pitch at the observation point inside the chip is measured. For example, the first chip 101 layer is made of transparent sapphire and the camera focus is automatically found by an industrial camera to determine the height coordinates of the two faces of the two-layer chip. The difference between the height coordinates of the two surfaces is the distance.
Although the two solutions described above may in some cases solve the problem of how to determine the pitch of the flip-chip 100, both also have the drawbacks that each corresponds to overcome. For example, the first approach can only obtain flip-chip pitch at the chip edge. The second method can measure the flip-chip bonding pitch inside the chip, but the number and the positions of the observation points may be limited due to the density of the components and the wiring. Particularly as the number of bits integrated in a chip increases, it is difficult for method two to make efficient measurements.
A new approach is needed to determine the flip-chip pitch of the flip-chip 100. For example, it would be beneficial if the scheme were able to verify the pitch at a plurality of locations or sites of interest on the flip chip 100. Alternatively, the scheme can confirm not only the spacing of the chip edges but also other locations such as the internal spacing. Or the scheme's validation of pitch is relatively insensitive to wiring density.
In an example, the present application illustratively proposes a method of determining the pitch of a flip chip 100. It is possible to infer the flip-chip pitch at the qubit locations (but also other locations) by measuring the measured data of the sites. In general, the solution in the example of the present application uses the coordinates of the selected point at/in the region of interest in a two-dimensional plane to calculate the third dimensional coordinate of the point in the direction perpendicular to the aforementioned plane. And the third dimensional coordinate can be used as the flip-chip pitch of the flip-chip 100.
Thus, in general, in the example, a plane containing the selected point is determined, a plane equation of the plane in three-dimensional space is obtained, and the two-dimensional coordinates of the aforementioned point are introduced into the plane equation, so as to solve for the coordinates of the point in the third dimension. Also, therefore, for the pitch of the other positions of the flip chip 100, based on the exemplary scheme of the present application, after coordinates in the two-dimensional plane of the points at the other positions are obtained, third-dimensional coordinates as representative pitches can be obtained by calculation thereof by the aforementioned plane equation.
Since the coordinates in the two-dimensional plane are defined and confirmed based on the surface of the chip, and considering that the components of each layer of chips arranged in the flip chip 100 are also in the two-dimensional plane, the coordinates in the two-dimensional plane of the components in the case of using a transparent substrate can be easily determined, so that the flip chip pitch of the corresponding position can be calculated easily.
It should be noted that the flip-chip pitch generally refers to the vertical distance between the upper chip and the lower chip therein. Therefore, when the plane equation is constructed, the surface of one layer of chips is taken as a coordinate axis plane, and the direction perpendicular to the coordinate axis plane is selected so as to determine a space coordinate system-three-dimensional orthogonal coordinate system with three dimensions. The plane equations mentioned are then confirmed by the points of the spatial coordinate system.
The embodiments of the present application provide a method for determining the pitch of flip chip 100. The method can be applied to an electronic apparatus 200/electronic device such as a computer terminal, specifically such as a general computer, a quantum computer, or the like. The above-listed devices are provided to facilitate understanding of embodiments of the present application and should not be construed as limiting of embodiments of the present application.
The following will describe the operation of a general computer in detail. Fig. 2 is a block diagram of a hardware structure of a computer based on a method for determining a pitch of a flip chip 100 according to an embodiment of the present application.
Referring to fig. 2, the electronic device 200 includes: memory 203, communication module 202, bus 201, and processor 204. Wherein the processor 204, the communication module 202 and the memory 203 are connected via a bus 201.
The electronic device 200 may include one or more (only one shown in fig. 2) processors 204. The processor 204 is arranged to execute executable modules, such as computer programs, stored in the memory 203. The methods performed by the processes or the defined apparatuses disclosed in the embodiments of the present application may be applied to the processor 204 or implemented by the processor 204. After receiving the execution instruction, the processor 204 may implement the corresponding procedure by calling the program stored in the memory 203 through the bus 201. The processor 204 performs various functional applications and data processing by running software programs and modules stored in the memory 203, i.e., implements the methods described above.
The processor 204 may be an integrated circuit chip with signal processing capabilities. The processor 204 may be a general purpose processor 204 including a CPU (Central Processing Unit, central processor 204), NP (Network Processor, network processor 204), etc. The general purpose processor 204 may be a microprocessor 204 or the processor 204 may be any conventional processor 204 or the like.
The processor 204 may also be a microprocessor 204 (MCU), a digital signal processor 204, an application specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component. Which may implement or perform the disclosed methods, steps, and logic blocks in embodiments of the present application.
The memory 203 may be used to store software programs/computer programs and modules of application software, such as program instructions/modules corresponding to the method of determining the pitch of the flip chip 100 in the embodiments of the present application. The Memory 203 may include, but is not limited to, RAM (Random Access Memory, random access Memory 203), ROM (Read Only Memory 203), PROM (Programmable Read-Only Memory 203), EPROM (Erasable Programmable Read-Only Memory 203), EEPROM (Electric Erasable Programmable Read-Only Memory 203), etc. The memory 203 may be, for example, one or more magnetic storage devices, flash memory, or other non-volatile solid state memory 203.
In some examples, the memory 203 may further include memory 203 remotely located relative to the processor 204, such remote memory 203 may be connected to the computer terminal through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The communication module 202 of the electronic device 200 may include a transmission device and an input/output device. As will be appreciated by those of ordinary skill in the art, the transmission means is for example used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission means comprises a network adapter (Network Interface Controller, NIC) connectable to other network devices via the base station to communicate with the internet. In one example, the transmission device may be a Radio Frequency (RF) module, which is used to communicate with the internet wirelessly.
Bus 201 may be ISA (Industry Standard Architecture ) bus 201, PCI (Peripheral Component Interconnect, peripheral component interconnect standard) bus 201, or EISA (EnhancedIndustry Standard Architecture, extended industry standard architecture) bus 201, among others. The bus 201 may be divided into an address bus 201, a data bus 201, a control bus 201, and the like. For ease of illustration, only one bi-directional arrow is shown in fig. 2, but not only one bus 201 or one class of buses 201.
It should be noted that the structure shown in fig. 2 is only schematic, and is not limited to the structure of the electronic device 200. For example, the computer terminal may also include more or fewer components than shown in FIG. 2, or have a different configuration than shown in FIG. 2.
Based on the description of the above hardware operating environment, in order to facilitate understanding of the technical solutions provided in the embodiments of the present application, a method for determining the pitch of the flip chip 100 in the example will be described below.
First example
A method of determining a pitch of a flip chip 100 having a first chip 101 and a second chip 102 flip-chip interconnected. Briefly, referring to FIG. 3 in combination, the method comprises the steps of:
In step S401, a three-dimensional orthogonal coordinate system is constructed, and one of the coordinate planes of the three-dimensional orthogonal coordinate system is determined according to the surface of one of the chips (e.g., the first chip 101).
Step S402, a plane equation in which the surface of another chip (e.g., the second chip 102) is in a three-dimensional orthogonal coordinate system is established.
Step S403 obtains a target point from the surface of another chip (e.g., the second chip 102), the target point having a target coordinate and a two-dimensional coordinate in a coordinate plane, the target coordinate characterizing the flip chip 100 pitch.
And S404, solving the target coordinates through a plane equation by utilizing the two-dimensional coordinates.
Second example
The present example proposes a method of determining the pitch of the flip chip 100, which can be applied, for example, to the pitch of the flip chip having the first chip 101 and the second chip 102 of the flip interconnection.
Referring to fig. 4 in combination, the method includes the steps of:
step S501, determining a target point on the surface of the first chip 101, wherein the target point has a vertical distance with respect to the surface of the second chip 102, and the vertical distance characterizes the distance between the first chip 101 and the second chip 102;
step S502, three reference points on the surface of the first chip 101 are selected, and the target point is located in a triangle area defined by the three reference points;
Step S503, determining a three-dimensional orthogonal coordinate system and constructing a plane equation matched with three reference points, wherein two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip 102;
in step S504, the coordinates of the target point on the third coordinate axis are solved by using the coordinates of the target point on two coordinate axes, and the coordinates of the target point on the third coordinate axis are related to the vertical distance.
Accordingly, a device for determining the pitch of the flip chip 100 can be constructed therefrom, which can be used to perform the above-described method. Referring to fig. 5, the apparatus includes a first determining module 601, a selecting module 602, a second determining module 603, and a solving module 604.
The first determining module 601 is configured to determine a target point on the surface of the first chip 101, where the target point has a vertical distance with respect to the surface of the first chip 101, and the vertical distance characterizes a distance between the first chip 101 and the second chip 102. The selection module 602 is configured to select three reference points located on the surface of the first chip 101, and the target point is located in a triangle area defined by the three reference points. The second determining module 603 is configured to determine a three-dimensional orthogonal coordinate system and construct a plane equation matching the three reference points, where two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip 102. The solving module 604 is configured to solve, by using coordinates of the target point in two coordinate axes, coordinates of the target point in a third coordinate axis according to a plane equation, where the coordinates of the target point in the third coordinate axis are associated with a vertical distance.
Further, to facilitate ease of implementation of the solution in the examples of the present application by those skilled in the art, this is described in detail below.
Third example
To determine the flip chip 100 pitch with the flip-chip interconnected first chip 101 and second chip 102, the present example mainly involves selection of the target point (e.g., denoted as operation 1), establishment of a three-dimensional orthogonal coordinate system (e.g., denoted as operation 2), determination of plane equations of the three-dimensional orthogonal coordinate system (e.g., denoted as operation 3), determination of the target point coordinates (e.g., denoted as operation 4), and solution (e.g., denoted as operation 5). The execution sequence of each operation is, for example: 1. 2, 3, 4 and 5; or, 2, 1, 4, 3 and 5; or, 2, 1, 3, 4 and 5; alternatively, five steps 2, 3, 1, 4 and 5 are taken.
It is known that in the method, a partial example plane equation can be determined depending on the target point; in these examples, as a relatively rough estimate, the target point may be assumed to be within a plane defined by an edge point, such as a chip, for example.
Other example plane equations may be determined apart from the target point; in these examples, taking the target point as a precondition, the plane equation thus determined can be made to represent the region near the target point with higher accuracy, so that the result obtained by solving can more accurately represent the pitch.
As an example, referring to fig. 6 and 7 together, a method of determining a flip chip 100 pitch of a first chip 101 and a second chip 102 having flip interconnections includes the steps of:
s701, obtaining a plane equation in a three-dimensional orthogonal coordinate system, where the three-dimensional orthogonal coordinate system is determined by a first coordinate axis, a second coordinate axis and a third coordinate axis, a plane defined by the first coordinate axis and the second coordinate axis coincides with a surface of the second chip 102, and a plane represented by the plane equation coincides with a surface of the first chip 101.
In an example, a three-dimensional orthogonal coordinate system is constructed from flip chip 100. The three-dimensional orthogonal coordinate system has three coordinate axes perpendicular to each other, such as a first coordinate axis, a second coordinate axis, and a third coordinate axis. Any two of the coordinate axes may define a coordinate plane. One of the coordinate planes of the three-dimensional orthogonal coordinate system coincides with the target area of the surface of the second chip 102, as shown in fig. 6. Wherein coincidence is, for example, meaning that the coordinate plane coincides with the entirety of the surface of the second chip 102; alternatively, the coincidence is, for example, a coincidence indicating that the coordinate plane coincides with a part of the surface of the second chip 102 (for example, the vicinity of the target point). Thus, the target area may be a selected part or all of the surface of the second chip 102.
Meanwhile, the first chip 101 opposite to the second chip 102 is arranged in a direction perpendicular to one of the aforementioned coordinate planes. In fig. 6, the second chip 102 is in an XY plane defined by X and Y axes of a three-dimensional orthogonal coordinate system, and the first chip 101 is spaced from the second chip 102 in the Z axis direction.
The distance between the first chip 101 and the second chip 102 (the distance between the surfaces facing each other) is the pitch of the flip chip 100 formed by flip-chip interconnection of the first chip 101 and the second chip 102. It is understood that the pitch may be represented by the coordinates of the point on the surface of the first chip 101 in the Z coordinate axis in the three-dimensional orthogonal coordinate system.
Based on the above knowledge, a plane equation of the surface of the first chip 101 in a three-dimensional orthogonal coordinate system can be constructed. Then, a point of interest is selected on the surface of the first chip 101, and its coordinates in the Z axis can be solved by substituting the coordinates in the X axis and the Y axis into the plane equation.
As mentioned above, the two surfaces of the first chip 101 and the second chip 102 of the flip chip 100 facing each other may be respectively focused by an industrial camera, thereby obtaining a corresponding height difference, thereby obtaining a pitch. But it does not work well for flip-chip 100 configured with densely distributed components. And it is considered that if the second chip 102 is referenced, the surface of the first chip 101 is not and often is also difficult to achieve perfectly parallel to the surface of the second chip 102. When the first chip 101 has a certain inclination with respect to the second chip 102, the difference in imaging heights of the two planes by the industrial camera does not reflect well the flip pitch at each point of practical interest. And similarly, it is also difficult to represent the pitch inside the chip by taking a picture of the side to obtain the side pitch.
However, in the solution illustrated in the present application, by constructing a plane equation of the surface of the first chip 101 (which may be described as B-plane as a distinction) with respect to the surface of the second chip 102 (a-plane) based on the surface of the second chip 102, it is possible to easily determine the Z-axis coordinates of points (target points) selected in the B-plane based on the X-axis and Y-axis coordinates thereof.
The plane determined by the plane equation described above (for example, simply referred to as the target plane) includes points at which the pitch of the flip chip 100 of the corresponding region/position is desired, i.e., target points. While the target plane may be determined by a plurality of points, for example three points; accordingly, the plane equation may be determined by at least three points; alternatively, the points at which the plane equations are determined may have four, five, six, nine, ten, twelve, sixteen, nineteen, and so on. These at least three points may be points forming a convex polygon or points forming a non-convex polygon (e.g., a concave polygon).
In general, a plane equation for obtaining a target plane can be calculated by coordinates of three points in a three-dimensional orthogonal coordinate system. In order to enable the target plane to cover more points, it may be determined with more point determinations when constructing the plane equation. However, it is not practical to find data that one plane/target plane perfectly fits all chip surfaces, so it can be assumed that flip chip pitch is piecewise smooth.
Based on the consideration of reducing the computational complexity, the method can be used as a relatively simpler and easy-to-implement choice. In some examples, for example, the plane equation is determined by three points forming a convex polygon. In addition, in determining the target plane, it is considered that each point (for example, it may be described as an observation point) is selectively closer to the qubit, for example, two or three observation points may be placed around one qubit. Accordingly, the plane equation may also be determined by three points forming a triangle area, and the target point is located within the triangle area. Briefly, a plane containing the point is selected in the vicinity of the target point, and the equation representing the plane is obtained as the aforementioned plane equation.
It will be appreciated that a number of factors may be considered in selecting the points used to determine the plane equation. For example, the number of plane coverage points corresponding to the plane equation, the calculation amount of the plane equation, the representativeness of flip-chip pitch of the plane corresponding to the plane equation to the target point, and the like.
In measuring a number of factors, an alternative compromise may be to select a plane containing the target point in the vicinity of the point. And is used to determine that this plane is three points, which can form a triangular region, as will be appreciated. In particular, the three points forming the triangular region have a smaller distance from the target point.
Thus, as an example, three points forming a triangular region are obtained by:
step one, determining a target point and a set of real measurement points.
Wherein the target point is a region of interest/selection point of the region of interest, which is typically pre-selected and determined. The actual point is a point on the chip surface (e.g., the B-side as described above), and thus may be one or both from the periphery of the second chip 102 and the interior of the second chip 102, see fig. 8. In fig. 8, (a) shows a set of points selected as real points at the periphery of the chip; in fig. 8, (two) diagrams show a set of points selected as real points inside the chip. It should be understood that fig. 8 is merely given as an example, and that the selection of the set of other real-world points in other examples is not limited by the illustration of fig. 8.
For example, in some examples, when the target point is at a qubit in a flip-chip interconnected superconducting quantum chip, then the real point may be selected to be internal to the B-plane and located near the qubit. When the selected point (actual point) is closer to the target point, it will likely be more representative of the plane of the area in which the target point is located.
And secondly, forming a length sequence from large to small by taking the length of a line segment connecting the real measurement point and the target point as a reference, acquiring three real measurement points corresponding to the minimum value, the second small value and the third small value from the length sequence, and taking the three real measurement points as three points forming a triangle area.
In the step, the real measurement points close to the target point are screened out. Wherein the target point is still located within the plane defined by the three selected actual points. The collection of real points can generally be determined to ensure that the target point is within the plane defined by the collection. And if the target point is not within the plane defined by the collection, the selection of the optimal real point may be considered.
For example, in another example, the plane equation is determined by three points forming a triangular region, which are obtained in the following manner.
Step a, determining a set of target points and real measurement points;
and forming a length sequence from large to small by taking the length of a line segment connecting the real measurement point and the target point as a reference, and acquiring two real measurement points corresponding to the minimum value and the second small value from the length sequence.
Based on the target point, two real points are selected by the length of the connecting line of the real points and the target point. Then, another real measurement point is selected based on the execution, and the plane determined by the three real measurement points is confirmed to cover the target point.
And b, determining a third actual measurement point from the rest actual measurement points, and taking the two actual measurement points and the third actual measurement point as three points for forming the triangular area.
The method of determining a third actual measurement point from the remaining actual measurement points includes the operations of: the operations are selected and the first and second operations are performed on any of the remaining real points.
Wherein, the first operation: the distance d from any point (of the remaining real points) to the target point is calculated. For example, the distance is:
the coordinates of the target point are (x 0, y0, z 0), and the coordinates of the real point are (x 1, y1, z 1).
Wherein the second operation: and judging whether the target point is in an area defined by the two real points and any point.
Taking the target point as p point and the real point as A, B, C as an example. In fig. 9, the graph I shows that the target point p is within the area determined by the real points A, B and C; and correspondingly, judging the second operation to be yes. While graph II shows that the target point p is outside the area determined by the real points A, B and C, i.e., the point p is not in the area determined by the real points A, B and C; and correspondingly, judging the result of the second operation is NO.
The method in which it is determined whether the point p is inside the triangle is as follows.
For a certain point P, three vectors PA, PB, PC are found, and then the following three cross products are calculated:
t1==（p x -a x ，p y -a y )×(b x -a x ，b y -a y )。
t2==（p x -b x ，p y -b y )×(c x -b x ，c y -b y )。
t3==（p x -c x ，p y -c y )×(a x -c x ，a y -c y )。
wherein p is x Representing the coordinates of the p-point on the x-axis in the coordinate system.
If t1, t2, t3 are the same number (either positive or negative), then P is inside the triangle, otherwise it is outside.
Wherein, the selection operation: and executing a first operation and a second operation on all points in the rest real-time points, and selecting one point as a third real-time point according to the results of the first operation and the second operation of all points.
For example, the third real point is the result of the second operation being yes (indicating that the target point is within the area determined by the three real points selected) and the distance of the corresponding first operation being the smallest.
For example, if the remaining real-time points are three, the second operation is performed first, and when the result of the second operation of each point is yes, the first operation is performed on the three points, respectively, and the distance is selected to be the smallest from among them.
For example, if the remaining real-time points are three, and the second operation is performed first, when the result of the second operation of only two points is yes, the first operation is performed on the two points, respectively, and the distance is selected to be the smallest from them.
For example, if the remaining real measurement points are three, and the second operation is performed first, when the result of the second operation of only one point is yes, the point is taken as the third real measurement point.
Or if the number of the remaining real-time points is three, first executing a first operation to calculate the distance between each point and the target point, and selecting the point with the minimum distance from the distances; and then executing a second operation to judge that the target point is within the area determined by the three selected actual measurement points. If the result of the second operation is yes, the second operation is taken as a third actual measurement point. If the result of the second operation is no, the first operation is firstly executed to calculate the distance between each point and the target point, the second small value point is selected from the distances, then the second operation is executed, and the target point is judged to be in the area determined by the three selected actual points. If the result of the second operation is yes, taking the second operation as a third actual measurement point; and so on.
After three real points (and their coordinates) and the target point (and their coordinates) are determined, the plane equation can be obtained conveniently. It can be seen that the plane equation formula (general equation) of the plane in three-dimensional space: ax+by+cz+d=0. And substituting coordinates of the three actual measurement points into the equation to solve A, B, C and D, thus obtaining a plane equation.
S702, selecting a target point from the surface of the first chip 101, where the target point has coordinate information based on a three-dimensional orthogonal coordinate system, and the coordinate information includes a first coordinate of the target point on a first coordinate axis, a second coordinate on a second coordinate axis, and a third coordinate on a third coordinate axis, where the third coordinate is related to a distance between the first chip 101 and the second chip 102.
When the plane equation is determined depending on the target point, then the operation of selecting the target point from the surface of the first chip 101 may be implemented in step S701.
The target point as described above is a point selected on the B-plane, which may be, for example, any position near the qubit inside the chip. The target point may be the location of a bit capacitance, or the location of a josephson junction, for example. Alternatively, the selected point may be, for example, located anywhere on the chip edge; such as locations near the pads, etc.
It can be known that the target point has its corresponding coordinates in the three-dimensional orthogonal coordinate system, which are a first coordinate in the first coordinate axis/X-axis, a second coordinate in the second coordinate axis/Y-axis, and a third coordinate in the third coordinate axis/Z-axis, respectively. Wherein, for convenience of description, the first coordinates and the second coordinates may be expressed as XY coordinate plane coordinates.
It is known that the XY coordinate plane coordinates can be easily recognized directly by a three-dimensional orthogonal coordinate system. For example, when the origin of the three-dimensional orthogonal coordinate system is at the vertex of the first chip 101 under the condition that the surface of the first chip 101 is rectangular as in fig. 6, the length of projection of the line between the target point and the origin on the X-axis and the Y-axis can be measured, thereby obtaining the XY coordinate plane coordinates.
In order to obtain the XY coordinate plane coordinates, one or both of the first chip 101 and the second chip 102 are transparent substrates, and the target point can be selected on-line by an industrial camera, and then the XY coordinate plane coordinates thereof are determined.
S703, substituting the first coordinate and the second coordinate in the coordinate information into a plane equation, and solving a third coordinate of the target point.
Taking the plane equation ax+by+cz+d=0 as an example, the third coordinate is z= [ (-D) -Ax-By ]/C.
The embodiments described above by referring to the drawings are exemplary only and are not to be construed as limiting the present application. For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application clear, the foregoing descriptions of the embodiments of the present application are described in detail with reference to the accompanying drawings. However, as will be appreciated by those of ordinary skill in the art, in the various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments. The division of the examples is for convenience of description, and should not be construed as limiting the specific implementation manner of the present application, and the embodiments may be mutually combined and referred to without contradiction.
It should be noted that the terms "first," "second," "third," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein.
Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The foregoing detailed description of the construction, features and advantages of the present application will be presented in terms of embodiments illustrated in the drawings, wherein the foregoing description is merely illustrative of preferred embodiments of the application, and the scope of the application is not limited to the embodiments illustrated in the drawings.
Claims (14)
1. A method of determining a flip chip pitch having a first chip and a second chip flip-chip interconnected, the method comprising:
selecting a target point from the first chip surface, and obtaining a plane equation in a three-dimensional orthogonal coordinate system; the three-dimensional orthogonal coordinate system is determined by a first coordinate axis, a second coordinate axis and a third coordinate axis, a plane defined by the first coordinate axis and the second coordinate axis is coincident with the surface of the second chip, a plane expressed by a plane equation is coincident with a target area of the surface of the first chip, and the plane equation is obtained by the following steps: selecting a plane containing the point in the vicinity of the target point, and obtaining an equation representing the plane as the aforementioned plane equation;
the target point is provided with coordinate information based on the three-dimensional orthogonal coordinate system, the coordinate information comprises a first coordinate of the target point on a first coordinate axis, a second coordinate of the target point on a second coordinate axis and a third coordinate of the target point on a third coordinate axis, and the third coordinate is related to the distance between the first chip and the second chip;
substituting the first coordinate and the second coordinate in the coordinate information into the plane equation, and solving the third coordinate of the target point.
2. The method of determining flip chip spacing of claim 1, wherein the plane equation is determined from at least three points.
3. The method of determining flip chip pitch of claim 1, wherein the plane equation is determined by at least three points, and the at least three points form a convex polygon.
4. A method of determining flip chip pitch according to claim 3, wherein the plane equation is determined by three points forming a triangular region, and the target point is located within the triangular region.
5. The method of determining flip chip pitch of claim 4, wherein the three points forming the triangular region are obtained by:
determining a set of target points and real points;
and forming a length sequence from large to small by taking the length of a line segment connecting the real measurement point and the target point as a reference, acquiring three real measurement points corresponding to the minimum value, the second small value and the third small value from the length sequence, and taking the three real measurement points as three points forming a triangle area.
6. A method of determining flip chip pitch according to claim 3, wherein the plane equation is determined by three points forming a triangular region, the three points forming a triangular region being obtained by:
Determining a set of target points and real points;
forming a length sequence from large to small by taking the length of a line segment connecting the real measurement point and the target point as a reference, and acquiring two real measurement points corresponding to the minimum value and the second small value from the length sequence;
determining a third actual measurement point from the rest actual measurement points, wherein the two actual measurement points and the third actual measurement point are used as three points for forming a triangle area;
wherein the method of determining a third real site from the remaining real sites comprises the operations of: selecting an operation and performing a first operation and a second operation on any one of the remaining real points;
a first operation: calculating the distance between any point and the target point;
and a second operation: judging whether the target point is in the area defined by the two real points and any point;
selection operation: and executing a first operation and a second operation on all points in the rest real-time points, and selecting one point as a third real-time point according to the results of the first operation and the second operation of all points.
7. The method of determining flip chip pitch of claim 6, wherein selecting a point as a third real point based on results of the first operation and the second operation of all points comprises:
And taking the result of the second operation as a third actual measurement point, wherein the distance of the corresponding first operation is the smallest.
8. The method of determining flip chip pitch of claim 5 or 6 or 7, wherein each real point in the set is from: the periphery of the second chip and/or the interior of the second chip.
9. The method of determining flip chip pitch of claim 1, wherein the surface of the first chip is rectangular and the origin of the three-dimensional orthogonal coordinate system is at the vertex of the first chip.
10. A method of determining a flip chip pitch having a first chip and a second chip flip-chip interconnected, the method comprising:
constructing a three-dimensional orthogonal coordinate system, wherein one coordinate plane of the three-dimensional orthogonal coordinate system is determined according to the surface of one chip of the first chip and the second chip;
establishing a plane equation of the surface of the other chip in the first chip and the second chip in the three-dimensional orthogonal coordinate system;
obtaining a target point from a surface of the other chip, the target point having a target coordinate and a two-dimensional coordinate within the coordinate plane, the target coordinate characterizing the flip chip pitch;
Solving the target coordinate through a plane equation by utilizing the two-dimensional coordinate;
the plane equation is obtained by: a plane containing the point is selected in the vicinity of the target point, and an equation representing the plane is obtained as the aforementioned plane equation.
11. A method of determining a flip chip pitch having a first chip and a second chip flip-chip interconnected, the method comprising:
determining a target point located on a surface of a first chip, the target point having a vertical distance relative to a surface of a second chip, and the vertical distance being indicative of a separation between the first chip and the second chip;
three reference points positioned on the surface of the first chip are selected, and the target points are positioned in a triangular area defined by the three reference points;
determining a three-dimensional orthogonal coordinate system and constructing a plane equation matched with the three reference points, wherein two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip;
and solving the coordinates of the target point on a third coordinate axis through a plane equation by utilizing the coordinates of the target point on the two coordinate axes, wherein the coordinates of the target point on the third coordinate axis are related to the vertical distance.
12. An apparatus for determining a flip chip pitch having a first chip and a second chip flip-chip interconnected, the apparatus comprising:
a first determination module for determining a target point located on a surface of the first chip, the target point having a vertical distance relative to the surface of the first chip, and the vertical distance being indicative of a separation between the first chip and the second chip;
the selecting module is used for selecting three reference points positioned on the surface of the first chip, and the target points are positioned in a triangular area defined by the three reference points;
the second determining module is used for determining a three-dimensional orthogonal coordinate system and constructing a plane equation matched with the three reference points, two coordinate axes of the three-dimensional orthogonal coordinate system define a coordinate axis plane, and the coordinate axis plane coincides with the surface of the second chip;
and the solving module is used for solving the coordinate of the target point on the third coordinate axis through a plane equation by utilizing the coordinates of the target point on the two coordinate axes, and the coordinate of the target point on the third coordinate axis is related to the vertical distance.
13. A storage medium having a computer program stored therein, wherein the computer program is arranged to, when run, implement the method of determining flip chip pitch of any of claims 1 to 9.
14. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, the processor being configured to run the computer program to implement the method of determining flip chip pitch of any of claims 1 to 9.
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