Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
According to the method and the device, the writing data of the same data type can be divided into a plurality of data with the preset unit data size, the data are respectively written into the storage units of the storage blocks corresponding to the channels through each channel, the logic addresses of the writing data of the same data type are continuous, when the firmware is sequentially read, the target reading data can be read out from the storage units of the storage blocks in the highest efficiency by maintaining the parallel operation of multiple channels, the reading and the writing of the multiple channels are considered, and the time consumption can be reduced and the reading speed can be improved by the parallel reading of the data of the multiple channels.
Example 1
Fig. 1 shows a flowchart of a data read-write processing method based on multiple channels according to an embodiment of the present application, as shown in fig. 1, the method includes steps S10 to S20. The specific implementation principle of each step is as follows:
s10, based on a data writing request, writing the writing data with the same data type into the storage units of the storage blocks corresponding to the channels through a plurality of channels in sequence according to a preset unit data amount, wherein continuity exists between logic addresses of the writing data with the same data type.
In this embodiment, an electronic device applied in the data read-write processing method based on multiple channels provided in this embodiment may obtain a data write request, a data read request, or perform data transmission with other electronic devices through a wired connection manner or a wireless connection manner. It should be noted that the wireless connection may include, but is not limited to, 3G/4G connections, wiFi connections, bluetooth connections, wiMAX connections, zigbee connections, UWB (ultra wideband) connections, and other now known or later developed wireless connection means.
Specifically, the data read-write processing method based on multiple channels provided by the application can be applied to a digital storage device carrying UFS, and a main control chip, a firmware algorithm and a flash memory (storage block) can be integrated in the digital storage device. Based on the host end (PC end, terminal) where the digital storage device is located, a data writing request can be sent out, the main control chip processes the data writing request according to a firmware algorithm, generates a data writing request corresponding to the data writing request, and writes the writing data into the storage units of the storage block through a plurality of channels. More specifically, a multi-Channel flash memory interface (CH) may be mounted in the application of the main control chip, and in order to achieve the maximum writing speed, the multi-Channel flash memory interface may operate in parallel based on a plurality of channels, for example: when the specification is configured to 4 flash interface channel numbers (CH 0, CH1, CH2, CH 3) and each channel is configured with 1 CE (chip select), data writing is sequentially performed through the 4 channels, so as to achieve the fastest writing speed. Wherein, a memory block includes a plurality of memory cells, a channel can correspond to a memory cell in the memory block, and the data amount stored in each memory cell is different according to the type of the memory block.
It should be noted that the host side includes, but is not limited to, a camera, a smart phone, a tablet computer, a laptop portable computer, a desktop computer, and the like.
More specifically, the above-mentioned write data may include a plurality of data types, where each data type of write data includes a logical address having continuity, and when the same data type logical address has continuity, it is convenient for data reading, the data of the same data type stored in different storage units can be quickly found according to the continuity to be successfully read. The same channel can respectively transmit the write-in data with different data types, and the write-in data with different data types can be simultaneously written in the storage units corresponding to the channel. The preset unit data amount may refer to a data amount of one page. Such memory blocks include, but are not limited to, MLC memory blocks (MLC flash) or TLC memory blocks (TLC flash), for example: also included is a QLC flash memory. It should be noted that, each memory Cell of the MLC flash memory described above represents 2 bits, and may store 2 pages of data, that is, 2 preset unit data. Each memory cell of the TLC flash memory represents 3 bits, and can store 3 pages of data, that is, 3 preset unit data.
More specifically, compared with the conventional MLC flash memory, when writing, the WL write is performed after 2 pages of data are collected, and when the TLC flash memory collects 3 pages of data, in this application, when the write data of the same data type includes multiple pages of data, as soon as the write data of the current channel satisfies the data of one page of data, the data of the next page of the write data is written into the next channel until the write data of all data types are written into the storage units corresponding to the channels through different channels respectively. Thus, the writing data of the same type and with continuous logic addresses are distributed to different channels by taking the data quantity of one page as a unit, and are written into the storage units of the storage blocks in different channels in sequence.
S20, if a data reading request is acquired, the target reading data is read from the storage units of the storage block in parallel through a plurality of channels based on the continuity between the logic addresses of the writing data of the same data type.
Specifically, if the host side sends out a data reading request, the main control chip can generate a reading command to read the data. In the data reading request, it may be requested to read data of one data type, or may be requested to read data of multiple data types simultaneously. Because the logic addresses in the write data of the same data type have continuity and are written through different channels, the target read data of the same data type can be read in parallel through multiple channels during reading. When reading data of a plurality of data types, target read data may be read in parallel from different channels according to the order/reverse order of the data types of the write channels, for example: the write data of the data type a, the data type b and the data type c are written into the storage unit through the channels CH0, CH1, CH2 and CH3 in sequence by taking the data type as the order, when the write data is read through a plurality of channels simultaneously, the data type a in each channel can be read first, then the data type b is read, then the data type c is read, and conversely, the read data order can also be the data types c, b and a in sequence. Thus, when the multi-channel parallel operation is performed, the target read data of the same data type can be more conveniently read from each channel simultaneously, and the data can be read from the flash memory in a multi-channel parallel mode with the highest efficiency.
In the embodiment of the invention, based on a data writing request, writing data with the same data type into storage units of a storage block corresponding to a channel respectively through a plurality of channels in sequence according to a preset unit data amount, wherein continuity exists between logic addresses of the writing data with the same data type; if a data read request is acquired, the target read data is read from the memory cells of the memory block in parallel through a plurality of channels based on continuity between logical addresses of the write data of the same data type. According to the method and the device, the writing data of the same data type can be divided into a plurality of data with the preset unit data size, the data are respectively written into the storage units of the storage blocks corresponding to the channels through each channel, the logic addresses of the writing data of the same data type are continuous, when the firmware is sequentially read, the target reading data can be read out from the storage units of the storage blocks in the highest efficiency by maintaining the parallel operation of multiple channels, the reading and the writing of the multiple channels are considered, and the time consumption can be reduced and the reading speed can be improved by the parallel reading of the data of the multiple channels.
Example two
In the present embodiment, based on the first embodiment described above, as shown in fig. 2, step S10 includes steps S201 to S202. The specific implementation principle of each step is as follows:
S201, acquiring a data writing request, and acquiring the data type of writing data from the data writing request.
S202, if write-in data of multiple data types exist, dividing the write-in data of each data type by taking a preset unit data amount as a single transmission data amount, and sequentially writing the write-in data into storage units of a storage block corresponding to a channel through multiple channels, wherein each storage unit size of the storage block is at least used for storing two preset unit data amounts.
The data writing request can be analyzed, and the data type of the writing data can be extracted. The amount of write data for each data type may include an amount of data of at least 1page, where the data types include, but are not limited to, LSB page, CSB page, and MSB page. According to the writing data quantity of each data type, the writing data quantity is divided into a plurality of 1-page data quantities with continuity by taking a preset unit data quantity (1-page data quantity) as a single transmission data quantity, and the plurality of 1-page data quantities with continuity are sequentially written into storage units corresponding to the channels through different channels respectively.
When the written data has multiple data types, in order to ensure the writing speed, the written data of the same data type can be sequentially transmitted through different channels, and then the written data of the next data type can be sequentially transmitted through different signals until the written data with the channels is transmitted, and then the data writing is executed. Of course, the write data of the same channel may be transmitted and written into the storage unit, and then the next channel may be transmitted and written. Wherein each memory cell of the memory block has a size of at least two unit data volumes, which may represent a data volume in which each memory cell may store at least 2 pages, for example: in the case of an MLC memory block, each memory cell stores 2 pages of data, and when storing the same data type, 2 pages of data of the data type, and when storing two data types, 1page of data of each of the two data types. For another example: in the case of TLC memory blocks, each memory cell stores the data amount of 3 pages, and in the case of storing the same data type, the data amount of 3 pages for the data type, and in the case of storing two or three data types, the data amount of 3 pages for the total of two or three data types is set in units of the data amount of 1 page. When writing, the data volume of the last 1page with continuity can be written into the storage unit corresponding to the current channel through the next channel as long as the data volume of 1page is satisfied during the transmission of the writing data of the same data type.
Alternatively, as a possible implementation, as shown in fig. 3, step S202 includes steps S301 to S305. The specific implementation principle of each step is as follows:
s301, judging whether at least two data types exist in the written data.
S302, if at least two data types of write-in data exist, taking the write-in data of each data type as single transmission data quantity by using a preset unit data quantity, sequentially transmitting the write-in data of one data type through each channel based on a data type priority mode, and transmitting the write-in data of the next data type after all the write-in data of one data type are transmitted, wherein the write-in data of the same data type enters the next channel for transmission after the single transmission of the channel is completed.
Specifically, before data writing, the type of the data included in the written data may be determined according to the data writing request. When writing data with only one data type, the writing data can be directly written into a storage unit corresponding to a channel in a storage block through a plurality of channels, and after the data volume of 1 page is reached, the data volume of the last 1 page with continuity is written into the next channel. The above-mentioned data type-based priority mode may refer to that the write data of the same data type is transmitted before the write data of the next data type is transmitted. When there are a plurality of data types of write data, the write data of each data type may be sequentially transferred in a single transfer of a data amount of 1 page, for example: the data types 1, 2 and 3 respectively comprise data amounts of 4 pages, the data amounts of the 4 pages of the data type 1 are transmitted through CH 0-CH 3, the data amounts of the 4 pages of the data type 2 are transmitted through CH 0-CH 3, and the data amounts of the 4 pages of the data type 3 are transmitted through CH 0-CH 3.
S303, judging whether the transmission of the writing data of each data type transmitted through the same channel is completed or not based on the state of the channel.
And S304, if the transmission is completed, writing the writing data of each data type transmitted through the same channel into a storage unit of a storage block corresponding to the channel until the writing of the writing data of all the data types is completed.
Specifically, when the channel transmission is completed, a signal indicating the transmission completion state may be obtained, and in the process of all the write data transmission, if it is detected that the write data of each data type transmitted by the same channel has completed transmission, the write data of each data type completed by the same channel may be written into the storage unit corresponding to the channel in the storage block. And after each channel finishes data transmission, writing the writing data of each data type transmitted by each channel into a storage unit corresponding to each channel in the storage block according to the sequence of the transmission completion.
For better illustration, the following description will be given by taking as an example the direct writing of TLC memory blocks into three data types, namely LSB page, CSB page and MSB page, wherein the necessary writing steps and how the logical addresses (writing data) are distributed in the flash memory are shown. The specific steps are as follows:
Step 1, waiting for CH-0CE-0: data 0 of LSB
Step 2, waiting for CH-1CE-0: data 1 of LSB
Step 3, waiting for CH-2CE-0: LSB data 2
Step 4, waiting for CH-3CE-0: LSB data 3
Step 5, waiting for CH-0CE-0: data 4 of CSB
Step 6, waiting for CH-1CE-0: CSB data 5
Step 7, waiting for CH-2CE-0: CSB data 6
Step 8, waiting for CH-3CE-0: data 7 of CSB
Step 9, waiting for CH-0CE-0: data 8 of MSB
Step 10, writing CH-0CE-0: data 0 of LSB, data 4 of CSB and data 8 of MSB
Step 11 wait for CH-1CE-0: MSB data 9
Step 12, write CH-1CE-0: data 1 of LSB, data 5 of CSB and data 9 of MSB
Step 13, waiting for CH-2CE-0: MSB data 10
Step 14, writing CH-2CE-0: data 2 of LSB, data 6 of CSB and data 10 of MSB
Step 15 wait for CH-3CE-0: MSB data 11
Step 16, write CH-3CE-0: data 3 of LSB, data 7 of CSB and data 11 of MSB
Specifically, each of the above waiting steps may represent that data transmission processing is being performed when writing sequentially, and the size of each data is 1 page of data amount. According to the analysis of the steps Step 1 to Step 16, the data types are prioritized, and the same type of data types are transmitted and then the next data type is transmitted. After Step 1 to Step 9 are completed, it can be seen that data 0, which needs to be written to the LSB of CH-0CE-0, data 4 of CSB, and data 8 of MSB have been transferred. Therefore, at Step 10, data 0 of LSB, data 4 of CSB and data 8 of MSB can be written into TLC memory block for storage through CH-0 CE-0. It can be seen that in channel CH-0CE-0, 3 data types are included, as are the other channels.
In the sequential reading process, the parallel operation of multiple channels can be maintained as above, and as the data 0, the data 1, the data 2 and the data 3 with continuity in the same data type LSB page are respectively written in CH-0, CH-1, CH-2 and CH-3, the data of the LSB page can be simultaneously read in parallel through 4 channels. The same logic is used to read the target read data from the flash memory in a multi-channel parallel manner with the highest performance for all the following consecutive data 4 to 7,8 to 11. The above description is given by taking TLC memory block direct writing as an example, and of course, the same logic theory is also applicable to MLC memory block direct writing.
In this embodiment, when there are at least two types of write data, the write data of each type of data uses the data size of 1 page as the single transmission data size, and based on the data type priority mode, the write data of one type of data is sequentially transmitted through each channel, after all the write data of one type of data are transmitted, the write data of the next type of data are transmitted, and when the channel transmission is completed, the write data of the channel are written into the storage unit corresponding to the channel in the storage block. Write-in data of the same data type are written in through different channels, when the data are sequentially read, the target read-in data can be read out from the storage block in the highest efficiency by maintaining parallel operation of multiple channels, the reading and writing of the multiple channels of data are considered, time consumption can be reduced by parallel data reading of the multiple channels, and the reading speed is improved.
Alternatively, as another possible embodiment, referring to fig. 4, step S202 in fig. 2 includes steps S401 to S304. The specific implementation principle of each step is as follows:
s401, judging whether at least two data types exist in the written data.
And S402, if at least two data types of write-in data exist, taking the write-in data of each data type as single transmission data quantity by using a preset unit data quantity, and carrying out single transmission on the write-in data of each data type through the same channel by using the single transmission data quantity based on a channel priority mode.
And S403, after the single transmission of the write-in data of each data type is completed by the same channel, writing the write-in data of each data type in the channel after the transmission is completed into a storage unit of a storage block corresponding to the channel, and then carrying out the single transmission of the next channel until the write-in data of all the data types is completed.
Specifically, in order to increase the direct writing speed of the memory block during data transmission, the data may be transmitted in a channel-first manner. Specifically, in the protocol layer specification of UFS, when the device supports the out-of-order Data writing function (bdata ordering=01h) and is enabled in performing the Data writing task (b Out Of Order Data En =01h), the firmware can specify the logical address to which the host end next Data writing task belongs at RTT UPIU. On the premise that the writing can be performed based on the order of channel priority, when data transmission can be performed based on the channel priority mode, firstly, the writing data of each data type is used for transmitting the data quantity of 1 page for one time, meanwhile, the single transmission is performed through the same channel, when the channel transmission is completed, the writing is directly performed on the storage unit corresponding to the channel, and then, the data quantity of the next 1 page with continuity of each data type is simultaneously written on the next channel. For better illustration, another embodiment is described below by taking TLC memory block as an example to directly write the data of three data types, i.e., LSB page, CSB page, and MSB page, and similarly, only the necessary writing steps and how the logic address data are distributed in the flash memory are shown. The specific steps are as follows:
Step 1, waiting for CH-0CE-0: data 0 of LSB
Step 2, waiting for CH-0CE-0: data 4 of CSB
Step 3, waiting for CH-0CE-0: data 8 of MSB
Step 4, writing CH-0CE-0: data 0 of LSB, data 4 of CSB and data 8 of MSB
Step 5, waiting for CH-1CE-0: data 1 of LSB
Step 6, waiting for CH-1CE-0: CSB data 5
Step 7, waiting for CH-1CE-0: MSB data 9
Step 8, writing CH-1CE-0: data 1 of LSB, data 5 of CSB and data 9 of MSB
Step 9, waiting for CH-2CE-0: LSB data 2
Step 10, waiting for CH-2CE-0: CSB data 6
Step 11, wait for CH-2CE-0: MSB data 10
Step 12, write CH-2CE-0: data 2 of LSB, data 6 of CSB and data 10 of MSB
Step 13, waiting for CH-3CE-0: LSB data 3
Step 14, waiting for CH-3CE-0: data 7 of CSB
Step 15 wait for CH-3CE-0: MSB data 11
Step 16, write CH-3CE-0: data 3 of LSB, data 7 of CSB and data 11 of MSB
Specifically, taking a single-stage example as an illustration, it is known from the steps Step 1 to Step 3 that the transmission process is a channel-first mode, i.e., the write data of each data type is transmitted simultaneously through the channel CH-0 in a data amount of 1 page. After Step 1 to Step 3 are completed, it can be seen that data 0 written in the LSB of CH-0CE-0, data 4 of CSB, and data 8 of MSB have been transferred. Therefore, at Step 4, data 0 of LSB, data 4 of CSB, and data 8 of MSB can be written into the memory cell corresponding to channel CH-0 in TLC memory block for storage through CH-0 CE-0. It can be seen that in channel CH-0CE-0, 3 data types are included. Similarly, the writing mode of other channels is the same as the writing mode of the upper channel. Parallel operation of multiple channels can be maintained as well when sequentially reading, because the same data type and consecutive data 0, data 1, data 2, and data 3 are all written in different channels. The same logic is used to read the target read data from the flash memory in a multi-channel parallel manner with the highest performance for all the following consecutive data 4 to 7,8 to 11. The same logic theory applies to MLC memory block direct writing as well. In addition, the write-in program of the embodiment can optimize the parallel operation of multiple channels, and the data transmission time waiting for other channels is not consumed. Meanwhile, the logic addresses with continuity are distributed on each channel, so that the parallel operation performance of multiple channels can be maintained when the sequential reading task occurs.
Optionally, the step S202 further includes:
and judging whether the written data has residual unwritten data or not based on the data writing quantity of the written data after the written data of the same data type completes the first-round channel transmission.
And if the remaining unwritten data exist, circularly writing the remaining unwritten data into the storage units of the storage blocks corresponding to the channels based on the channel number sequence, wherein the total data quantity transmitted by the same channel does not exceed the maximum writing quantity of the storage units of the storage blocks.
Specifically, when transmitting the write data of each data type, it may be that all the transmissions of the write data of one data type cannot be completed in the first round, so that there is remaining unwritten data, and for this purpose, the remaining unwritten data may be written through the channel again or repeatedly in order of channel number, for example: the number of channels is 4, the writing data of the data type 1 has the data volume of 5 pages, and each time the data volume of 1 page is transmitted through 1 channel, the data volume of the remaining 1 page is not matched with the fifth channel, and the data volume of the remaining 1 page can be transmitted through the 1 st channel and written into a storage unit of a storage block corresponding to the channel. Of course, the total data amount transmitted by the same channel does not exceed the maximum writing amount of the storage unit of the storage block, namely when the maximum writing amount of the storage unit A is the data amount of 3 pages and the data amount of 2 pages is already transmitted, if the data amount of the remaining unwritten data is the data amount of 1 page, the writing of the storage unit A can be continued, and if the data amount of the remaining unwritten data is the data amount of 5 pages, but all the storage units of the storage block are full, the writing of the storage block is not performed at this time. For the case of full writing, it may be erased or written into other memory blocks.
In this embodiment, the remaining unwritten data may be sequentially written into the memory cells corresponding to the channels through each channel, and during sequential reading, the target read data can be read out from the memory block with the highest efficiency by maintaining the parallel operation of multiple channels, which gives consideration to the reading and writing of the multiple channels, and the time consumption can be reduced and the reading speed can be increased by parallel reading of the data through multiple channels.
Example III
In the present embodiment, based on the second embodiment described above, as shown in fig. 5, step S20 includes steps S501 to S502. The specific implementation principle of each step is as follows:
s501, when a data reading request is acquired, acquiring a target reading data type of target reading data in the data reading request;
s502, searching target read data in the storage units of the storage block based on the target read data type, and reading the target read data from the storage units of the storage block in parallel through each channel of the write data based on the continuity of the logic addresses of the write data of the same data type.
When the host side is to read data, a data reading request is sent out, and the data reading request can be analyzed to obtain target read data, namely a read target logical address. The read target read data may include data having continuity in the same data type, and of course, may also include data having continuity in a plurality of data types. When the target read data is sequentially read, the storage units of the storage block can be searched according to the data type of the target data, and after the target read data is searched, the target read data can be read out from each storage unit in parallel through a plurality of channels for writing the target read data according to the continuity of the data. In this embodiment, when sequentially reading, the target read data can be read from the memory block with the highest efficiency by maintaining the parallel operation of multiple channels, which gives consideration to the reading and writing of the multiple channels, and the time consumption can be reduced and the reading speed can be improved by parallel reading of the data of multiple channels.
Example IV
Corresponding to the above-mentioned data read-write processing method based on multiple channels shown in fig. 1, fig. 6 is a schematic diagram of a data read-write processing device based on multiple channels provided in an embodiment of the present application, where the device M60 includes:
the writing module M601 is configured to sequentially write, based on a data writing request, writing data with the same data type into storage units of a storage block corresponding to a channel through a plurality of channels in a preset unit data amount, where continuity exists between logical addresses of the writing data with the same data type;
the reading module M602 is configured to read, in parallel, the target read data from the storage units of the storage block through a plurality of channels based on continuity between logical addresses of the write data of the same data type if the data read request is acquired.
Optionally, referring to fig. 7, fig. 7 is a schematic structural diagram of a writing module according to an embodiment of the present invention. The write module M601 includes:
a first acquiring unit M6011 configured to acquire a data write request, and acquire a data type of write data from the data write request;
and the writing unit M6012 is configured to divide the write data of each data type by using a preset unit data amount as a single transmission data amount if there are multiple data types of write data, and sequentially write the write data into the storage units of the storage blocks corresponding to the channels through multiple channels, where each storage unit size of the storage block stores at least two preset unit data amounts.
Optionally, referring to fig. 8, fig. 8 is a schematic structural diagram of a writing unit according to an embodiment of the present invention. The write unit M6012 includes:
a first judging subunit M60121 configured to judge whether at least two types of data exist in the written data;
the first transmission subunit M60122 is configured to, if there are at least two types of write data, take a preset unit data amount as a single transmission data amount for each type of write data, sequentially transmit the write data of one type of data through each channel based on a data type priority mode, and transmit the write data of the next type of data after all the write data of one type of data are transmitted, where the write data of the same type of data enters the next channel for transmission after the single transmission of the channel is completed;
a second judging subunit M60123, configured to judge whether the transmission of the write data of each data type transmitted through the same channel is completed based on the state of the channel;
and the first writing subunit M60124 is configured to, if the transmission is completed, write the writing data of each data type transmitted through the same channel into the storage unit of the storage block corresponding to the channel until the writing of the writing data of all the data types is completed.
Optionally, referring to fig. 9, fig. 9 is a schematic structural diagram of a writing unit according to an embodiment of the present invention. The write unit M6012 includes:
a third judging subunit M60125, configured to judge whether at least two types of data exist in the written data;
a second transmission subunit M60126, configured to, if there are at least two types of write data, take a preset unit data amount as a single transmission data amount for each type of write data, and perform single transmission on the write data in each type of data through the same channel in a single transmission data amount based on a channel priority manner;
and the second writing subunit M60127 is configured to, after the single transmission of the write data of each data type is completed in the same channel, write the write data of each data type in the channel after the transmission is completed into the storage unit of the storage block corresponding to the channel, and then perform the single transmission of the next channel until the write data of all the data types is completed.
Optionally, the writing unit M6012 further includes:
a fourth judging subunit M60128, configured to judge, based on the data writing amount of the writing data, whether there is remaining unwritten data in the writing data after the first-round channel transmission of the writing data of the same data type is completed;
And the third writing subunit M60129 is configured to, if there is remaining unwritten data, continue to circularly write the remaining unwritten data into the storage units of the storage blocks corresponding to the channels based on the channel numbering order, where the total data amount transmitted by the same channel does not exceed the maximum writing amount of the storage units of the storage blocks.
Alternatively, referring to fig. 10, fig. 10 is a schematic structural diagram of a reading module according to an embodiment of the present invention. The reading module M602 includes:
a second acquiring unit M6021 for acquiring a target read data type of target read data in the data read request when the data read request is acquired;
the reading unit M6022 is configured to search the storage unit of the storage block for the target read data based on the target read data type, and read the storage unit of the storage block in parallel through each channel of the write target read data based on the continuity of the logical address of the write data of the same data type.
The data read-write processing device based on multiple channels provided by the embodiment of the invention can realize each process realized by the data read-write processing method based on multiple channels in the method embodiment, and in order to avoid repetition, the description is omitted. And the same beneficial effects can be achieved.
Example five
Fig. 11 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 11, the electronic device D11 of this embodiment includes: at least one processor D110 (only one shown in fig. 11), a memory D111, a network interface D112, and a computer program stored in the memory D111 and executable on the at least one processor D110. The processor D110 is configured to call a computer program stored in the memory D111, and perform the following steps:
writing the writing data with the same data type into the storage units of the storage blocks corresponding to the channels according to the preset unit data volume through the channels in sequence based on the data writing request, wherein continuity exists between the logic addresses of the writing data with the same data type;
if a data read request is acquired, the target read data is read from the memory cells of the memory block in parallel through a plurality of channels based on continuity between logical addresses of the write data of the same data type.
Optionally, based on the data writing request, the writing data with the same data type is sequentially written into the storage units of the storage blocks corresponding to the channels through the channels according to a preset unit data amount by the processor D110, where the writing unit includes:
Acquiring a data writing request, and acquiring a data type of writing data from the data writing request;
if the write-in data with multiple data types exists, dividing the write-in data with each data type by taking a preset unit data quantity as a single transmission data quantity, and sequentially writing the write-in data into storage units of a storage block corresponding to a channel through multiple channels, wherein each storage unit size of the storage block is used for storing at least two preset unit data quantities.
Optionally, if there are multiple data types of write data, the processor D110 divides the write data of each data type by using a preset unit data amount as a single transmission data amount, and sequentially writes the write data into the storage units of the storage blocks corresponding to the channels through multiple channels, where the method includes:
judging whether at least two data types exist in the written data or not;
if at least two data types of written data exist, taking the written data of each data type as single transmission data quantity by using a preset unit data quantity, sequentially transmitting the written data of one data type through each channel based on a data type priority mode, and transmitting the written data of the next data type after all the written data of one data type are transmitted, wherein the written data of the same data type enter the next channel for transmission after the single transmission of the channel is completed;
Judging whether the transmission of the writing data of each data type transmitted through the same channel is completed or not based on the state of the channel;
and if the transmission is completed, writing the writing data of each data type transmitted through the same channel into the storage unit of the storage block corresponding to the channel until the writing of the writing data of all the data types is completed.
Optionally, if there are multiple data types of write data, the processor D110 divides the write data of each data type by using a preset unit data amount as a single transmission data amount, and sequentially writes the write data into the storage units of the storage blocks corresponding to the channels through multiple channels, where the method includes:
judging whether at least two data types exist in the written data or not;
if at least two data types of write-in data exist, taking the write-in data of each data type as single transmission data quantity by using a preset unit data quantity, and carrying out single transmission on the write-in data of each data type through the same channel by using the single transmission data quantity based on a channel priority mode;
after the single transmission of the write-in data of each data type is completed in the same channel, the write-in data of each data type in the channel after the transmission is written in a storage unit of a storage block corresponding to the channel, and then the single transmission of the next channel is carried out until the write-in data of all the data types is written.
Optionally, the writing data sequentially written into the memory units of the memory blocks corresponding to the channels by the processor D110 through a plurality of channels includes:
after the first-round channel transmission of the written data with the same data type is completed, judging whether the written data has residual unwritten data or not based on the data writing quantity of the written data;
and if the remaining unwritten data exist, circularly writing the remaining unwritten data into the storage units of the storage blocks corresponding to the channels based on the channel number sequence, wherein the total data quantity transmitted by the same channel does not exceed the maximum writing quantity of the storage units of the storage blocks.
Optionally, if the processor D110 obtains the data read request, reading, in parallel, the target read data from the storage units of the storage block through a plurality of channels based on continuity between logical addresses of the write data of the same data type, including:
when a data reading request is acquired, acquiring a target reading data type of target reading data in the data reading request;
and searching target read data in the storage units of the storage block based on the target read data type, and reading the target read data from the storage units of the storage block in parallel through each channel for writing the target read data based on the continuity of the logic addresses of the write data of the same data type.
The electronic device D11 provided by the embodiment of the present invention can implement each implementation manner in the embodiment of the data read-write processing method based on multiple channels, and corresponding beneficial effects, so that repetition is avoided, and no redundant description is provided herein.
d110-D112, it is to be understood that not all illustrated components are required to be implemented, and that more or fewer components may alternatively be implemented. It will be understood by those skilled in the art that the electronic device herein is a device capable of automatically performing numerical calculation and/or information processing according to a preset or stored instruction.
The processor D110 may be a central processing unit (Central Processing Unit, CPU) in some embodiments, the processor D110 may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory D111 may in some embodiments be an internal storage unit of the electronic device D11, such as a hard disk or a memory of the electronic device D11. The memory D111 may also be an external storage device of the electronic device D11 in other embodiments, for example, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the electronic device D11. Further, the memory D111 may also include both an internal storage unit and an external storage device of the electronic device D11. The memory D111 is used to store an operating system, application programs, boot loader (BootLoader), data, and other programs and the like, such as program codes of computer programs and the like. The memory D111 may also be used to temporarily store data that has been output or is to be output.
D112 may comprise a wireless network interface or a wired network interface, which network interface D112 is typically used to establish a communication connection between the electronic device D11 and other electronic devices.
The embodiment of the present invention further provides a computer readable storage medium, on which a computer program is stored, where the computer program, when executed by the processor D110, implements each procedure of the embodiment of the data read-write processing method based on multiple channels provided by the embodiment of the present invention, and can achieve the same technical effects, so that repetition is avoided, and no further description is provided herein.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application implements all or part of the flow of the method of the above embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, where the computer program, when executed by a processor, may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, executable files or in some intermediate form, etc.
The terms first, second and the like in the description and in the claims or in the above-described figures, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.