CN115640136A - Control method, main processor, cooperation processor and system of transformer substation system - Google Patents
Control method, main processor, cooperation processor and system of transformer substation system Download PDFInfo
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Abstract
The embodiment of the invention discloses a control method of a transformer substation system, wherein the transformer substation system comprises a main processor and a plurality of cooperative processors, the method is applied to the main processor, and the method comprises the following steps: acquiring the average load rate of a main processor, wherein the average load rate is the average data of the load rate when no event occurs in the transformer substation system; acquiring a load rate curve of a main processor; when the data of the load rate curve is larger than the average load rate, acquiring first power change data at the current moment and second power change data at the previous moment adjacent to the current moment; and when the first power change data is larger than the second power change data, sending a wake-up signal to the cooperative processor, wherein the wake-up signal is used for waking up the cooperative processor to assist the main processor to work. The embodiment of the invention also discloses a main processor, a cooperation processor and a transformer substation system.
Description
Technical Field
The invention relates to the technical field of substation system control, in particular to a control method, a main processor, a cooperation processor and a system of a substation system.
Background
Currently, a known substation edge control device is generally composed of a plurality of central processing units, services processed by each processor are fixed, resource allocation is also not adjustable, and some processors are only responsible for processing real-time services and some processors are only responsible for processing non-real-time services. Even if the container virtualization technology is adopted on the operating system level of the edge control device, only the independent operation of an internal program of a certain processor can be realized, and the flexible allocation of hardware resources cannot be realized.
In some prior art solutions, in a system with multiple processors, each processor is assigned to process a fixed service, which results in that each processor must be in a running state, so that the power consumption of the whole device is always high, which results in much waste of hardware resources and high power consumption of the device.
In other prior art solutions, a container virtualization technology is used to control a substation edge control device having multiple processors, where the container virtualization technology is a lightweight virtualization technology, and an operating system provides an interface, so that applications can run independently without interfering with each other, and resources used by the applications in running can be managed. Because the running of the application program is isolated in an independent running environment, the independent running environment is like a container, and the running efficiency of the application program is comparable to that of the application program which actually runs on a physical platform. The container virtualization technology cannot dynamically adjust the allocation of the container resources, and a fixed hardware resource allocation can be obtained no matter whether a task is executed or not currently or the quantity of the executed tasks is large, so that the utilization rate of the processor resources is low, and the problem of the waste of the processor hardware resources cannot be solved.
Disclosure of Invention
In view of the above, it is necessary to provide a control method, a main processor, a cooperative processor, and a system for a substation system, which address the above problems.
A control method of a substation system, wherein the substation system comprises a main processor and a plurality of cooperative processors, the method is applied to the main processor, and the method comprises the following steps:
acquiring the average load rate of a main processor, wherein the average load rate is the average data of the load rate when no event occurs in the transformer substation system;
acquiring a load rate curve of a main processor;
when the data of the load rate curve is larger than the average load rate, acquiring first power change data at the current moment and second power change data at the previous moment adjacent to the current moment; and the number of the first and second groups,
and when the first power change data is larger than the second power change data, sending a wake-up signal to the cooperative processor, wherein the wake-up signal is used for waking up the cooperative processor to assist the main processor to work.
Optionally, when the cooperative processor assists the main processor in performing work, the method further includes:
and when the first power change data is smaller than the second power change data, sending a sleep signal to the cooperative processor, wherein the sleep signal is used for controlling the cooperative processor to stop working.
Optionally, when the first power variation data is greater than the second power variation data, sending a wake-up signal to the cooperative processor, specifically including:
acquiring preset cooperation information, wherein the preset cooperation information comprises the number of cooperation processors and a preset awakening rule; and the number of the first and second groups,
and sequentially sending wake-up signals to each cooperative processor according to a preset wake-up rule, and stopping sending the wake-up signals until the data of the load rate curve is less than or equal to the average load rate, or stopping sending the wake-up signals when the quantity of the sent wake-up signals reaches the quantity of the cooperative processors.
Optionally, the preset cooperation information further includes a preset sleep rule; when the first power variation data is smaller than the second power variation data, sending a sleep signal to the cooperative processor, specifically including:
and sequentially sending sleep signals to each cooperative processor according to a preset sleep rule, and stopping sending the sleep signals until the first power change data is larger than the second power change data and the data of the load rate curve is larger than or equal to the average load rate, or stopping sending the sleep signals when the quantity of the sent sleep signals reaches the quantity of the cooperative processors.
Optionally, the method further comprises:
and when the first power change data is larger than the second power change data and the data of the load rate curve is smaller than the average load rate, simultaneously sending sleep signals to all the cooperative processors which work.
Optionally, the obtaining of the load rate curve of the main processor specifically includes:
acquiring sampling precision;
obtaining sampling frequency according to the sampling precision;
sampling the load rate of the main controller according to the sampling frequency to obtain a plurality of load rate data; and (c) a second step of,
and obtaining a load rate curve according to the plurality of load rate data.
Optionally, the architecture of the main processor comprises one or more of a complex instruction set, a reduced instruction set, and a very long instruction word.
The main processor is used for executing the control method of the substation system.
The cooperative processor is used for receiving the wake-up signal obtained in the control method of the substation system.
A substation system comprises the main processor and a plurality of the cooperative processors.
The embodiment of the invention has the following beneficial effects:
the method comprises the steps of obtaining the average load rate of a main processor, obtaining a real-time load rate curve of the main controller, and determining power data of the transformer substation system when no event occurs, so that working power data of the main processor are confirmed, configuration of the main processor is reasonably arranged, and normal operation of the transformer substation is guaranteed. And further. When the data of the load rate curve is larger than the average load rate, first power change data at the current moment and second power change data at the previous moment adjacent to the current moment are obtained, and when the first power change data are larger than the second power change data, a wake-up signal is sent to one or more cooperative processors and used for waking up the one or more cooperative processors to enter a working state to assist the main processor to work. In this embodiment, the plurality of processors dynamically allocate tasks, and when the processors do not need to process the tasks, the processors are in a sleep state, so that the power consumption of the whole system is always in a lower range, the problem of high power consumption of the device is solved, and the waste of hardware resources is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Wherein:
fig. 1 is a flowchart of a control method of a substation system in a first embodiment of the present invention;
FIG. 2 is a flowchart of step S104 in the first embodiment of the present invention;
FIG. 3 is a flowchart of step S102 in the first embodiment of the present invention;
fig. 4 is a schematic structural diagram of a substation system according to a first embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
In this embodiment, the substation system is also referred to as a substation edge control system. The edge control system of the transformer substation belongs to a system under a digital power grid cloud edge control system, wherein physical equipment such as equipment, sensors and various execution terminals of the transformer substation belong to an edge, and a master control system and an auxiliary control system are subjected to hardware integration and function fusion to form an edge control device which is responsible for communication and control between the cloud and the edge. Therefore, the substation edge control system can process all the services by using the main processor and the auxiliary processor.
The cloud side control system is a key technology of a digital power grid, wherein the control technology of the edge control device of the transformer substation is a leading research direction. Currently, a known substation edge control device is generally composed of a plurality of central processing units, and services processed by each processor are fixed, and resource allocation is also not adjustable, and some processors are only responsible for processing real-time services, and some processors are only responsible for processing non-real-time services. Even if the container virtualization technology is adopted on the operating system level of the edge control device, only the independent operation of an internal program of a certain processor can be realized, and the flexible allocation of hardware resources cannot be realized.
Please refer to fig. 1, which is a flowchart illustrating a control method of a substation system according to a first embodiment of the present invention. The method is applied to the main processor, and the control method of the transformer substation system provided by the embodiment of the invention specifically comprises the following steps.
Step S101, obtaining the average load rate of the main processor, wherein the average load rate is the average data of the load rate when no event occurs in the transformer substation system. The architecture of the main processor comprises one or more of a complex instruction set, a reduced instruction set and a very long instruction word. In particular, a complex instruction Set processor (CISC). In a CISC microprocessor, the instructions of a program are executed serially in order, and the operations in each instruction are also executed serially in order. A Reduced Instruction Set Computer (RISC) is a microprocessor that executes fewer types of Computer instructions. Very Long Instruction Word processors (VLIW) use multiple independent functional units, but rather than streaming multiple instructions to individual functional units, they package the operations of multiple instructions into one Very Long Instruction, which is known as a Very Long Instruction Word.
The load rate of the main processor characterizes the utilization rate of the hardware resources. According to the practical production operation experience, the load rate of a main processor of the transformer substation control device has the following fluctuation rule: the load rate of a main processor of a substation control device is increased only when an event (such as a fault causing a protection trip or a remote control breaker changing an operation mode) occurs in a power grid along with a large amount of remote signaling and remote measuring data simultaneously. And as the operation state of the transformer substation is stabilized, the load rate of the main processor can be restored to a lower level.
In the implementation, CISC has the advantages of simple control, RISC has strong capability of processing high-level languages, and some functions of VLIW in a superscalar machine are completed by hardware, so that a great deal of hardware can be saved by the VLIW machine. In practical application, the structure of the corresponding processor can be selected according to the requirements of the system of the transformer substation.
Step S102, a load rate curve of the main processor is obtained. In this embodiment, the main processor monitors its load rate in real time, samples the load rate of the main processor according to a preset sampling frequency to obtain load rate data, and obtains a load rate curve according to the load rate data, with reference to steps S1021 to S1024.
Step S103, when the data of the load rate curve is larger than the average load rate, acquiring first power change data of the current moment and the current momentSecond power change data of the next previous time. In this embodiment, when the data of the load rate curve is greater than the average load rate, it indicates that an unexpected temporary event occurs in the substation system, and the number of events that the main processor needs to process increases. First power change data at the current moment and second power change data at the previous moment adjacent to the current moment are obtained. Where one time is 1ms, the first power rate of change is the second derivative f "(M) of the load rate curve at time t t ) The second power change data of the previous time instant adjacent to the current time instant is the second derivative f "(M) of the load rate curve at the time instant of the previous sampling point (t-1) t-1 ) Absolute value of (a).
And step S104, when the first power change data is larger than the second power change data, sending a wake-up signal to the cooperative processor, wherein the wake-up signal is used for waking up the cooperative processor to assist the main processor to work. Specifically, f ″ (M) is judged t ) Is greater than f "(M) t-1 ) Absolute value of (d), when f' (M) t ) Is greater than f' (M) t-1 ) And sending a wake-up signal to the cooperative processor when the absolute value of the reference signal is less than the absolute value of the reference signal, wherein the wake-up signal is used for waking up the cooperative processor to assist the main processor to work. In practical applications, the mathematical meaning of the second derivative at a certain point on the curve is the rate of change of the tangent slope at that point, and a larger absolute value of the second derivative indicates a faster change of the tangent slope at the point. The use of the second derivative of the load rate curve in this embodiment reflects the change in the load rate of the main processor, since the second derivative as a feature has the advantage of being able to more sensitively detect the change in the data than the mere use of the slope as a feature. Please refer to steps S1041 to S1042.
In the implementation, only the absolute value of the second derivative of the load rate curve is used as power change data, because the second derivative has positive or negative values along with the difference of the concavity and convexity of the load rate curve, in practical application, only the magnitude of the second derivative of two adjacent sampling points is needed, and the change condition of the current load rate of the main processor can be obtained. The method and the device can realize flexible allocation of hardware resources of a plurality of processors, improve the utilization efficiency of the hardware of the transformer substation, and reduce the overall power consumption of the transformer substation system.
The difference between the control method of the substation system according to the second embodiment of the present invention and the control method of the substation system according to the first embodiment is that when the cooperative processor assists the main processor to operate, the control method of the substation system according to the second embodiment further includes sending a sleep signal to the cooperative processor when the first power variation data is smaller than the second power variation data, where the sleep signal is used to control the cooperative processor to stop operating.
Specifically, f ″ (M) is judged t ) Is greater than or less than f' (M) t-1 ) Absolute value of (c), when f' (M) t ) Is less than f' (M) t-1 ) To a sleep signal to the co-processor. According to the embodiment, events can be timely processed according to the requirement of the transformer substation, hardware equipment for processing the events is reduced, and power resources are saved to a certain extent.
Please refer to fig. 2, which is a flowchart of step S104 according to a first embodiment of the present invention, wherein step S104 sends a wake-up signal to the cooperative processor when the first power variation data is greater than the second power variation data, specifically including the following steps.
Step S1041, obtaining preset cooperation information, where the preset cooperation information includes the number of cooperation processors and a preset wake-up rule. Specifically, the preset cooperation information includes that the substation processing system includes 10 cooperation processors, wherein each cooperation processor is numbered according to 1-10, and the preset awakening rule is to awaken the cooperation processors according to the numbers from small to large when the cooperation processors need to be awakened in sequence. All parameters in this embodiment are only examples and are not limited.
Step S1042, sequentially sending wake-up signals to each cooperative processor according to a preset wake-up rule, and stopping sending the wake-up signals until data of the load rate curve is less than or equal to the average load rate, or stopping sending the wake-up signals when the number of the sent wake-up signals reaches the number of the cooperative processors.
Specifically, in practical application, when a temporary event of the substation occurs, the main processor sequentially sends a wake-up signal to the number 1 assisting processor, and then the main processor continues to monitor data of the load rate curve until the data of the load rate curve is smaller than or equal to the average load rate, which indicates that the woken-up cooperative processor can share the work task of the main processor, and at this time, the main processor does not send the wake-up signal to the following cooperative processor any more.
In other possible embodiments, the main processor always sends the wake-up signal to the cooperative processors due to the sudden large-scale accident of the substation, but the number of the cooperative processors is limited, and the sending of the wake-up signal is stopped when the number of the sent wake-up signals sent by the main processor reaches the number of the cooperative processors.
Further, the preset cooperation information further includes a preset sleep rule. And when the first power change data is smaller than the second power change data, sequentially sending sleep signals to each cooperative processor according to a preset sleep rule, and stopping sending the sleep signals until the first power change data is larger than the second power change data and the data of the load rate curve is larger than or equal to the average load rate, or stopping sending the sleep signals when the quantity of the sent sleep signals reaches the quantity of the cooperative processors.
Specifically, when f' (M) t ) Absolute value less than or equal to f' (M) t-1 ) When the absolute value is obtained, the real-time load rate M of the main processor at the moment t is judged t If it is greater than the average load rate of the primary processor in the event-free substation situation. If M is t If still greater than the average load rate, the main processor starts to send a sleep signal to the cooperative processor to let the cooperative processor stop working, if f' (M) t ) Absolute value of f ″ (M) t-1 ) Absolute and real-time load factor M t And if the average load rate is still larger than the average load rate, the rest cooperative processors are continuously and sequentially deactivated.
In the embodiment, under the condition that the transformer substation runs without events, only the main processor runs, the main processor is responsible for processing all real-time and non-real-time services of the transformer substation, and all the cooperation processors are in a sleep state. When an event occurs in the substation, the cooperative processor is awakened to participate in data and business processing.
The control method of the substation system according to the third embodiment of the present invention is different from the control method of the substation system according to the first embodiment in that when the cooperative processor assists the main processor to operate, the control method of the substation system according to the second embodiment further includes, when the first power change data is greater than the second power change data and the data of the load rate curve is smaller than the average load rate, simultaneously sending a sleep signal to all the cooperative processors operating. Specifically, when the real-time load rate M t And when the load is less than or equal to the average load rate, all the cooperative processors return to the sleep mode and stop working.
In the embodiment, the processor is logically divided into the main processor and the cooperative processor, wherein the main processor runs in a full-time period, the cooperative processor is in a low-power-consumption sleep state in most of time, and is quickly awakened to assist the main processor to process data and services only when an event occurs in the transformer substation, so that the hardware resources of the processor of the transformer substation system are dynamically allocated in real time, the cooperative work efficiency of the processors is improved, and the power consumption of the transformer substation system is reduced.
Please refer to fig. 3, which is a flowchart of step S102 according to a first embodiment of the present invention, wherein the step S102 of obtaining the load factor curve of the main processor specifically includes the following steps.
Step S1021, acquiring sampling accuracy.
And step S1022, obtaining a sampling frequency according to the sampling precision.
And S1023, sampling the load rate of the main controller according to the sampling frequency to obtain a plurality of load rate data.
And step S1024, obtaining a load rate curve according to the plurality of load rate data.
In this embodiment, sampling accuracies of different substation systems for load rates are different, specifically, one sine cycle is 20ms, and the set sampling accuracy is 1ms. The load rate of the main processor is collected every 1ms. And obtaining a load rate curve according to the collected load rate data. The higher the sampling precision is, the smoother the load rate curve is, but the main processing will spend more resources in the sampling part, so in practical application, the sampling precision can be set according to specific requirements, thereby reasonably allocating the work task of the main processor, and enabling the main processor and the assistant processor resources of the transformer substation to be reasonably utilized. All parameters in this embodiment are only examples and are not limited.
The embodiment of the invention also provides a main processor, wherein the main processor is used for executing the control method of the transformer substation system. The main processor is used for sending a wake-up signal or a sleep signal to the plurality of cooperative processors. The architecture of the main processor comprises one or more combinations of a complex instruction set, a reduced instruction set and a very long instruction word. In particular, complex Instruction Set processors (CISC). In a CISC microprocessor, the instructions of a program are executed serially in order, and the operations in each instruction are also executed serially in order. A Reduced Instruction Set Computer (RISC) is a microprocessor that executes fewer types of Computer instructions. Very Long Instruction Word (VLIW) uses a plurality of independent functional units, but rather than flowing a plurality of instructions out to each functional unit, it packs the operations of the plurality of instructions to form a Very Long Instruction, which is named after the Very Long Instruction Word.
In this embodiment, the main processor and the devices such as measurement and control, relay protection, time synchronization, network switch, fault recording and the like constitute a main processing device, and the main processing device is responsible for realizing services and functions such as protection, monitoring and control of primary main equipment of a substation, for example, equipment such as a circuit breaker, a disconnecting switch, a grounding switch, a transformer, a bus, a capacitor and the like. The protection function belongs to real-time services, the reliability requirement is highest, and the action delay needs to be controlled at a millisecond level. The main processing device is not required to delay for monitoring and controlling services except protection, and the like, is generally at the level of seconds and can be interrupted, and most of the services are non-real-time services.
Among them, a service which has a high requirement for reliability and a low delay and needs to be processed constantly is called a real-time service. Traffic that is less demanding with respect to reliability, has a high latency, is intermittent and allows interruptions is referred to as non-real-time traffic.
The hardware aspect of the main processor may be a Central Processing Unit (CPU) in some possible embodiments, but may also be other general purpose processors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and so forth. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. In particular, the primary processor executes a computer program of a control method of the substation system to control the primary processor to implement the control method of the substation system.
In the implementation, CISC has the advantages of simple control, RISC has strong capability of processing high-level languages, and some functions of VLIW in a superscalar machine are completed by hardware, so that a great deal of hardware can be saved by the VLIW machine. In practical application, the structure of the corresponding processor can be selected according to the requirements of the system of the transformer substation.
The embodiment of the present invention further provides a cooperative processor, where the cooperative processor is configured to receive the wake-up signal obtained in the control method of the substation system according to any one of the above descriptions. The cooperative processor is used for receiving a wake-up signal or a sleep signal sent by the main processor, so as to start working or stop working and enter a sleep state.
Wherein the architecture of the assisting processor comprises one or more of a complex instruction set, a reduced instruction set and a very long instruction word. In particular, complex Instruction Set processors (CISC). In a CISC microprocessor, the instructions of a program are executed serially in order, and the operations in each instruction are also executed serially in order. A Reduced Instruction Set Computer (RISC) is a microprocessor that executes fewer types of Computer instructions. Very Long Instruction Word (VLIW) uses a plurality of independent functional units, but rather than flowing a plurality of instructions out to each functional unit, it packs the operations of the plurality of instructions to form a Very Long Instruction, which is named after the Very Long Instruction Word.
In this embodiment, the assistance processor further forms a cooperative processing device with devices such as a camera, a sensor, and a robot, and the cooperative processing device assists the processor to implement services and functions such as video image recognition, fire fighting, dynamic environment monitoring, lighting, metering, and online monitoring. The work of the assistance processor can be classified as non-real-time traffic.
The hardware assisting the processor may be a Central Processing Unit (CPU) in some possible embodiments, and may be other general purpose processors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and so on. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. In particular, the assistance processor executes a computer program of a control method of the substation system to control the assistance processor to implement the control method of the substation system.
The embodiment of the present invention further provides a substation system 100, where the substation system 100 includes the above-mentioned main processor 110 and a plurality of the above-mentioned cooperative processors 120. Please refer to fig. 4, which is a schematic structural diagram of a substation system according to a first embodiment of the present invention. The main processor 110 is used to send a wake-up signal or a sleep signal to the plurality of cooperative processors 120. The plurality of cooperative processors 120 are configured to receive a wake-up signal or a sleep signal transmitted by the main processor 110, so as to start or stop working and enter a sleep state.
Further, the main processor and the co-processor may further comprise a computer readable storage medium storing a computer program which, when executed by the processor, causes the processor to perform the steps of any of the methods described above. In particular, the program may be stored in a non-volatile computer readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include non-volatile and/or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
In other possible embodiments, the substation system may further comprise a display assembly. The display component can be an LED (Light Emitting Diode) display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch panel, and the like. The display module may also be referred to as a display device or display unit, where appropriate, for displaying information processed in the substation system and for displaying a visual user interface.
Furthermore, the method according to the invention may also be implemented as a computer program or computer program product comprising computer program code instructions for carrying out some or all of the steps of the above-described method of the invention.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.
Claims (10)
1. A control method for a substation system, the substation system comprising a primary processor and a plurality of co-processors, the method being applied to the primary processor, the method comprising:
acquiring the average load rate of the main processor, wherein the average load rate is the average data of the load rate when no event occurs in the transformer substation system;
acquiring a load rate curve of the main processor;
when the data of the load rate curve is larger than the average load rate, acquiring first power change data at the current moment and second power change data at the previous moment adjacent to the current moment; and (c) a second step of,
and when the first power change data is larger than the second power change data, sending a wake-up signal to the cooperative processor, wherein the wake-up signal is used for waking up the cooperative processor to assist the main processor to work.
2. The substation system control method according to claim 1, wherein when the cooperation processor assists the main processor in operating, the method further comprises:
and when the first power change data is smaller than the second power change data, sending a sleep signal to the cooperative processor, wherein the sleep signal is used for controlling the cooperative processor to stop working.
3. The method for controlling a substation system according to claim 1, wherein the sending a wake-up signal to the cooperative processor when the first power variation data is greater than the second power variation data specifically includes:
acquiring preset cooperation information, wherein the preset cooperation information comprises the number of the cooperation processors and a preset awakening rule; and (c) a second step of,
and sequentially sending the awakening signals to each cooperative processor according to the preset awakening rule, and stopping sending the awakening signals until the data of the load rate curve is less than or equal to the average load rate, or stopping sending the awakening signals when the quantity of the sent awakening signals reaches the quantity of the cooperative processors.
4. The control method of the substation system according to claim 3, wherein the preset cooperation information further includes a preset sleep rule; when the first power variation data is smaller than the second power variation data, sending a sleep signal to the cooperative processor specifically includes:
and sequentially sending the sleep signals to each cooperative processor according to the preset sleep rule, and stopping sending the sleep signals until the first power change data is greater than the second power change data and the data of the load rate curve is greater than or equal to the average load rate, or stopping sending the sleep signals when the quantity of the sent sleep signals reaches the quantity of the cooperative processors.
5. The control method of a substation system according to claim 4, characterized in that the method further comprises:
and when the first power change data are larger than the second power change data and the data of the load rate curve are smaller than the average load rate, simultaneously sending the sleep signals to all the cooperative processors which work.
6. The method for controlling a substation system according to claim 1, wherein the obtaining of the load rate curve of the master processor specifically includes:
acquiring sampling precision;
obtaining sampling frequency according to the sampling precision;
sampling the load rate of the main controller according to the sampling frequency to obtain a plurality of load rate data; and the number of the first and second groups,
and obtaining the load rate curve according to the plurality of load rate data.
7. The substation system control method according to claim 1, wherein the architecture of the main processor comprises one or a combination of more of a complex instruction set, a reduced instruction set, and a very long instruction word.
8. A master processor, characterized in that it is adapted to perform the control method of a substation system according to any of claims 1 to 7.
9. A co-processor for receiving a wake-up signal derived in a control method of a substation system according to any of claims 1 to 7.
10. A substation system, characterized in that it comprises a main processor according to claim 8 and a plurality of co-processors according to claim 9.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116909218A (en) * | 2023-06-21 | 2023-10-20 | 蚌埠市高远光电有限公司 | Production monitoring system for liquid crystal display screen |
| CN116909218B (en) * | 2023-06-21 | 2024-01-30 | 蚌埠市高远光电有限公司 | Production monitoring system for liquid crystal display screen |
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