CN115639452A - Self-closed loop system for single event effect test of VDMOS (vertical double-diffused metal oxide semiconductor) device - Google Patents
Self-closed loop system for single event effect test of VDMOS (vertical double-diffused metal oxide semiconductor) device Download PDFInfo
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- CN115639452A CN115639452A CN202211196275.8A CN202211196275A CN115639452A CN 115639452 A CN115639452 A CN 115639452A CN 202211196275 A CN202211196275 A CN 202211196275A CN 115639452 A CN115639452 A CN 115639452A
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Abstract
The invention provides a self-closed loop system for testing a single event effect of a VDMOS device, which comprises a program control computer, a transit computer, a program control power supply, an anti-irradiation circuit board and a microampere meter, wherein the program control computer is connected with the transit computer; the program control computer is used for controlling the operation transfer computer; the transfer computer is used for driving the controller to transfer the remote control command; the anti-irradiation circuit board is used for receiving a remote control command, generating 0C pulse according to the remote control command, controlling the on-off of the magnetic latching relay array through the 0C pulse, and realizing the grid source and drain source voltage division of a plurality of groups of VDMOS devices by utilizing the magnetic latching relay array and the programmable power supply; and the microammeter is used for detecting drain-source current of each VDMOS device when the VDMOS device on the anti-irradiation circuit board is subjected to single particle irradiation, and the drain-source current is used for judging whether the DMOS device fails under the action of single particles. The single event effect quick test system for the VDMOS devices realizes the quick test function for the single event effect of various VDMOS devices, and the whole test system can realize the test coverage of different types of VDMOS devices under different working conditions.
Description
Technical Field
The invention relates to the field of aerospace tests, in particular to a self-closed loop system for testing a single event effect of a VDMOS device.
Background
With the continuous promotion of deep space exploration, aerospace electronic products put forward more rigorous requirements on the radiation resistance index of a VDMOS device. In order to meet the autonomous controllable requirements of space navigation devices, foreign forbidden risks are eliminated, and single event effect application verification on various domestic VDMOS devices is accelerated.
The single event effect is mainly a radiation effect in which the state of a microelectronic device is abnormally changed due to the fact that high-energy charged particles pass through a sensitive region of the microelectronic device in space, and mainly comprises single event upset, single event locking, single event burnout, single event gate breakdown and the like. The VDMOS device is widely used in a switching circuit, a surge suppression circuit and the like as a core device of an aerospace electronic product, the single event effect of the VDMOS device is mainly single event burnout and single event gate breakdown, and once the single event effect occurs, the function of the whole product is influenced. Therefore, accurate and rapid background testing of the single event effect of the VDMOS device is an important guarantee for guaranteeing the high-reliability operation of aerospace electronic products. The self-closed loop test is achieved by performing single event effect bottom-touching tests on various VDMOS devices under different working conditions and compiling device reliability evaluation analysis reports, and the full-coverage bottom-touching test of the VDMOS devices is achieved.
At present, no unified and standardized testing method exists in the domestic single-particle testing system for the VDMOS device. When a single event effect test is conventionally performed, the cap opening processing of the VDMOS device is completed, an irradiation test is performed once, personnel need to enter an irradiation room for data recording and device bias voltage threshold adjustment once, the testing personnel need to enter the irradiation room for multiple times, the whole testing efficiency is low, and potential harm is caused to the body of the testing personnel.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a self-closed loop system for single event effect testing of VDMOS devices, which realizes efficient testing of multiple types and multiple VDMOS devices and completes real-time acquisition and observation of test data.
The self-closed loop system for the single event effect test of the VDMOS device comprises a program control computer, a transit computer, a program control power supply, an anti-irradiation circuit board and a microampere meter;
the program control computer is used for controlling the operation transfer computer;
the transfer computer is used for driving the controller to transfer the remote control command;
the anti-irradiation circuit board is used for receiving the remote control instruction, generating 0C pulse according to the remote control instruction, controlling the on-off of the magnetic latching relay array through the 0C pulse, and realizing the grid source and drain source voltage division of a plurality of groups of VDMOS devices by using the magnetic latching relay array and the programmable power supply;
the microammeter is used for detecting drain-source current of the VDMOS devices when the VDMOS devices on the anti-irradiation circuit board are subjected to single particle irradiation, and the drain-source current is used for judging whether the DMOS devices fail under the action of single particles.
Preferably, the transit computer sends the remote control command through RS422 serial port communication.
Preferably, when single-particle irradiation is performed on the VDMOS devices, specifically, heavy-ion irradiation is performed after each VDMOS device is capped.
Preferably, the OC pulse is generated by decoding by an FPGA on the radiation-resistant circuit board.
Preferably, an OC pulse instruction is generated as a driving signal of the VDMOS device according to the programmable characteristic of the FPGA and a peripheral circuit of the FPGA, so as to realize multi-channel and multi-type VDMOS device control.
Preferably, the transfer computer sends the remote control command through a serial port driver.
Preferably, the transfer computer adjusts the drain-source and gate-source voltages of the VDMOS by setting a threshold value for the programmable power supply, so as to meet the requirement of performing a single event effect test on the device under different working conditions.
Preferably, the relay array is used for completing voltage switching of a plurality of VDMOS devices, and the requirement of verifying a plurality of VDMOS devices in a plurality of channels on the same PCB can be met through the array design of switching and combining a plurality of relays.
Preferably, the transfer computer is connected with the anti-radiation circuit board through a programmable power supply, a serial port driver and the microammeter respectively.
Compared with the prior art, the invention has the following beneficial effects:
the invention has the advantages of high integration level, short development period, strong universality, expandability, easy maintenance and the like, realizes the function of quickly testing the single event effect of various VDMOS devices, and can realize the test coverage of different types of VDMOS devices under different working conditions by the whole test system.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a block diagram of a self-closed loop system for single event effect testing of a VDMOS device according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a control process of a self-closed loop system for single event effect testing of a VDMOS device according to an embodiment of the present invention;
fig. 3 is a test flow chart of a self-closed loop system for single event effect test of a VDMOS device in the embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the spirit of the invention. All falling within the scope of the invention.
Fig. 1 is a block diagram of a self-closed loop system for single event effect testing of a VDMOS device in an embodiment of the present invention, and as shown in fig. 1, the self-closed loop apparatus for single event effect testing of a VDMOS device provided by the present invention includes a program control computer, a transit computer, a program control power supply, a serial port driver (MOXA), a high-precision digital microammeter, and an anti-irradiation circuit board;
the program control computer is used for realizing the remote control operation of the transit computer;
the transfer computer controls the program-controlled power supply through a plurality of serial ports, and communicates with the anti-radiation plate and the high-precision digital microammeter; controlling a programmable power supply to complete the gate-source and drain-source threshold voltages of the VDMOS device and controlling the programmable power supply to supply power to an anti-radiation circuit board; the transfer computer sends a remote control instruction code through a serial port driver, the FPGA on the anti-irradiation circuit board analyzes the instruction code, and the FPGA peripheral circuit is controlled to output an OC pulse instruction of 80 ms; the transfer computer receives drain-source current data of the VDMOS device detected by the high-precision digital microammeter, records the drain-source current data in real time, feeds the data back to the transfer computer through a serial port, and takes the drain-source current data as the basis of whether the single event effect of the device fails or not;
the relay array on the anti-irradiation circuit board receives an OC pulse instruction according to a preset logic function combination to realize the on-off of the relay, the test coverage of various VDMOS devices is realized through the on-off combination logic of the relay array, and the test of different VDMOS devices is completed.
In one embodiment of the invention, the program control computer controls the operation transit computer through a long network cable, so that the problem of long-distance data transmission between a radiation room and a control room is solved, and data monitoring and real-time testing are realized;
in one embodiment of the invention, serial port communication is utilized to control multi-path continuous output of the program control power supply, so that test conditions of each VDMOS device under different working conditions are met;
in one embodiment of the invention, the anti-irradiation printed board communication module receives serial port data, analyzes the serial port data by using the FPGA, generates a complex logic OC pulse instruction through a peripheral circuit by combining the programmable characteristic of the FPGA, and uses the complex logic OC pulse instruction as a driving signal of a VDMOS device to realize the control of a multi-channel and multi-type VDMOS device;
in one embodiment of the invention, a high-precision data microammeter with a serial port is used for detecting the drain-source current of a VDMOS device, the drain-source current is used for representing whether the device has a single event effect or not, and the serial port reads a detection value in real time;
in one embodiment of the invention, the relay array completes the on-off control of the grid source and drain source voltage of the VDMOS device and the selection of the high-precision data microammeter for the detection path through the logic function combination, the whole test scheme is flexible and simple, and the rapid test verification can be realized.
In one embodiment of the invention, the magnetic latching relay is switched on and off according to a communication instruction, power supply voltage is set by combining a programmable power supply to carry out bias voltage division on each group of VDMOS devices, each cap-opening device is irradiated by heavy ions, and the single-particle effect of the VDMOS devices under the irradiation of the heavy ions with different energies is detected by using a high-precision digital microammeter.
Fig. 2 is a schematic diagram of a control process of a self-closed loop system for single event effect testing of a VDMOS device in the embodiment of the present invention, and as shown in fig. 2, the VDMOS device is initialized by powering on, including initializing an FPGA and initializing a test device, and then a program control power supply and a relay array are configured in a related manner to adapt to the VDMOS device to be tested, and whether the VDMOS device to be tested is intact is determined.
And setting a radiation source according to test requirements, including heavy ion beam selection, beam intensity, beam uniformity, beam fluence rate and the like, irradiating the device to be tested with heavy ions, and monitoring and recording feedback data of the high-precision digital microammeter in real time.
Fig. 3 is a test flow chart of a self-closed loop system for single event effect test of a VDMOS device in the embodiment of the present invention, and fig. 3 shows that, when the self-closed loop system for single event effect test of a VDMOS device provided by the present invention is used, the method includes the following steps:
step 1: performing cap opening treatment on the VDMOS device before the test, taking pictures of the capped device by using X-rays, checking whether the interior of the capped device is intact or not, and performing parameter test before the test on the anti-radiation circuit board;
and 2, step: the method comprises the steps of installing and debugging a test system, constructing the whole system, configuring a program-controlled power supply, configuring a relay array according to a remote control instruction, and setting a VDMOS device in a working state;
and 3, step 3: selecting heavy ion beam current according to test conditions, setting corresponding beam current intensity, beam current uniformity and beam current fluence rate, and selecting a device to be tested for irradiation;
and 4, step 4: setting different drain-source and gate-source bias voltages and different heavy ion conditions, so that the VDMOS device performs different-grade irradiation tests under different working conditions, simultaneously observing and recording test data, and testing the single event effect of the device under different working conditions;
and 5: according to the method, 2-N devices are tested respectively, and the single event effect of various VDMOS devices under various working conditions can be tested quickly and efficiently;
step 6: and after the test is finished, analyzing and counting the test data to obtain the single-particle gate penetration and single-particle burnout values of different VDMOS devices under various working conditions.
The self-closed loop system for testing the single event effect of the VDMOS device provided by the invention can be compatible with various VDMOS device tests at the same time in the VDMOS device single event effect test, real-time data monitoring is realized, the single event test time of various batch VDMOS devices is greatly shortened, the whole test process is a remote monitoring test, once the test is started, the device working condition and the heavy ion beam current setting are both remotely set, personnel do not need to repeatedly enter a radiation room in the whole process, on one hand, the utilization rate of the heavy ion beam current is improved, and meanwhile, the safety of the personnel is guaranteed.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes and modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention.
Claims (9)
1. A self-closed loop system for single event effect test of a VDMOS device is characterized by comprising a program control computer, a transit computer, a program control power supply, an anti-irradiation circuit board and a microampere meter;
the program control computer is used for controlling the operation transfer computer;
the transfer computer is used for driving the controller to transfer the remote control command;
the anti-irradiation circuit board is used for receiving the remote control command, generating 0C pulse according to the remote control command, controlling the on-off of the magnetic latching relay array through the 0C pulse, and realizing the grid-source and drain-source voltage division of a plurality of groups of VDMOS devices by using the magnetic latching relay array and the programmable power supply;
the microammeter is used for detecting drain-source current of the VDMOS devices when the VDMOS devices on the anti-irradiation circuit board are subjected to single particle irradiation, and the drain-source current is used for judging whether the DMOS devices fail under the action of single particles.
2. The self-closed loop system for the single event effect test of the VDMOS device as recited in claim 1, wherein the relay computer sends the remote control command through RS422 serial port communication.
3. The self-closed loop system for testing the single event effect of the VDMOS device according to claim 1, wherein when single event irradiation is performed on the VDMOS device, specifically, heavy ion irradiation is performed after each VDMOS device is capped.
4. The self-closed loop system for the single event effect test of the VDMOS device according to claim 1, wherein the OC pulse is generated by decoding with the FPGA on the irradiation-resistant circuit board.
5. The self-closed loop system for the single event effect test of the VDMOS device according to claim 4, wherein an OC pulse instruction is generated as a driving signal of the VDMOS device according to the programmable characteristics of the FPGA and peripheral circuits of the FPGA, so as to realize the control of a multi-channel and multi-type VDMOS device.
6. The self-closed loop system for the single event effect test of the VDMOS device as recited in claim 1, wherein the relay computer sends the remote control command through a serial driver.
7. The self-closed loop system for testing the single event effect of the VDMOS device according to claim 1, wherein the transfer computer adjusts the drain-source voltage and the gate-source voltage of the VDMOS device by setting a threshold value of a programmable power supply so as to meet the requirement that the device performs the single event effect test under different working conditions.
8. The self-closed loop system for the single event effect test of the VDMOS device as claimed in claim 1, wherein the relay array is used for completing the voltage on/off of a plurality of VDMOS devices, and the multi-channel and multi-type VDMOS devices can be verified on the same PCB by the array design of the on/off combination of a plurality of relays.
9. The self-closed loop system for the single event effect test of the VDMOS device according to claim 6, wherein the transfer computer is connected to the anti-radiation circuit board through a programmable power supply, a serial driver and the microammeter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211196275.8A CN115639452A (en) | 2022-09-28 | 2022-09-28 | Self-closed loop system for single event effect test of VDMOS (vertical double-diffused metal oxide semiconductor) device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211196275.8A CN115639452A (en) | 2022-09-28 | 2022-09-28 | Self-closed loop system for single event effect test of VDMOS (vertical double-diffused metal oxide semiconductor) device |
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| CN115639452A true CN115639452A (en) | 2023-01-24 |
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| CN202211196275.8A Pending CN115639452A (en) | 2022-09-28 | 2022-09-28 | Self-closed loop system for single event effect test of VDMOS (vertical double-diffused metal oxide semiconductor) device |
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