CN115622828A - Clock synchronization method, device and system and intelligent household communication equipment - Google Patents
Clock synchronization method, device and system and intelligent household communication equipment Download PDFInfo
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Abstract
The application relates to a clock synchronization method, a clock synchronization device, a clock synchronization system and intelligent household communication equipment, wherein the clock synchronization method comprises the following steps: receiving a first clock synchronization signal transmitted by the first network node within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization with the first network node, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal; clock synchronization of each network node in the monitoring window is achieved, so that the power consumption level of each network node is guaranteed, and the applicability of each network node in a home application scene with harsh power consumption requirements is improved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a clock synchronization method, apparatus, system, and smart home communications device.
Background
With the continuous development of communication technologies, more and more communication technologies are applied to smart home scenes. Clock synchronization has wide application in application scenes such as Low-power-consumption communication and multi-device synchronous execution, and a Mesh network commonly used in the field of IOT (Internet of Things) relates to multilevel data forwarding, wherein the Mesh network comprises ZigBee (Zigbee protocol), z-wave, BLE (Bluetooth Low Energy), mesh, thread and the like, and the accumulated error of the traditional clock synchronization is larger and larger directly, so that the actual reference clocks of all nodes can not be kept consistent, and a clock synchronization scheme suitable for multiple nodes of the Mesh network is provided.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a clock synchronization method, apparatus, system and smart home communication device.
A clock synchronization method is applied to a second network node, wherein a superior network node of the second network node is a first network node, and a inferior network node of the second network node is a third network node; the clock synchronization method comprises the following steps:
receiving a first clock synchronization signal transmitted by the first network node within a first clock synchronization window;
acquiring the receiving time length of the first clock synchronization signal;
performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration;
after the clock synchronization with the first network node, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the second network node is in an awake state.
In one embodiment, the clock synchronization method further includes:
when the clock synchronization of the second network node and the first network node is abnormal, increasing the first clock synchronization window; and/or
And when the clock synchronization of the third network node and the second network node is abnormal, increasing the second clock synchronization window.
In one embodiment, the clock synchronization method further includes:
determining an exception type according to the clock synchronization exception information;
acquiring a clock synchronization window regulating quantity corresponding to the abnormal type;
and increasing the first clock synchronization window and/or the second clock synchronization window according to the clock synchronization window adjustment amount.
In one embodiment, the step of performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration includes:
analyzing the first clock signal to obtain a reference clock of the first network node;
acquiring the analysis duration of the first clock synchronization signal;
and updating the reference clock of the second network node according to the reference clock of the first network node, the receiving time length and the analyzing time length so as to enable the second network node to carry out clock synchronization with the first network node.
In one embodiment, after the step of sending a second clock synchronization signal to the third network node based on a second clock synchronization window after clock synchronization with the first network node, the method further comprises:
under the condition that an acknowledgement signal fed back by the third network node is received within a preset time, the second clock synchronization signal is stopped being continuously sent to the third network node according to the acknowledgement signal;
and under the condition that the confirmation signal is not received within preset time, continuously sending a second clock synchronization signal to the third network node based on a second clock synchronization window.
In one embodiment, the first and second clock synchronization windows each comprise a plurality of transceiving windows;
if the current signal transceiving window is in the effective transceiving time, receiving the first clock synchronization signal sent by the first network node in the current signal transceiving window or sending the second clock synchronization signal to the third network node;
and if the current signal transceiving window is in invalid transceiving time, receiving the first clock synchronization signal sent by the first network node in the next signal transceiving window or sending the second clock synchronization signal to the third network node.
A clock synchronization device is applied to a second network node, wherein a superior network node of the second network node is a first network node, and a inferior network node of the second network node is a third network node; the clock synchronization apparatus includes:
a signal receiving module, configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window;
the time length obtaining module is connected with the signal receiving module and used for obtaining the receiving time length of the first clock synchronization signal;
the first synchronization module is respectively connected with the signal receiving module and the time length obtaining module and is used for carrying out clock synchronization on the second network node according to the first clock synchronization signal and the receiving time length;
and the second synchronization module is connected with the first synchronization module and used for sending a second clock synchronization signal to the third network node based on a second clock synchronization window after the clock synchronization so as to update the reference clock of the third network node, wherein the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in the wake-up state.
A clock synchronization system, comprising:
the network node comprises a first network node, a second network node and a third network node, wherein the upper-level network node of the second network node is the first network node, and the lower-level network node of the second network node is the third network node;
the second network node is configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in an awake state.
The intelligent household communication equipment comprises a memory and a processor, wherein the memory stores a computer program, and the processor realizes the steps of the method when executing the computer program.
A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the above-mentioned method.
The clock synchronization method, the clock synchronization device, the clock synchronization system and the intelligent household communication equipment comprise the following steps: receiving a first clock synchronization signal sent by the first network node within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization with the first network node, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the second network node is in an awake state; clock synchronization of each network node in the monitoring window is achieved, so that the power consumption level of each network node is guaranteed, and the applicability of each network node in a home application scene with harsh power consumption requirements is improved.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a clock synchronization system according to an embodiment;
FIG. 2 is a flow diagram illustrating a method for clock synchronization in one embodiment;
FIG. 3 is a flow diagram illustrating a method for clock synchronization in one embodiment;
FIG. 4 is a flowchart illustrating a method after step 208 in one embodiment;
FIG. 5 is a timing diagram of a clock synchronization system in one embodiment;
FIG. 6 is a flow diagram illustrating a method for clock synchronization in one embodiment;
FIG. 7 is a timing diagram illustrating clock synchronization of the clock synchronization system in accordance with one embodiment;
FIG. 8 is a timing diagram of a clock synchronization system in one embodiment;
fig. 9 is a block diagram schematically illustrating the structure of the clock synchronization apparatus according to an embodiment.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or be connected to the other element through intervening elements. Further, "connection" in the following embodiments is understood to mean "electrical connection", "communication connection", or the like, if there is a transfer of electrical signals or data between the connected objects.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.
Fig. 1 is a schematic structural diagram of a clock synchronization system according to an embodiment.
In this embodiment, the clock synchronization system may be formed by a plurality of smart home devices; the intelligent home equipment can be network nodes such as various sensors, intelligent gateways or host equipment and the like for detecting the home environment information; the intelligent home equipment is in data communication through a wired communication technology or a wireless communication technology, and all the intelligent homes need to complete clock synchronization before the intelligent home equipment performs data communication, so that the calling requirements of users on the intelligent home equipment are met.
As shown in fig. 1, the clock synchronization system includes a first network node 100, a second network node 200 and a third network node 300, where the upper-level network node of the second network node 200 is the first network node 100, and the lower-level network node of the second network node 200 is the third network node 300.
Optionally, the first network node 100 may be an intelligent gateway; the second network node 200 may be a network device directly connected to the first network node through a wireless communication technology and having a clock synchronization function; the third network node 300 may be a network device connected to the first network node 100 through the second network node 200; in addition, the second network node 200 and the third network node 300 are low power consumption communication nodes.
Specifically, when each network node in the clock synchronization system performs clock synchronization, the first network node 100 first sends the clock synchronization signal to the second network node 200, and after receiving the clock synchronization signal, the second network node 200 adjusts its reference clock according to the clock synchronization signal to perform clock synchronization with the first network node 100; after the clock synchronization of the second network node 200 is completed, the second network node 200 updates the clock synchronization signal and then sends the updated clock synchronization signal to the third network node 300, and after receiving the updated clock synchronization signal, the third network node 300 adjusts its reference clock according to the updated clock synchronization signal to perform clock synchronization with the second network node 200.
It can be understood that each network node in the clock synchronization system described herein may further include more network nodes according to actual usage needs. For example, a next-level network node of the third network node, that is, a fourth network node, etc. may also be set, which is not limited in the present application; in addition, the number of network nodes belonging to the same hierarchy may be two or more, which is not limited in this application.
Fig. 2 is a schematic flow chart of a clock synchronization method according to an embodiment.
In this embodiment, the clock synchronization method is applied to the second network node; as shown in fig. 2, the clock synchronization method includes steps 202 to 208.
Optionally, the first clock synchronization window may be a listening time period when the first network node performs reference clock synchronization with the second network node and the second network node is in an awake state; the first clock synchronization signal may be a signal including reference clock information of the first network node and a wireless collision waiting duration corresponding to the reference clock information when the reference clock information is sent to the second network node.
The wireless collision waiting time may be a time required to wait when the plurality of network nodes simultaneously transmit the data signal to the certain network node; the reference clock information of the first network node may be a starting point of reference clock synchronization performed by the first network node.
It should be noted that the first network node, the second network node, and the third network node all have their own reference clock systems, and these reference clock systems have a certain error but are within an error allowable range, but the error is larger and larger as the running time is accumulated, and once the error allowable range is exceeded, the communication between the network nodes is abnormal.
Therefore, the clock synchronization allows the self reference clock systems of the first network node, the second network node and the third network node to have certain errors, and meanwhile, the errors are continuously corrected within an allowable range through the periodic clock synchronization so as to ensure that the communication among the network nodes is normal.
Optionally, the receiving duration may be a time period occupied by the second network node from the start of receiving the first clock synchronization signal sent by the first network node to a complete receiving process; the method for obtaining the receiving duration of the first clock synchronization signal may be obtained by a starting time point and a terminating time point of receiving the first clock synchronization signal, which are recorded by a reference clock system of the second network node.
And step 206, performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration.
Optionally, the method of performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration may be to analyze the first clock signal to obtain a reference clock of the first network node; acquiring the analysis duration of the first clock synchronization signal; and updating the reference clock of the second network node according to the reference clock of the first network node, the receiving time length and the analyzing time length so as to enable the second network node and the first network node to carry out clock synchronization.
The reference clock of the first network node refers to an initial time point of reference clock synchronization of the first network node; the updating of the reference clock of the second network node refers to a time point after reference clock synchronization is performed between the second network node and the first network node.
Specifically, the time length for adjusting the self reference clock is determined according to the reference clock information of the first network node and the corresponding wireless collision waiting time length when the reference clock information is sent to the second network node, the time length for the second network node to completely receive the first clock synchronization signal and the time length for the second network node to analyze the first clock synchronization signal, and the self reference clock of the second network node is updated according to the time length to be adjusted, so that the second network node and the first network node perform clock synchronization.
Optionally, the second listening window may be a listening time period when the second network node is in an awake state when the second network node performs reference clock synchronization with the third network node; the second clock synchronization signal may be a signal including updated reference clock information of the second network node and a corresponding wireless collision waiting duration when the updated reference clock information is sent to the second network node.
It should be noted that the first clock synchronization window and the second clock synchronization window respectively correspond to two different listening time periods when the second network node performs reference clock synchronization.
Optionally, the method for performing clock synchronization with the second network node by the third network node according to the second clock synchronization signal may be determining a time length for adjusting the reference clock of the third network node according to the updated reference clock information of the second network node and a corresponding wireless collision waiting time length when the updated reference clock information of the second network node is sent to the third network node, a time length for the third network node to completely receive the second clock synchronization signal, and a time length for the third network node to analyze the second clock synchronization signal, and updating the reference clock of the third network node according to the time length to be adjusted.
In the clock synchronization method provided in this embodiment, a first clock synchronization signal sent by the first network node is received within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization with the first network node, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, wherein the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the second network node is in an awakening state; clock synchronization of each network node in the interception window is achieved, so that the power consumption level of each network node is guaranteed, and the applicability of each network node in a home application scene with strict power consumption requirements is improved.
In one embodiment, the clock synchronization method further comprises: when the clock synchronization of the second network node and the first network node is abnormal, increasing the first clock synchronization window; and/or when the clock synchronization of the third network node and the second network node is abnormal, increasing the second clock synchronization window, and further improving the applicability of each network node in a household application scene with harsh use conditions.
Fig. 3 is a schematic flow chart of a clock synchronization method according to an embodiment.
In this embodiment, the clock synchronization method includes steps 302 to 306.
And 304, acquiring the clock synchronization window adjustment quantity corresponding to the abnormal type.
Optionally, the clock synchronization abnormal information may be running state information of the network node when the clock synchronization abnormal occurs in the network node; the exception type may be a fault type that causes clock synchronization exception between the second network node and the first network node or clock synchronization exception between the third network node and the second network node, and specifically, the exception type includes an exception after the network node is powered on and restarted or caused by other reasons, and a clock synchronization exception caused by clock synchronization between the network nodes not being performed within a preset clock synchronization time, so that, for example, when the obtained clock synchronization exception information indicates that the operation state of the network node is switched from a power-off state to a normal power-supply state, it is determined that the exception type is the restart exception.
Optionally, the adjustment amount of the clock synchronization window may be an increment of a time span corresponding to the clock synchronization window set for recovering the clock synchronization of the network node to be normal when the clock synchronization of each network node is abnormal. It can be understood that, according to actual use needs, the clock synchronization window adjustment amount described in the present application may set a specific time span increase amount, which is not limited in the present application.
Specifically, when the clock synchronization of the second network node and the first network node is abnormal, determining a fault type causing the clock synchronization abnormality of the network nodes according to the running state information of the network nodes when the clock synchronization abnormality occurs in each network node, and acquiring a corresponding time span increment of a clock synchronization window corresponding to the fault type and set for recovering the clock synchronization of the network nodes to be normal, so that the second network node and the first network node complete the clock synchronization as soon as possible; the clock synchronization recovery speed under the condition of abnormal network node clock synchronization is improved, and the applicability of each network node in a home application scene with harsh use conditions is further improved.
Referring to fig. 4, a flowchart of a method after step 208 is shown.
In this embodiment, the method after step 208 further includes steps 402 to 404.
Optionally, the acknowledgement signal may be a signal that is generated by the third network node after receiving the second clock synchronization signal and that feeds back, to the second network node, that the third network node has acknowledged receipt of the second clock synchronization signal; the acknowledgement signal is thus used to indicate that the third network node has received the second clock synchronization signal sent by the second network node.
Optionally, the preset time may be 5ms or 10ms, or may be other values, which may be specifically set according to an actual usage scenario, and is not limited herein.
Specifically, referring to fig. 5, when the third network node receives the reference clock synchronization frame 1 sent by the second network node, the third network node immediately generates an acknowledgement signal ACK1 and sends the acknowledgement signal ACK1 to the second network node; if the acknowledgement signal ACK1 is received within 5ms after the reference clock synchronization frame 1 sent by the second network node, the second network node stops sending the reference clock synchronization frame 1 to a third network node; and avoiding the increase of the power consumption of the second network node caused by repeatedly sending signals, thereby ensuring the power consumption level of each network node.
In addition, if the acknowledgement signal ACK1 is not received within 5ms after the reference clock synchronization frame 1 sent by the second network node, the second network node continues to send the reference clock synchronization frame 1 to the third network node based on a second clock synchronization window, so that it is ensured that the third network node can receive the reference clock synchronization frame 1, and normal communication between the network nodes is effectively ensured.
In one embodiment, with reference to fig. 5, when the first network node and the second network node perform clock synchronization, if the second network node receives the reference clock synchronization frame 1 sent by the first network node, the second network node immediately generates an acknowledgement signal ACK2 and sends the acknowledgement signal ACK2 to the first network node; if the acknowledgement signal ACK2 is received within 5ms after the reference clock synchronization frame 1 sent by the first network node, the first network node stops sending the reference clock synchronization frame 1 to the second network node; and avoiding the increase of the power consumption of the first network node caused by repeatedly sending signals, thereby ensuring the power consumption level of each network node.
In addition, if the acknowledgement signal ACK2 is not received within 5ms after the reference clock synchronization frame 1 sent by the first network node, the first network node continues to send the reference clock synchronization frame 1 to the second network node based on the first clock synchronization window, so that it is ensured that the second network node can receive the reference clock synchronization frame 1, and normal communication between network nodes is effectively ensured.
Fig. 6 is a flowchart illustrating a clock synchronization method according to an embodiment.
In this embodiment, the first clock synchronization window and the second clock synchronization window each include a plurality of signal transceiving windows; as shown in fig. 6, the clock synchronization method includes steps 602 to 604.
Step 602, if the current signal transceiving window is in the valid transceiving time, receiving the first clock synchronization signal sent by the first network node in the current signal transceiving window or sending the second clock synchronization signal to the third network node.
Step 604, if the current signal transceiving window is in the invalid transceiving time, receiving the first clock synchronization signal sent by the first network node in the next signal transceiving window or sending the second clock synchronization signal to the third network node.
With reference to fig. 5, when the clocks of the first network node, the second network node, and the third network node are synchronized, the listening periods T1 of the second network node and the third network node are the same, and the first clock synchronization window and the second clock synchronization window on the time axis corresponding to the second network node and the third network node are also the same, so that the listening periods corresponding to the second network node and the third network node in the wake-up state are the same.
Optionally, when the current signal transceiving window is in the valid transceiving time, the termination time point of the second network node completely receiving the first clock synchronization signal may be in the valid transceiving time of the current signal transceiving window of the first clock synchronization window, or the termination time point of the third network node completely receiving the second clock synchronization signal may be in the valid transceiving time of the current signal transceiving window of the second clock synchronization window.
When the first network node and the second network node perform clock synchronization, a time point L1 at which the second network node starts to receive the first clock synchronization signal sent by the first network node needs to be within an effective transceiving time of a current signal transceiving window of the first clock synchronization window, and a time point L1+ Δ L1 at which the second network node completely receives the first clock synchronization signal still needs to be within the effective transceiving time of the current signal transceiving window of the first clock synchronization window; if the time point L1 is the invalid transceiving time of the signal transceiving window of the first clock synchronization window, waiting for the valid transceiving time of the next signal transceiving window of the first clock synchronization window to receive the first clock synchronization signal.
When the second network node and the third network node perform clock synchronization, a time point L2 when the second network node starts to send the second clock synchronization signal to the third network node (i.e., a time point when the third network node starts to receive the second clock synchronization signal) needs to be within an effective transceiving time of a current signal transceiving window of the second clock synchronization window, and a time point L2 +. DELTA.L 2 when the third network node completely receives the second clock synchronization signal still needs to be within the effective transceiving time of the current signal transceiving window of the second clock synchronization window; if the time point L2 is the invalid transceiving time of the signal transceiving window of the second clock synchronization window, waiting for the valid transceiving time of the next signal transceiving window of the second clock synchronization window to receive the second clock synchronization signal.
In the clock synchronization method provided in this embodiment, if the current signal transceiving window is in the valid transceiving time, the first clock synchronization signal sent by the first network node is received in the current signal transceiving window or the second clock synchronization signal is sent to the third network node; if the current signal transceiving window is in the invalid transceiving time, receiving the first clock synchronization signal sent by the first network node in the next signal transceiving window or sending the second clock synchronization signal to the third network node; the power consumption level of each network node is reduced under the condition that normal communication among each network node is guaranteed, and therefore the applicability of each network node in a home application scene with harsh power consumption requirements is improved.
In one embodiment, the method for receiving the first clock synchronization signal transmitted by the first network node within the first clock synchronization window may be performed according to time information of the first clock synchronization window; the method for sending the second clock synchronization signal to the third network node based on the second clock synchronization window may be performed according to time information of the second clock synchronization window.
Optionally, the time information of the first clock synchronization window refers to time period division information of the first clock synchronization window; the time slot division information of the first clock synchronization window comprises effective transceiving time of the signal transceiving window of the first clock synchronization window and ineffective transceiving time of the signal transceiving window; the effective transceiving time and the ineffective transceiving time of each signal transceiving window form the total occupied time of the signal transceiving window, and the effective transceiving time of each signal transceiving window is longer than the ineffective transceiving time of the signal transceiving window.
It should be noted that the invalid transceiving time of each signal transceiving window is for reducing an influence caused by a system clock error after clock synchronization of each network node, and therefore, a ratio M between the valid transceiving time of each signal transceiving window and the invalid transceiving time of each signal transceiving window may be set according to a specific system clock error level, and specifically, a value range of the ratio M is 8 to 9.5, so as to improve applicability of each network node in a home application scenario with a strict power consumption requirement.
In one embodiment, the method for updating the reference clock of the second network node and the method for updating the reference clock of the third network node may be derived by parsing a reference clock synchronization frame.
Optionally, the reference clock synchronization frame may be a data frame including a reference clock of the first network node and a time length of receiving the first clock synchronization signal, or may be a data frame including a time of updating the reference clock of the second network node and completely receiving the second clock synchronization signal by the third network node.
Specifically, when the second network node performs clock synchronization with the first network node, referring to fig. 7, after the first network node is powered on and started up, a time point is selected as a reference time point t1, the first network node generates the reference clock synchronization frame and the corresponding total wireless collision waiting duration Δ t1, which are sent to the second network node, so that the second network node receives the reference clock synchronization frame sent by the first network node at time point t2= t1 +/Δ t1, the second network node completely receives and analyzes the total duration of the reference clock synchronization frame as Δ t2, and therefore the second network node finishes updating its own reference clock at time point t3= t1 +/Δ t2, so as to complete the reference clock synchronization with the first network node.
Still referring to fig. 7, when the second network node and the third network node perform clock synchronization, the second network node generates the reference clock synchronization frame and the total wireless collision waiting time length corresponding to the reference clock synchronization frame, which are sent to the third network node, is Δ t3, so that the second network node sends the reference clock synchronization frame to the third network node at time point t4= t1 +/Δ t2 +/Δ t3, and the third network node receives and analyzes the total time length of the reference clock synchronization frame as Δ t4, so that the third network node finishes updating the reference clock of the second network node at time point t5= t1 +/Δ t2 +/Δ t3 +/Δ t4, so as to finish the reference clock synchronization with the updated second network node.
In one embodiment, as shown in fig. 8, an interval between two adjacent reference clock synchronization frames transmitted by the same network node is a clock synchronization period T0; an interval between two adjacent signal transceiving windows of the same network node is a synchronous listening period T1, the clock synchronization period T0 is N times of the synchronous listening period T1, a value of N is greater than 2, and specifically, the value of N may be an integer between 50 and 200; the synchronous interception period T1 may be 100ms, and the larger the synchronous interception period T1 is, the slower the response speed of the corresponding network node is, and the lower the clock synchronization power consumption is, thereby ensuring the power consumption level of each network node.
It should be understood that although the steps in the flowcharts of fig. 2-4 and 6 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2-4 and 6 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed alternately or alternatingly with other steps or at least some of the sub-steps or stages of other steps. It should be noted that the different embodiments described above may be combined with each other.
Fig. 9 is a schematic block diagram of a clock synchronization apparatus according to an embodiment.
In this embodiment, the clock synchronization apparatus is applied to a second network node, where a previous-stage network node of the second network node is a first network node, and a next-stage network node of the second network node is a third network node.
As shown in fig. 9, the clock synchronization apparatus includes a signal receiving module 920, a duration obtaining module 940, a first synchronization module 960, and a second synchronization module 980.
A signal receiving module 920, configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window.
A duration obtaining module 940, connected to the signal receiving module 920, configured to obtain a receiving duration of the first clock synchronization signal.
A first synchronization module 960, respectively connected to the signal receiving module 920 and the time length obtaining module 940, configured to perform clock synchronization on the second network node according to the first clock synchronization signal and the received time length.
A second synchronization module 980, connected to the first synchronization module 960, configured to send a second clock synchronization signal to the third network node based on a second clock synchronization window after the clock synchronization, so as to update the reference clock of the third network node, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in an awake state.
In this embodiment, each module is configured to execute each step in the embodiment corresponding to fig. 2, and specific reference is made to fig. 2 and the related description in the embodiment corresponding to fig. 2, which are not repeated herein.
In the clock synchronization apparatus provided in this embodiment, a signal receiving module 920 receives a first clock synchronization signal sent by the first network node in a first clock synchronization window; a duration obtaining module 940 connected to the signal receiving module 920, configured to obtain a receiving duration of the first clock synchronization signal; a first synchronization module 960 connected to the signal receiving module 920 and the time length obtaining module 940, respectively, for performing clock synchronization on the second network node according to the first clock synchronization signal and the received time length; a second synchronization module 980 connected to the first synchronization module 960, after the clock synchronization, sending a second clock synchronization signal to the third network node based on a second clock synchronization window to update the reference clock of the third network node, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in the wake-up state; clock synchronization of each network node in the interception window is achieved, so that the power consumption level of each network node is guaranteed, and the applicability of each network node in a home application scene with strict power consumption requirements is improved.
The division of each module in the clock synchronization apparatus is only used for illustration, and in other embodiments, the clock synchronization apparatus may be divided into different modules as needed to complete all or part of the functions of the clock synchronization apparatus.
For specific limitations of the clock synchronization apparatus, reference may be made to the above limitations of the clock synchronization method, which is not described herein again. The various modules in the clock synchronization apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The modules can be embedded in a hardware form or independent of a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
The embodiment of the application also provides a clock synchronization system, wherein the clock synchronization system comprises a first network node, a second network node and a third network node, the upper-level network node of the second network node is the first network node, and the lower-level network node of the second network node is the third network node; the second network node is configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in an awake state.
The embodiment of the present application further provides an intelligent home communication device, which includes a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the method in the foregoing embodiment.
The embodiment of the application also provides a computer readable storage medium. One or more non-transitory computer-readable storage media containing computer-executable instructions that, when executed by one or more processors, cause the processors to perform the steps of the method as in the embodiments described above.
The clock synchronization method, the clock synchronization device, the clock synchronization system and the smart home communication device provided in the above embodiments implement that the first network node forwards the control instruction and effectively predicts the listening window of the adjacent network node, thereby ensuring the power consumption level of each network node, further improving the applicability of each network node in a home application scenario with strict power consumption requirements, and having important economic value and popularization and practice value.
Any reference to memory, storage, database, or other medium used herein may include non-volatile and/or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which acts as external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous Link (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct bused dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM).
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A clock synchronization method is applied to a second network node, wherein a previous network node of the second network node is a first network node, and a next network node of the second network node is a third network node; the clock synchronization method comprises the following steps:
receiving a first clock synchronization signal transmitted by the first network node within a first clock synchronization window;
acquiring the receiving time length of the first clock synchronization signal;
performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration;
after the clock synchronization with the first network node, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the second network node is in an awake state.
2. The clock synchronization method of claim 1, further comprising:
when the clock synchronization of the second network node and the first network node is abnormal, increasing the first clock synchronization window; and/or
And when the clock synchronization of the third network node and the second network node is abnormal, increasing the second clock synchronization window.
3. The clock synchronization method of claim 2, further comprising:
determining an exception type according to the clock synchronization exception information;
acquiring a clock synchronization window regulating quantity corresponding to the abnormal type;
and increasing the first clock synchronization window and/or the second clock synchronization window according to the clock synchronization window adjustment amount.
4. The clock synchronization method according to any one of claims 1 to 3, wherein the step of performing clock synchronization with the first network node according to the first clock synchronization signal and the reception duration comprises:
analyzing the first clock signal to obtain a reference clock of the first network node;
acquiring the analysis duration of the first clock synchronization signal;
and updating the reference clock of the second network node according to the reference clock of the first network node, the receiving time length and the analyzing time length so as to enable the second network node to carry out clock synchronization with the first network node.
5. The clock synchronization method of claim 4, wherein after the step of sending a second clock synchronization signal to the third network node based on a second clock synchronization window after clock synchronization with the first network node, further comprising:
under the condition that an acknowledgement signal fed back by the third network node is received within a preset time, the second clock synchronization signal is stopped being continuously sent to the third network node according to the acknowledgement signal;
and under the condition that the confirmation signal is not received within the preset time, continuously sending a second clock synchronization signal to the third network node based on a second clock synchronization window.
6. The clock synchronization method of claim 4, wherein the first clock synchronization window and the second clock synchronization window each comprise a plurality of transceiving windows;
if the current signal transceiving window is in the effective transceiving time, receiving the first clock synchronization signal sent by the first network node in the current signal transceiving window or sending the second clock synchronization signal to the third network node;
and if the current signal transceiving window is in invalid transceiving time, receiving the first clock synchronization signal sent by the first network node in the next signal transceiving window or sending the second clock synchronization signal to the third network node.
7. A clock synchronization device is applied to a second network node, wherein a previous network node of the second network node is a first network node, and a next network node of the second network node is a third network node; the clock synchronization apparatus includes:
a signal receiving module, configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window;
the time length obtaining module is connected with the signal receiving module and used for obtaining the receiving time length of the first clock synchronization signal;
the first synchronization module is respectively connected with the signal receiving module and the time length obtaining module and is used for carrying out clock synchronization on the second network node according to the first clock synchronization signal and the receiving time length;
and the second synchronization module is connected with the first synchronization module and used for sending a second clock synchronization signal to the third network node based on a second clock synchronization window after the clock synchronization so as to update the reference clock of the third network node, wherein the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in the awakening state.
8. A clock synchronization system, comprising:
the network node comprises a first network node, a second network node and a third network node, wherein the upper-level network node of the second network node is the first network node, and the lower-level network node of the second network node is the third network node;
the second network node is configured to receive a first clock synchronization signal sent by the first network node within a first clock synchronization window; acquiring the receiving time length of the first clock synchronization signal; performing clock synchronization with the first network node according to the first clock synchronization signal and the receiving duration; after the clock synchronization, sending a second clock synchronization signal to the third network node based on a second clock synchronization window, so that the third network node performs clock synchronization with the second network node according to the second clock synchronization signal, where the first clock synchronization window and the second clock synchronization window respectively correspond to two different reference clock synchronization time periods when the first network node is in an awake state.
9. An intelligent home communications device comprising a memory and a processor, the memory storing a computer program, wherein the processor when executing the computer program implements the steps of the method of any one of claims 1 to 6.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 6.
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