CN115599592A - Memory mirroring method and computing device - Google Patents
Memory mirroring method and computing device Download PDFInfo
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
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Abstract
The application provides a method for executing memory mirroring by a computing device, wherein the computing device comprises a memory, and the method comprises the following steps: determining a mirror image protection area in the memory in the running process of the computing equipment, wherein the mirror image protection area is an area needing mirror image protection; setting a mirror image area for the mirror image protection area; and transferring the data of the mirror image protection area to the mirror image area. By executing the method, when the computing equipment runs, the memory area needing mirroring can be determined, the mirroring memory is set for the determined memory area, the set mirroring memory can be fully utilized, and the use cost of the memory is reduced.
Description
Technical Field
The present application relates to the field of storage, and in particular, to a memory mirroring method and a computing device.
Background
In the related art, in order to ensure the reliability of data of important applications, mirror memories are set in memories of the important applications during the starting process of a system. After the system is started, for the important application with the mirror image memory, when the computing equipment writes data into the memory, one copy of data can be written into the common memory and the mirror image memory respectively, so that after the common memory fails, the data can be acquired from the mirror image memory, and the reliability of the data of the important application is ensured. However, the memory area storing important applications does not necessarily fail, so that the memory space is wasted due to the arrangement of the mirror image memory, and the use cost of the memory is increased.
Disclosure of Invention
According to the memory mirroring method and the computing equipment, when the computing equipment runs, the memory area needing mirroring can be determined, the mirror memory is set for the determined memory area, the set mirror memory can be fully utilized, and the use cost of the memory is reduced.
A first aspect of the present application provides a memory mirroring method executed by a computing device, where the computing device includes a memory, and the method includes: determining a mirror image protection area in the memory in the running process of the computing equipment, wherein the mirror image protection area is an area needing mirror image protection; setting a mirror image area for the mirror image protection area; and transferring the data of the mirror image protection area to the mirror image area.
By the method, when the computing equipment runs, the memory area needing mirroring can be determined, the mirroring memory is set for the determined memory area, the set mirroring memory can be fully utilized, and the use cost of the memory is reduced.
In an implementation manner of the first aspect, during the running process of the computing device, the computing device detects a memory region in the memory where a failure error occurs, and uses the detected memory region in which the failure error occurs as the mirror protection region.
In an implementation manner of the first aspect, the determining, during a running process of a computing device, a mirror protection area in the memory includes: and in the running process of the computing equipment, the computing equipment sets the mirror image protection area according to the operation of a user.
In an implementation manner of the first aspect, when a mirror region is set for the mirror protection region, a mirror region is first allocated to the mirror protection region; and then recording the address of the mirror image protection area and the address of the mirror image area into a mirror image table.
In an implementation manner of the first aspect, the transferring the data of the mirror protection area to the mirror area includes: and copying the data of the mirror image protection area to the mirror image area.
In an implementation manner of the first aspect, the method further includes: after the data of the mirror image protection area is copied to the mirror image area, enabling the mirror image protection function of the mirror image protection area; when receiving an access request for accessing the mirror image protection area, judging whether the mirror image protection function of the mirror image protection area is effective, and if so, redirecting the access request to the mirror image area.
In an implementation manner of the first aspect, a flag bit enabling a mirror protection function of the mirror protection area is set in the mirror table; and when the mirror image protection function of the mirror image protection area is enabled, setting a flag bit corresponding to the mirror image protection area in the mirror image table as a valid bit.
A second aspect of the present application provides a computing device, where the computing device includes a plurality of functional modules, and each functional module is configured to execute the memory mirroring method provided in the various implementation manners of the first aspect.
A third aspect of the present application provides a computing device, where the computing device includes a processor and a memory, where the memory stores program instructions, and the processor executes the program instructions to execute the memory mirroring method provided in the various implementation manners of the first aspect.
A fourth aspect of the present application provides a computer-readable storage medium comprising instructions that, when executed on a computing device, cause the computing device to implement a method as provided in any possible implementation of the first aspect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below.
Fig. 1 is a hardware architecture diagram of a computing device provided in an embodiment of the present application.
Fig. 2 is a structural diagram of a memory in a computing device according to an embodiment of the present application.
Fig. 3 is a flowchart of a memory mirroring method according to an embodiment of the present application.
Fig. 4 is a schematic diagram of a mirror table provided in an embodiment of the present application.
Fig. 5 is a flowchart of a method for processing a received read request after a mirror protection area is set for a mirror memory area and a mirror area is set for the mirror memory area in this embodiment of the present application.
Fig. 6 is a flowchart of a method for processing a received write request after a mirror protection area is set for a mirror memory area and a mirror area is set for the mirror memory area in this embodiment.
Fig. 7 is a functional block diagram of a computing device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present invention, and not all embodiments.
As shown in fig. 1, which is a block diagram of a computing device 100 provided in the embodiment of the present application, the computing device 100 may be any computing device including a memory, such as a server, a storage device, a terminal device, and the like.
The computing device 100 includes a processor 101, a memory controller 102, a memory 103, a hard disk 104, and a communication interface 105. Wherein the memory controller 102 may be integrated in the processor 101 or may be provided independently from the processor 101. Fig. 1 illustrates an example of a computing device including only one processor 101, but in a practical scenario, the number of processors may be multiple, and each processor corresponds to one memory controller. For example, the computing device may include both a Central Processing Unit (CPU) and a Graphics Processing Unit (GPU). The processor 101 is used to process data access requests from computing devices (e.g., servers) external to the computing device 100, as well as access requests generated internally within the computing device 100. Illustratively, when the processor 101 receives a write data request sent by another computing device through the communication interface 105, the data in the write data request is temporarily stored in the memory 103. When the total amount of data in the memory 103 reaches a certain threshold, the processor 101 writes the data in the memory 103 into the hard disk 104 for persistent storage. Only one hard disk 104 is illustrated in the figure, but in practical applications, the number of hard disks may be multiple. In other embodiments, a plurality of hard disks may form a storage device, and be connected to the computing device 100.
The memory 103 is an internal memory for directly exchanging data with the processor 101, and it can read and write data at any time, and it is fast, and it is used as a temporary data storage for an operating system or other programs in operation. The Memory 103 includes at least two types of Memory, for example, the Memory 103 may be a random access Memory (ram) or a Read Only Memory (ROM). The Random Access Memory is, for example, a Dynamic Random Access Memory (DRAM) or a Storage Class Memory (SCM). DRAM is a semiconductor Memory, and belongs to a volatile Memory (volatile Memory) device, like most Random Access Memories (RAMs). SCM is a hybrid storage technology that combines the features of both traditional storage devices and memory, memory-class memory providing faster read and write speeds than hard disks, but slower access speeds and lower cost than DRAM. However, the DRAM and the SCM are only exemplary in this embodiment, and the Memory 103 may further include other Random Access memories, such as Static Random Access Memory (SRAM) and the like. In addition, the Memory 103 may be a Dual In-line Memory Module (Dual In-line Memory Module, DIMM for short), i.e., a Module composed of a Dynamic Random Access Memory (DRAM), or a Solid State Disk (SSD). In practical applications, multiple memories and different types of memories may be configured in the computing device. The number and type of the memories are not limited in this embodiment. In addition, the memory 103 may be configured to have a power conservation function. The power-saving function means that when the system is powered off and powered on again, the data stored in the memory 103 will not be lost. A memory having a power saving function is called a nonvolatile memory. The memory 103 stores a software program, and the processor 101 runs the software program in the memory 103 to provide functions to be implemented by the software program.
In this embodiment, as shown in fig. 2, the memory 103 is divided into a mirror memory 1032 and a normal memory 1031, and the mirror memory 1032 is configured to store mirror data of data in the normal memory 1031. In the embodiment of the present invention, two setting manners of the mirror memory are provided, one is to divide a space in the memory 103 as the mirror memory 1032 before the electronic device 100 is used, and the specific setting manner is to set the size and the first address of the mirror region in the BIOS in advance, so that when the electronic device is started, the electronic device can separate the mirror memory 1031 from the memory 103 by running the BIOS. Mirrored memory 1032, which is configured in this manner, is not visible to the operating system and applications. For example, if the size of the memory 103 is 5G, and 1G of the memory is set as the mirror memory 1032, the size of the memory seen by the operating system and the application program is the size of the normal memory 1031, that is, 4G. Another setting manner of the mirror memory 1032 is that after the electronic device 100 is started, the mirror memory is applied in a memory space provided for an operating system and an application, and specifically, the operating system responds to a mirror memory setting request of a user, and divides a memory space with a requested size from the memory 103 as the mirror memory 1032. The mirror memory is managed by the memory controller 102, and if the electronic device 100 includes a plurality of processors 101, the memory controllers 102 corresponding to the plurality of processors 101 may manage the mirror memory 1032.
In this embodiment, during the use of the memory 103, the processor 101 may detect an address space (hereinafter, referred to as a fault space for convenience of description) in the memory 103 that has failed or is about to fail, and allocate a mirror space from the mirror memory 1032 for the detected fault space. Therefore, the mirror image space can be dynamically set for the detected fault space, so that the mirror image memory 1032 is fully utilized, and the waste of the mirror image memory 1032 is avoided.
With respect to the specific method of dynamically mirroring the memory 103 by the computing device 100, the following description will be made with reference to the flowchart shown in fig. 3.
In step S301, the processor 101 determines a memory area that needs to be mirror-protected.
The memory area that needs to be protected by the memory is the memory area that needs to be provided with the mirror image area in the mirror image memory 1032. In the embodiment of the present application, there are multiple ways to determine a memory area that needs mirror image protection, where one way is that the processor 101 may periodically detect the memory 103, and determine a memory area that has a risk, for example, a certain row Error in the memory or a bank Error, according to memory reliability indicators (KPIs), and during analysis, detect a memory area in which an Error occurs by using a parity bit technology (property) or an Error Checking and Correcting (ECC) technology; in another mode, a memory area needing mirror image protection is appointed for a user, for some important applications, the processor allocates fixed memory areas for the important applications according to the setting of the user, and mirror image protection is set for the memory areas; in another way, a user sets mirror image protection for an important application, and when the application with mirror image protection is started, a memory area is allocated for a process executing the application, and the allocated memory area is a memory area needing to be protected; in another way, during the operation of the processor, a memory area where an error (e.g. an ECC error) occurs is detected in real time, and when the error exceeds a threshold, the memory area is determined as a memory area that needs to be mirror-protected.
In step S302, the processor 101 sets a mirror area for the memory area that needs mirror protection.
After determining a memory region (hereinafter referred to as a mirror protection region for convenience of description) in the memory 103 that needs to be mirror-protected, the processor 101 may allocate a mirror region corresponding to the mirror protection region in the mirror memory 1032. In this embodiment of the present invention, the processor 101 stores the address of the mirror protection area and the address of the mirror area in a mirror table. The mirror image table is shown in fig. 4, each row of the table represents a mirror image entry, and each mirror image entry records an address interval of a mirror image protection area and an address interval of a mirror image area corresponding to the mirror image protection area. For each address interval, the start address and the end address of the interval may be further recorded in a table. After determining the mirror protection area in step S301 and setting the mirror area for the mirror protection area, the processor 101 may add a mirror entry in the mirror table and record the mirror protection area and the mapping of the address range of the mirror area. Each row in the mirror table further includes a state for each mirror entry, including an invalid state indicating that the mirror region of the mirror entry is not available, e.g., indicated by a "0", and a valid state indicating that the mirror region of the mirror entry is available, e.g., indicated by a "1". The generation, updating, and use of the mirrored item will be described below.
In this embodiment of the present application, after the processor determines a new mirror image protection area, if the remaining space of the mirror image memory is not enough to allocate a mirror image area to the mirror image protection area, the processor 101 may determine the priority of each mirror image entry in the mirror image table, and delete one or more mirror image entries with the lowest priority from the mirror image table, so as to release the mirror image memory space. When determining the priority of the mirror items, the priority can be determined according to the importance degree of the application using the address space of the mirror protection area of each mirror item, and can also be determined through 8230 \ 8230;.
In the embodiment of the present application, the mirror table has two implementation manners, one is a software implementation manner, and the other is a hardware implementation manner, where the software implementation manner is that the processor 101 creates the memory table in the memory 103 in the running process. Another hardware implementation manner is to add the mirror image table in a register of the processor 101, record an address interval of the mirror image protection area in the register after the processor 101 determines the mirror image protection area, and record the address interval of the mirror image area in the mirror image table after the mirror image protection area is allocated to the mirror image protection area.
Step S303, performing mirroring on the data in the mirroring protection area.
In this embodiment, if the mirror image protection area is determined by performing fault monitoring on the memory 103, the processor 101 moves the data of the mirror image protection area to the mirror image area after generating the mirror image item. And when the data is not successfully moved into the mirror image area, marking the state of the mirror image item as an invalid state, and after the data is successfully moved into the mirror image area, marking the state of the mirror image item as an valid state. For the mirror item marked as invalid, the data of the mirror area corresponding to the mirror item cannot be accessed.
For the mirror item set for an important application,
by the mode, the mirror image protection area can be dynamically identified in the using process of the computing equipment, and the mirror image area is set for the mirror image protection area, so that the utilization rate of the mirror image memory is improved.
The reading and writing of data will be described below with reference to fig. 5 and 6, respectively.
As shown in fig. 5, a flow chart of a method for processing a read request by the processor 101 is shown.
In step S501, the processor 101 receives a read request, where the read request carries an address of data to be read.
In this embodiment of the present application, the address of the data to be read is a Logical Block Address (LBA) of the data to be read.
In step S502, the processor 101 determines whether the read request hits in the memory 103 according to the address of the data to be read.
In order to improve the access efficiency of data, some hot spot data may be cached in the memory 103, for the hot spot data cached in the memory 103, the processor 103 may record a corresponding relationship between the LBA of the data and the memory address, and when receiving a read request, the processor 101 may determine whether the data to be read hits in the memory 103 according to the LBA address carried in the request.
In step S503, if the read request is not hit in the memory 103, the processor 101 reads the data to be read from a hard disk.
In step S504, if the read request hits in the memory 103, the processor 101 reads the data to be read from the memory 103.
In step S505, the processor 101 determines whether the data to be read is successfully read from the memory 103.
In step S506, if the reading is successful, the processor 101 returns the data to be read.
In step S507, if the reading is unsuccessful, the processor 101 determines that the memory address corresponding to the data to be read has a mirror image function.
When the reading is unsuccessful, the processor 101 searches the memory address in a mirror image table, and if the mirror image protection area in which the memory address falls is found in the mirror image table and the status of the mirror image item in which the mirror image protection area is located is marked as valid, it is determined that the memory address has a mirror image function.
In step S508, if a mirror function is set, the processor 101 reads the data to be read from the mirror address corresponding to the memory address.
And when determining that the mirror image item of the memory address is provided with a mirror image function, the processor further determines a mirror image address corresponding to the memory address, and then reads the data to be read from the mirror image address.
In step S509, if the mirroring function is not set, a read failure is returned.
As shown in fig. 6, a flow chart of a method for processing a write request for the processor 101 is shown.
In step S601, the processor 101 receives a write request, where the write request carries data to be written.
In step S602, the processor 101 allocates a memory address to the write request.
In step S603, the processor determines whether the allocated memory address has a mirror function.
In step 604, if the allocated memory address has a mirror function, the processor 101 writes the data to be written into the memory address and a mirror address corresponding to the memory address.
Step 605, if the allocated memory address has no mirror function, writing the data to be written into the memory address.
Fig. 7 is a functional block diagram of a computing device 700 according to an embodiment of the present application. The computing device 700 includes a determination module 701 and a mirroring module 702. The determining module 701 is configured to determine a memory area that needs to be subjected to image protection. Please refer to the description of step S301 for a specific determination manner. The mirror image module 702 is configured to set a mirror image area in a memory area that needs mirror image protection, and perform mirror image processing on data in the mirror image protection area, and for a specific manner of setting the mirror image area and performing mirror image processing on the data in the mirror image protection area, reference is made to specific descriptions of step S302 and step S303, and in addition, the mirror image module 702 performs mirror image processing, which further includes processing on a read request and a write request, and refer to related descriptions of fig. 5 and fig. 6 specifically.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (14)
1. A memory mirroring method performed by a computing device, the computing device including a memory, the method comprising:
determining a mirror image protection area in the memory in the running process of the computing equipment, wherein the mirror image protection area is an area needing mirror image protection;
setting a mirror image area for the mirror image protection area;
and transferring the data of the mirror image protection area to the mirror image area.
2. The method of claim 1, wherein determining the mirrored protection regions in the memory during operation of the computing device comprises:
in the running process of the computing equipment, the computing equipment detects a memory area with a fault error in the memory, and takes the detected memory area with the fault error as the mirror image protection area.
3. The method of claim 2, wherein determining the mirrored protection regions in the memory during operation of the computing device comprises: and in the running process of the computing equipment, the computing equipment sets the mirror image protection area according to the operation of a user.
4. The method of any one of claims 1-3, wherein setting a mirror region for the mirror-protected region comprises:
distributing a mirror image area for the mirror image protection area;
and recording the address of the mirror image protection area and the address of the mirror image area into a mirror image table.
5. The method of any of claims 1-4, wherein the transferring the data of the mirrored protection zone to the mirrored zone comprises:
and copying the data of the mirror image protection area to the mirror image area.
6. The method of claim 5, wherein the method further comprises:
after the data of the mirror image protection area is copied to the mirror image area, enabling the mirror image protection function of the mirror image protection area;
when receiving an access request for accessing the mirror image protection area, judging whether the mirror image protection function of the mirror image protection area is effective, and if so, redirecting the access request to the mirror image area.
7. The method of claim 5, wherein a flag bit enabling a mirror protection function of the mirror protection region is set in the mirror table;
the enabling of the mirror protection function of the mirror protection area comprises:
and setting the flag bit corresponding to the mirror image protection area in the mirror image table as a valid bit.
8. A computing device, comprising:
the determining module is used for determining a mirror image protection area in the memory in the running process of the computing equipment, wherein the mirror image protection area is an area needing mirror image protection;
and the mirror image module is used for setting a mirror image area for the mirror image protection area and transferring the data of the mirror image protection area to the mirror image area.
9. The computing device of claim 8, wherein, during operation of the computing device, the determining module, when determining the mirror-protected region in the memory, is specifically configured to:
and detecting a memory area with a fault error in the memory, and taking the detected memory area with the fault error as the mirror image protection area.
10. The computing device according to claim 9, wherein, in the running process of the computing device, when determining the mirror protection region in the memory, the determining module is specifically configured to: and in the running process of the computing equipment, the computing equipment sets the mirror image protection area according to the operation of a user.
11. The computing device of any of claims 8-10, wherein the mirroring module is specifically to:
distributing a mirror image area for the mirror image protection area;
and recording the address of the mirror image protection area and the address of the mirror image area into a mirror image table.
12. The computing device of any one of claims 8-11, wherein the mirroring module is specifically to:
and copying the data of the mirror image protection area to the mirror image area.
13. The computing device of claim 12, wherein the mirroring module is further to:
after the data of the mirror image protection area is copied to the mirror image area, enabling the mirror image protection function of the mirror image protection area;
when an access request for accessing the mirror image protection area is received, judging whether the mirror image protection function of the mirror image protection area is effective, and if so, redirecting the access request to the mirror image area.
14. The computing device of claim 13, wherein a flag bit is set in the mirror table to enable a mirror protection function of the mirror protected region;
the mirror module is specifically configured to, when enabling the mirror protection function of the mirror protection area:
and setting the flag bit corresponding to the mirror image protection area in the mirror image table as a valid bit.
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| CN116842001A (en) * | 2023-08-29 | 2023-10-03 | 合肥中科类脑智能技术有限公司 | Mirror image data cleaning method and device, electronic equipment and artificial intelligent platform |
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| CN116842001A (en) * | 2023-08-29 | 2023-10-03 | 合肥中科类脑智能技术有限公司 | Mirror image data cleaning method and device, electronic equipment and artificial intelligent platform |
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