CN115599508A

CN115599508A - CPU and task scheduling method

Info

Publication number: CN115599508A
Application number: CN202110773565.3A
Authority: CN
Inventors: 刘国平; 李思行
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2021-07-08
Filing date: 2021-07-08
Publication date: 2023-01-13

Abstract

The application provides a CPU and a task scheduling method. The method relates to the field of computers, wherein a CPU core is provided with a coprocessor, a first context resource module used for storing context resources of tasks and a second context resource module used for storing context resources of a task scheduler. Therefore, the coprocessor saves and prefetches the upper and lower resources of the task, so that the CPU core does not need to execute the operation of saving and prefetching the context resources of the task; moreover, when the task scheduler is executed, the CPU core does not need to switch context resources of the task scheduler, so that the execution time required by the task scheduler is reduced; and then the context switching overhead of the CPU core can be effectively reduced, so that almost all time of the CPU core can be used for executing tasks, and the time resource utilization rate of the CPU can be effectively improved.

Description

CPU and task scheduling method

Technical Field

The embodiment of the invention relates to the field of computers, in particular to a CPU and a task scheduling method.

Background

A Task (Task) represents in a computer a work element to be performed by the computer, which is composed of one or more sequences of instructions processed by a control program. Tasks may be carried using one process or one thread. Whereas multitasking (Computer multitasking) refers to the ability of a Computer to run multiple programs simultaneously. The general method of multitasking is to run a section of code of a first program and save a working environment; then a section of code of the second program is operated, and the environment is saved; … … recovering the working environment of the first program, and executing the next section of code of the first program; … … this is repeated.

The Central Processing Unit (CPU) time consumed by running a piece of code is called a time slice (timeslice). The process of saving and restoring the operating environment is referred to as context switching. The time (overhead) of context switching is affected by the performance of the CPU and the size of the context. The stronger the performance of the CPU, the smaller the required overhead; the more context switches are involved, the more overhead is required.

In the prior art, the context switching work is completed by a CPU core in a CPU, so that certain context switching overhead is required, and the utilization rate of time resources is low. Therefore, it is desirable to improve the above technical problems.

Disclosure of Invention

The application provides a CPU and a task scheduling method, which can shorten the context switching time of a CPU core and improve the time resource utilization rate of the CPU.

In a first aspect, a CPU is provided, which includes at least one CPU core, and M coprocessors configured for each CPU core, N first context resource modules for caching context resources of a task, and a second context resource module for storing context resources of a task scheduler, where M is equal to one, and N is greater than or equal to two, where: the CPU core is used for executing task scheduling according to the task scheduling strategy through the task scheduler, and sending an indication signal to the coprocessor when scheduling the task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and pre-fetch context resources of the task n +1; the coprocessor is used for responding to the indication signal and storing the context resource of the task n-1 from the context resource module A to the memory; acquiring context resources of a task n +1, and caching the context resources of the task n +1 into a context resource module A; the context resource module A is a first context resource module which caches context resources of the task N-1 when the task N-1 is executed in the N first context resource modules.

In the CPU in the embodiment of the application, the CPU core is provided with the coprocessor, a first context resource module for storing context resources of a task and a second context resource module for storing context resources of a task scheduler, so that the coprocessor stores and prefetches upper and lower resources of the task, and the CPU core does not need to execute the operation of storing and prefetching the context resources of the task; moreover, when the task scheduler is executed, the CPU core does not need to switch context resources of the task scheduler, so that the execution time required by the task scheduler is reduced; and then the context switching overhead of the CPU core can be effectively reduced, so that almost all time of the CPU core can be used for executing tasks, and the time resource utilization rate of the CPU can be effectively improved.

In some embodiments, the context resources of the task include register resources and translation lookaside buffer, TLB, resources, the first context resource module includes registers to cache the register resources of the task and a TLB to cache the TLB resources of the task. According to the method and the device, the context resources such as the register resource and the TLB resource of the task are prefetched, so that the CPU core does not need to execute long-time-consuming operations such as acquiring the register resource and the TLB resource of the task when executing the task, and the execution efficiency of the task can be improved.

In some embodiments, the context resources of the task scheduler include register resources and/or translation lookaside buffer, TLB, resources, and the second context resource module includes registers for caching the register resources of the task scheduler and/or a TLB for caching the TLB resources of the task scheduler. In the embodiment of the application, the second context resource module is used for storing the register resource and/or the TLB resource and other context resources of the task scheduler, so that when the CPU core executes the task scheduler, the context resource of the task scheduler does not need to be acquired, and the execution time required by the task scheduler can be effectively shortened.

In some embodiments, the task scheduling policy comprises a round robin scheduling policy, a strict time and space partition scheduling policy, a priority preemption scheduling policy, or a yielding scheduling policy.

In some embodiments, the N first context resource modules include context resource module a and context resource module B; the CPU core, when executing task scheduling according to the task scheduling policy by the task scheduler and scheduling the task n after the task n-1 is executed, sends an indication signal to the coprocessor, and is specifically configured to:

determining that the first pointer points to the context resource module A through the task scheduler, and when the second pointer points to the context resource module B, pointing the first pointer to the context resource module B, pointing the second pointer to the context resource module A or instructing the coprocessor to point the second pointer to the context resource module A; the first pointer is used for indicating a first context resource module of a context resource of a task acquired by a CPU core in a current task scheduling cycle; the second pointer is used for indicating that after the current task scheduling cycle is expired, the CPU core acquires a first context resource module of the context resource of the task; when the task n +1 and the task n are different tasks, sending a first indication signal to the coprocessor, and scheduling and executing the task n, wherein the first indication signal carries a task identifier of the task n +1 and is used for indicating the coprocessor to store context resources of the task n-1 and prefetch context resources of the task n +1; and when the task n +1 and the task n are the same task, sending a second indicating signal to the coprocessor, scheduling and executing the task n, wherein the second indicating signal is used for indicating the coprocessor to store context resources of the task n-1.

Correspondingly, in some embodiments, the coprocessor is specifically configured to: responding to the first indication signal, and storing the context resource in the context resource module A into a memory; and caching the context resource of the task n +1 into the context resource module A according to the task identifier of the task n +1 carried in the first indication signal.

Correspondingly, in some embodiments, the coprocessor is specifically configured to: responding to the second indication signal, and storing the context resource in the context resource module A into a memory; and, directing the second pointer to context resource module B.

In this embodiment of the present application, when the first pointer and the second pointer point to different first context resource modules (the first pointer points to the context resource module a, and the second pointer points to the context resource module B), it indicates that the task executed by the CPU core in the next task scheduling cycle is a task different from the current task, at this time, the CPU core needs to change the pointing direction of the first pointer, point the first pointer to the address of the context resource module B, point the second pointer to the context resource module a, or instruct the coprocessor to point the second pointer to the context resource module a. And when the task n and the task n +1 are different tasks, the CPU core instructs the coprocessor to save the context resource of the task n-1 and pre-fetch the context resource of the task n +1, and schedules the execution of the task n. And when the task n and the task n +1 are the same task, the CPU core only needs to instruct the coprocessor to store the context resource of the task n-1 and schedule and execute the task n.

In some embodiments, the N first context resource modules include context resource module a and context resource module B; the CPU core, when executing task scheduling according to the task scheduling policy by the task scheduler and scheduling the task n after the task n-1 is executed, sends an indication signal to the coprocessor, and is specifically configured to: when the task scheduler determines that the first pointer and the second pointer point to the context resource module A, the first pointer is used for indicating a first context resource module of a context resource of a task obtained by a CPU core in a current task scheduling period; the second pointer is used for indicating that after the current task scheduling cycle is expired, the CPU core acquires a first context resource module of the context resource of the task; when the task n +1 and the task n are different tasks, pointing a second pointer to the context resource module B or instructing the coprocessor to point the second pointer to the context resource module B, sending a third instruction signal to the coprocessor, and scheduling and executing the task n, wherein the third instruction signal carries a task identifier of the task n +1 and is used for instructing the coprocessor to prefetch the context resource of the task n +1; and when the task n +1 and the task n are the same task, scheduling and executing the task n.

Correspondingly, in some embodiments, the coprocessor is specifically configured to: and responding to the third indication signal, and caching the context resource of the task n +1 into the context resource module B according to the task identifier of the task n +1 carried in the third indication signal.

In this embodiment, when the first pointer and the second pointer both point to the same first context resource module (for example, point to context resource module a), it indicates that the CPU core executes the same task as the current task in the next task scheduling cycle, and at this time, the CPU core does not need to change the point of the first pointer. And when the task n and the task n +1 are different tasks, the CPU core may direct the second pointer to the context resource module B or direct the coprocessor to direct the second pointer to the context resource module B, and direct the coprocessor to prefetch the context resource of the task n + 1. And when the task n and the task n +1 are the same task, the CPU core does not need to instruct the coprocessor to pre-fetch the task context resource, and only needs to schedule and execute the task n.

In some embodiments, the CPU core is further to: when a task n is executed, when the task to be executed is determined to be a task n +1 'according to a task scheduling strategy through a task scheduler, context resources of the task n +1' are obtained through the task scheduler to replace context resources of the task n +1 cached in a context resource module A; or sending an indication signal to the coprocessor to indicate the coprocessor to store the context resource of the task n and the context resource of the pre-fetching task n +1', and scheduling and executing the task n +1; task n +1' is a different task than task n + 1.

In this embodiment, when executing the task n, if the task scheduling policy determines that the task to be executed is the task n +1 '(the task n +1' is a different task from the task n + 1), at this time, the task scheduler may complete obtaining the context resource of the task n +1 'and replace the context resource of the task n +1 that has been cached, so as to schedule the CPU core to execute the task n +1' after the replacement of the context resource is completed. Or the CPU core may instruct the coprocessor to save the context resource of the task n and prefetch the context resource of the task n +1', and schedule the execution task n +1, so that after the coprocessor completes the saving and prefetching operations, the CPU core may execute the task n +1', that is, the CPU core first executes the task n +1, and then postpones one task scheduling cycle to execute the task n +1'.

In some embodiments, the CPU core is further to: through the task scheduler, when the execution task n is scheduled after the execution task n-1 is finished, if the coprocessor does not finish storing the context resource of the task n-2 and the context resource of the pre-fetching task n, the task scheduler schedules the execution task n after waiting for the coprocessor to finish storing the context resource of the task n-2 and the context resource of the pre-fetching task n, or schedules the execution task n after storing the context resource of the task n-2 and the context resource of the pre-fetching task n through the task scheduler.

In this embodiment, a synchronization negotiation mechanism between the task scheduler and the coprocessor is provided when the coprocessor does not finish saving context resources of the task n-2 and prefetching context resources of the task n during scheduling execution of the task n, and the CPU core may wait for the coprocessor to finish saving context resources of the task n-2 and prefetching context resources of the task n and then schedule execution of the task n; the task scheduler may also save the context resource of task n-2 and pre-fetch the context resource of task n before scheduling task n.

In some embodiments, the task scheduling period adopted by the task scheduling policy satisfies the following expression: t1 is more than or equal to T/M, wherein T1 is a task scheduling period, T is time required by the coprocessor for saving context resources of tasks and prefetching context resources of the tasks, M is the number M of the coprocessors, and M is more than or equal to 1.

In the CPU of this embodiment, for a CPU core, the number M of coprocessors, the task scheduling period T1, and the time T required by the coprocessors to save context resources of a task and prefetch context resources of a task only need to satisfy the above constraint relationship. The specific values of T, M and t1 may be set according to actual needs as long as the above expression is satisfied. Particularly, when T1 is smaller than T, the task scheduling can still be successfully completed by increasing the number of the coprocessors as long as the size of M is reasonably set.

In some embodiments, when the task scheduling policy is a round robin scheduling policy, the worst case execution time of the task is calculated as: WCET = n × Fn (t 1, t 2), where WCET is a worst case execution time, n is a maximum parallel task number of the CPU core, and t1 is a task scheduling cycle adopted by the task scheduling policy; t2 is the processing duration of the task; fn is the minimum multiple of t1 greater than or equal to t 2.

In this embodiment, when the task scheduling policy is a polling scheduling policy, the worst execution time of one task may be calculated by using the above, and the calculation of the worst execution time of the task is ensured and simplified by using a mathematical formula, so as to meet the requirement that the trust needs to be formally proven.

In a second aspect, a task scheduling method is further provided, which is applied to the CPU in the first aspect, and the method includes: the CPU core executes task scheduling according to the task scheduling strategy through the task scheduler, and sends an indication signal to the coprocessor when scheduling the task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and prefetch context resources of the task n +1; the coprocessor responds to the indication signal and stores the context resource of the task n-1 from the context resource module A to the memory; acquiring context resources of a task n +1, and caching the context resources of the task n +1 into a context resource module A; the context resource module A is a first context resource module which caches context resources of the task N-1 when the task N-1 is executed in the N first context resource modules.

According to the task scheduling method in the embodiment of the application, the coprocessor is used for storing and prefetching the upper and lower resources of the task, so that a CPU core does not need to execute the operation of storing and prefetching the context resources of the task; and then the context switching overhead of the CPU core can be effectively reduced, so that almost all time of the CPU core can be used for executing tasks, and the time resource utilization rate of the CPU can be effectively improved.

Drawings

The drawings used in the embodiments of the present application are described below.

FIGS. 1a and 1b are schematic diagrams of task scheduling process in the prior art;

FIG. 2 is a schematic structural diagram of a CPU provided in an embodiment of the present application;

fig. 3 is a schematic structural diagram of a CPU provided in an embodiment of the present application;

fig. 4a is a schematic diagram of a TSP scheduling policy provided in an embodiment of the present application;

fig. 4b is a schematic diagram of a priority preemption scheduling policy provided in an embodiment of the present application;

fig. 5a is a schematic diagram of a task scheduling process of a CPU core according to an embodiment of the present application;

FIG. 5b is a schematic diagram of a task scheduling process of a coprocessor according to an embodiment of the present application;

FIG. 5c is a schematic diagram of a task scheduling process of a coprocessor according to an embodiment of the present application;

FIG. 5d is a schematic diagram of another task scheduling process of a CPU core according to an embodiment of the present application;

FIG. 5e is a schematic diagram illustrating a task scheduling process of another coprocessor according to an embodiment of the present application;

FIG. 6a is a schematic diagram illustrating a usage of a first context resource module in a task scheduling process according to an embodiment of the present application;

FIG. 6b is a timing diagram of a task scheduling process according to an embodiment of the present application;

fig. 7 is a flowchart of a task scheduling method according to an embodiment of the present application.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

Referring to fig. 1a and 1b, fig. 1a and 1b are schematic diagrams of a task scheduling process in the prior art; referring to fig. 1a, a hierarchical structure of the system includes a CPU, an Operating System (OS) kernel located at an upper layer of the CPU, and tasks (such as task 1, task 2, … … task n) that the system needs to run, where the OS kernel includes a task scheduler, and the task scheduler is configured to schedule the tasks that the CPU kernel needs to execute according to a task scheduling policy. Referring to fig. 1b,101 is the execution timing of the tasks of the system, and 102 is the execution timing of the task scheduler. In the task scheduling process, after the CPU core finishes executing the task 1, the context resource of the task 1 is saved, the context resource of the task scheduler is read, and the task scheduler is executed to determine the next task to be executed; if the task to be executed next is determined to be task 2 according to the task scheduling policy, the CPU core saves the context resource of the task scheduler, reads the context resource of task 2, and executes task 2, and so on.

Therefore, in the prior art, the CPU core in the CPU completes the context switching operation, and therefore, a certain context switching overhead is required, resulting in low time resource utilization. Therefore, the application provides a new CPU architecture, which is provided with a coprocessor, a first context resource module for storing context resources of tasks and a second context resource module specially used for storing the context resources of a task scheduler, so that the coprocessor stores and prefetches upper and lower resources of the tasks, and a CPU core does not need to execute the operation of storing and prefetching the context resources of the tasks; moreover, when the task scheduler is executed, the CPU core does not need to switch the context resource of the task scheduler, the execution time required by the task scheduler is reduced, the context switching expense of the CPU core can be reduced, and the utilization rate of the time resource is improved.

Example one

The following describes the CPU architecture and task scheduling process in the embodiments of the present application:

referring to fig. 2, fig. 2 is a schematic structural diagram of a CPU provided in an embodiment of the present application.

In this embodiment, the CPU 200 includes at least one CPU core 201, and M coprocessors (e.g., coprocessor 1, coprocessor 2, … … coprocessor M) configured for each CPU core 201, N first context resource modules (e.g., first context resource module 1, first context resource module 2, … … first context resource module N) for caching context resources of a task, and a second context resource module for storing context resources of a task scheduler, where M is equal to one, and N is greater than or equal to two.

Specifically, when the CPU core 201 executes the task scheduler for the first time, the context resource of the task scheduler is acquired and stored in the second context resource module.

In addition, optionally, the CPU 200 further includes at least one Memory Management Unit (MMU) 202 for performing address translation between the CPU 200 and the Memory 203, and mapping virtual addresses to physical addresses.

The CPU core 201 is used for executing task scheduling according to a task scheduling strategy through a task scheduler, and sending an indication signal to the coprocessor when scheduling a task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and pre-fetch context resources of the task n +1;

the coprocessor is used for responding to the indication signal and storing the context resource of the task n-1 from the context resource module A to the memory; acquiring context resources of the task n +1, and caching the context resources of the task n +1 into a context resource module A; the context resource module A is a first context resource module which caches context resources of the task N-1 when the task N-1 is executed in the N first context resource modules.

In the CPU in the embodiment of the application, as the CPU core is provided with the coprocessor, a first context resource module for storing context resources of a task and a second context resource module specially used for storing context resources of a task scheduler, when a task n is scheduled, the coprocessor stores upper and lower resources of the task n-1 and context resources of a pre-fetching task n +1, so that the CPU core does not need to execute the operation of storing the context resources of the task n-1 and pre-fetching the context resources of the task n +1; moreover, when the task scheduler is executed, the CPU core does not need to switch context resources of the task scheduler, so that the execution time required by the task scheduler can be effectively reduced; and then the context switching overhead of the CPU core can be effectively reduced, so that almost all time of the CPU core can be used for executing tasks, and the time resource utilization rate of the CPU can be effectively improved.

In some embodiments, the context resources of the task include register resources and Translation Lookaside Buffer (TLB) resources, and correspondingly, the first context resource module includes registers for storing the register resources of the task and a TLB for storing the TLB resources of the task. According to the embodiment of the application, context resources such as register resources and TLB resources of the task are prefetched through the coprocessor, so that when a CPU core executes the task, the CPU core does not need to execute long-time-consuming operations such as acquiring the register resources and TLB resources of the task, and the execution efficiency of the task can be improved.

In particular, the coprocessor, when prefetching context resources for task n +1, refers to fetching the complete TLB resources and the complete register resources for task n + 1.

Further, the TLB, colloquially called a fast table, is part of the MMU, essentially a cache memory, which caches page table entries (virtual to physical address mappings) for tasks. In other words, the TLB resources of the task refer to the page table entry data of the task. Furthermore, in the embodiment of the present application, since a task may be carried by using one process or one thread, that is, the task may be understood as one process or one thread. Taking a process as an example, when a process executes, the values in all registers of the CPU, the state of the process, and the contents in the stack are referred to as the context of the process. Thus, a process 'register resource refers to the value stored in the process' associated register. Similarly, a thread's register resources refer to the data stored in the thread's associated registers.

Referring to fig. 3, fig. 3 is a schematic diagram of a specific structure of a CPU provided in an embodiment of the present application; in fig. 3, the CPU includes a CPU core 302, a coprocessor 301, two first context resource modules, a first context resource module 1 and a first context resource module 2, and an MMU 303; taking the first context resource module 2 as an example, the TLB in the first context resource module 2 stores page table entries, i.e. TLB resources, used for address translation of a certain task; and the register in the first context resource module 2 is used to store the register resource of a certain task.

In some embodiments, the context resources of the task scheduler comprise register resources and/or translation lookaside buffer, TLB, resources, and accordingly the second context resource module comprises registers for caching register resources of the task scheduler and/or a TLB for caching TLB resources of the task scheduler. The register resource and TLB resource of the task scheduler may be defined by referring to the register resource and TLB resource of the task, and are not described in detail.

In particular, when the second context resource module includes a register and a TLB, the structures of the second context resource module and the first context resource module may be the same; there may also be some slight differences, for example, the number of registers of the second context resource module is smaller than the number of registers of the first context resource module.

In addition, it is worth noting that a real-time system means that the correctness of the computation of the system depends not only on the logical correctness of the computation, but also on the time at which the result is produced. If the time constraints of the system are not met, the system is considered to be failed. Real-time systems are further classified into hard real-time systems and soft real-time systems. And the Worst-case execution time (WCET) of a task is the maximum length of time that the task needs to execute on a particular hardware platform.

Hard real-time systems are defined as having to have tasks completed within a certain time, even at worst processing load. Such as aerospace, aviation, automobile automatic driving and other fields, have strict requirements on the completion time of tasks, and the requirements of hard real-time systems need to be met so as to pass qualification certification in the fields.

While soft real-time systems are defined to allow most tasks to be completed within a certain time. For example, in video playing, the processing of video information mostly meets the time requirement, and in a few cases, the processing overtime does not cause serious consequences.

In some embodiments, the task scheduling policy includes a hard real-time scheduling policy, a priority preemption scheduling policy, or a yielding scheduling policy. The hard real-Time scheduling policy includes a Round-Robin (RR) scheduling policy, a strict Time and Space Partitioning (TSP) scheduling policy, and the priority preemption scheduling policy includes a priority preemption scheduling policy and a priority delay preemption scheduling policy. The specific process of the CPU core performing task scheduling according to the task scheduling policy through the task scheduler may refer to the following description of the second embodiment and the third embodiment, which is not described herein again.

Particularly, when the task scheduling policy adopts a hard real-time scheduling policy, the system at this time is a hard real-time system. That is, under the support of the new CPU architecture, the CPU core approaches zero latency at the time of task switching.

The system arranges according to the order of task submission, stores the queue by using a data structure of the queue (the queue is called as a ready queue), generates an interrupt at a certain time interval (namely, time slice, at this time, the time slice can be understood as a task scheduling period of the task scheduling strategy), activates a task scheduler of an operating system to schedule the task, and allocates a CPU core to a head-of-queue task after the scheduling is completed to execute the task. And when the time slice of the head-of-queue task is exhausted or runs out, the operating system allocates the CPU to the new head-of-queue task again. Therefore, all tasks in the ready queue can be guaranteed to be executed by the CPU core once within a certain time period.

In the embodiment of the present application, since the context switching overhead is greatly reduced, at this time, the size of the time slice can be reduced (i.e., the time slice can be set to a value smaller than that in the prior art) to meet the real-time requirement, and the proportion of the context switching overhead is not increased abruptly.

The time-triggered scheduling strategy refers to a scheduling method in which each task is repeatedly and alternately scheduled within a set time interval. The time-triggered scheduling policy comprises a TSP scheduling policy, wherein each task is allocated with a partition, each partition is provided with a dedicated storage space and a dedicated time slot, each partition stores respective data in the respective storage space, and task processing is performed in the respective dedicated time slot.

Referring to fig. 4a, fig. 4a is a schematic diagram of a TSP scheduling policy provided in an embodiment of the present application; A. b, C are 3 tasks, each of which is demarcated into 3 partitions. The system allocates a "primary time frame" which is fixed in length, meets the requirement of the sum of 3 partition-specific time slots, and is a fixed time interval for each task schedule. Under the main time frame, each task is divided into fixed time slots, and each task executes the respective task in the time slot. In this way, each task is executed according to a predetermined schedule without being influenced by other tasks, so that the execution time is determined and the requirements of the hard real-time system are met. However, there is overhead in the TSP scheduling policy in context switching, and the overhead increases as the number of partitions increases. Therefore, under the CPU architecture of the present application, when the task scheduler performs task scheduling by using the TSP scheduling policy, context resource switching of the task scheduler is not required, and the coprocessor performs storage and prefetching of context resources of a task, which can effectively reduce context switching overhead of a CPU core, thereby bringing about improvement of real-time performance or increase of partition number.

In addition, the priority preemption scheduling policy is that when a high-priority task needs to be executed, the system automatically switches to the task. This manner of scheduling tasks according to priority is referred to as preemptive task processing. Referring to fig. 4b, fig. 4b is a schematic diagram illustrating a priority preemption scheduling policy according to an embodiment of the present application; suppose there are three tasks, task 1, task 2, and task 3, respectively, and the priorities of these tasks are: task 1< task 2< task 3. During the execution of task 1, task 1 is preempted when task 2, which has a higher priority than task 1, is ready. Task 2 is preempted when task 3, which has a higher priority than task 2, is ready during the execution of task 2. When the execution of the task 3 is completed, the task 2 with relatively higher priority is re-executed from the task queue; when the execution of task 2 is completed, task 1 having a relatively low priority is executed again.

The Priority preemption Scheduling policy may be a Fixed Priority Scheduling (FPS) Scheduling policy, an Earliest Deadline First (EDF) Scheduling policy, or the like.

Among other things, the FPS scheduling policy may ensure that the processor executes the highest priority task of all tasks currently ready for execution at any given time. The scheduling strategy has the advantages that the task scheduling with the highest priority is guaranteed to be processed most preferentially; however, since a task with a higher priority is given priority, the task with a lower priority may wait for an indefinite time, and thus it is difficult for the task with a lower priority to calculate its WCET.

The EDF scheduling policy is a dynamic priority scheduling policy, and whenever a scheduling event (task completion, new task release, etc.) occurs, a task closest to its deadline is searched in a queue. The task is the next task to be scheduled for execution. If the total CPU utilization does not exceed 100%, the EDF may ensure that the deadline for all tasks is met.

Similarly, when the task is scheduled by using the priority preemption scheduling policy, there is overhead in context switching by the CPU core, and the overhead increases as the task preemption increases. Under the CPU framework of the application, when the task scheduling is carried out by adopting the priority preemption scheduling strategy, the context resource switching of the task scheduler is not needed, and the context resource of the task is stored and prefetched by the coprocessor, so that the context switching overhead of the CPU core can be effectively reduced.

In addition, the yielding scheduling policy refers to that when a task needs to wait for resources when scheduling a certain task to execute, the priority for executing the task is actively given out, and other tasks are scheduled to execute. Similarly, when the yielding scheduling strategy is used for scheduling the tasks, the CPU core performs context switching, which is an overhead problem, under the CPU framework of the application, when the yielding scheduling strategy is used for scheduling the tasks, context resources of the task scheduler do not need to be switched, and the coprocessor performs storage and pre-fetching of the context resources of the tasks, so that the context switching overhead of the CPU core can be effectively reduced.

In some embodiments, the task scheduling period adopted by the task scheduling policy satisfies the following expression:

t1≥T/M，

wherein T1 is a task scheduling period, T is time required for the coprocessor to save context resources of a task and prefetch context resources of the task, M is the number M of the coprocessors, and M is greater than or equal to 1. And the T comprises time for transferring the context resource of the task n-1 to the memory by the coprocessor and time for obtaining and caching the context resource of the task n +1 to the context resource module A.

In the CPU of this embodiment, for a CPU core, the number M of coprocessors, the task scheduling period T1, and the time T required by the coprocessors to save context resources of a task and prefetch context resources of a task only need to satisfy the above constraint relationship. Specific values of T, M and t1 can be set according to actual needs, as long as the expression is satisfied, only context resources are prepared for a new task when the task is switched, and thus the task is switched. Particularly, when T1 is smaller than T, as long as the size of M is reasonably set, task scheduling can still be smoothly completed by increasing the number of coprocessors, so that a hard real-time system is realized, and the real-time requirements of most applications are met. For example, T is 3 microseconds, and T1 is set to 2 microseconds, then at least 2 coprocessors are needed, and correspondingly, at this time, at least 3 first context resource modules are needed for task scheduling, where, during task scheduling, 1 first context resource module is used by the CPU core to execute the current task, and the other two first context resource modules are used by the coprocessors to store and prefetch task context resources.

In an embodiment, assuming that a certain CPU is already designed, and at this time, the relevant hardware of the CPU is already determined, and the time T and the number M corresponding to the coprocessor in the CPU are already fixed and known, when setting T1, it is sufficient to perform setting on the condition that the above expression is satisfied.

In another embodiment, it is assumed that, when designing the CPU, if T1 and T are already set, for example, T1 is 2 microseconds, and T is 3 microseconds, the specific value range of M may be determined according to the above expression, if M is at least 2.

In some embodiments, the task of prefetching the context resource is completed by migrating the CPU core to the coprocessor, and when context switching is performed, the CPU core only needs to complete a very small amount of task, and most of the time-consuming task is completed by the coprocessor. On this basis, when the task scheduling policy is the polling scheduling policy, the calculation formula of the worst execution time of the task is as follows:

WCET＝n*Fn(t1,t2)，

the WCET is the worst-case execution time, and n is the maximum parallel task number of the CPU core and can also be understood as the maximum parallel task number of the operating system; t1 is a task scheduling period adopted by a task scheduling strategy; t2 is the processing duration of the task; fn is the minimum multiple of t1 which is greater than or equal to t 2.

t2 is the processing duration of the task, for example, the processing duration of the task in a single-task cold start scene under the current hardware environment may be equal to the maximum calculation amount of the task itself; fn is the minimum multiple of t1 which is greater than or equal to t 2.

According to the embodiment of the application, the calculation of the worst execution time of the task is ensured and simplified through the mathematical formula, so that the requirement that the credibility needs to be subjected to formal proof is met. It should be noted that the WCET determined by the above calculation formula is the WCET obtained without considering the execution time of the task scheduler, and when the execution time of the task scheduler is considered, the execution time of the task scheduler needs to be added to the original WCET (obtained by the above calculation formula).

Referring to table 1, which illustrates possible correspondences between t1, t2 and Fn, the following illustrates the calculation process of WCET:

example 1: the maximum parallel task number n =10 of a certain system, the size t1=10 microseconds of a task scheduling period, and the processing time t2=3 microseconds of a task 1; then the worst case processing time WCET =10 × fn (10 microseconds, 3 microseconds) =10 × 10 microseconds =100 microseconds, i.e. 0.1 milliseconds, for task 1. The reason is that 10 tasks are parallel under the worst condition, 9 tasks are provided except for the task 1, each task processes 10 microseconds, and then the task is scheduled after 90 microseconds under the worst condition; after the scheduling is performed, since the processing can be completed only in 3 microseconds and can be completed in the time slice of 10 microseconds, the WCET of the task 1 is 100 microseconds (in an actual situation, 93 microseconds, 100 microseconds is rounded up).

Example 2: the maximum parallel task number n =10 of a certain system, the size t1=10 microseconds of a task scheduling period, and the processing time t2=13 microseconds of a task 2; then the worst case processing time WCET =10 × fn (10 microseconds, 13 microseconds) =10 × 20 microseconds =200 microseconds, i.e. 0.2 milliseconds, for task 2. The reason is that due to the worst case, 10 tasks are parallel, and there are 9 tasks except the task; in one round of 10 task polling, task 2 is not executed, so a second round of polling is required. The 10 tasks in the first round are executed for 10 microseconds each, and the time consumption is 100 microseconds (10 x 10 microseconds); in the second round, assuming that the worst case is that task 2 is arranged at the end of the queue, each of the 9 tasks except task 2 is processed for 10 microseconds, after 90 microseconds, task 2 is processed again, which needs to be processed for 3 microseconds, and the second round processes 93 microseconds in total. Therefore, task 2 must be processed to completion in 193 microseconds in total, with WCET rounded up to 200 microseconds.

TABLE 1

Table 2 illustrates possible correspondences of n, t1, t2, WCET:

TABLE 2

As can be seen from table 2, when the task scheduling period t1 and the number n of parallel tasks are the same, the task priority (i.e., the worst case execution time WCET) is positively correlated with the calculated amount (i.e., the task processing time t 2). In other words, the amount of computation of the task is approximately equal to the priority of the task, and the smaller the amount of computation of the task, the faster the processing is completed. Therefore, in the embodiment of the present application, the method for scheduling tasks by applying the polling scheduling policy under the CPU architecture of the present application is very suitable for a system in which the following tasks are mixed: the system with low calculation amount of the high-priority task or the system with high calculation amount of the low-priority task.

Example two

The following describes a specific scheduling process by taking each CPU core including a coprocessor and N first context resource modules, where the N first context resource modules include a context resource module a and a context resource module B, and taking the CPU core using the context resource module a and the context resource module B to complete task scheduling as an example. In particular, when N is greater than two, the context resource module a and the context resource module B may be any two of the N first context resource modules.

In some embodiments, in the CPU, a first pointer is set to indicate that, in a current task scheduling cycle, a CPU core acquires a first context resource module of a context resource of a task, where the first pointer may be identified by a current, that is, the first pointer is a current pointer; the first context resource module is also provided with a second pointer for indicating that the CPU core obtains the context resource of the task after the current task scheduling period is expired; and the second pointer may be identified with a next, i.e. the second pointer is a next pointer.

Further, in a possible embodiment, when the CPU core executes task scheduling according to the task scheduling policy by the task scheduler, and schedules the task n after the task n-1 is executed, the CPU core sends an indication signal to the coprocessor, which is specifically configured to:

determining that a first pointer points to a context resource module A through a task scheduler, and when a second pointer points to a context resource module B, indicating that a CPU core in a next task scheduling period executes a task different from a current task, wherein the CPU core needs to change the direction of the first pointer at the moment, pointing the first pointer to the context resource module B, pointing a second pointer to the context resource module A or instructing a coprocessor to point the second pointer to the context resource module A; when the task n +1 and the task n are different tasks, sending a first indication signal to the coprocessor, and scheduling and executing the task n, wherein the first indication signal carries a task identifier of the task n +1 and is used for indicating the coprocessor to store context resources of the task n-1 and prefetch context resources of the task n +1; and when the task n +1 and the task n are the same task, sending a second indicating signal to the coprocessor, scheduling and executing the task n, wherein the second indicating signal is used for indicating the coprocessor to store context resources of the task n-1.

In the aspect of pointing the second pointer to the context resource module a, the CPU core may be configured to point the second pointer to the context resource module a through the task scheduler, or, because when the first pointer points to the context resource module a and the second pointer points to the context resource module B, the subsequent coprocessor needs to perform an operation related to the context resource module a, the CPU core may also instruct the coprocessor to point the second pointer to the context resource module a through the task scheduler, and at this time, the first instruction signal and the second instruction signal further have a function of instructing the coprocessor to point the second pointer to the context resource module a. When the coprocessor responds to the first indication signal, the second pointer points to the context resource module A, and then context resources in the context resource module A are stored in the memory; and caching the context resource of the task n +1 into the context resource module A according to the task identifier of the task n +1 carried in the first indication signal. When the coprocessor responds to the second indication signal, the second pointer points to the context resource module A, and then context resources in the context resource module A are stored in the memory; and, directing the second pointer to context resource module B.

Specifically, taking an example that a CPU core implements that a second pointer points to a context resource module a through a task scheduler, referring to fig. 5a, fig. 5a is a schematic diagram of a task scheduling process of the CPU core according to an embodiment of the present application; the execution process of the CPU core is as follows:

(1) When the CPU core 502 determines that the context resource module pointed by the current pointer is the same as the context resource module pointed by the next pointer by executing the task scheduler.

If not, the current pointer points to the context resource module A, and the next pointer points to the context resource module B; at this time, context resource module A caches context resources of task n-1, and context resource module B caches context resources of task n.

(2) The current pointer points to the context resource module B, and the next pointer points to the context resource module A.

(3) And when the task n +1 and the task n determined according to the task scheduling policy are different tasks, sending a first indication signal to the coprocessor 501.

And when the task n +1 and the task n are the same task, a second indication signal is sent to the coprocessor 501.

(4) And acquiring context resource information of the task n according to the current pointer and executing the task n.

In this scenario, the first 3 steps are overhead required for context switching of the CPU core in the embodiment of the present application, and the most time-consuming operations of saving and prefetching context resources in context switching are migrated to the coprocessor for processing, so that the context switching time of the CPU core is greatly reduced; the 4 th step is the task execution time.

Correspondingly, referring to fig. 5b, fig. 5b is a schematic diagram of a task scheduling process of a coprocessor according to an embodiment of the present application; the coprocessor 501 needs to respond to the first indication signal, and specifically performs the following steps:

(1) And transferring the context resource of the task n-1 stored in the context resource module A to a memory.

(2) And acquiring the context resource of the task n +1 according to the task identifier of the task n +1 carried in the first indication signal, and caching the context resource into the context resource module A.

Correspondingly, referring to fig. 5c, fig. 5c is a schematic diagram of a task scheduling process of a coprocessor according to an embodiment of the present application; the coprocessor 501 needs to respond to the second indication signal, and specifically performs the following steps:

(2) And point the next pointer to context resource module B.

Further, in another possible embodiment, the CPU core, when executing task scheduling according to the task scheduling policy by the task scheduler and scheduling the task n after the execution of the task n-1 is completed, sends an indication signal to the coprocessor, and is specifically configured to:

when the task scheduler determines that the first pointer and the second pointer both point to the context resource module A, when the task n +1 and the task n are different tasks, the second pointer points to the context resource module B or the coprocessor is instructed to point the second pointer to the context resource module B, a third indication signal is sent to the coprocessor, the task n is scheduled and executed, the third indication signal carries a task identifier of the task n +1, and the third indication signal is used for instructing the coprocessor to prefetch the context resource of the task n +1; and when the task n +1 and the task n are the same task, scheduling and executing the task n.

In the aspect of pointing the second pointer to the context resource module B, the CPU core may be configured to point the second pointer to the context resource module B through the task scheduler, or, because the subsequent coprocessor needs to perform an operation related to the context resource module B when both the first pointer and the second pointer point to the context resource module a, the CPU core may also instruct the coprocessor to point the second pointer to the context resource module B through the task scheduler, and at this time, the third instruction signal further has a function of instructing the coprocessor to point the second pointer to the context resource module B. When responding to the third indication signal, the coprocessor first points the second pointer to the context resource module B, and then caches the context resource of the task n +1 to the context resource module B according to the task identifier of the task n +1 carried in the third indication signal.

Specifically, taking an example that the CPU core implements that the second pointer points to the context resource module B through the task scheduler, referring to fig. 5d, fig. 5d is a schematic diagram of a task scheduling process of another CPU core provided in the embodiment of the present application, where an execution process of the CPU core is as follows:

(1) when the CPU core 502 determines that the current pointer and the next pointer point to the context resource module a through the task scheduler at the same time, at this time, what the context resource module a caches is the context resource of the task n-1, that is, the context resource of the task n, which indicates that the next task scheduling cycle executes the same task as the current task, the point of the current pointer does not need to be modified, and only the step (2) and the step (3) need to be executed.

(2) And when the task n +1 and the task n determined according to the task scheduling policy are different tasks, pointing a next pointer to the context resource module B, sending a third indication signal to the coprocessor 501, and executing the step (3). And when the task n +1 and the task n are the same task, executing the step (3).

(3) And acquiring context resource information of the task n according to the current pointer, and executing the task n.

In this scenario, the first 2 steps are the overhead required for context switching of the CPU core in the embodiment of the present application, and the operation of the context resource of the prefetch task that is most time-consuming in context switching is migrated to the coprocessor for processing, so that the context switching time of the CPU core is greatly reduced; and the 3 rd step is the task execution time.

Correspondingly, after the coprocessor 501 receives the third indication signal sent by the CPU core 502, at this time, the coprocessor 501 does not need to perform the context resource saving operation of the previous task, but only needs to perform the context resource prefetching operation of the next task. Referring to fig. 5e, fig. 5e is a schematic diagram of a task scheduling process of another coprocessor according to an embodiment of the present application; the coprocessor 501 needs to respond to the third indication signal, and specifically performs the following steps:

(1) And caching the context resource of the task n +1 into the context resource module B according to the task identifier of the task n +1 carried in the third indication signal.

EXAMPLE III

In the second embodiment, each CPU core is provided with a coprocessor and N first context resource modules, where the N first context resource modules include a context resource module a and a context resource module B, and the task scheduling process is described by taking the example that the CPU core uses the context resource module a and the context resource module B to complete task scheduling. Further, in the embodiment of the present application, each CPU core is provided with 2 coprocessors and N first context resource modules, where the 2 coprocessors are respectively a coprocessor a and a coprocessor B; the N first context resource modules include, for example, a context resource module 1, a context resource module 2, and a context resource module 3, and the task scheduling process is specifically described. When N is greater than three, the context resource module 1, the context resource module 2, and the context resource module 3 may be any three of the N first context resource modules.

Assuming a task scheduling period of 1 microsecond, the time required for the coprocessor to save and prefetch context resources for a task is 2 microseconds. Referring to fig. 6a and fig. 6b, fig. 6a is a schematic diagram illustrating a usage situation of a first context resource module in a task scheduling process according to an embodiment of the present application; FIG. 6b is a timing diagram illustrating a task scheduling process according to an embodiment of the present application; assume that the task execution sequence determined according to the task scheduling policy is sequentially R1, R2, R3, R4, R5, R6, R7, R8, … …, where timing 601 indicates the execution timing of the CPU core, timing 602 is the context resource timing for the coprocessor a pre-fetching task, and timing 603 is the context resource timing for the coprocessor B pre-fetching task. The execution process of the CPU core is as follows:

(1) Assuming that the coprocessor B has completed the pre-fetching operation of the context resource of the task R1 (cached in the context resource module 1), and the coprocessor a is pre-fetching the context resource of the task R2 (half of the context resource of the task R2 is pre-fetched at this time, cached in the context resource module 2), the CPU core determines, through the task scheduler, that the task R1 is scheduled to execute at this time, and instructs the coprocessor B to pre-fetch the context resource of the task R3 (cached in the context resource module 3).

At this time, the CPU core first executes the task R1 using the context resource stored in the context resource module 1.

(2) After the task R1 is executed, the task scheduler is executed (the execution time of the task scheduler may refer to a short time between the task R1 and the task R2 in the time sequence 601) to determine the next task to be executed, assuming that the task scheduling policy determines that the next task to be executed is the task R2, the task R2 is scheduled and executed, and the CPU core executes the task R2 by using the context resource stored in the context resource module 2. Meanwhile, the CPU core instructs the coprocessor a to prefetch the context resource of the task R4, and specifically, the coprocessor a first transfers the context resource of the task R1 stored in the context resource module 1 to the memory, and caches the context resource of the task R4 in the context resource module 1.

(3) After the task R2 is executed, the task scheduler is executed to determine the next task to be executed, and if the task scheduling policy determines that the next task to be executed is the task R3, the task R3 is scheduled to be executed, and since the task scheduling cycle at this time is smaller than the saving and prefetching time of the context resource, the coprocessor a does not complete the context resource prefetching operation of the task R4 at this time, the CPU core instructs the coprocessor B to save the context resource of the task 2 and the context resource of the prefetch task R5 at this time, and the prefetching process is similar to the prefetching process of the coprocessor a, which is not described in detail. Instead, coprocessor B caches the context resources of task R5 into context resource module 2.

(4) And after the task R3 is executed, executing a task scheduler to determine a task to be executed next, and scheduling and executing the task R4 if the task scheduling policy determines that the task to be executed next is the task R4, wherein similarly, the coprocessor B does not finish context resource prefetching at the moment, and the coprocessor A finishes context resource prefetching at the moment of the task R4, so that the CPU core instructs the coprocessor A to store context resources of the task R3 and context resources of the prefetched task R6. Instead, coprocessor a caches context resources of task R5 into context resource module 3.

And then the operation can be continued according to similar logic of the steps (2) to (4).

It is worth pointing out that, for the CPU cores of more than two coprocessors and more than three first context resource modules, the usage order of the first context resource modules needs to be determined during task scheduling, and the specific determination process may refer to embodiment two and is not described in detail. For example, a pointer manner may be adopted to determine a usage order of the first context resource modules, where the number of pointers is the same as the number of the first context resource modules, for example, if there are three first context resource modules, three pointers need to be set, which are a first pointer, a second pointer, and a third pointer, where the first pointer is used to indicate that, in a current task scheduling cycle, the CPU core acquires the first context resource module of the context resource of the task, and the second pointer is used to indicate that, after the current task scheduling cycle expires, the CPU core acquires the first context resource module of the context resource of the task; and the third pointer is used for indicating that after the task scheduling cycle corresponding to the second pointer expires, the CPU core acquires the first context resource module of the context resource of the task, that is, the use sequence of the first context resource module is the sequence of the first context resource modules pointed by the first pointer, the second pointer, and the third pointer.

In addition, for the scenario that the number of the used coprocessors is more than two and the number of the used first context resource modules is more than three, the task scheduling process is similar to that in the second embodiment and the third embodiment, and is not described in detail.

Example four

Based on the foregoing embodiments, the present application further provides a task scheduling method, which is applied to the CPU in any of the foregoing embodiments, with reference to fig. 7, where fig. 7 is a flowchart of the task scheduling method provided in the present application embodiment, and the task scheduling method includes:

701. the CPU core executes task scheduling according to the task scheduling strategy through the task scheduler, and sends an indication signal to the coprocessor when scheduling the task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and prefetch context resources of the task n +1;

702. the coprocessor responds to the indication signal and stores the context resource of the task n-1 from the context resource module A to the memory; acquiring context resources of a task n +1, and caching the context resources of the task n +1 into a context resource module A; the context resource module A is a first context resource module which caches context resources of the task N-1 when the task N-1 is executed in the N first context resource modules.

In some embodiments, the context resources of the task include register resources and translation lookaside buffer, TLB, resources, the first context resource module includes registers to cache the register resources of the task and a TLB to cache the TLB resources of the task.

In some embodiments, the context resources of the task scheduler include register resources and/or translation lookaside buffer, TLB, resources, and the second context resource module includes registers for caching the register resources of the task scheduler and/or a TLB for caching the TLB resources of the task scheduler.

In some embodiments, the N first context resource modules include context resource module a and context resource module B; the CPU core executes task scheduling according to the task scheduling strategy through the task scheduler, and sends an indication signal to the coprocessor when scheduling the task n after the task n-1 is executed, wherein the task scheduling strategy specifically comprises the following steps:

the CPU core determines that the first pointer points to the context resource module A through the task scheduler, and when the second pointer points to the context resource module B, the first pointer points to the context resource module B, and the second pointer points to the context resource module A or the coprocessor points the second pointer to the context resource module A; the first pointer is used for indicating a first context resource module of a context resource of a task obtained by a CPU core in a current task scheduling cycle; the second pointer is used for indicating that after the current task scheduling cycle is expired, the CPU core acquires a first context resource module of the context resource of the task; and the number of the first and second groups,

when the task n +1 and the task n are different tasks, sending a first indication signal to the coprocessor, and scheduling and executing the task n, wherein the first indication signal carries a task identifier of the task n +1 and is used for indicating the coprocessor to store context resources of the task n-1 and pre-fetch context resources of the task n +1; and when the task n +1 and the task n are the same task, sending a second indicating signal to the coprocessor, scheduling and executing the task n, wherein the second indicating signal is used for indicating the coprocessor to store context resources of the task n-1.

when the task scheduler determines that the first pointer and the second pointer both point to the context resource module A, the first pointer is used for indicating a first context resource module of a context resource of a task, which is obtained by a CPU core in a current task scheduling cycle; the second pointer is used for indicating that the CPU core obtains a first context resource module of the context resource of the task after the current task scheduling cycle is expired; when the task n +1 and the task n are different tasks, pointing a second pointer to the context resource module B or instructing the coprocessor to point the second pointer to the context resource module B, sending a third instruction signal to the coprocessor, and scheduling and executing the task n, wherein the third instruction signal carries a task identifier of the task n +1 and is used for instructing the coprocessor to prefetch the context resource of the task n +1; and when the task n +1 and the task n are the same task, scheduling and executing the task n.

Correspondingly, in some embodiments, the method further comprises:

and the coprocessor responds to the third indication signal and caches the context resource of the task n +1 into the context resource module B according to the task identifier of the task n +1 carried in the third indication signal.

In some embodiments, the method further comprises:

when the CPU core executes a task n, when the task to be executed is determined to be a task n +1 'according to a task scheduling strategy through a task scheduler, context resources of the task n +1' are obtained through the task scheduler to replace context resources of the task n +1 cached in a context resource module A; or sending an indication signal to the coprocessor to indicate the coprocessor to store the context resource of the task n and the context resource of the pre-fetching task n +1', and scheduling and executing the task n +1; task n +1' is a different task than task n + 1.

In some embodiments, the method further comprises:

and the CPU core schedules the execution task n through the task scheduler after the execution of the task n-1 is finished, if the coprocessor does not finish storing the context resource of the task n-2 and the context resource of the pre-fetching task n, the task scheduler schedules the execution task n after waiting for the coprocessor to finish storing the context resource of the task n-2 and the context resource of the pre-fetching task n, or schedules the execution task n after storing the context resource of the task n-2 and the context resource of the pre-fetching task n through the task scheduler.

In some embodiments, the task scheduling period adopted by the task scheduling policy satisfies the following expression: t1 is more than or equal to T/M, wherein T1 is a task scheduling period, T is time required by the coprocessor to prefetch context resources of tasks, M is the number M of the coprocessors, and M is more than or equal to 1.

In some embodiments, when the task scheduling policy is a round robin scheduling policy, the worst case execution time of the task is calculated as: WCET = n × Fn (t 1, t 2), where WCET is a worst case execution time, n is a maximum parallel task number of the CPU core, and t1 is a task scheduling cycle adopted by the task scheduling policy; t2 is the processing duration of the task; fn is the minimum multiple of t1 which is greater than or equal to t 2.

For specific execution processes and achieved effects of the CPU core and the coprocessor, reference may be made to the description of the above various embodiments, which are not described in detail.

The various embodiments of the present application, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A CPU comprising at least one CPU core, and M coprocessors configured for each of said CPU cores, N first context resource modules for caching context resources of a task, and a second context resource module for storing context resources of a task scheduler, M being equal to one, N being greater than or equal to two, wherein:

the CPU core is used for executing task scheduling according to a task scheduling strategy through the task scheduler, and sending an indication signal to the coprocessor when scheduling the task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and pre-fetch context resources of the task n +1;

the coprocessor is used for responding to the indication signal and storing the context resource of the task n-1 from the context resource module A to a memory; acquiring the context resource of the task n +1, and caching the context resource of the task n +1 into the context resource module A; the context resource module a is a first context resource module that caches context resources of the task N-1 when the task N-1 is executed among the N first context resource modules.

2. The CPU of claim 1 wherein the context resources of the task include register resources and Translation Lookaside Buffer (TLB) resources, and wherein the first context resource module includes registers for caching the register resources of the task and a TLB for caching the TLB resources of the task.

3. The CPU of claim 1 wherein the context resources of the task scheduler comprise register resources and/or Translation Lookaside Buffer (TLB) resources, and wherein the second context resource module comprises registers for caching register resources of the task scheduler and/or a TLB for caching TLB resources of the task scheduler.

4. The CPU of any one of claims 1 to 3, wherein said task scheduling policy comprises a round robin scheduling policy, a strict time and space partition scheduling policy, a priority preemption scheduling policy, or a yielding scheduling policy.

5. The CPU according to any one of claims 1 to 4, wherein said N first context resource modules include said context resource module A and said context resource module B; the CPU core, when executing task scheduling according to the task scheduling policy by the task scheduler and scheduling the task n after the task n-1 is executed, is specifically configured to:

determining, by the task scheduler, that a first pointer points to the context resource module a and a second pointer points to the context resource module B, pointing the first pointer to the context resource module B, pointing the second pointer to the context resource module a, or instructing the coprocessor to point the second pointer to the context resource module a; the first pointer is used for indicating that the CPU core obtains the first context resource module of the context resource of the task in the current task scheduling period; the second pointer is used for indicating that the CPU core obtains the first context resource module of the context resource of the task after the current task scheduling cycle is expired; and the number of the first and second groups,

when the task n +1 and the task n are different tasks, sending a first indication signal to the coprocessor, and scheduling and executing the task n, wherein the first indication signal carries a task identifier of the task n +1, and the first indication signal is used for indicating the coprocessor to store context resources of the task n-1 and prefetch the context resources of the task n +1;

and when the task n +1 and the task n are the same task, sending a second indication signal to the coprocessor, and scheduling and executing the task n, wherein the second indication signal is used for indicating the coprocessor to store context resources of the task n-1.

6. The CPU of claim 5, wherein the coprocessor is specifically configured to:

responding to the first indication signal, and storing the context resource in the context resource module A into a memory; and caching the context resource of the task n +1 into the context resource module A according to the task identifier of the task n +1 carried in the first indication signal.

7. The CPU of claim 5, wherein the coprocessor is specifically configured to:

responding to the second indication signal, and storing the context resource in the context resource module A into a memory; and, directing the second pointer to the context resource module B.

8. The CPU according to any one of claims 1 to 4, wherein said N first context resource modules include said context resource module A and said context resource module B; the CPU core, when executing task scheduling according to the task scheduling policy by the task scheduler and scheduling the task n after the task n-1 is executed, is specifically configured to:

when the task scheduler determines that a first pointer and a second pointer both point to the context resource module A, the first pointer is used for indicating a first context resource module of context resources of a task, which is obtained by the CPU core in a current task scheduling cycle; the second pointer is used for indicating that the CPU core obtains the first context resource module of the context resource of the task after the current task scheduling cycle is expired; when the task n +1 and the task n are different tasks, pointing the second pointer to the context resource module B or instructing the coprocessor to point the second pointer to the context resource module B, sending a third instruction signal to the coprocessor, and scheduling and executing the task n, wherein the third instruction signal carries a task identifier of the task n +1, and the third instruction signal is used for instructing the coprocessor to prefetch the context resource of the task n +1; and the number of the first and second groups,

and when the task n +1 and the task n are the same task, scheduling and executing the task n.

9. The CPU of claim 8, wherein the coprocessor is specifically configured to:

responding to the third indication signal, and caching the context resource of the task n +1 into the context resource module B according to the task identifier of the task n +1 carried in the third indication signal.

10. The CPU of any one of claims 1 to 9, wherein the CPU core is further configured to:

when a task n is executed, when the task to be executed is determined to be a task n +1 'according to the task scheduling strategy through the task scheduler, context resources of the task n +1' are obtained through the task scheduler to replace context resources of the task n +1 cached in the context resource module A; or sending an indication signal to the coprocessor to instruct the coprocessor to save the context resource of the task n and prefetch the context resource of the task n +1', and scheduling and executing the task n +1; the task n +1' and the task n +1 are different tasks.

11. The CPU of any one of claims 1 to 10, wherein the CPU core is further configured to:

through the task scheduler, when scheduling and executing the task n after the task n-1 is executed, if the coprocessor does not finish storing the context resource of the task n-2 and prefetching the context resource of the task n, the task scheduler waits for the coprocessor to finish storing the context resource of the task n-2 and prefetching the context resource of the task n and then schedules and executes the task n, or stores the context resource of the task n-2 and prefetches the context resource of the task n through the task scheduler and then schedules and executes the task n.

12. The CPU according to any one of claims 1 to 11, wherein a task scheduling cycle adopted by the task scheduling policy satisfies the following expression:

t1 is more than or equal to T/M, wherein T1 is the task scheduling period, T is the time required by the coprocessor to store the context resources of the task and prefetch the context resources of the task, M is the number M of the coprocessors, and M is more than or equal to 1.

13. The CPU according to any one of claims 1 to 12, wherein when the task scheduling policy is a round robin scheduling policy, the worst case execution time of the task is calculated by:

WCET＝n*Fn(t1,t2)，

the WCET is the worst-case execution time, n is the maximum parallel task number of the CPU core, and t1 is a task scheduling period adopted by the task scheduling strategy; t2 is the processing duration of the task; fn is the minimum multiple of t1 which is greater than or equal to t 2.

14. A task scheduling method applied to the CPU according to any one of claims 1 to 13, the method comprising:

the CPU core executes task scheduling according to a task scheduling strategy through the task scheduler, and sends an indication signal to the coprocessor when scheduling a task n after the task n-1 is executed, wherein the indication signal is used for indicating the coprocessor to store context resources of the task n-1 and pre-fetch context resources of a task n +1;

the coprocessor responds to the indication signal and stores the context resource of the task n-1 from the context resource module A to a memory; acquiring the context resource of the task n +1, and caching the context resource of the task n +1 into the context resource module A; the context resource module a is a first context resource module that caches context resources of the task N-1 when the task N-1 is executed among the N first context resource modules.