CN115584469A

CN115584469A - Method for increasing covering thickness of silicon carbide step metal layer and related equipment

Info

Publication number: CN115584469A
Application number: CN202211118561.2A
Authority: CN
Inventors: 董佳俊; 李青岭; 赵万利; 李旭晗; 王锐; 常树丞; 魏晓光; 金锐; 汪玉; 王鑫
Original assignee: Beijing Smart Energy Research Institute; Electric Power Research Institute of State Grid Anhui Electric Power Co Ltd
Current assignee: Beijing Smart Energy Research Institute; Electric Power Research Institute of State Grid Anhui Electric Power Co Ltd
Priority date: 2022-09-13
Filing date: 2022-09-13
Publication date: 2023-01-10

Abstract

The invention belongs to the field of semiconductor manufacturing, and particularly relates to a method for increasing the covering thickness of a silicon carbide step metal layer, which comprises the following steps: performing metal deposition, namely sputtering the silicon carbide wafer subjected to the dielectric layer step etching to form a metal layer; reverse sputtering, wherein argon ions are adopted to bombard the metal layer to eliminate the seal between the steps; and repeating the metal deposition and the reverse sputtering until the covering thickness of the silicon carbide step meets the design requirement. The metal layer of the notch between the upper part of the step and the step is etched by reverse sputtering so as to remove the metal layer of the notch between the steps and avoid the premature closing of the notch; the beneficial technical effect of improving the filling thickness of the bottom of the step and avoiding the notch from being closed is realized through the cyclic processing of metal deposition and reverse sputtering for many times.

Description

Method for increasing covering thickness of silicon carbide step metal layer and related equipment

Technical Field

The invention belongs to the field of semiconductor manufacturing, and particularly relates to a method for increasing the coverage thickness of a silicon carbide step metal layer and related equipment.

Background

Due to the excellent material properties of silicon carbide (SiC), power devices based on silicon carbide have been rapidly developed in various aspects, such as academic research and technical manufacturing. Silicon carbide semiconductor materials are third generation wide bandgap semiconductor materials that have been developed after first generation elemental semiconductor materials (Si) and second generation compound semiconductor materials (GaAs, gaP, inP). The third generation wide bandgap semiconductor has the common characteristics of larger bandgap, high critical breakdown field strength, high saturation drift velocity and good thermal conductivity.

Metal deposition is a key process for preparing silicon carbide devices, and is an important step in the metal semiconductor contact technology in the silicon carbide device manufacturing process. In the conventional device process, there are two common metal deposition methods: evaporation and magnetron sputtering. On the surface of silicon carbide, in order to obtain better metal adhesion and high-density metal, a magnetron sputtering process is generally adopted to prepare metal, and the principle is to bombard the surface of a metal target material by argon ions, so that atoms or molecules in the metal target material are ejected from the surface and then deposited on the surface of a wafer.

A great deal of research and observation show that when metal atoms or molecules sputter the surface of silicon carbide in the existing metal deposition process, the step coverage probability of the silicon carbide wafer is not high due to the steps on the surface of the silicon carbide wafer. A common problem of metal deposition is that the bottom of a notch between metal steps cannot be covered; and further, when metal atoms or molecules fall down during metal deposition, the groove openings between the steps are sealed too early due to the existing steps, and the thickness of the deposited metal layer at the bottom of the steps is insufficient. Meanwhile, metal is continuously deposited on the surface of the silicon carbide wafer, and with the increase of the thickness of the deposited metal, the bottom of the step cannot meet the design requirement due to the early sealing of the upper part of the step, so that the electrical performance of the device is affected.

Because the metal on the surface of the wafer is sealed too early, the thickness of the metal deposited at the bottom of the step cannot meet the requirement, and the subsequent annealing of the contact part cannot form alloy, so that the problems of metal semiconductor contact and further influence on the electrical performance and the like are directly caused. Therefore, a technical solution is needed to overcome the drawback of premature closing of the step gap during the metal deposition on the wafer surface, and to increase the filling thickness of the step bottom.

Disclosure of Invention

The invention aims to solve the problem of early closing of the step gap during metal deposition on the surface of a wafer.

The purpose of the invention is realized by adopting the following technical scheme:

a method of increasing the thickness of a silicon carbide step metal layer overlay, the method comprising the steps of:

performing metal deposition, namely sputtering the silicon carbide wafer subjected to the dielectric layer step etching to form a metal layer;

reverse sputtering, namely bombarding the metal layer by adopting argon ions to eliminate sealing between steps;

and repeating the metal deposition and the reverse sputtering until the covering thickness of the silicon carbide step meets the design requirement.

Preferably, the material of the metal layer includes metal AL.

Preferably, the metal deposition comprises sputtering or evaporation.

Preferably, the thickness of the metal layer is 500-1000nm.

Preferably, the dielectric layer comprises silicon dioxide SiO2 with the thickness of 300-4000 nm.

Preferably, the process parameters of the etching include: etching power 100w-400w, radio frequency power 100w-400w, CF4 flow rate 30-60sccm, cl ₂ The flow rate of (2) is 5 to 30sccm, and a step with a thickness of 1 to 2 μm is formed.

Preferably, the process parameters of the etching include: the etching power is 200w-350w, the radio frequency power is 150w-350w, and the flow rate of etching gas CHF3 is set to be 40-50sccm.

Preferably, in the first reverse sputtering process: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 3-5min.

Preferably, in the process of the second time of reverse sputtering: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 5-7min.

Preferably, in the process of the reverse sputtering for the third time: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 7-10min.

The invention also provides production equipment based on the same inventive concept, which is characterized by comprising: one or more processors; the processor to store one or more programs; the one or more processors, when executing the one or more programs, implement the metal deposition and reverse sputtering process steps.

The invention also provides a computer readable storage device based on the same inventive concept, wherein a computer program is stored on the computer readable storage device, and when the computer program is executed, the processing steps of metal deposition and reverse sputtering are realized.

Compared with the prior art, the invention has the beneficial effects that:

the invention discloses a method for increasing the covering thickness of a silicon carbide step metal layer, which comprises the following steps: performing metal deposition, namely sputtering the silicon carbide wafer subjected to the step etching of the dielectric layer to form a metal layer; reverse sputtering, wherein argon ions are adopted to bombard the metal layer to eliminate the seal between the steps; and repeating the metal deposition and the reverse sputtering until the covering thickness of the silicon carbide step meets the design requirement. According to the invention, the metal layer of the notch between the upper part of the step and the step is etched by reverse sputtering so as to achieve the purpose of removing the metal layer of the closed notch between the steps, and the problem of premature closing of the notch is solved; and the repeated metal deposition and reverse sputtering cyclic processing technology improves the filling thickness of the bottom of the step, thereby improving the electrical property of the gold-semiconductor contact between the metal layer and the dielectric layer.

Drawings

FIG. 1 is a schematic flow chart of a method for increasing the thickness of a silicon carbide step metal layer;

FIG. 2 is a sectional microscopic view of the dielectric layer after etching;

FIG. 3 is a drawing after direct metal deposition;

FIG. 4 is a cross-sectional micrograph of a semi-finished product of a method of increasing the thickness of a silicon carbide step metal layer according to the present invention;

FIG. 5 is a schematic cross-sectional view of a finished product of a method of increasing the thickness of a silicon carbide step metal layer coverage of the present invention;

wherein: 1-silicon carbide wafer, 2-dielectric layer, 3-photoresist, 4-metal layer, 41-notch and 401-gap.

Detailed Description

The technical solutions of the present invention will be further described below with reference to fig. 1 to 5 and specific examples to help understanding the contents of the present invention.

Example 1

The invention provides a method for increasing the covering thickness of a silicon carbide step metal layer, which can solve the problem that the electrical performance of a device is influenced due to insufficient covering of a metal layer at the bottom of a step caused by normal metal deposition.

The method comprises the following steps:

reverse sputtering, wherein argon ions are adopted to bombard the metal layer to eliminate the seal between the steps;

The material of the metal layer comprises metal Al.

The metal deposition adopts a metal deposition mode comprising sputtering or evaporation.

The thickness of the metal layer is 500-1000nm.

The dielectric layer comprises silicon dioxide SiO2 with the thickness of 300-600 nm.

The process parameters of the etching comprise: etching power of 100w-400w, radio frequency power of 100w-400w, and etching gas CF ₄ The flow rate of (1) is 30-60sccm ₂ The flow rate of (2) is 5 to 30sccm, and a step with a thickness of 1 to 2 μm is formed.

The technological parameters of the first reverse sputtering comprise: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 3-5min.

The technological parameters of the reverse sputtering for the second time comprise: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 5-7min.

The technological parameters of the third reverse sputtering comprise: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 7-10min.

The method is mainly completed by using consumables such as photoresist and developing solution and equipment such as PECVD, a stepping photoetching machine, an ICP etching machine, a cleaning and spin-drying machine, a magnetron sputtering platform and the like.

The sccm is a volumetric flow unit. The gas volume flow rate is the volume of gas flowing through the transport line per unit time. The gas volume is divided into a volume under operating condition and a volume under standard condition, which both refer to the volume under a certain pressure and a certain temperature, and the latter refers to the volume of gas under a standard atmospheric pressure at a temperature of 0 deg.C (or 20 deg.C).

Consumable material:

1. the photoresist is a photosensitive liquid organic compound consisting of a photosensitive resin, a tackifier and a solvent, and the solubility of the photoresist in a developing solution changes after exposure to ultraviolet light.

2. The main component of the developer is a developer, which has a different solubility for exposed and unexposed photoresist.

3. The silicon oxide has the characteristics of high hardness, good wear resistance, good heat insulation performance and strong erosion resistance. In general, a gas containing fluorine or chlorine is used for etching silicon dioxide, and fluorine ions or chlorine ions are generated in glow discharge and react with surface silicon dioxide.

Equipment:

1.PECVD: the gas containing film component atoms is ionized by means of microwave or radio frequency, etc. to form plasma locally, and the plasma has high chemical activity and easy reaction to deposit the required film on the substrate. In order to make the chemical reaction proceed at a lower temperature, the activity of plasma is utilized to promote the reaction, so the CVD is called plasma enhanced chemical vapor deposition, and the film forming quality is good, the deposition rate is high, the pinholes are small, and the cracks are not easy to crack.

2. A step-by-step lithography machine: the exposure system irradiates the mask with a slit-like exposure strip (slit), under which the stage carrying the mask is moved in one direction, equivalent to the exposure system scanning the mask,

3, an ICP etching machine: the device is an inductively coupled plasma etcher, is an essential device in the micro-nano processing process of a semiconductor chip, and can process micro-scale and nano-scale micro-patterns. During the etching of semiconductor materials by etching gases, there are two types of etching: physical etching and chemical etching. The physical etching is to utilize ions to bombard the surface of the wafer for etching, has directionality, and can form an inverted frustum-shaped etching result if the etching effect is too strong; the chemical etching is to etch by utilizing the chemical reaction between ions and the surface of the wafer, has no directionality, and can etch towards the lower part of the mask if the etching effect is too strong. When the physical etching and the chemical etching are balanced, the ideal and required vertical etching effect can be obtained.

4. Cleaning a drying machine: for removing the etched photoresist mask, an acidic solution is generally used for removing the photoresist mask because the dry etching can cause the photoresist to be burnt.

5. A sputtering platform: aiming at the metal deposition of silicon carbide, in order to obtain a metal material with better adhesion and more compact property, a metal target material is bombarded by argon ions, so that a metal layer with better adhesion and more compact property can be obtained.

As shown in fig. 1, the method for increasing the coverage thickness of the silicon carbide step metal layer disclosed by the invention comprises the following specific steps:

a. pre-cleaning a wafer: the surface of the silicon carbide wafer 1 is pre-cleaned for removing organic contamination and particles from the surface.

b. Growing a dielectric layer: the dielectric layer 2 is grown by LPCVD or PECVD, the thickness of which is related to the step thickness.

c. Gluing, exposing, developing and hardening:

gluing: the thickness of the photoresist 3 is related to the type and etching selection ratio thereof, and it is generally required to ensure that the residual thickness of the photoresist 3 is about 0.5 μm to 0.8 μm after the etching of the dielectric layer 2 is completed. The appropriate thickness of the photoresist 3 is selected, so that the waste of photoresist consumables is avoided, and meanwhile, the photoetching process is easier to realize;

exposure: the exposure is carried out by adopting a stepping photoetching machine and utilizing an off-axis illumination technology, so that the selection of exposure dose (light intensity and time) and Focus (Focus) parameters during the exposure of the photoetching machine is very important;

and (3) developing: the determination of the development time and manner is determined by the type and thickness of the photoresist 3;

hardening the film: the hardening process must be strictly controlled in time and temperature, otherwise the step shape of the photoresist 3 is abnormal.

d. Etching: and selecting proper gas and power during etching, paying attention to the etching selection ratio of the photoresist 3 and the dielectric layer 2, and simultaneously avoiding plasma accumulation to form a Trench structure (a groove grid structure) when selecting etching gas and power.

e. Cleaning and removing the photoresist: and removing the etched photoresist 3 by using an acid-containing solution.

f. And (3) metal deposition: the metal is deposited by bombarding the target with argon ions to form the metal layer 4, and the sputtering rate and sputtering time determine the thickness and densification of the metal layer 4.

g. Reverse sputtering: and (3) bombarding the metal layer 4 on the surface of the silicon carbide wafer 1 by using argon ions to etch the metal of the notch between the steps so as to prevent the premature sealing of the steps, wherein the argon flow and the bombardment time are particularly important.

h. Repeating the steps f and e until the covering thickness of the silicon carbide step meets the design requirement: the closed metal of the notch between the steps is eliminated through reverse sputtering etching, the problem that the covering thickness of the metal layer 4 at each part of the steps is insufficient is solved through multiple times of metal deposition, the covering thickness of the metal layer 4 at the bottom of the steps is improved while the notch 41 between the steps is prevented from being closed through repeated f and e so as to meet the design requirement, and the finally processed metal layer 4 is shown in fig. 5.

Compared with the metal deposition method adopted in the prior art, the method for increasing the covering thickness of the silicon carbide step metal layer can obviously improve the problem of metal semiconductor contact quality defect caused by insufficient step coverage rate. The invention adopts the repeated steps of metal deposition and reverse sputtering for a plurality of times to achieve the purpose of increasing the metal coverage rate in the groove, thereby achieving the effect of increasing the step coverage, further increasing the groove filling area between the silicon carbide and the metal, improving the electrical property influence of the manufactured device and improving the subsequent process problems.

Example 2

As shown in fig. 1, the present invention provides a method for increasing the coverage thickness of a silicon carbide step metal layer, wherein the step preparation method comprises the following steps:

a. pre-cleaning a wafer: pretreating the surface of the silicon carbide wafer 1, namely cleaning the SiC wafer for 10-30min by using 3# liquid (a mixture of sulfuric acid and water); then cleaning the SiC wafer for 10-30min by using the 1# solution (the mixture of ammonia water, hydrogen peroxide and water); finally, cleaning the wafer for 10-30min by using DHF (mixture of hydrofluoric acid and water); b. growing a dielectric layer: PECVD growth of 2-4 mu m silicon dioxide SiO ₂ Forming a dielectric layer2；

c. Gumming, exposure, development, hardening:

gluing: coating photoresist 3 on the surface of the dielectric layer 2, wherein the thickness is 1.5-2.8 mu m;

exposure: exposing with a photoetching machine for 280-320mes, wherein the focal length (Focus) of the stepping photoetching machine is-0.2-0.2 mu m;

and (3) developing: carrying out dynamic development by a spin coating developing machine for 60-120s;

hardening the film: time 60-240s temperature: 90-120 ℃;

d. etching: etching power of 100w-400w radio frequency power of 100w-400w etching gas CF ₄ The flow rate is set to 30-60sccm, and the etching gas Cl ₂ Setting the flow rate to be 5-30sccm, and forming a step with the thickness of 1-2 μm on the dielectric layer 2;

e. cleaning and removing the photoresist: cleaning the SiC wafer for 10-30min by using 3# liquid (mixture of sulfuric acid and water); cleaning the SiC wafer for 10-30min by using the No. 1 liquid (a mixture of ammonia water, hydrogen peroxide and water);

f. and (3) metal deposition: sputtering and depositing 500-1000nm Al metal to form a metal layer 4;

g. reverse sputtering: the operating power of the sputtering equipment is set to be 300w-500w, the flow of the operating gas Ar is set to be 50-200sccm, and the back sputtering time is 3-5min;

h. repeating the steps f and e until the covering thickness of the silicon carbide step meets the design requirement: the closed metal of the notch between the steps is eliminated through reverse sputtering etching, the problem that the covering thickness of the metal layer 4 at each part of the steps is insufficient is solved through multiple times of metal deposition, the covering thickness of the metal layer 4 on the surface of the steps is improved while the notch 41 between the steps is prevented from being closed through repeated f and e so as to meet the design requirement, and the finally processed metal layer 4 is shown in fig. 5.

The metal layer of the notch between the upper part of the step and the step is etched by reverse sputtering so as to remove the metal layer of the notch between the steps and avoid the premature closing of the notch; the beneficial technical effects of improving the filling thickness of the bottom of the step and avoiding the notch from being closed are realized through the cyclic processing of metal deposition and reverse sputtering for many times.

Example 3

As shown in FIG. 1, the invention discloses a method for increasing the covering thickness of a silicon carbide step metal layer, which comprises the following steps:

a. pre-cleaning a wafer: firstly, cleaning the silicon carbide wafer 1 by using 3# liquid for 15-25min, then cleaning by using 1# liquid for 15-25min, and then cleaning by using DHF liquid for 15-25min;

b. and (3) medium layer growth: growing silicon dioxide SiO with thickness of 400-600nm on the surface of the silicon carbide wafer 1 by adopting PECVD process ₂ Forming a dielectric layer 2;

c. gluing, exposing, developing and hardening:

gluing: coating photoresist 1.9-2.6 μm on the surface of the dielectric layer 2 by using a spin coater,

exposure: the exposure time of the photoetching machine is 280-320mes, the focal length (Focus) is-0.2-0.2 mu m,

and (3) developing: the spin coating developer carries out dynamic development for 80-110s,

hardening the film: heating for 85-200s at 95-110 deg.C;

d. etching: etching power is 200w-350w, radio frequency power is 150w-350w, the flow of etching gas CHF3 is set to be 40-50sccm, and a step structure is formed on the dielectric layer 2 after etching as shown in FIG. 2;

e. cleaning and removing the photoresist: cleaning the etched silicon carbide wafer 1 by using the No. 3 liquid for 20-30min, and then cleaning by using the No. 1 liquid for 20-30min;

f. and (3) metal deposition: sputtering and depositing 600-800nm Al metal;

g. reverse sputtering: the power is 320w-450w, the argon flow is 70-160sccm, and the bombardment time is 4-5min;

h. and (3) metal deposition: sputtering and depositing 650-850nm Al metal;

i. reverse sputtering: the power is 350w-480w, the argon flow is 80-190sccm, and the bombardment time is 6-7min;

j. and (3) metal deposition: sputtering and depositing 700-900nm Al metal;

k. reverse sputtering: the power is 400w-500w, the argon flow is 100-200sccm, and the bombardment time is 8-10min;

metal deposition: and sputtering and depositing 750-950nm of Al metal.

As shown in fig. 3, the existing process is limited in that the step mouth is easily closed during metal deposition, so that the thickness of the metal layer is greatly limited, and the thickness of the metal layer at the bottom of the notch between the steps cannot reach the designed expected thickness; the semi-finished product which is processed by adopting the metal deposition and the reverse sputtering circulation repeatedly is shown in figure 4, so that the covering thickness of the metal layer at the top of the step and the bottom of the notch between the steps can be effectively increased, the notch between the steps can be effectively prevented from being closed prematurely, and the metal layer with the designed expected thickness can be obtained on the surface of the bottom of the notch by multiple metal depositions. By adjusting the sputtering direction, the inclination of the step can be effectively avoided, or the inclined growth of the metal layer on the surface of the step can be purposefully realized. As shown in FIG. 5, the finally processed metal layer 4 is formed by continuing to form the metal layer 4 with a flat and continuous surface through metal deposition after the metal covering thickness at the bottom of the notch reaches the thickness required by the design, the invention aims to improve the metal layer covering thickness at the bottom of the notch, avoid the notch from being closed and only aim to improve the thickness of the metal layer at the bottom of the notch, and finally process the metal layer after all notches are closed.

The metal deposition, different power, speed and process obtain different film qualities of the metal layer; sputter deposition results in a denser metal layer than evaporation deposition. And (4) performing reverse sputtering after the sputtering metal deposition, continuing the metal deposition, then performing reverse sputtering, and repeating the steps repeatedly.

According to the method for increasing the coverage thickness of the silicon carbide step metal layer, metal deposition and reverse sputtering cyclic repeated processing is adopted, the coverage thickness of the metal layer at the bottom of the notch between the steps of the silicon carbide medium layer can be effectively increased, and the gold-to-half contact performance is improved.

Example 4

b. and (3) medium layer growth: growing silicon dioxide SiO with the thickness of 300-500nm on the surface of the silicon carbide wafer 1 by adopting a PECVD process ₂ Forming a dielectric layer 2;

c. gluing, exposing, developing and hardening:

hardening the film: heating for 85-200s at 95-110 deg.C;

f. and (3) metal deposition: evaporating and depositing 600-800nm of Al metal;

h. and (3) metal deposition: evaporating and depositing 650-850nm of Al metal;

j. and (3) metal deposition: depositing 700-900nm Al metal by evaporation;

metal deposition: and (4) evaporating and depositing 750-950nm of Al metal.

As shown in fig. 3, the existing process is limited in that the step mouth is easily closed during metal deposition, so that the thickness of the metal layer is greatly limited, and the thickness of the metal layer at the bottom of the notch between the steps cannot reach the designed expected thickness; the semi-finished product which is repeatedly processed by adopting the metal deposition and the reverse sputtering circulation is shown in figure 4, so that the covering thickness of the metal layer at the top of the step and the bottom of the notch between the steps can be effectively increased, and the notch between the steps can be effectively prevented from being closed prematurely, so that the metal layer with the designed expected thickness can be obtained on the surface of the bottom of the notch.

As shown in fig. 5, after the metal coating thickness at the bottom of the groove opening reaches the thickness required by the design, the metal layer 4 with a smooth and continuous surface is formed by metal deposition, the invention aims to increase the metal layer coating thickness at the bottom of the groove, avoid the groove opening from being closed only to increase the thickness of the metal layer at the bottom of the groove, and finally form a smooth metal layer after all the groove openings are closed, because the groove bottom space is difficult to deposit metal, a part of gap 401 still remains in the processed metal layer 4, but the invention obviously increases the thickness of the metal layer at the bottom of the groove by repeated processing of metal deposition and reverse sputtering, thereby greatly improving the gold-to-half contact performance between the metal layer 4 and the dielectric layer 2.

Example 5

Based on the same inventive concept, the present invention also provides a production apparatus comprising a processor and a memory, the memory being configured to store a computer program comprising program instructions, the processor being configured to execute the program instructions stored by the computer storage medium. The Processor may be a Central Processing Unit (CPU), or may be other general purpose Processor, a Digital Signal Processor (DSP), an Application specific integrated Circuit (sic), an off-the-shelf Programmable gate array (FPGA) or other Programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc., which is a computing core and a control core of the terminal, and is adapted to implement one or more instructions, and is specifically adapted to load and execute one or more instructions in a computer storage medium to implement a corresponding method flow or a corresponding function, so as to implement the Processing steps of metal deposition and anti-sputtering described in any of embodiments 1-4 above.

Example 6

Based on the same inventive concept, the present invention further provides a storage device, specifically a computer-readable storage medium (Memory), which is a Memory device in a computer device and is used for storing programs and data. It is understood that the computer readable storage medium herein can include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides a storage space storing an operating system of the terminal. Also, one or more instructions, which may be one or more computer programs (including program code), are stored in the memory space and are adapted to be loaded and executed by the processor. It should be noted that the computer readable storage medium may be a high-speed RAM memory, or a non-volatile memory (non-volatile memory), such as at least one disk memory. One or more instructions stored in a computer readable storage medium may be loaded and executed by a processor to perform the metal deposition and reverse sputtering process steps described in any of embodiments 1-4 above.

The present invention is not limited to the above embodiments, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention are included in the scope of the claims of the present invention which are filed as the application.

Claims

1. A method of increasing the thickness of a silicon carbide step metal layer overlay, comprising the steps of:

reverse sputtering, namely bombarding the metal layer by using argon ions to eliminate the seal between the steps;

2. The method of increasing the coverage thickness of a silicon carbide step metal layer of claim 1, wherein the material of the metal layer comprises metallic Al.

3. The method of increasing the coverage thickness of a stepped metal layer of silicon carbide of claim 1, wherein the metal deposition comprises sputtering or evaporation.

4. The method of increasing the coverage thickness of a silicon carbide step metal layer of claim 1, wherein the thickness of the metal layer is in the range of 500nm to 1000nm.

5. The method of claim 1, wherein the dielectric layer comprises 300-4000nm thick silicon dioxide (SiO) ₂ 。

6. The method of increasing the silicon carbide step metal layer coverage thickness of claim 1, wherein the etch process parameters comprise: etching power 100w-400w, radio frequency power 100w-400w ₄ The flow rate of (1) is 30-60sccm ₂ The flow rate of (A) is 5-30sccm; or the etching power is 200w-350w, the radio frequency power is 150w-350w, and the flow rate of the etching gas CHF3 is set to be 40-50sccm.

7. The method for increasing the coverage thickness of the silicon carbide step metal layer according to claim 1, wherein in the first reverse sputtering process: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 3-5min.

8. The method for increasing the coverage thickness of the silicon carbide step metal layer according to claim 1, wherein in the process of the second time of the reverse sputtering: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 5-7min.

9. The method for increasing the coverage thickness of the silicon carbide step metal layer according to claim 1, wherein in the third reverse sputtering process: the power is 300w-500w, the argon flow is 50-200sccm, and the time is 7-10min.

10. A production apparatus, comprising: one or more processors; the processor to store one or more programs; the one or more processors, when executing the one or more programs, implement the process steps of metal deposition and reverse sputtering of any of claims 1-9.

11. A computer readable storage device having a computer program stored thereon which, when executed, performs the metal deposition and reverse sputtering process steps of any one of claims 1 to 9.