CN115580291B - Low-temperature low-noise parameter frequency divider circuit without direct current power consumption and chip - Google Patents
Low-temperature low-noise parameter frequency divider circuit without direct current power consumption and chip Download PDFInfo
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- CN115580291B CN115580291B CN202211181447.4A CN202211181447A CN115580291B CN 115580291 B CN115580291 B CN 115580291B CN 202211181447 A CN202211181447 A CN 202211181447A CN 115580291 B CN115580291 B CN 115580291B
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- 238000005086 pumping Methods 0.000 claims abstract description 11
- 239000003990 capacitor Substances 0.000 claims description 33
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/02—Input circuits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/08—Output circuits
Abstract
The embodiment of the invention provides a low-temperature low-noise parameter frequency divider circuit without direct-current power consumption and a chip, wherein the circuit does not use active elements such as a transistor and the like, has no direct-current power consumption, and the equivalent noise of the circuit is linearly reduced along with the temperature reduction in a low-temperature environment, so that the phenomenon of low-temperature noise saturation is avoided; meanwhile, the LC resonance frequency division circuit can enable an input pumping signal and an output frequency division signal to form two standing waves of a common mode and a differential mode respectively, the pumping signal is restrained by the output circuit, the output signal is enabled to keep a larger amplitude, and common mode noise of a front-stage circuit is restrained by common mode-differential mode conversion. Thus, power consumption and noise of the frequency divider in a low-temperature operating environment can be significantly reduced.
Description
Technical Field
The invention relates to the technical field of microelectronics, in particular to a low-temperature low-noise parameter frequency divider circuit and a chip without direct current power consumption.
Background
In recent years, in order to solve the problem that classical computers cannot solve, new algorithms and computer systems are being sought, wherein quantum computing is considered as one of the most potential technological routes.
The quantum computer is mainly composed of a quantum chip, a quantum measurement and control system and a quantum software algorithm, wherein the measurement and control of quantum bits are realized through the quantum measurement and control system, which is the basis for realizing quantum calculation. In order to avoid the influence of thermal noise on the state of the qubit, the conventional quantum chip needs to operate in a low temperature (mK) environment close to absolute zero, and the quantum measurement and control system works in a normal temperature environment. However, with the exponentially increasing demand of quantum computing on the number of the quantum bits and the high demand of measuring fidelity of the quantum bits, the normal-temperature quantum measurement and control system exposes various problems of huge volume, low integration level, higher interconnection complexity of measurement and control signals, reduced quantum fidelity of room-temperature thermal radiation noise, multi-channel signal calibration and crosstalk, huge power consumption of a dilution refrigerator and the like, and seriously hinders the rapid development of the quantum computing. In order to meet the higher requirements of the increasing quantum bits on the measurement and control system and solve the problem of expandability of the quantum computing system, development of a low-temperature quantum measurement and control system which can work in a similar temperature area to a quantum chip is urgently needed.
In a low-temperature quantum measurement and control system, a frequency divider circuit is used as a basic module which is always in a high-frequency band to work, and is widely applied to a frequency synthesizer, orthogonal signal generation, clock generation and a radio frequency receiving and transmitting front end. However, conventional divider circuits typically occupy a significant portion of the overall system power and are one of the major contributors to phase noise. Therefore, the frequency divider circuit used in the low-temperature qubit measurement and control system must meet the performance requirements of low noise and low power consumption when working in a low-temperature environment, so as to reduce the forward blackbody radiation of the qubit measurement circuit, reduce the frequency noise of microwave carrier waves and reduce the influence of classical measurement and control on quantum fidelity.
Disclosure of Invention
In a first aspect of the present invention, a low-temperature low-noise parameter frequency divider circuit without dc power consumption is provided, and active elements such as transistors are not used, so that the equivalent noise of the circuit is linearly reduced along with the reduction of temperature in a low-temperature environment without dc power consumption, and the phenomenon of low-temperature noise saturation is avoided; meanwhile, the LC resonance frequency division circuit can enable an input pumping signal and an output frequency division signal to form two standing waves of a common mode and a differential mode respectively, the pumping signal is restrained by the output circuit, the output signal is enabled to keep a larger amplitude, and common mode noise of a front-stage circuit is restrained by common mode-differential mode conversion. Thus, power consumption and noise of the frequency divider can be significantly reduced.
In a first aspect of the present invention, there is provided a low temperature low noise parametric frequency divider circuit without direct current power consumption, comprising:
an LC resonant frequency divider circuit configured to divide the pump signal by two and couple the divided signal to the output circuit;
the output circuit is configured to suppress higher harmonics in the frequency-division signal;
wherein the LC resonant frequency divider circuit comprises: the variable capacitance circuit comprises a plurality of variable capacitance branches which are sequentially arranged, wherein two ends of each variable capacitance branch are respectively connected with two ends of a previous variable capacitance branch which is adjacently arranged through an inductor in parallel, two ends of the variable capacitance branch which is arranged at the forefront are respectively used for being connected with an input signal, and two ends of the variable capacitance branch which is arranged at the last are directly coupled;
the output circuit includes: the transformer comprises a pi-type resistor network, a transformer, a first filter circuit and a second filter circuit; two endpoints of an input port of the pi-type resistor network are respectively coupled with two ends of one variable capacitance branch which is closest to a wave node of an output common-mode pumping signal through a variable capacitor, and two endpoints of an output port of the pi-type resistor network are respectively coupled with two ends of a primary coil of the transformer; one end of a secondary coil of the transformer is coupled with the input end of the first filter circuit, and the other end of the secondary coil of the transformer is coupled with the input end of the second filter circuit; the outputs of the first and second filter circuits are configured as differential outputs.
In some possible embodiments, the variable capacitance branch comprises: two variable capacitors and a phase compensation capacitor; one end of one variable capacitor is used as one end of the variable capacitor, one end of the other variable capacitor is used as the other end of the variable capacitor branch, and the other ends of the two variable capacitors are coupled to one end of the phase compensation capacitor together; the other end of the phase compensation capacitor is grounded.
In some possible embodiments, the variable capacitance employs a variable capacitance diode; and in the variable capacitance branch, the controlled ends of the variable capacitance diodes are commonly coupled to a DC bias input.
In some possible embodiments, the first filter circuit and the second filter circuit are each LC parallel filter circuits.
In some possible embodiments, the LC resonant frequency divider circuit comprises: 5 variable capacitance branches; and two end points of the input port of the pi-type resistor network are respectively coupled with two ends of a fourth variable capacitance branch through a variable capacitance.
In some possible embodiments, the transformer is configured to form a 50Ω load match with the first and second filter circuits, respectively.
In a second aspect of the present invention, there is provided a frequency divider chip comprising:
a substrate; and the low-temperature low-noise parameter frequency divider circuit without direct current power consumption is formed on the substrate.
In some possible embodiments, the low-temperature low-noise parametric frequency divider circuit without direct current power consumption is manufactured by a CMOS process.
In a third aspect of the present invention, there is provided a quantum measurement and control chip comprising:
a control unit for controlling the quantum bits in the quantum chip;
the reading unit is used for reading the quantum bits in the quantum chip;
the reading unit and/or the control unit comprises at least one low-temperature low-noise parameter frequency divider circuit without direct current power consumption provided in the first aspect of the invention or a frequency divider chip provided in the second aspect of the invention.
Description of the drawings:
fig. 1 is a schematic diagram of a low-temperature low-noise parameter frequency divider circuit without dc power consumption according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an equivalent circuit of a variable capacitance branch circuit in operation according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a transmission signal during operation of an LC resonant frequency divider circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a frequency divider chip according to an embodiment of the present invention;
FIG. 5 is a diagram showing S-parameter simulation test results of a frequency divider chip having the circuit structure shown in FIG. 1;
FIG. 6 is a diagram showing the results of a simulation test of the operating bandwidth of a frequency divider chip having the circuit structure shown in FIG. 1;
FIG. 7 is a graph comparing test data of noise simulation of a parametric divider circuit (PFD), a current-mode logic divider Circuit (CML), and a true single-phase clock divider (TSPC) according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a quantum measurement and control chip according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings and specific examples. It should not be construed that the scope of the above subject matter of the present invention is limited to the following embodiments, and all techniques realized based on the present invention are within the scope of the present invention.
In one embodiment of the present invention, there is provided a low temperature low noise parametric frequency divider circuit without direct current power consumption as shown in fig. 1, comprising:
an LC resonant frequency divider circuit 100 configured to divide the pump signal by two and couple the divided signal to the output circuit;
the output circuit 200 is configured to suppress higher harmonics in the frequency-divided signal;
wherein the LC resonant frequency divider circuit 100 comprises: the variable capacitance circuit comprises an odd number of variable capacitance branches which are sequentially arranged, wherein two ends of each variable capacitance branch are respectively connected with two ends of a previous variable capacitance branch which is adjacently arranged in parallel through an inductor, two ends of the variable capacitance branch which is arranged at the forefront are respectively used for being connected with the input signal, and two ends of the variable capacitance branch which is arranged at the last are directly coupled;
in this embodiment, the variable capacitance branch includes: two variable capacitors and a phase compensation capacitor; one end of one variable capacitor is used as one end of the variable capacitor, one end of the other variable capacitor is used as the other end of the variable capacitor branch, and the other ends of the two variable capacitors are coupled to one end of the phase compensation capacitor together; the other end of the phase compensation capacitor is grounded.
Wherein the variable capacitance is a variable capacitance diode; and in the variable capacitance branch, the controlled ends of the variable capacitance diodes are commonly coupled to a DC bias input. Therefore, the direct current bias voltage input by the controlled end of the varactor diode can be regulated to realize the maximum frequency division bandwidth, so that the LC resonance frequency division circuit 100 works in the 11-15 GHz band, and the working bandwidth is 4GHz.
Specifically, each variable capacitance branch in LC resonant divider circuit 100 forms a nonlinear differential transmission line that forms a distributed resonant circuit that is maintained by the pump signal via the parametric amplification principle, and when sufficient gain is applied to compensate for resonator losses, oscillations begin from the ambient thermal noise of the resonant circuit, and the oscillation frequency is phase synchronized with a subharmonic of the pump signal, which can perform the function of the divide-by-two divider.
Any thermal noise pair on the nonlinear differential transmission line can be expressed as the sum of a common-mode component and a differential-mode component, and analysis can obtain that when the differential-mode noise phase and the pumping signal phase meet the fixed phase difference synchronization, the generation of a frequency division signal can be realized through a parameter amplification principle, and the common-mode noise component is attenuated. Meanwhile, the nonlinear differential transmission line has the dispersion problem, namely the propagation constants of signals with different frequencies on the transmission line are different, and the phase difference between the signals with different frequencies can be changed along with the increase of the propagation distance, so that the generation condition of the parameter frequency division signal is destroyed. Therefore, the differential mode signals shown in fig. 2 (a) and (b) are required to be short-circuited to virtual ground, the propagation constant of the pump signal is independently changed by the phase compensation capacitor structure visible by the common mode signals, the phase between the pump signal and the differential mode noise is compensated and fixed, so that the differential mode component is reflected back and forth between the two reflection ends through the parameter amplification principle and forms a standing wave, and the antinode point differential output realizes larger output signal amplitude, namely as shown in fig. 3.
The output circuit 200 includes: a pi-type resistor network 201, a transformer 202, a first filter circuit 203 and a second filter circuit 204; two endpoints of an input port of the pi-type resistor network 201 are respectively coupled with two ends of one variable capacitance branch of the output common-mode pumping signal closest to a wave node through a variable capacitor, and two endpoints of an output port of the pi-type resistor network are respectively coupled with two ends of a primary coil of the transformer 202; one end of the secondary winding of the transformer 202 is coupled to the input end of the first filter circuit 203, and the other end is coupled to the input end of the second filter circuit 204; the outputs of the first filter circuit 203 and the second filter circuit 204 are configured as differential outputs.
In the present embodiment, the output circuit 200 couples the output signal (including the pump signal and the frequency-divided signal) of the LC resonant frequency-dividing circuit 100 through the variable capacitor, so that the in-band flatness can be compensated; the pi-type resistor network attenuation 201 in the output circuit 200 can reduce the influence of the output circuit on the resonant circuit; the transformer 202, the first filter circuit 203, and the second filter circuit 204 in the output circuit 200 further realize suppression of common mode signals and higher harmonics of the output signal. The variable capacitance used by the output circuit 200 for coupling the output signal of the LC resonant frequency division circuit 100 may also be a variable capacitance diode, and more specifically, the variable capacitance diode used in the embodiment of the present invention is a CMOS accumulation type variable capacitance diode.
In this embodiment, the LC resonant frequency divider circuit 100 includes: 5 variable capacitance branches; and two ends of the input port of the pi-type resistor network 201 in the output circuit 200 are respectively coupled with two ends of the fourth variable capacitance branch through a variable capacitor. Through simulation test, in the 5 variable capacitance branches, the common-mode pump signal output by the fourth variable capacitance branch is closest to the wave node, so that in order to realize the output of the common-mode pump signal with larger amplitude at the antinode point of the differential-mode signal, the output circuit 200 is coupled to two ends of the fourth variable capacitance branch;
in this embodiment, the first filter circuit and the second filter circuit are both LC parallel filter circuits, and two ends of a primary coil and two ends of a secondary coil of the transformer are respectively grounded through a capacitive coupling, so that the output of a common-mode pumping signal can be suppressed by the coupling filter network; meanwhile, the transformer is configured to form 50 omega load matching with the first filter circuit and the second filter circuit respectively, and extra noise and direct current bias are not introduced due to the adoption of passive devices.
In one embodiment of the present invention, there is provided a frequency divider chip as shown in fig. 4, including: a substrate; and the low-temperature low-noise parameter frequency divider circuit without direct current power consumption is formed on the substrate.
In some possible embodiments, the low-temperature low-noise parametric frequency divider circuit without direct current power consumption is manufactured by a CMOS process. In addition, the frequency divider chip provided in the embodiment of the present invention may be manufactured by using other different mature chip manufacturing processes, which will not be described herein.
As shown in fig. 5 to 7, by constructing a low-temperature test platform, the working performance index of the parameter frequency divider chip provided by the embodiment of the invention under a low-temperature environment (4.9K) is tested, including a locking range and output power. The method can obtain the following steps: the in-band noise floor is reduced by 75% and the out-of-band noise floor is reduced by 90% when the parameter frequency divider chip provided by the embodiment of the invention works in a low-temperature environment (4.9K), the frequency division locking range of the parameter frequency divider chip is 11.9-14GHz, when VCC is smaller, the circuit works in a lower frequency band and has larger output power, the frequency division range of the circuit moves to a high frequency along with the increase of VCC, the output power is reduced, and the locking range under each bias voltage is basically unchanged.
In order to develop a low-temperature quantum measurement and control system capable of working in a similar temperature area with a quantum chip, the system not only needs to solve the performance problem that each circuit module in the quantum measurement and control system works in a low-temperature environment, but also solves the problems that the quantum measurement and control system is large in size, high in complexity of interconnection of measurement and control signals, low in quantum fidelity due to room-temperature thermal radiation noise, high in power consumption of a dilution refrigerator due to multi-channel signal calibration and crosstalk, and the like. The low-temperature CMOS integrated circuit working in the 1-4K temperature region can reduce the volume of the quantum measurement and control system, reduce the interconnection requirement of normal temperature measurement and control signals and improve the measurement and control fidelity of the quantum bits, so that the low-temperature CMOS integrated circuit can be used as an integrated scheme for realizing measurement and control of a large-scale physical quantum bit array.
Since the quantum measurement and control system includes: the frequency divider circuit is used as a basic module which is usually in a high-frequency band to be widely applied to a frequency synthesizer, orthogonal signal generation, clock generation and radio frequency transceiver front end. Accordingly, in one embodiment of the present invention, there is also provided a quantum measurement and control chip 10 as described in fig. 8, comprising:
a control unit for controlling the qubits in the quantum chip 20;
a reading unit for reading the qubits in the quantum chip 20;
the reading unit and/or the control unit comprises at least one low-temperature low-noise parameter frequency divider circuit without direct current power consumption or a frequency divider chip provided in the embodiment of the invention.
The low-temperature low-noise parameter frequency divider circuit without direct current power consumption provided by the embodiment of the invention considers the factors of a low-temperature working environment, and has no direct current power consumption and the equivalent noise of the circuit is linearly reduced along with the temperature reduction under the low-temperature environment because active elements such as transistors and the like are not used, so that the phenomenon of low-temperature noise saturation is avoided; meanwhile, the LC resonance frequency division circuit can enable an input pumping signal and an output frequency division signal to form two standing waves of a common mode and a differential mode respectively, the pumping signal is restrained by the output circuit, the output signal is enabled to keep a larger amplitude, and common mode noise of a front-stage circuit is restrained by common mode-differential mode conversion. Therefore, the power consumption and noise of the frequency divider can be obviously reduced in a low-temperature working environment; the method is particularly suitable for quantum measurement and control application scenes.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (10)
1. A low temperature low noise parametric frequency divider circuit without dc power consumption, comprising:
an LC resonant frequency divider circuit configured to divide the pump signal by two and couple the divided signal to the output circuit;
the output circuit is configured to suppress higher harmonics in the frequency-division signal;
wherein the LC resonant frequency divider circuit comprises: the variable capacitance circuit comprises a plurality of variable capacitance branches which are sequentially arranged, wherein two ends of each variable capacitance branch are respectively connected with two ends of a previous variable capacitance branch which is adjacently arranged through an inductor in parallel, two ends of the variable capacitance branch which is arranged at the forefront are respectively used for accessing input signals, and two ends of the variable capacitance branch which is arranged at the last are directly coupled;
the output circuit includes: the transformer comprises a pi-type resistor network, a transformer, a first filter circuit and a second filter circuit; two endpoints of an input port of the pi-type resistor network are respectively coupled with two ends of one variable capacitance branch which is closest to a wave node of an output common-mode pumping signal through a variable capacitor, and two endpoints of an output port of the pi-type resistor network are respectively coupled with two ends of a primary coil of the transformer; one end of a secondary coil of the transformer is coupled with the input end of the first filter circuit, and the other end of the secondary coil of the transformer is coupled with the input end of the second filter circuit; the outputs of the first and second filter circuits are configured as differential outputs.
2. The low temperature low noise parametric frequency divider circuit without dc power consumption of claim 1, wherein the variable capacitance branch comprises: two variable capacitors and a phase compensation capacitor; one end of one variable capacitor is used as one end of the variable capacitor branch, one end of the other variable capacitor is used as the other end of the variable capacitor branch, and the other ends of the two variable capacitors are coupled with one end of the phase compensation capacitor together; the other end of the phase compensation capacitor is grounded.
3. A low temperature low noise parametric frequency divider circuit without dc power consumption as claimed in claim 2, wherein the variable capacitance is a variable capacitance diode; and in the variable capacitance branch, the controlled ends of the variable capacitance diodes are commonly coupled to a DC bias input.
4. The low temperature low noise parametric frequency divider circuit without dc power consumption of claim 1, wherein the two ends of the primary winding and the two ends of the secondary winding of the transformer are respectively grounded through a capacitive coupling.
5. The low temperature low noise parametric frequency divider circuit without dc power consumption of claim 1, wherein the first filter circuit and the second filter circuit are LC parallel filter circuits.
6. The low-temperature low-noise parametric frequency divider circuit without direct current power consumption according to any one of claims 1 to 5, wherein the LC resonant frequency divider circuit comprises: 5 variable capacitance branches; and two end points of the input port of the pi-type resistor network are respectively coupled with two ends of a fourth variable capacitance branch through a variable capacitance.
7. The low temperature low noise parametric frequency divider circuit without dc power consumption as claimed in any one of claims 1-5, wherein the transformer is configured to form a 50Ω load match with the first filter circuit and the second filter circuit, respectively.
8. A frequency divider chip, comprising:
a substrate; the low-temperature low-noise parametric frequency divider circuit without direct current power consumption according to any one of claims 1 to 7, which is formed on the substrate.
9. The frequency divider chip of claim 8, wherein the low temperature low noise parametric frequency divider circuit without direct current power consumption is fabricated using a CMOS process.
10. The quantum measurement and control chip is characterized by comprising:
a control unit for controlling the quantum bits in the quantum chip;
the reading unit is used for reading the quantum bits in the quantum chip;
the reading unit and/or the control unit comprises at least one low-temperature low-noise parameter frequency divider circuit without direct current power consumption according to any one of claims 1 to 7 or a frequency divider chip according to claim 8 or 9.
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| 基于硅基工艺的220GHz压控振荡器和注锁分频器设计;蔡运城;《中国优秀硕士学位论文全文数据库信息科技辑》;20210215;I135-724 * |
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